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Merge pull request #12170 from OpenNuvoton/nuvoton_iar_dynamic_heap 

Nuvoton: Support dynamic heap configuration on IAR
pull/12183/head
Martin Kojtal 2020-01-02 10:12:03 +00:00 committed by GitHub
parent a7b312d687 c99dc34f65
commit adcd0066ca
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GPG Key ID: 4AEE18F83AFDEB23
6 changed files with 17 additions and 17 deletions
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4
targets/TARGET_NUVOTON/TARGET_M251/device/TOOLCHAIN_IAR/M251.icf
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@ -51,7 +51,7 @@ define symbol __ICFEDIT_region_IRAM_end__ = MBED_RAM_APP_START + MBED_RAM_
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0x4000;
define symbol __ICFEDIT_size_heap__ = 0x400;
/**** End of ICF editor section. ###ICF###*/
@ -62,7 +62,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFE
define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
define block HEAP with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__ { };
/* NOTE: Vector table base address is required to be 128-byte aligned at a minimum.
* A PE might impose further restrictions on it. */
define block IRAMVEC with alignment = 1024, size = 4 * (16 + 64) { };

6
targets/TARGET_NUVOTON/TARGET_M261/device/TOOLCHAIN_IAR/M261.icf
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@ -34,7 +34,7 @@ define symbol __region_CRASH_DATA_RAM_end__ = 0x20018000 - 1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_intvec__ = (4 * (16 + 102));
define symbol __ICFEDIT_size_heap__ = 0x8000;
define symbol __ICFEDIT_size_heap__ = 0x400;
/**** End of ICF editor section. ###ICF###*/
@ -43,8 +43,8 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED
define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__];
define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__ { };
/* NOTE: Vector table base requires to be aligned to the power of vector table size. Give a safe value here. */
define block IRAMVEC with alignment = 1024, size = __ICFEDIT_size_intvec__ { };

6
targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_IAR/M453.icf
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@ -13,7 +13,7 @@ define symbol __ICFEDIT_region_IRAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_IRAM_end__ = 0x20008000 - 1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0x4000;
define symbol __ICFEDIT_size_heap__ = 0x400;
/**** End of ICF editor section. ###ICF###*/
@ -21,8 +21,8 @@ define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__ { };
/* NOTE: Vector table base requires to be aligned to the power of vector table size. Give a safe value here. */
define block IRAMVEC with alignment = 1024, size = 4 * (16 + 64) { };

6
targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_IAR/M487.icf
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@ -16,7 +16,7 @@ define symbol __region_CRASH_DATA_RAM_end__ = 0x20028000 - 1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_intvec__ = (4 * (16 + 96));
define symbol __ICFEDIT_size_heap__ = 0x10000;
define symbol __ICFEDIT_size_heap__ = 0x400;
/**** End of ICF editor section. ###ICF###*/
@ -25,8 +25,8 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED
define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__];
define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__ { };
/* NOTE: Vector table base requires to be aligned to the power of vector table size. Give a safe value here. */
define block IRAMVEC with alignment = 1024, size = __ICFEDIT_size_intvec__ { };

6
targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_SUPPORTED/NUC472_442.icf
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@ -17,7 +17,7 @@ define symbol __ICFEDIT_region_XRAM_start__ = 0x60000000;
define symbol __ICFEDIT_region_XRAM_end__ = 0x60100000 - 1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0xC0000;
define symbol __ICFEDIT_size_heap__ = 0x400;
/**** End of ICF editor section. ###ICF###*/
@ -31,8 +31,8 @@ define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__
define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__;
define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__ { };
/* NOTE: Vector table base requires to be aligned to the power of vector table size. Give a safe value here. */
define block IRAMVEC with alignment = 1024, size = 4 * (16 + 142) { };
/* Move non-critical libraries to external SRAM while internal SRAM is insufficient. */

6
targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_UNSUPPORTED/NUC472_442.icf
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@ -15,7 +15,7 @@ define symbol __region_CRASH_DATA_RAM_start__ = 0x2000FF00;
define symbol __region_CRASH_DATA_RAM_end__ = 0x20010000 - 1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0x8000;
define symbol __ICFEDIT_size_heap__ = 0x400;
/**** End of ICF editor section. ###ICF###*/
@ -28,8 +28,8 @@ define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__
define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__;
define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__ { };
/* NOTE: Vector table base requires to be aligned to the power of vector table size. Give a safe value here. */
define block IRAMVEC with alignment = 1024, size = 4 * (16 + 142) { };