Added pin description comments to Arduino header pins and LED4.
Added I2C alias names.
Removed Oscillator and DEBUG pin definitions.
Use USBTX and USBRX for serial communications back to PC. Do not use STDIO_UART_TX and STDIO_UART_RX
Consider the following factors to define WDT reset delay:
1. Cannot be too small. This is to avoid premature WDT reset in pieces of timeout cascading.
2. Cannot be too large. This is to pass Greentea reset_reason/watchdog_reset tests, which have e.g. 50~100 reset delay tolerance.
The ADC range was previously 0-VBGR*2 (0 - 2.4 V). Change the reference
so that the ADC range is 0 - VDDA, to bring it in line with the documented
behavior of the mbed hal.
This target uses the QSPI interface hardware in XIP mode to allow
memory-mapped access to the WiFi interface firmware. This is
incompatible with the MMIO mode upon which QSPIFBlockDevice relies
to send specific commands over the QSPI bus.
For NUCLEO_F401RE, NUCLEO_F411RE, NUCLEO_F303RE, and DISCO_L475VG_IOT01A:
* Ensure the scatter files for the ARM toolchain use 2 region memory model.
The scatter files changes affects the following boards:
* NUCLEO_F401RE, STEVAL_3DP001V1 (stm32f401xe.sct)
* NUCLEO_F411RE, MTS_MDOT_F411RE, MTS_DRAGONFLY_F411RE, MTB_MTS_DRAGONFLY, SAKURAIO_EVB_01 (stm32f411re.sct)
* NUCLEO_F303RE, NUCLEO_F303ZE (stm32f303xe.sct)
* DISCO_L475VG_IOT01A, MTB_STM_L475 (stm32l475xx.sct)
* Remove the TOOLCHAIN_ARM_MICRO directories.
* Remove release_version as not necessary and as the targets can also run
Mbed OS 6.
* Remove uARM support for all FAMILY_STM32 targets.
Make the MUSCA_B1 target TF-M compatible by doing the following:
- Add flash, region definitions, and preprocessed image macros from
TF-M (at version 6e7be077eabe "Core: Add lifecycle API")
- Update the MUSCA_B1 linker script to create a flash image
compatible with TF-M.
- Update the tfm/bin_utils/assemble.py signing script to work with
preprocessed image macros rather than flat C pre-processor defines
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Jaeden Amero <jaeden.amero@arm.com>
Make the MUSCA_A1 target TF-M compatible by doing the following:
- Add flash, region definitions, and preprocessed image macros from
TF-M (at version 6e7be077eabe "Core: Add lifecycle API")
- Update the MUSCA_A1 linker script to create a flash image
compatible with TF-M.
- Update the tfm/bin_utils/assemble.py signing script to work with
preprocessed image macros rather than flat C pre-processor defines
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Jaeden Amero <jaeden.amero@arm.com>
Original implementation doesn't enable watchdog reset in pieces of cascaded timeout, except the last one. This is to guarantee re-configuration can be in time, but in interrupt disabled scenario e.g. Hard Fault, watchdog reset can cease to be effective.
This change enables watchdog reset all the way of cascaded timeout. With trade-off, guaranteed watchdog reset function is more significant than re-configuration in time.
* Update scatter file for the ARM toolchain to use 2 region memory model.
The scatter file changes affect the following boards:
* LPC1768, ARCH_PRO, UBLOX_C027, XBED_LPC1768 (LPC1768.sct)
* Remove the TOOLCHAIN_ARM_MICRO directory.
* Remove release_version as not necessary and as the target can also run
Mbed OS 6.
* Remove uARM toolchain in the list of supported toolchains for the target.
* Indicate that the target supports the small ARM toolchain C library.
Remove PSA v8-M S target binaries will be built outside of Mbed OS and
added in as binaries which NS targets consume. Mbed OS no longer
implements PSA for v8-M targets, so there is no reason for it to build
PSA S targets.
Signed-off-by: Jaeden Amero <jaeden.amero@arm.com>
Mbed OS depends on TF-M to implement PSA. Any targets that need to
provide PSA must be supported by TF-M. The following targets are removed
from Mbed OS as they don't yet have TF-M support. We can re-add these
targets to Mbed OS when they have TF-M support in the official upstream
TF-M repository hosted at trustedfirmware.org.
These PSA targets no longer have a PSA implementation and are removed:
- LPC55S69
- LPC55S69_NS
- LPC55S69_S
- NU_PFM_M2351_NS
- NU_PFM_M2351_S
- HANI_IOT
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Jaeden Amero <jaeden.amero@arm.com>
* Use two memory regions in ARM toolchain linker file to support Microlib
* Replace `target.default_lib` with `target.c_lib`
* Specify supported lib sizes per toolchain
* Add support for Mbed OS versions after Mbed 2
'received' was declared as an int but populated by cyhal_spi_transfer
after being cast to to (uint8_t *), which left the upper 3 bytes
uninitialized. Instead, declare as uint8_t and let the compiler upcast
the value when it is returned.
All MBED_SPM targets have been removed previously, via commits
5cc66282dd ("PSOC6: remove PSA targets") and 115b09aba43b ("psoc6:
Remove FUTURE_SEQUANA and FUTURE_SEQUANA_M0"). Remove all the dead
MBED_SPM code, as no targets use it.
Signed-off-by: Jaeden Amero <jaeden.amero@arm.com>
The Nordic SoftDevice BLE stack used by NRF51* targets only
supports legacy BLE APIs which we will removed completely.
Note: NRF52* targets which use Cordio BLE stack are unaffected.
The current Maxim BLE driver only implements the old BLE API
which is deprecated and will be removed soon. Once an updated
BLE stack for Maxim becomes available, BLE feature can be
re-enabled.
This change adds 'sectors' configuration option into 'targets.json' to enable bootloader for Nuvoton targets.
Though 'arm_pack_manager/index.json' has `sectors` available, Nuvoton's cmsis pack 'Nuvoton.NuMicro_DFP.pdsc' doesn't have 'sectors' entries and they must add into `index.json` manually. But not apply to all chip subfamilies.
To support custom board which uses a different chip subfamily, add 'secotors' into 'targets.json' for all Nuvoton targets which enable Flash IAP.
Make the CY8CKIT_064S2_4343W target TF-M compatible by addding flash and
region definitions from TF-M (at c4f37c18c4a0) and by updating the
CY8CKIT_064S2_4343W linker script to create a flash image compatible
with TF-M.
Signed-off-by: Jaeden Amero <jaeden.amero@arm.com>
There are two timers, Timer0 and Timer1, available on the PSoC64. Timer0
has 8 channels and Timer1 has 24 channels. TF-M regression tests make
use of Timer0 Channel 0 and Timer0 Channel 1. Therefore, reserve the
timer channels used by TF-M. This approach can be replaced once we have
a way to allocate dedicated timers for TF-M and Mbed OS.
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Vikas Katariya <vikas.katariya@arm.com>
For the application(firmware) booted by bootloader(OTA),
the image doesn't need the "flash_config" and "ivt" header.
So update the link file to support both kinds of application
(firmware) booted by bootROM and bootloader.
In default, the compilation will get the image with
"flash_config" and "ivt" header, for example the bootloader
compiling.
When compiling the OTA application image, please add the
line as below in the mbed_app.json file.
"target.macros_add" : ["MBED_APP_COMPILE"]
This will remove the "flash_config" and "ivt" header in the
final image.
Signed-off-by: Gavin Liu <gang.liu@nxp.com>
Update the flash driver to support both Hyper Flash
and QSPI Flash.
In addition, the static function cannot be linked to
SRAM even defined by AT_QUICKACCESS_SECTION_CODE macro.
So remove all "static" modifier for the FLASHIAP
functions.
Signed-off-by: Gavin Liu <gang.liu@nxp.com>
The memset function from c library will be linked in flash
space, it's risk for FLASHIAP. So I wrote flexspi_memset
to replace the memset for IMX FLASHIAP, and put the function
into targets/.../TARGET_IMX/flash_api.c file. All IMX Soc
platforms can declare it as extern and use in their Soc
flexspi driver files.
Signed-off-by: Gavin Liu <gang.liu@nxp.com>
The flash access may fail when implementing flash
initialization. So there is risk for interrupt handler
which linked in flash space.
Add the critical section to avoid the risk.
Signed-off-by: Gavin Liu <gang.liu@nxp.com>
NXP MIMXRT1050 EVK can support Hyper Flash or QSPI Flash with
small hardware reworks. Modify the XIP file to support boot
from the two kinds of Flash device. The Hyper Flash should be
the default device and defined in tartgets.json with the macro
"HYPERFLASH_BOOT". To select the QSPI Flash, just remove the
macro with the below line in any overriding json file.
"target.macros_remove" : ["HYPERFLASH_BOOT"]
Signed-off-by: Gavin Liu <gang.liu@nxp.com>
In case when target.mbed_ram_start and target.mbed_ram_size are not set
neither in targets.json nor in mbed_app.json, the IRAM1 region values
defined in tools/arm_pack_manager/index.json are passed by Mbed CLI as
the linker script preprocessing flags. As a result, wrong addresses of
MBED_RAM_START and MBED_RAM_SIZE are defined in the linker script since
CMSIS DFP pack has no information about RAM split between CM0+ and CM4 applications.
Set the values explicitly in targets.json to ensure the correct RAM layout.
The MBED_ROM_START and MBED_ROM_SIZE provided by CMSIS DFP are already
correct since the linker scripts places CM4 vector table at MBED_APP_START,
taking into account the flash application area of the CM0+ prebuilt application.
Relevant modifications:
1. Support degrading QSPI0/1 to SPI4/5 for normal SPI transfer
2. Fix with BSP crypto driver API change
3. Fix with BSP PDMA driver API change
4. Make necessary modifications to pass FPGA CI Test Shield tests
5. Don't distinguish pinmap among parts e.g. M480 LG. Application users must take care.