Commit Graph

7032 Commits (920133e8edab4e77be2dacf414bd193fdba758c7)

Author SHA1 Message Date
Martin Kojtal 920133e8ed
Merge pull request #13118 from evedon/ed-full-profile
Replaced rtos profile with full profile
2020-06-18 22:19:59 +02:00
Jaeden Amero 4961d4a52d psa: Configure Mbed TLS to use PSA as needed
Configure Mbed TLS to automatically enable PSA as needed. When Mbed OS
is configured to use PSA, configure Mbed TLS to use PSA. This prevents
leaking of the "how to make Mbed TLS use PSA" knowledge up into
targets.json, and thus makes porting simpler. There is now one place
where "how to make TLS use PSA" exists rather than repeated throughout
targets.json for each target that can't inherit from PSA_Target.
2020-06-18 12:18:12 +01:00
Devaraj Ranganna 76e911c5ef psa: Replace Mbed PSA with TF-M
Add TF-M to Mbed OS, replacing the previous PSA implementation for
TF-M-capable targets. This commit adds files imported from TF-M, without
modification. The version of TF-M imported can be found in
`features/FEATURE_PSA/TARGET_TFM/VERSION.txt`.

These changes switch to TF-M as the sole PSA implementation for v8-M and
dual core targets, with TF-M running on the secure side and Mbed OS
running on the non-secure side. Single core v7-M targets will continue
to have PSA implemented via PSA emulation, implemented by Mbed OS.

Move or remove many PSA-implementing files, as PSA will be provided by
TF-M on non-single-v7-M targets. Delete any files that are not relevant
for PSA emulation mode.
 - Remove imported TF-M SPM
 - Remove Mbed SPM and tests
 - Remove Mbed-implemented PSA services and tests
 - Remove PSA_SRV_IMPL, PSA_SRV_IPC, PSA_SRV_EMUL and NSPE.
 - Replace PSA_SRV_EMUL and PSA_SRV_IMPL with MBED_PSA_SRV
 - Remove any files autogenerated by
   "tools/psa/generate_partition_code.py", which no longer exists.

Add new feature `PSA` to support PSA in Mbed OS.

Move the Mbed OS implementation of PSA services for v7-M targets (which
employ PSA emulation, and don't yet use TF-M) to
features/FEATURE_PSA/TARGET_MBED_PSA_SRV. Update the `requires`
attribute in TESTS/configs/baremetal.json to avoid breaking baremetal
testing builds.

Update .astyleignore to match new directory structure

Update Mbed TLS importer to place files into FEATURE_PSA

Create the following generic PSA targets:

* `PSA_Target` (Root level PSA generic target)
* `PSA_V7_M` (Single v7-M PSA generic target)
* `PSA_DUAL_CORE` (Dual-core PSA generic target)
* `PSA_V8_M` (v8-M PSA generic target)

Flatten MUSCA_NS and private MUSCA targets into public MUSCA targets.

Move mcuboot.bin to flat location (removing prebuilt folder)

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Jaeden Amero <jaeden.amero@arm.com>
2020-06-18 12:16:20 +01:00
Devaraj Ranganna 01dd997d55 target: Include missing `cmsis_nvic.h`
The header `cmsis_nvic.h` defines vector start address in RAM
`NVIC_RAM_VECTOR_ADDRESS` which is used in
`mbed_boot.c:mbed_cpy_nvic()`. But `mbed_boot.c` only includes
`cmsis.h`. Due to this `mbed_cpy_nvic` becomes an empty function and the
vectors don't get relocated to RAM. This causes BusFault error when Mbed
OS tries to update any of the IRQ handlers.

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
2020-06-18 12:16:19 +01:00
Devaraj Ranganna db67302850 target: Add BL2 macro to MUSCA B target config
BL2 macro is used in `region_defs.h` to define the `BL2_HEADER_SIZE`.
Without BL2 macro, `BL2_HEADER_SIZE` is set to 0. This leads to
incorrect start address (Reset_Handler of Mbed OS) derived by TF-M based
on `region_defs.h` and BL2 macro.

BL2 macro is set for MUSCA B in TF-M.

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
2020-06-18 12:16:17 +01:00
Devaraj Ranganna e2af612a99 tools: Musca B1 signing strategy
Currently, the final binary (TF-M + Mbed OS) is signed after
concatenating TF-M and Mbed OS binaries. But TF-M signs the images
separately and then concatenates them. Update the Musca B1 signing
strategy to match TF-M.

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
2020-06-18 12:16:16 +01:00
Jaeden Amero dc22d89c7f musca_b1: Remove device-specific virtual NVIC
Use instead the general TF-M v8-M virtual NVIC which will be added in
the commit that replaces Mbed PSA with TF-M PSA:
features/FEATURE_PSA/TARGET_TFM/TARGET_TFM_V8M/src/cmsis_nvic_virtual.c
2020-06-18 12:16:14 +01:00
Jaeden Amero d314a6cc57 cypress: psoc64: Add TF-M compatibility (again)
Partially revert f38e21fa6c ("Update PSoC 6 BSPs to verion 1.2") to
restore TF-M compatibility.

Make the CY8CKIT_064S2_4343W target TF-M compatible by addding flash and
region definitions from TF-M (at c4f37c18c4a0) and by updating the
CY8CKIT_064S2_4343W linker script to create a flash image compatible
with TF-M.

Fixes: f38e21fa6c ("Update PSoC 6 BSPs to verion 1.2")

Signed-off-by: Jaeden Amero <jaeden.amero@arm.com>
2020-06-18 12:16:10 +01:00
Martin Kojtal e9b1df671e
Merge pull request #13143 from jeromecoutant/PR_H7_BARE
STM32H7: correct Ethernet issue in baremetal
2020-06-18 10:25:51 +02:00
Martin Kojtal eebd773d3a
Merge pull request #13148 from OpenNuvoton/nuvoton_remove_m2351_npsa_from_6.0
M2351: Remove from master
2020-06-18 10:24:41 +02:00
Martin Kojtal 29aa6d8ea5
Merge pull request #13115 from NXPmicro/MXRT1050_USB
MIMXRT1050_EVK: Add USB support
2020-06-18 09:56:47 +02:00
Martin Kojtal 66343b0d25
Merge pull request #12937 from macronix/macronix_qspi
Modify the operation of setting qspi frequency when calling Octo controller
2020-06-18 09:43:45 +02:00
Martin Kojtal aafae5d644
Merge pull request #12751 from jeromecoutant/PR_WB_USB
STM32WB: enable USB Device
2020-06-18 09:42:42 +02:00
Chun-Chieh Li 95635f9c54 M2351: Remove from master
Since Mbed OS 6.0, secure build is not supported yet. Remove it from master temporarily.

For non-TF-M support (NU_PFM_M2351_NPSA_S/NS), go to mbed-os-5.15 branch and Mbed OS 5.15 release.

For TF-M support (NU_PFM_M2351_S/NS), this needs M2351 integrated into TF-M repo first.
Expect M2351 TF-M support can come back into master after integration with TF-M is finished.
2020-06-18 09:42:29 +08:00
Martin Kojtal 86dad5cda9
Merge pull request #12471 from AGlass0fMilk/adc-voltage-api
Extend AnalogIn API: read_voltage
2020-06-17 19:57:28 +02:00
jeromecoutant b4d31ae863 STM32H7: correct Ethernet issue in baremetal 2020-06-17 18:39:34 +02:00
Mahesh Mahadevan 9e8998a91c KW41Z: Avoid using TARGET_NXP macro
Having Freescale and NXP macro causes compile from both
TARGET_Freescale and TARGET_NXP HAL folders.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2020-06-17 11:04:35 -05:00
Mahesh Mahadevan 469ada5a11 MIMXRT1050_EVK: Fix to linker script for non-cached region
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2020-06-17 11:04:35 -05:00
Mahesh Mahadevan 81a1193012 MIMXRT1050_EVK: Add USB support
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2020-06-17 11:04:35 -05:00
Kyle Kearney 6a2d93ee94 Add optional post-bsp-init hook
This allows the application to inject its own resource reservations
immmediately after the BSP (and therefore HAL) is initialized,
ensuring that they can claim require resources before mbed tries
to use them for more flexible purposes. For example, the application
might want to claim a particular timer to make sure that it doesn't
get picked for us_ticker (which can use any arbitrary timer instance).
2020-06-16 11:07:34 -07:00
Kyle Kearney ab5eb07e3c Stop the us_ticker timer before deepsleep
A running timer will block DeepSleep, which would normally be
good because we don't want the timer to accidentally lose counts.
We don't care about that for us_ticker (If we're requesting deepsleep
the upper layers already determined that they are okay with that),
so explicitly stop the us_ticker timer before we go to sleep and
start it back up afterwards.
2020-06-16 11:07:34 -07:00
Martin Kojtal 3333f4185e
Merge pull request #12747 from jeromecoutant/PR_MBEDTLS
STM32 MBEDTLS support with HW crypto
2020-06-16 13:55:50 +02:00
Martin Kojtal 7b5a8d37b5
Merge pull request #12966 from MultiTechSystems/update-df413-onoff
DRAGONFLY_F413RH: Update power on and power off functionality
2020-06-16 13:54:01 +02:00
Martin Kojtal 0614e92c5b
Merge pull request #13083 from jeromecoutant/PR_H7_CUBE170
STM32H7 update drivers version to CUBE V1.7.0
2020-06-16 13:45:42 +02:00
Martin Kojtal 0b0ab6bf87
Merge pull request #13086 from jeromecoutant/PR_F1
STM32F1 update drivers version to CUBE V1.8.0
2020-06-16 13:45:25 +02:00
Martin Kojtal e901ea9845
Merge pull request #13100 from vmedcy/pr/fix-13058
Fix BOOT_HEADER_SIZE allocation in ARM scatter files (#13058)
2020-06-16 13:45:06 +02:00
Evelyne Donnaes 4d3c6b3a64 Replaced rtos profile with full profile 2020-06-15 13:42:24 +01:00
jeromecoutant dcf2490b5a STM32F1 STM32Cube FW V1.8.0: update for MBED 2020-06-15 13:49:47 +02:00
jeromecoutant c99c8b5036 STM32F1 STM32Cube FW V1.6.1 => V1.8.0: target part
- SetSysClock update
2020-06-15 13:49:47 +02:00
jeromecoutant ce3fc30cf0 STM32F1 STM32Cube FW V1.6.1 => V1.8.0 2020-06-15 13:49:46 +02:00
jeromecoutant f13b06a7bc STM32F1 STM32Cube FW V1.6.1 => V1.8.0: Driver part 2020-06-15 13:49:46 +02:00
jeromecoutant 97bf6fa386 STM32F1 STM32Cube FW V1.6.1 => V1.8.0: CMSIS part 2020-06-15 13:49:46 +02:00
jeromecoutant 1152c651d9 STM32F1: targets inherit from non public default MCU configuration 2020-06-15 13:49:39 +02:00
jeromecoutant 533fe21750 STM32F1: directory restructuration 2020-06-15 13:48:04 +02:00
Martin Kojtal 8b70dfe593
Merge pull request #13095 from jeromecoutant/PR_FULLBARE
STM32: MCU_STM32 supports rtos and bare-metal profiles
2020-06-15 11:30:50 +02:00
Anna Bridge a870fcface
Merge pull request #13001 from jeromecoutant/PR_BAREMETAL_SUPPORT_STEP2
STM32 baremetal support step2 (L1/L4/WB)
2020-06-12 14:44:14 +01:00
Anna Bridge 58975d1df4
Merge pull request #13091 from jeromecoutant/PR_BAREMETAL_SUPPORT
STM32 baremetal support step3/3 (F2/F4)
2020-06-12 14:42:35 +01:00
Anna Bridge 727cf54873
Merge pull request #13073 from jeromecoutant/PR_H7_FPGA
STM32H7: FPGA tests support
2020-06-11 14:39:31 +01:00
jeromecoutant 46ccded9b1 STM32: MCU_STM32 supports rtos and bare-metal profiles 2020-06-10 14:25:24 +02:00
Martin Kojtal 698fc09b4c
Merge pull request #12615 from jeromecoutant/PR_FPGA_UART
FPGA UART test cases addition with 7 and 9 bits data length
2020-06-10 13:51:18 +02:00
Martin Kojtal 878875c884
Merge pull request #13090 from jeromecoutant/PR_DEVICE_H
STM: move us_ticker_defines.h include
2020-06-10 11:53:57 +02:00
Martin Kojtal 0f2a28d52f
Merge pull request #13053 from jeromecoutant/PR_README
STM32 more information in README file
2020-06-10 11:43:24 +02:00
Volodymyr Medvid dc937ab53b Fix BOOT_HEADER_SIZE allocation in ARM scatter files (#13058)
PSoC 64 secure BSP post-build hook (cysecuretools image signing)
expects the HEX file with start address 0x10000400 (first KB of
internal FLASH is reserved for MCUboot headers area).
In order to get the correct HEX file produced by ARM fromELF tool,
the ELF file should allocate LR_IROM1 starting from address
0x10000400, not 0x10000000. Otherwise the generated HEX file
allocates rows at addresses 0x10000000 ~ 010000400 and the
final application image is not signed correctly.

Fixes https://github.com/ARMmbed/mbed-os/issues/13058.
2020-06-10 10:25:41 +03:00
jeromecoutant 47407759a4 STM: move us_ticker_defines.h include 2020-06-09 11:04:23 +02:00
jeromecoutant 713618abe0 STM32F4 baremetal support 2020-06-09 10:25:41 +02:00
jeromecoutant adbd936cbc STM32F2 baremetal support 2020-06-09 10:24:36 +02:00
jeromecoutant 048f454a5a STM32H7: remove GENERIC_H745I 2020-06-08 15:33:42 +02:00
jeromecoutant c815471526 STM33H7: DISCO_H747I inherit from MCU_STM32H747xI 2020-06-08 15:33:22 +02:00
jeromecoutant 561f8d48bf STM32H7 STM32Cube FW V1.5.0 => V1.7.0 2020-06-08 14:33:10 +02:00
jeromecoutant 9936a53bd1 STM32H7 STM32Cube FW V1.5.0 => V1.7.0: HAL Driver part 2020-06-08 14:33:09 +02:00