psa: Remove PSA targets not supported in TF-M

Mbed OS depends on TF-M to implement PSA. Any targets that need to
provide PSA must be supported by TF-M. The following targets are removed
from Mbed OS as they don't yet have TF-M support. We can re-add these
targets to Mbed OS when they have TF-M support in the official upstream
TF-M repository hosted at trustedfirmware.org.

These PSA targets no longer have a PSA implementation and are removed:
- LPC55S69
- LPC55S69_NS
- LPC55S69_S
- NU_PFM_M2351_NS
- NU_PFM_M2351_S
- HANI_IOT

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Signed-off-by: Jaeden Amero <jaeden.amero@arm.com>
pull/12737/head
Devaraj Ranganna 2020-02-12 15:32:17 +00:00 committed by Jaeden Amero
parent af1ea31546
commit 493a043528
2 changed files with 0 additions and 268 deletions

View File

@ -1,31 +0,0 @@
/*
* Copyright (c) 2018 Arm Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if MBED_CONF_PSA_PRESENT
#include "cmsis_nvic_virtual.h"
#include "mbed_toolchain.h"
MBED_NORETURN void mbed_psa_system_reset();
void __NVIC_TFMSystemReset(void)
{
mbed_psa_system_reset();
}
#endif // MBED_CONF_PSA_PRESENT

View File

@ -2548,161 +2548,6 @@
"5"
]
},
"LPC55S69": {
"public": false,
"inherits": [
"Target"
],
"default_toolchain": "ARMC6",
"supported_form_factors": [
"ARDUINO"
],
"macros": [
"CPU_LPC55S69JBD100_cm33_core0"
],
"extra_labels": [
"NXP",
"MCUXpresso_MCUS",
"LPCXpresso",
"LPC"
],
"detect_code": [
"0236"
],
"device_name": "LPC55S69JBD100",
"release_versions": [
"5"
],
"program_cycle_s": 10,
"sectors": [
[
0,
512
]
]
},
"LPC55S69_NS": {
"inherits": [
"NSPE_Target",
"LPC55S69"
],
"core": "Cortex-M33FE-NS",
"supported_toolchains": [
"ARMC6",
"GCC_ARM",
"IAR"
],
"macros_add": [
"__STARTUP_CLEAR_BSS",
"MBED_FAULT_HANDLER_DISABLED",
"CMSIS_NVIC_VIRTUAL",
"MBED_MPU_CUSTOM",
"NXP_LPADC",
"MBED_TICKLESS"
],
"components_add": [
"FLASHIAP"
],
"extra_labels_add": [
"M33_NS",
"PSA",
"TFM"
],
"device_has_add": [
"USTICKER",
"RTC",
"ANALOGIN",
"I2C",
"I2CSLAVE",
"INTERRUPTIN",
"PORTIN",
"PORTINOUT",
"PORTOUT",
"SERIAL",
"SERIAL_FC",
"SLEEP",
"SPI",
"SPISLAVE",
"FLASH",
"STDIO_MESSAGES"
],
"post_binary_hook": {
"function": "LPC55S69Code.binary_hook"
},
"secure_image_filename": "tfm.bin",
"overrides": {
"non-secure-rom-start": "0x00030000",
"non-secure-rom-size": "0x68000",
"non-secure-ram-start": "0x20022000",
"non-secure-ram-size": "0x22000",
"secure-rom-start": "0x10000000",
"secure-rom-size": "0x28000",
"secure-ram-start": "0x30000000",
"secure-ram-size": "0x22000",
"tickless-from-us-ticker": true,
"init-us-ticker-at-boot": true
},
"OUTPUT_EXT": "hex",
"bootloader_supported": true,
"detect_code": [
"0236"
]
},
"LPC55S69_S": {
"inherits": [
"SPE_Target",
"LPC55S69"
],
"core": "Cortex-M33FE",
"supported_toolchains": [
"ARMC6"
],
"macros_add": [
"__STARTUP_CLEAR_BSS_MULTIPLE",
"__STARTUP_COPY_MULTIPLE",
"MBED_MPU_CUSTOM",
"DAUTH_CHIP_DEFAULT",
"MBEDTLS_PSA_CRYPTO_SPM"
],
"components_add": [
"FLASHIAP"
],
"extra_labels_add": [
"M33_S",
"PSA",
"TFM"
],
"device_has_add": [
"FLASH",
"TRNG"
],
"deliver_to_target": "LPC55S69_NS",
"delivery_dir": "TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/prebuilt",
"overrides": {
"non-secure-rom-start": "0x00030000",
"non-secure-rom-size": "0x68000",
"non-secure-ram-start": "0x20022000",
"non-secure-ram-size": "0x22000",
"secure-rom-start": "0x10000000",
"secure-rom-size": "0x28000",
"secure-ram-start": "0x30000000",
"secure-ram-size": "0x22000"
}
},
"HANI_IOT": {
"inherits": [
"LPC55S69_NS"
],
"detect_code": [
"0360"
],
"components_add": [
"SPIF"
],
"extra_labels_remove": [
"LPCXpresso"
]
},
"NUCLEO_F030R8": {
"inherits": [
"FAMILY_STM32"
@ -11084,88 +10929,6 @@
"mbed_ram_start": "0x20000000",
"mbed_ram_size": "0x2000"
},
"NU_PFM_M2351_NS": {
"inherits": [
"NSPE_Target",
"NU_PFM_M2351"
],
"core": "Cortex-M23-NS",
"supported_toolchains": [
"ARMC6",
"GCC_ARM",
"IAR"
],
"tfm.level": 1,
"extra_labels_add": [
"M23_NS",
"PSA",
"TFM",
"NU_PREBUILD_SECURE"
],
"macros_add": [
"CMSIS_NVIC_VIRTUAL",
"MBEDTLS_PSA_CRYPTO_C"
],
"components_add": [
"FLASHIAP"
],
"post_binary_hook": {
"function": "M2351Code.merge_secure"
},
"secure_image_filename": "tfm.hex",
"overrides": {
"secure-rom-start": "0x0",
"secure-rom-size": "0x3C000",
"secure-ram-start": "0x20000000",
"secure-ram-size": "0x10000",
"non-secure-rom-start": "0x1003C000",
"non-secure-rom-size": "0x44000",
"non-secure-ram-start": "0x30010000",
"non-secure-ram-size": "0x8000"
}
},
"NU_PFM_M2351_S": {
"inherits": [
"SPE_Target",
"NU_PFM_M2351"
],
"core": "Cortex-M23",
"supported_toolchains": [
"ARMC6"
],
"tfm.level": 1,
"extra_labels_add": [
"M23_S",
"PSA",
"TFM"
],
"device_has_remove": [
"SERIAL",
"SERIAL_ASYNCH",
"SERIAL_FC",
"STDIO_MESSAGES"
],
"macros_add": [
"DAUTH_CHIP_DEFAULT",
"MBEDTLS_PSA_CRYPTO_C",
"MBEDTLS_PSA_CRYPTO_SPM"
],
"components_add": [
"FLASHIAP"
],
"deliver_to_target": "NU_PFM_M2351_NS",
"delivery_dir": "TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/TARGET_NU_PFM_M2351_NS/TARGET_NU_PREBUILD_SECURE",
"overrides": {
"secure-rom-start": "0x0",
"secure-rom-size": "0x3C000",
"secure-ram-start": "0x20000000",
"secure-ram-size": "0x10000",
"non-secure-rom-start": "0x1003C000",
"non-secure-rom-size": "0x44000",
"non-secure-ram-start": "0x30010000",
"non-secure-ram-size": "0x8000"
}
},
"NUMAKER_M252KG": {
"core": "Cortex-M23",
"trustzone": false,