mirror of https://github.com/ARMmbed/mbed-os.git
cypress: psoc64: Add TF-M compatibility
Make the CY8CKIT_064S2_4343W target TF-M compatible by addding flash and region definitions from TF-M (at c4f37c18c4a0) and by updating the CY8CKIT_064S2_4343W linker script to create a flash image compatible with TF-M. Signed-off-by: Jaeden Amero <jaeden.amero@arm.com>pull/12271/head
Jaeden Amero
Vikas Katariya
parent
cc8cc5903a
commit
c447278727
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@ -27,6 +27,7 @@
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;*******************************************************************************
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;* \copyright
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;* Copyright 2016-2019 Cypress Semiconductor Corporation
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;* Copyright 2020 Arm Limited
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;* SPDX-License-Identifier: Apache-2.0
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;*
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;* Licensed under the Apache License, Version 2.0 (the "License");
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@ -42,8 +43,10 @@
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;* limitations under the License.
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;******************************************************************************/
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#include "../../../partition/region_defs.h"
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#if !defined(MBED_ROM_START)
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#define MBED_ROM_START 0x10000000
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#define MBED_ROM_START NS_CODE_START
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#endif
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;* MBED_APP_START is being used by the bootloader build script and
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@ -55,7 +58,7 @@
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#endif
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#if !defined(MBED_ROM_SIZE)
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#define MBED_ROM_SIZE 0x001D0000
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#define MBED_ROM_SIZE NS_CODE_SIZE
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#endif
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;* MBED_APP_SIZE is being used by the bootloader build script and
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@ -67,19 +70,19 @@
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#endif
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#if !defined(MBED_RAM_START)
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#define MBED_RAM_START 0x08000000
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#define MBED_RAM_START NS_DATA_START
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#endif
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#if !defined(MBED_RAM_SIZE)
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#define MBED_RAM_SIZE 0x000EA000
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#define MBED_RAM_SIZE NS_DATA_SIZE
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#endif
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#if !defined(MBED_BOOT_STACK_SIZE)
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#define MBED_BOOT_STACK_SIZE 0x400
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#define MBED_BOOT_STACK_SIZE NS_MSP_STACK_SIZE
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#endif
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; The size of the stack section at the end of CM4 SRAM
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#define STACK_SIZE MBED_BOOT_STACK_SIZE
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; Shared memory area between Non-secure and Secure
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#define MBED_DATA_SHARED_SIZE NS_DATA_SHARED_SIZE
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; The defines below describe the location and size of blocks of memory in the target.
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; Use these defines to specify the memory regions available for allocation.
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@ -92,9 +95,6 @@
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#define FLASH_START MBED_APP_START
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#define FLASH_SIZE MBED_APP_SIZE
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; The size of the MCU boot header area at the start of FLASH
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#define BOOT_HEADER_SIZE 0x00000400
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; The following defines describe a 32K flash region used for EEPROM emulation.
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; This region can also be used as the general purpose flash.
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; You can assign sections to this memory region for only one of the cores.
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@ -136,7 +136,7 @@
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; Cortex-M4 application flash area
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LR_IROM1 FLASH_START FLASH_SIZE
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{
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ER_FLASH_VECTORS +BOOT_HEADER_SIZE
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ER_FLASH_VECTORS +0
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{
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* (RESET, +FIRST)
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}
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@ -166,15 +166,27 @@ LR_IROM1 FLASH_START FLASH_SIZE
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}
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; Application heap area (HEAP)
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ARM_LIB_HEAP +0 EMPTY RAM_START+RAM_SIZE-STACK_SIZE-ImageLimit(RW_IRAM1)
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{
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}
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; Stack region growing down
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ARM_LIB_STACK RAM_START+RAM_SIZE EMPTY -STACK_SIZE
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ARM_LIB_HEAP +0 ALIGN 4 EMPTY RAM_START+RAM_SIZE-MBED_BOOT_STACK_SIZE-MBED_DATA_SHARED_SIZE-ImageLimit(RW_IRAM1)
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{
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}
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}
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; Stack region growing down
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ARM_LIB_STACK RAM_START+RAM_SIZE-MBED_DATA_SHARED_SIZE ALIGN 4 EMPTY -MBED_BOOT_STACK_SIZE
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{
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}
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; Stack area overflowed within RAM
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ScatterAssert(ImageBase(ARM_LIB_STACK) + ImageLength(ARM_LIB_STACK) == RAM_START+RAM_SIZE-MBED_DATA_SHARED_SIZE)
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; Shared region
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ARM_LIB_SHARED RAM_START+RAM_SIZE-MBED_DATA_SHARED_SIZE ALIGN 4 EMPTY MBED_DATA_SHARED_SIZE
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{
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}
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; Shared area overflowed within RAM
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ScatterAssert(ImageBase(ARM_LIB_SHARED) + ImageLength(ARM_LIB_SHARED) == RAM_START+RAM_SIZE)
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; Used for the digital signature of the secure application and the
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; Bootloader SDK application. The size of the section depends on the required
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; data size.
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@ -20,6 +20,7 @@
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********************************************************************************
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* \copyright
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* Copyright 2016-2019 Cypress Semiconductor Corporation
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* Copyright 2020 Arm Limited
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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@ -40,8 +41,10 @@ SEARCH_DIR(.)
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GROUP(-lgcc -lc -lnosys)
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ENTRY(Reset_Handler)
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#include "../../../partition/region_defs.h"
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#if !defined(MBED_ROM_START)
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#define MBED_ROM_START 0x10000000
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#define MBED_ROM_START NS_CODE_START
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#endif
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/* MBED_APP_START is being used by the bootloader build script and
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@ -49,11 +52,11 @@ ENTRY(Reset_Handler)
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* is equal to MBED_ROM_START
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*/
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#if !defined(MBED_APP_START)
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#define MBED_APP_START MBED_ROM_START
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#define MBED_APP_START MBED_ROM_START
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#endif
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#if !defined(MBED_ROM_SIZE)
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#define MBED_ROM_SIZE 0x001D0000
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#define MBED_ROM_SIZE NS_CODE_SIZE
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#endif
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/* MBED_APP_SIZE is being used by the bootloader build script and
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@ -61,26 +64,24 @@ ENTRY(Reset_Handler)
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* is equal to MBED_ROM_SIZE
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*/
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#if !defined(MBED_APP_SIZE)
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#define MBED_APP_SIZE MBED_ROM_SIZE
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#define MBED_APP_SIZE MBED_ROM_SIZE
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#endif
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#if !defined(MBED_RAM_START)
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#define MBED_RAM_START 0x08000000
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#define MBED_RAM_START NS_DATA_START
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#endif
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#if !defined(MBED_RAM_SIZE)
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#define MBED_RAM_SIZE 0x000EA000
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#define MBED_RAM_SIZE NS_DATA_SIZE
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#endif
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/* Size of the stack section in CM4 SRAM area */
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#if !defined(MBED_BOOT_STACK_SIZE)
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#define MBED_BOOT_STACK_SIZE 0x400
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#define MBED_BOOT_STACK_SIZE NS_MSP_STACK_SIZE
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#endif
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/* The size of the stack section at the end of CM4 SRAM */
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STACK_SIZE = MBED_BOOT_STACK_SIZE;
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/* The size of the MCU boot header area at the start of FLASH */
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BOOT_HEADER_SIZE = 0x400;
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/* Shared memory area between Non-Secure and Secure */
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#define MBED_DATA_SHARED_SIZE NS_DATA_SHARED_SIZE
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/* Force symbol to be entered in the output file as an undefined symbol. Doing
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* this may, for example, trigger linking of additional modules from standard
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@ -157,7 +158,7 @@ GROUP(libgcc.a libc.a libm.a libnosys.a)
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SECTIONS
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{
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/* Cortex-M4 application flash area */
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.text ORIGIN(flash) + BOOT_HEADER_SIZE :
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.text ORIGIN(flash) :
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{
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/* Cortex-M4 flash vector table */
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. = ALIGN(4);
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@ -330,20 +331,26 @@ SECTIONS
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__end__ = .;
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end = __end__;
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KEEP(*(.heap*))
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. = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE;
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. = ORIGIN(ram) + LENGTH(ram) - MBED_BOOT_STACK_SIZE - MBED_DATA_SHARED_SIZE;
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. = ALIGN(4);
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__StackLimit = .;
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__HeapLimit = .;
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} > ram
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/* Set stack top to end of RAM, and stack limit move down by
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* size of stack_dummy section */
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__StackTop = ORIGIN(ram) + LENGTH(ram);
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__StackLimit = __StackTop - STACK_SIZE;
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__StackTop = (__StackLimit + MBED_BOOT_STACK_SIZE + 3) & 0xFFFFFFFC;
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PROVIDE(__stack = __StackTop);
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/* Check if data + heap + stack exceeds RAM limit */
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ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
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.shared __StackTop (NOLOAD):
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{
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__SharedStart = .;
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. += MBED_DATA_SHARED_SIZE;
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KEEP(*(.shared*))
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__SharedLimit = .;
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} > ram
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/* Check if Shared area overflowed within RAM */
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ASSERT(__SharedLimit == ORIGIN(ram) + LENGTH(ram), "Shared area overflowed within RAM")
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/* Used for the digital signature of the secure application and the Bootloader SDK application.
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* The size of the section depends on the required data size. */
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@ -0,0 +1,27 @@
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/*
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* Copyright (c) 2017-2018 Arm Limited
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* Copyright (c) 2020, Cypress Semiconductor Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing software
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* distributed under the License is distributed on an "AS IS" BASIS
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __ARM_LTD_DEVICE_CFG_H__
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#define __ARM_LTD_DEVICE_CFG_H__
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#ifdef TFM_MULTI_CORE_MULTI_CLIENT_CALL
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#define NUM_MAILBOX_QUEUE_SLOT 4
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#endif
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#endif /* __ARM_LTD_DEVICE_CFG_H__ */
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@ -0,0 +1,185 @@
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/*
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* Copyright (c) 2017-2019 Arm Limited. All rights reserved.
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* Copyright (c) 2019, Cypress Semiconductor Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __FLASH_LAYOUT_H__
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#define __FLASH_LAYOUT_H__
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/* Flash layout with BL2:
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*
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* Not supported
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*
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* Flash layout if BL2 not defined:
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*
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* 0x1000_0000 Secure image primary (320 KB)
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* 0x1005_0000 Non-secure image primary (1152 KB)
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* 0x1017_0000 Secure image secondary (320 KB)
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* 0x101c_0000 - 0x101f_ffff Reserved
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* 0x101c_0000 Secure Storage Area (20 KB)
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* 0x101c_5000 Internal Trusted Storage Area (16 KB)
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* 0x101c_9000 NV counters area (512 Bytes)
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* 0x101c_9200 Scratch area (27.5 KB)
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* 0x101d_0000 Reserved (192 KB)
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* 0x101f_ffff End of Flash
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*
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*/
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#define MAX(X, Y) (((X) > (Y)) ? (X) : (Y))
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/* This header file is included from linker scatter file as well, where only a
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* limited C constructs are allowed. Therefore it is not possible to include
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* here the platform_base_address.h to access flash related defines. To resolve
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* this some of the values are redefined here with different names, these are
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* marked with comment.
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*/
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/* The size of S partition */
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#define FLASH_S_PARTITION_SIZE 0x50000 /* 320 KB */
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/* The size of NS partition */
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#define FLASH_NS_PARTITION_SIZE 0x120000 /* 1152 KB */
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/* Sector size of the flash hardware; same as FLASH0_SECTOR_SIZE */
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#define FLASH_AREA_IMAGE_SECTOR_SIZE (0x200) /* 512 B */
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/* Same as FLASH0_SIZE */
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#define FLASH_TOTAL_SIZE (0x00200000) /* 2 MB */
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/* Flash layout info for BL2 bootloader */
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#define FLASH_BASE_ADDRESS (0x10000000U) /* same as FLASH0_BASE */
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/* Reserved areas */
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#define FLASH_RESERVED_AREA_OFFSET (SECURE_IMAGE_OFFSET + \
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2*SECURE_IMAGE_MAX_SIZE + \
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NON_SECURE_IMAGE_MAX_SIZE)
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/* FixMe: implement proper mcuboot partitioning for CYBL */
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/* Reserved for Secure Storage Area */
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#define FLASH_SST_AREA_OFFSET (FLASH_RESERVED_AREA_OFFSET)
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#define FLASH_SST_AREA_SIZE (0x5000) /* 20 KB */
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/* Internal Trusted Storage Area */
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#define FLASH_ITS_AREA_OFFSET (FLASH_SST_AREA_OFFSET + \
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FLASH_SST_AREA_SIZE)
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#define FLASH_ITS_AREA_SIZE (0x4000) /* 16 KB */
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#define FLASH_NV_COUNTERS_AREA_OFFSET (FLASH_ITS_AREA_OFFSET + \
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FLASH_ITS_AREA_SIZE)
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#define FLASH_NV_COUNTERS_AREA_SIZE (FLASH_AREA_IMAGE_SECTOR_SIZE)
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#ifdef BL2
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#error "BL2 configuration is not supported"
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#else /* BL2 */
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#define FLASH_AREA_SCRATCH_OFFSET (FLASH_NV_COUNTERS_AREA_OFFSET + \
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FLASH_NV_COUNTERS_AREA_SIZE)
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#define FLASH_AREA_SCRATCH_SIZE (0x6e00) /* 27.5 KB */
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#endif /* BL2 */
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#define FLASH_AREA_SYSTEM_RESERVED_SIZE (0x30000) /* 192 KB */
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/* Secure and non-secure images definition in flash area */
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#define SECURE_IMAGE_OFFSET 0x0
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#define SECURE_IMAGE_MAX_SIZE FLASH_S_PARTITION_SIZE
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#define NON_SECURE_IMAGE_OFFSET (SECURE_IMAGE_OFFSET + \
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SECURE_IMAGE_MAX_SIZE)
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#define NON_SECURE_IMAGE_MAX_SIZE FLASH_NS_PARTITION_SIZE
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/* Check if it fits into available Flash*/
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#define FLASH_RESERVED_AREA_SIZE (FLASH_SST_AREA_SIZE + \
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FLASH_ITS_AREA_SIZE + \
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FLASH_NV_COUNTERS_AREA_SIZE + \
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FLASH_AREA_SCRATCH_SIZE + \
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FLASH_AREA_SYSTEM_RESERVED_SIZE)
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#if (FLASH_RESERVED_AREA_OFFSET + FLASH_RESERVED_AREA_SIZE) > (FLASH_TOTAL_SIZE)
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#error "Out of Flash memory"
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#endif
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/* Flash device name used by BL2 and SST
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* Name is defined in flash driver file: Driver_Flash.c
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*/
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#define FLASH_DEV_NAME Driver_FLASH0
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/* Secure Storage (SST) Service definitions
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* Note: Further documentation of these definitions can be found in the
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* TF-M SST Integration Guide.
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*/
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#define SST_FLASH_DEV_NAME Driver_FLASH0
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/* In this target the CMSIS driver requires only the offset from the base
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* address instead of the full memory address.
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*/
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#define SST_FLASH_AREA_ADDR FLASH_SST_AREA_OFFSET
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/* Dedicated flash area for SST */
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#define SST_FLASH_AREA_SIZE FLASH_SST_AREA_SIZE
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#define SST_SECTOR_SIZE FLASH_AREA_IMAGE_SECTOR_SIZE
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/* Number of SST_SECTOR_SIZE per block */
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#define SST_SECTORS_PER_BLOCK 0x8
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/* Specifies the smallest flash programmable unit in bytes */
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#define SST_FLASH_PROGRAM_UNIT 0x1
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/* The maximum asset size to be stored in the SST area */
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#define SST_MAX_ASSET_SIZE 2048
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/* The maximum number of assets to be stored in the SST area */
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#define SST_NUM_ASSETS 10
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/* Internal Trusted Storage (ITS) Service definitions
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* Note: Further documentation of these definitions can be found in the
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* TF-M ITS Integration Guide. The ITS should be in the internal flash, but is
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* allocated in the external flash just for development platforms that don't
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* have internal flash available.
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*/
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#define ITS_FLASH_DEV_NAME Driver_FLASH0
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/* In this target the CMSIS driver requires only the offset from the base
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* address instead of the full memory address.
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*/
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#define ITS_FLASH_AREA_ADDR FLASH_ITS_AREA_OFFSET
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/* Dedicated flash area for ITS */
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#define ITS_FLASH_AREA_SIZE FLASH_ITS_AREA_SIZE
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#define ITS_SECTOR_SIZE FLASH_AREA_IMAGE_SECTOR_SIZE
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/* Number of ITS_SECTOR_SIZE per block */
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#define ITS_SECTORS_PER_BLOCK (0x8)
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/* Specifies the smallest flash programmable unit in bytes */
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#define ITS_FLASH_PROGRAM_UNIT (0x1)
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/* The maximum asset size to be stored in the ITS area */
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#define ITS_MAX_ASSET_SIZE (512)
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/* The maximum number of assets to be stored in the ITS area */
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#define ITS_NUM_ASSETS (10)
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/* NV Counters definitions */
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#define TFM_NV_COUNTERS_AREA_ADDR FLASH_NV_COUNTERS_AREA_OFFSET
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#define TFM_NV_COUNTERS_AREA_SIZE FLASH_NV_COUNTERS_AREA_SIZE
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#define TFM_NV_COUNTERS_SECTOR_ADDR FLASH_NV_COUNTERS_AREA_OFFSET
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#define TFM_NV_COUNTERS_SECTOR_SIZE MAX(FLASH_NV_COUNTERS_AREA_SIZE, \
|
||||
FLASH_AREA_IMAGE_SECTOR_SIZE)
|
||||
|
||||
/* Use Flash to store Code data */
|
||||
#define S_ROM_ALIAS_BASE (0x10000000)
|
||||
#define NS_ROM_ALIAS_BASE (0x10000000)
|
||||
|
||||
/* Use SRAM to store RW data */
|
||||
#define S_RAM_ALIAS_BASE (0x08000000)
|
||||
#define NS_RAM_ALIAS_BASE (0x08000000)
|
||||
|
||||
#endif /* __FLASH_LAYOUT_H__ */
|
||||
|
|
@ -0,0 +1,197 @@
|
|||
/*
|
||||
* Copyright (c) 2017-2019 ARM Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef __REGION_DEFS_H__
|
||||
#define __REGION_DEFS_H__
|
||||
|
||||
#include "flash_layout.h"
|
||||
|
||||
#define TOTAL_ROM_SIZE FLASH_TOTAL_SIZE
|
||||
/* 2KB of RAM (at the end of the SRAM) are reserved for system use. Using
|
||||
* this memory region for other purposes will lead to unexpected behavior.
|
||||
* 94KB of RAM (just before the memory reserved for system use) are
|
||||
* allocated and protected by Cypress Bootloader */
|
||||
/* FixMe: confirm exact available amount of RAM based on the actual
|
||||
system allocation */
|
||||
#define TOTAL_RAM_SIZE (0x000E8000) /* CY_SRAM_SIZE - 96KB */
|
||||
|
||||
#define BL2_HEAP_SIZE 0x0001000
|
||||
#define BL2_MSP_STACK_SIZE 0x0001000
|
||||
|
||||
#define S_HEAP_SIZE 0x0001000
|
||||
#define S_MSP_STACK_SIZE_INIT 0x0000400
|
||||
#define S_MSP_STACK_SIZE 0x0000800
|
||||
#define S_PSP_STACK_SIZE 0x0000800
|
||||
|
||||
#define NS_HEAP_SIZE 0x0001000
|
||||
#define NS_MSP_STACK_SIZE 0x0000400
|
||||
#define NS_PSP_STACK_SIZE 0x0000C00
|
||||
|
||||
/* Relocation of vectors to RAM support */
|
||||
/* #define RAM_VECTORS_SUPPORT */
|
||||
|
||||
/*
|
||||
* This size of buffer is big enough to store an attestation
|
||||
* token produced by initial attestation service
|
||||
*/
|
||||
#define PSA_INITIAL_ATTEST_TOKEN_MAX_SIZE 0x250
|
||||
|
||||
/*
|
||||
* MPC granularity is 128 KB on AN519 MPS2 FPGA image. Alignment
|
||||
* of partitions is defined in accordance with this constraint.
|
||||
*/
|
||||
|
||||
#ifdef BL2
|
||||
#error "BL2 configuration is not supported"
|
||||
#else
|
||||
#define S_IMAGE_PRIMARY_PARTITION_OFFSET SECURE_IMAGE_OFFSET
|
||||
#define NS_IMAGE_PRIMARY_PARTITION_OFFSET NON_SECURE_IMAGE_OFFSET
|
||||
#endif /* BL2 */
|
||||
|
||||
/* TFM PSoC6 CY8CKIT_064 RAM layout:
|
||||
*
|
||||
* 0x0800_0000 - 0x0802_FFFF Secure (192KB)
|
||||
* 0x0800_0000 - 0x0800_FFFF Secure unprivileged data (S_UNPRIV_DATA_SIZE, 64KB)
|
||||
* 0x0801_0000 - 0x0802_EFFF Secure priviliged data (S_PRIV_DATA_SIZE, 124KB)
|
||||
* 0x0802_F000 - 0x0802_FFFF Secure priv code executable from RAM (S_RAM_CODE_SIZE, 4KB)
|
||||
*
|
||||
* 0x0803_0000 - 0x080E_7FFF Non-secure (736KB)
|
||||
* 0x0803_0000 - 0x080E_6FFF Non-secure OS/App (732KB)
|
||||
* 0x080E_7000 - 0x080E_7FFF Shared memory (NS_DATA_SHARED_SIZE, 4KB)
|
||||
* 0x080E_8000 - 0x080F_FFFF System reserved memory (96KB)
|
||||
* 0x0810_0000 End of RAM
|
||||
*/
|
||||
|
||||
/*
|
||||
* Boot partition structure if MCUBoot is used:
|
||||
* 0x0_0000 Bootloader header
|
||||
* 0x0_0400 Image area
|
||||
* 0x1_FC00 Trailer
|
||||
*/
|
||||
/* Image code size is the space available for the software binary image.
|
||||
* It is less than the FLASH_S_PARTITION_SIZE and FLASH_NS_PARTITION_SIZE
|
||||
* because we reserve space for the image header and trailer introduced by the
|
||||
* bootloader.
|
||||
*/
|
||||
#ifdef BL2
|
||||
#error "BL2 configuration is not supported"
|
||||
#else
|
||||
/* Even though TFM BL2 is excluded from the build,
|
||||
* CY BL built externally is used and it needs offsets for header and trailer
|
||||
* to be taken in account.
|
||||
* */
|
||||
#define BL2_HEADER_SIZE (0x400)
|
||||
#define BL2_TRAILER_SIZE (0x400)
|
||||
|
||||
#endif /* BL2 */
|
||||
|
||||
#define IMAGE_S_CODE_SIZE \
|
||||
(FLASH_S_PARTITION_SIZE - BL2_HEADER_SIZE - BL2_TRAILER_SIZE)
|
||||
#define IMAGE_NS_CODE_SIZE \
|
||||
(FLASH_NS_PARTITION_SIZE - BL2_HEADER_SIZE - BL2_TRAILER_SIZE)
|
||||
|
||||
/* Alias definitions for secure and non-secure areas*/
|
||||
#define S_ROM_ALIAS(x) (S_ROM_ALIAS_BASE + (x))
|
||||
#define NS_ROM_ALIAS(x) (NS_ROM_ALIAS_BASE + (x))
|
||||
|
||||
#define S_RAM_ALIAS(x) (S_RAM_ALIAS_BASE + (x))
|
||||
#define NS_RAM_ALIAS(x) (NS_RAM_ALIAS_BASE + (x))
|
||||
|
||||
/* Secure regions */
|
||||
#define S_IMAGE_PRIMARY_AREA_OFFSET \
|
||||
(S_IMAGE_PRIMARY_PARTITION_OFFSET + BL2_HEADER_SIZE)
|
||||
#define S_CODE_START (S_ROM_ALIAS(S_IMAGE_PRIMARY_AREA_OFFSET))
|
||||
#define S_CODE_SIZE IMAGE_S_CODE_SIZE
|
||||
#define S_CODE_LIMIT (S_CODE_START + S_CODE_SIZE - 1)
|
||||
|
||||
#define S_DATA_START (S_RAM_ALIAS(0))
|
||||
#define S_UNPRIV_DATA_SIZE 0x10000
|
||||
#define S_PRIV_DATA_SIZE 0x1F000
|
||||
/* Reserve 4KB for RAM-based executable code */
|
||||
#define S_RAM_CODE_SIZE 0x1000
|
||||
|
||||
/* Secure data area */
|
||||
#define S_DATA_SIZE (S_UNPRIV_DATA_SIZE + S_PRIV_DATA_SIZE + S_RAM_CODE_SIZE)
|
||||
#define S_DATA_LIMIT (S_DATA_START + S_DATA_SIZE - 1)
|
||||
|
||||
/* We need the privileged data area to be aligned so that an SMPU
|
||||
* region can cover it.
|
||||
*/
|
||||
/* TODO It would be nice to figure this out automatically.
|
||||
* In theory, in the linker script, we could determine the amount
|
||||
* of secure data space available after all the unprivileged data,
|
||||
* round that down to a power of 2 to get the actual size we want
|
||||
* to use for privileged data, and then determine this value from
|
||||
* that. We'd also potentially have to update the configs for SMPU9
|
||||
* and SMPU10.
|
||||
* Leave the SMPU alignment check in SMPU configuration file.
|
||||
*/
|
||||
#define S_DATA_UNPRIV_OFFSET (0)
|
||||
#define S_DATA_UNPRIV_START S_RAM_ALIAS(S_DATA_UNPRIV_OFFSET)
|
||||
|
||||
#define S_DATA_PRIV_OFFSET (S_DATA_UNPRIV_OFFSET + S_UNPRIV_DATA_SIZE)
|
||||
#define S_DATA_PRIV_START S_RAM_ALIAS(S_DATA_PRIV_OFFSET)
|
||||
|
||||
/* Reserve area for RAM-based executable code right after secure unprivilaged
|
||||
* and privilaged data areas*/
|
||||
#define S_RAM_CODE_OFFSET (S_DATA_PRIV_OFFSET + S_PRIV_DATA_SIZE)
|
||||
#define S_RAM_CODE_START S_RAM_ALIAS(S_RAM_CODE_OFFSET)
|
||||
|
||||
/* Non-secure regions */
|
||||
#define NS_IMAGE_PRIMARY_AREA_OFFSET \
|
||||
(NS_IMAGE_PRIMARY_PARTITION_OFFSET + BL2_HEADER_SIZE)
|
||||
#define NS_CODE_START (NS_ROM_ALIAS(NS_IMAGE_PRIMARY_AREA_OFFSET))
|
||||
#define NS_CODE_SIZE IMAGE_NS_CODE_SIZE
|
||||
#define NS_CODE_LIMIT (NS_CODE_START + NS_CODE_SIZE - 1)
|
||||
|
||||
#define NS_DATA_START (S_RAM_ALIAS(S_DATA_SIZE))
|
||||
#define NS_DATA_SIZE (TOTAL_RAM_SIZE - S_DATA_SIZE)
|
||||
#define NS_DATA_LIMIT (NS_DATA_START + NS_DATA_SIZE - 1)
|
||||
|
||||
/* Shared memory */
|
||||
#define NS_DATA_SHARED_SIZE 0x1000
|
||||
#define NS_DATA_SHARED_START (NS_DATA_START + NS_DATA_SIZE - \
|
||||
NS_DATA_SHARED_SIZE)
|
||||
#define NS_DATA_SHARED_LIMIT (NS_DATA_SHARED_START + NS_DATA_SHARED_SIZE - 1)
|
||||
|
||||
/* Shared variables addresses */
|
||||
/* ipcWaitMessageStc, cy_flash.c */
|
||||
#define IPC_WAIT_MESSAGE_STC_SIZE 4
|
||||
#define IPC_WAIT_MESSAGE_STC_ADDR (NS_DATA_SHARED_START + \
|
||||
NS_DATA_SHARED_SIZE - \
|
||||
IPC_WAIT_MESSAGE_STC_SIZE)
|
||||
|
||||
/* NS partition information is used for MPC and SAU configuration */
|
||||
#define NS_PARTITION_START \
|
||||
(NS_ROM_ALIAS(NS_IMAGE_PRIMARY_PARTITION_OFFSET))
|
||||
|
||||
#define NS_PARTITION_SIZE (FLASH_NS_PARTITION_SIZE)
|
||||
|
||||
#ifdef BL2
|
||||
#error "BL2 configuration is not supported"
|
||||
#endif /* BL2 */
|
||||
|
||||
/* Shared data area between bootloader and runtime firmware.
|
||||
* Shared data area is allocated at the beginning of the privileged data area,
|
||||
* it is overlapping with TF-M Secure code's MSP stack
|
||||
*/
|
||||
#define BOOT_TFM_SHARED_DATA_BASE (S_RAM_ALIAS(S_DATA_PRIV_OFFSET))
|
||||
#define BOOT_TFM_SHARED_DATA_SIZE 0x400
|
||||
|
||||
#endif /* __REGION_DEFS_H__ */
|
||||
|
||||
Loading…
Reference in New Issue