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1839 Commits (4b7e163b5777dfc71c6f82d76e1d69d1a2c41813)

Author SHA1 Message Date
Anna Bridge 24857d0f91
Merge pull request #5285 from c1728p9/minimum_requirements_test 
Update devices to have minimum 2K RAM and heap, also added test
 2018-10-12 11:04:57 +01:00
jeromecoutant 3385e0ef7b DISCO_F413ZH : explicit WIFI pins name 2018-10-11 18:32:43 +02:00
jeromecoutant 922cc2b8a7 DISCO_F413ZH : set default Wifi module SPI state to inactive 2018-10-11 18:31:51 +02:00
Cruz Monrreal ebff1e553b
Merge pull request #8213 from jeromecoutant/PR_RTC_F1 
STM32F1 RTC : save values in register
 2018-10-10 15:46:26 -05:00
Deepika 37bfc9e5e3 Reposition heap at the end of RAM to be 4K aligned 
HEAP memory should be 4K aligned for GCC newlib, with ISR stack at the end of
RAM memory we loose 3K of RAM memory. This fix is for device with <16K RAM to
use RAM entirely.
 2018-10-10 10:10:43 -05:00
Cruz Monrreal 4903f324a1
Merge pull request #8013 from deepikabhavnani/stm_fix_align 
STM32: Fix alignment of execute region to 8byte boundary
 2018-10-10 08:40:55 -05:00
Deepika bf1a2c8485 [ST]: Fix alignment of execute region to 8-byte boundary in ARM linker files 
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files should strictly align to 8-byte boundary
 2018-10-09 14:47:14 -05:00
Martin Kojtal 7c1cdc85ed
Merge pull request #8225 from juhoeskeli/IAR_STM32F412xG 
Adjust stack & heap for IAR on STM32F412xG
 2018-10-09 10:34:25 -05:00
Martin Kojtal 17762b4998
Merge pull request #8263 from juhoeskeli/flash_api_stm32l4 
STM32L4: clear error programming flags before erase & program operations
 2018-10-09 10:33:50 -05:00
Martin Kojtal 18d613111f
Merge pull request #8286 from jeromecoutant/PR_RTCWRITE 
STM32 RTC : write RTC time while LPTICKER is enabled
 2018-10-09 10:33:37 -05:00
Deepika f24ac501a8 Set main thread stack size as 3K for constrained targets 2018-10-08 13:27:35 -05:00
Cruz Monrreal 8fd99449c3
Merge pull request #8280 from bcostm/fix_i2c_stop 
STM32: Fix I2C stop condition
 2018-10-08 10:23:38 -05:00
Cruz Monrreal 5a1c49fa6d
Merge pull request #8168 from jeromecoutant/PR_ADC_DISCOL496 
DISCO_L496AG : enable ADC
 2018-10-08 10:10:44 -05:00
Anna Bridge c8734cf62a
Merge pull request #8252 from juhoeskeli/stm32f207_IAR 
Adjust heap size on stm32f207
 2018-10-08 12:36:53 +01:00
Martin Kojtal 365d61e4a9
Merge pull request #7304 from cedrickkukela-cd/MTS_DRAGONFLY_L471QG_pull_request_feature_changes 
Add MTS dragonfly, MTS dragonfly l471
 2018-10-08 11:06:23 +02:00
Martin Kojtal baada0e783
Merge pull request #8242 from jeromecoutant/PR_STM32_LPTICKER 
STM32 LPTICKER : Fix tickless and LPTICKER_DELAY_TICKS
 2018-10-05 22:23:09 +02:00
Martin Kojtal 0b1bc876ac
Merge pull request #8103 from jeromecoutant/PR_L0_ADC 
STM32 L0 ADC internal channel fix
 2018-10-05 22:22:32 +02:00
Martin Kojtal 72fa1e0e8f
Merge pull request #8119 from jeromecoutant/PR_L4_ADC 
STM32L496 : wrong ADC init
 2018-10-05 19:53:25 +02:00
Deepika f549f14a0a Set ISR stack and heap sizes for low end devices 
Set the ISR stack to be 1KB. https://github.com/ARMmbed/mbed-os/pull/7238
Set the heap size to 3KB(2KB + overhead + spare) so that atleast 2KB free ram is
available for testing.
With dynamic heap size, explicit size is not required. IAR 7.8 supports
static heap, hence the change is needed in IAR linker files.
 2018-10-05 12:09:46 -05:00
Martin Kojtal f7f6d4d2d8
Merge pull request #7585 from bcostm/dev_NUCLEO_L4R5ZI 
NUCLEO_L4R5ZI: add new platform
 2018-10-05 14:53:11 +02:00
jeromecoutant 83caa049ca STM32 RTC : write RTC time while LPTICKER is enabled 
This fix avoid a long waiting loop in rtc_write function,
  which was not acceptable in TICKLESS context.

Implementation comments added.

Global variable name has been updated for easier maintenance:
- LPTICKER_counter is the U32 continuous tick counter
- LPTICKER_RTC_time is the RTC time used to get the time difference
   between rtc_read_lp() calls
 2018-10-04 15:30:49 +02:00
Martin Kojtal 7a057d7ec8
Merge pull request #8085 from jeromecoutant/PR_RTC_LSI 
STM32 RTC : start LSI clock (for targets without LSE)
 2018-10-04 13:37:53 +02:00
Martin Kojtal 8b623156e5
Merge pull request #7932 from wajahat-ublox/PC2_AnalogIn 
ublox c030: Add PC2 pin to ADC pin map
 2018-10-02 21:12:31 +02:00
Leon Lindenfelser 9f9a85830f Configure IAR stack size to 1KB 2018-10-02 13:34:16 -05:00
Juho Eskeli f7a030ef7c Remove redundant error flag clearing operation 2018-10-02 09:18:03 +03:00
Martin Kojtal 232543ac4b
Merge pull request #7813 from MSiglreithmaierRB/os_sleep_stm32l4 
STM32L4: Fix sleep implementation
 2018-10-01 17:24:12 +02:00
Martin Kojtal 6ec90d1224
Merge pull request #8134 from jeromecoutant/PR_L1_ADC 
STM32L1 ADC update for internal channels
 2018-10-01 11:48:44 +02:00
bcostm 9cade872db STM32: Fix I2C stop condition 
Need to ensure the transmission has been started before sending a STOP condition.

Issue found on the NUCLEO_H743ZI due certainly to the high-speed clock used.

But this is normally needed also on all STM32 devices using the I2C peripheral version 2.
 2018-09-28 14:49:17 +02:00
jeromecoutant 9bc2e5a5ad STM32 LPTICKER with RTC : Fix tickless and lp wrapper 
When both tickless and LPTICKER_DELAY_TICKS are enabled some ST
devices randomly get stuck sleeping forever. This is because the
wake up time passed to the rtc is ignored if the previous match is
about to occur. This causes the device to get stuck in sleep.

This patch prevents matches from getting dropped by the rtc by
deactivating the rtc wake up timer before setting a new value.

Events leading up to this failure for the RTC:

-1st call to lp_ticker_set_interrupt
-delay until ticker interrupt is about to fire
-2nd call to lp_ticker_set_interrupt
-interrupt for 1st call fires and match time for 2nd call is dropped
-LowPowerTickerWrapper gets ticker interrupt but treats it as a
 spurious interrupt and drops it since it comes in too early
-device enters sleep without a wakeup source and locks up
 2018-09-27 14:31:36 +02:00
jeromecoutant b1d23e5ec5 STM32 LPTICKER with LPTIM : Fix tickless and lp wrapper 
This fixes issue with mbed_hal/lp_ticker/lp_ticker_early_match_race_test
 2018-09-27 14:30:00 +02:00
Eman869 c68e7c61ed
Check LPUART clock source in STOP mode 
Check LPUART clock source before enable it in STOP mode, only LSE could be enabled in STOP mode.
 2018-09-27 19:12:42 +08:00
bcostm 909ce3590a NUCLEO_L4R5ZI: set IAR linker stack size to 1KB 2018-09-27 12:03:08 +02:00
bcostm 5b4ff94bff NUCLEO_L4R5ZI: change _ALTx pins 2018-09-27 12:03:07 +02:00
bcostm ee5aff7e18 NUCLEO_L4R5ZI: remove PWM_5 pins as already used by us_ticker 2018-09-27 12:03:07 +02:00
bcostm a644ddd2e7 NUCLEO_L4R5ZI: enable bootloader 2018-09-27 12:03:07 +02:00
bcostm 3a722358b1 NUCLEO_L4R5ZI: add missing timer freeze macro 2018-09-27 12:03:07 +02:00
bcostm abca890d8e NUCLEO_L4R5ZI: update mbed_rtx.h 2018-09-27 12:03:07 +02:00
bcostm ef33ff5524 NUCLEO_L4R5ZI: add all board files 2018-09-27 12:03:07 +02:00
Leon Lindenfelser a80b2369c3 Decrease heap size in IAR linker so tests compile and use SRAM2 for IAR and GCC 2018-09-26 15:39:42 -05:00
Leon Lindenfelser 5ff0eb9d92 Rebase and changes for Dragonfly nano support 2018-09-26 15:39:42 -05:00
Leon Lindenfelser 31d04b05b7 Rebased on master mbed-os 9/7/18 
This required replacing hal_tick.h with us_ticker_data.h
 2018-09-26 15:37:33 -05:00
Leon Lindenfelser 3bb8543e5b Remove commented out code 2018-09-26 15:37:33 -05:00
Leon Lindenfelser 55bcf93574 Fixed spacing/tabs and clean up targets.json 2018-09-26 15:37:33 -05:00
Leon Lindenfelser fad95e9a7d Fix rev D radio init/power/reset and add back bootloader capability 2018-09-26 15:37:33 -05:00
cedrick kukela 463182d372 REV D change for modem on 2018-09-26 15:37:33 -05:00
cedrick kukela 1064994095 Rev c pin name fix 2018-09-26 15:37:33 -05:00
cedrick kukela 7f29f837d1 remove blanks 2018-09-26 15:37:33 -05:00
cedrick kukela 56fa71cbd3 delete file 2018-09-26 15:37:33 -05:00
cedrick kukela 50254bcc61 change startup and s file names to match target 2018-09-26 15:37:33 -05:00
cedrick kukela 5e1bb381cd fixing onboard modem init bug on mts dragonfly l471 2018-09-26 15:37:32 -05:00
cedrick kukela e2e5d9ed43 Ublox and PinName fixes 2018-09-26 15:37:32 -05:00
cedrick kukela c18eef804e adding TARGET MTS_DRAGONFLY_L471QG 2018-09-26 15:37:32 -05:00
Juho Eskeli 3a6b52fd15 Clear error programming flags before erase & program operations 2018-09-26 22:58:49 +03:00
Juho Eskeli f8c8c3cf68 Reduce heap size on stm32f207 2018-09-26 10:07:45 +03:00
Markus Siglreithmaier ea6c886d22 STM32L4: Use HAL layer functions for sleep implementation 2018-09-26 08:54:13 +02:00
jeromecoutant e8d32ca0f9 STM32F1 RTC : save values in register 
Date is managed only by SW
  within CUBE functions HAL_RTC_GetDate and HAL_RTC_SetDate.
They are then replaced by functions that saved counters in HW registers.
RTC_ReadTimeCounter and RTC_WriteTimeCounter are then added to the ST API.
 2018-09-25 13:45:59 +02:00
Martin Kojtal 65a0a1aecd
Merge pull request #8131 from jeromecoutant/PR_F3_ADC 
STM32F3 correct analogin_read
 2018-09-25 13:24:03 +02:00
Martin Kojtal 396f7e39fa
Merge pull request #8037 from mattbrown015/stm32_gpio_irq_shared_vector 
STM32: Fix disabling of IRQs shared by multiple events
 2018-09-25 13:18:02 +02:00
Juho Eskeli d0ac092e68 Adjust stack & heap for IAR on STM32F412xG 2018-09-24 11:27:42 +03:00
bcostm 4c31be2db4 STM32: fix wrong LSE config in serial_baud function 2018-09-19 16:46:54 +02:00
Martin Kojtal 6d5cb6c69b
Merge pull request #8136 from fkjagodzinski/fix-stm-us_ticker_after_deepsleep 
STM: Fix us_ticker timestamp after deep sleep
 2018-09-19 12:15:10 +02:00
Cruz Monrreal 5391a7b6fe
Merge pull request #7700 from cesarvandevelde/bluepill-target-fix 
STM32: Correct device_has_add flags for bluepill_f103c8 target, fixes #7654
 2018-09-18 11:30:35 -05:00
jeromecoutant f510efff38 DISCO_L496AG : enable ADC 
See User Manual, VREF+ is not connected by default

NB: Use 2.5V as reference (instead of 3.3V)
for internal channels calculation
 2018-09-18 16:11:13 +02:00
Martin Kojtal b97ac0c353
Merge pull request #7787 from jeromecoutant/PR_MSI_LSE 
STM32L4 : code cleanup in MSI SetSysClock
 2018-09-17 14:22:29 +02:00
Filip Jagodzinski 6821556b47 STM: Fix us_ticker timestamp after deep sleep 
Use the `mbed_sdk_inited` flag to correct the `HAL_GetTick()` behavior
after waking up from deep sleep mode. `ticker_read_us()` must not be
used to read us_ticker timestamp after waking up until the us_ticker
context is restored. More detailed description in issue #8117.

Fixes #8117
 2018-09-14 15:44:40 +02:00
jeromecoutant f41c72ded8 STM32L1 ADC update for internal channels 2018-09-14 13:23:50 +02:00
jeromecoutant 52776a1e7b SM32F3 correct analogin_read 2018-09-14 11:41:12 +02:00
jeromecoutant 2a70879ffa STM32L496 : wrong ADC init 2018-09-13 16:31:49 +02:00
jeromecoutant 12522210a2 STM32L0 internal channel ADC_TEMP 
Temperature measurement was not stable
 2018-09-12 17:21:36 +02:00
jeromecoutant 5bbe62889a STM32L072 : ADC internal channels correction 2018-09-12 17:21:30 +02:00
Cruz Monrreal 8d9e2e5d0a
Merge pull request #7909 from KariHaapalehto/f411re_iar 
Adjust STMF411xE IAR linker file to mbed-os memory needs.
 2018-09-12 09:20:15 -05:00
jeromecoutant 827c8bd486 STM32 RTC : remove not necessary macro 
__HAL_RCC_RTC_CLKPRESCALER is called in __HAL_RCC_RTC_CONFIG
 2018-09-11 14:14:19 +02:00
jeromecoutant 5c46bec4d4 STM32 RTC with LSI : stop reset registers during init 2018-09-11 14:13:43 +02:00
jeromecoutant 0fecc56e84 STM32 RTC : Start LSI clock asap 2018-09-11 14:04:03 +02:00
Cruz Monrreal d311a96061
Merge pull request #7950 from c1728p9/l4_malloc_fix 
Fix memory allocation on STM32L4 devices
 2018-09-07 22:50:05 -05:00
mattbrown015 792cec773e STM32: Disabling of IRQs shared by multiple events 
Discern if an IRQ is being shared by multiple events and only disable the IRQ if no events are using it.
 2018-09-07 14:48:02 +01:00
Martin Kojtal e30435bd08
Merge pull request #7990 from maciejbocianski/qspi_small_fixes 
DISCO_L475VG_IOT01A remove old QSPI pins
 2018-09-07 10:47:19 +02:00
Russ Butler e084865e8e Fix comparison warning on STM32L4 devices 
Cast the pointer used in l4_retarget to uint32_t before comparing it
to fix the warning:
"comparison between pointer and integer"
 2018-09-06 16:07:03 +01:00
Cesar 80c9814fd0 Revert file permissions 2018-09-06 13:57:06 +02:00
Cesar b2d8b54f7d Revert file permissions 2018-09-06 12:56:13 +02:00
Kari Haapalehto 86f966fa00 Adjust STMF411xE IAR linker file to mbed-os memory needs. 
Stack size decreased and heap size increased.
 2018-09-06 13:34:12 +03:00
Yossi Levy acfda5895e Changes in PR #7774 of PinNames.h should be reverted. This commit reverts those files excpet for K82F and K64F which are left as an example 2018-09-05 14:13:05 +03:00
Maciej Bocianski 050604f1b8 DISCO_L475VG_IOT01A remove old QSPI pins 2018-09-05 09:58:20 +02:00
Martin Kojtal 44925d8527
Merge pull request #7579 from u-blox/ublox_odin_driver_os_5_v3.0.0_rc1 
Updated ODIN drivers to v3.0.0 RC1
 2018-09-03 09:25:32 +02:00
Cruz Monrreal 993c897b55
Merge pull request #7774 from yossi2le/sd-spif-to-mbed-os 
Add default block device support (SD, SPIF and FLASHIAP)
 2018-09-01 11:15:13 -05:00
Russ Butler e2d003a420 Fix memory allocation on STM32L4 devices 
Depending on initial size allocated on STM32L4 devices with
TWO_RAM_REGIONS  set a crash may occur. This is because there is a
mismatch between the size newlib is expecting and the size actually
returned by _sbrk. This is because the STM32L4 implementation of _sbrk
is performing alignment internally.

This patch fixes this problem by removing the code in __wrap__sbrk
which performs the alignment.
 2018-08-31 18:31:52 -05:00
Cesar f91bba9803 Updated pinmap to fix CAN and enable UART hardware flow control 2018-08-31 17:17:29 +02:00
Ammad Rehmat b934632653 Access Point API 2018-08-31 11:33:30 +05:00
Wajahat Abbas a93ff7c931 Added PC2 pin to ADC pin map 2018-08-30 15:19:50 +05:00
Yossi Levy ed8e170d15 Moving SD, SPIF and FLASHIAP into mbedos and refactoring features storage directory structure. 2018-08-29 12:01:11 +03:00
Juho Eskeli d5b374b327 Correct comment about stack size in IAR linker file 2018-08-28 08:44:08 +03:00
Juho Eskeli 5cc06238ea Enable bootloader for NUCLEO_F207ZG 2018-08-28 08:44:08 +03:00
Juho Eskeli 22137b45dd Update NUCLEO_F207ZG linker files 2018-08-28 08:44:08 +03:00
Cruz Monrreal 2f8e679183
Merge pull request #7592 from orenc17/remove_uvisor 
Remove uVisor from mbed-os
 2018-08-25 19:52:24 -05:00
Maciej Bocianski 5195c820e6 standardise QSPI pin names 2018-08-24 12:09:51 +02:00
Oren Cohen 787317b7eb Remove uVisor from mbed-os 2018-08-22 16:36:59 +03:00
Maciej Bocianski 3bf9df7b56 target DISCO_F413ZH: add QSPI flash pin names 2018-08-22 15:02:13 +02:00
adustm 6095ccf1b4 Add reset internal state before call to HAL_QspiInit function 2018-08-22 15:02:11 +02:00
adustm 7dda4e4fc6 Implement qspi_free function 2018-08-22 15:02:10 +02:00
adustm 5c26e15cd3 Fix support of max flash size 2018-08-22 15:02:09 +02:00
jeromecoutant 43258a8ff4 STM32 : add all QSPI pins in available targets 2018-08-22 15:02:08 +02:00
Maciej Bocianski 67798d6eb2 STM: add qspi pin names for DISCO_L475VG_IOT01A 2018-08-22 15:02:04 +02:00
Maciej Bocianski 42935bbdc0 STM qspi: temporary fix for qspi_free return value 2018-08-22 15:02:03 +02:00
adustm 2f06423a89 Add support for QSPI on DISCO_L476VG 2018-08-22 15:02:01 +02:00
adustm c00e49fcf2 Enable QSPI for DISCO_F746NG 2018-08-22 15:01:54 +02:00
adustm 293d1bda42 Add MBED_WEAK for pins 2018-08-22 15:00:22 +02:00
adustm 9b4b28fc3f Support maximum flash size : 4Gbytes 2018-08-22 15:00:22 +02:00
adustm 50b8225948 Enable QSPI feature for DISCO_F413ZH platform 2018-08-22 15:00:21 +02:00
adustm c57a47e4b5 Change default FlashSize to 64Mbit = 8Mbytes = 0x800000 2018-08-22 15:00:20 +02:00
adustm 8e08740237 Fix Instruction with no data command 
Adding QSPI_DATA_NONE activates the transfer
of the command inside HAL_QSPI_COMMAND function
 2018-08-22 15:00:19 +02:00
adustm 05899e9c70 Fix Address.Size and AlternateByes.Size by shifting them 
The ST HAL code is waiting for the correctly shifted vlue
(for a direct write into the HW register)
 2018-08-22 15:00:18 +02:00
Martin Kojtal d282c81e86 QSPI: add STM32L4 support 
Disco IoT board support for QSPI. As it does not have dual flash support in QSPI,
we need to fix qspi hal implementation.
 2018-08-22 15:00:17 +02:00
Martin Kojtal 0f7fd757a4 QSPI: add flash pins for F469 disco board 2018-08-22 15:00:16 +02:00
Martin Kojtal c778c90184 QSPI STM32: fix default fifo and cycle 
As example for DISCO F469NI defines them
 2018-08-22 15:00:15 +02:00
Martin Kojtal 8783956a77 QSPI STM32: fix prepare comman - alt/address 2018-08-22 15:00:14 +02:00
Martin Kojtal fff20729be QSPI STM32: fix command transfer 
use write/read from STM32 driver
 2018-08-22 15:00:14 +02:00
Martin Kojtal 5038b38622 QSPI STM32: fix pin merging 
hw name as input
 2018-08-22 15:00:13 +02:00
Martin Kojtal 16ca742d87 QSPI STM32: fix disabled format phase 2018-08-22 15:00:12 +02:00
Martin Kojtal 2766672f64 QSPI STM32: add QSPI_x support to pinnames 2018-08-22 15:00:12 +02:00
Martin Kojtal 660d250e0d QSPI STM32: init returns error if failed to init 2018-08-22 15:00:11 +02:00
Martin Kojtal 551f044e77 QSPI STM32: add qspi_command_transfer implementation 2018-08-22 15:00:11 +02:00
Martin Kojtal 6e5b889e52 QSPI STM32: remove polling from write/read 
This will be part of custom instruction transfer, the flow will be:

1. write data
2. wait for transfer to complete (poll status register from the memory device)
 2018-08-22 15:00:10 +02:00
Martin Kojtal 8da072d8af QSPI STM32: set default command values to none 2018-08-22 15:00:10 +02:00
Martin Kojtal 11ae100d80 QSPI STM32: fix return value in frequency 2018-08-22 15:00:09 +02:00
Martin Kojtal 5e75b39b78 QSPI STM32: fix ssel af selection 2018-08-22 15:00:09 +02:00
Martin Kojtal 7da0ac2516 QSPI: add STM32 implementation 2018-08-22 15:00:08 +02:00
Martin Kojtal d28d13cc9b
Merge pull request #7790 from jeromecoutant/PR_LPTICKER_RTC 
STM32 LPTICKER : RTC wake up timer is reset before setting a new one
 2018-08-22 14:04:58 +02:00
Cruz Monrreal 17a525c487
Merge pull request #7619 from u-blox/cellular_ublox_udp_tcp_imp 
UBLOX cellular api's for UDP and TCP
 2018-08-21 10:12:47 -05:00
Cruz Monrreal a8f390ebec
Merge pull request #7798 from simosillankorva/NUCLEO_F303RE_bootloader_support 
Add bootloader support for target NUCLEO_F303RE
 2018-08-21 09:50:26 -05:00
Cruz Monrreal c167275c6d
Merge pull request #7775 from jeromecoutant/PR_ASSERT 
STM32 wrong MBED_ASSERT use
 2018-08-21 09:44:23 -05:00
Simo Sillankorva c6acfd389b Change NUCLEO_F303RE IAR Linker script heap size 
* Change the heap size value to be the stated 1/4 of the RAM.
 2018-08-16 01:58:43 -07:00
Cruz Monrreal 134ff0a3a9
Merge pull request #7777 from jeromecoutant/PR_SUNDAY 
STM32F1 RTC : wrong Sunday value
 2018-08-15 16:15:48 -05:00
Simo Sillankorva 83608d59ac Add bootloader support for target NUCLEO_F303RE 2018-08-15 07:30:05 -07:00
jeromecoutant a0fa0b6a5a STM32 RTC : remove compilation warning with unused variable 2018-08-14 14:00:25 +02:00
jeromecoutant 7b77e50082 STM32 LPTICKER : RTC wake up timer is reset before settign a new one 2018-08-14 13:59:48 +02:00
jeromecoutant b5c258e398 STM32L4 : code cleanup in MSI SetSysClock 2018-08-14 09:20:52 +02:00
jeromecoutant e455d74f3d STM32 : Sunday value is different for STM32F1 2018-08-13 17:04:56 +02:00
Cruz Monrreal 0e68570d49
Merge pull request #7686 from KariHaapalehto/1530_led 
Correct MTB_ADV_WISE_1530 led configuration
 2018-08-13 09:18:27 -05:00
jeromecoutant 063cad5992 STM32L4 assert in SetSysClock replaced 2018-08-13 16:01:49 +02:00
jeromecoutant ac06d5574b STM32L1 assert in SetSysClock replaced 2018-08-13 15:56:20 +02:00
jeromecoutant 220d033468 STM32L0 assert in SetSysClock replaced 2018-08-13 15:55:51 +02:00
jeromecoutant 749343f695 STM32F7 assert in SetSysClock replaced 2018-08-13 15:55:17 +02:00
jeromecoutant b47c1ef6c4 STM32F4 assert in SetSysClock replaced 2018-08-13 15:54:51 +02:00
jeromecoutant 974141ce48 STM32F3 assert in SetSysClock replaced 2018-08-13 15:51:35 +02:00
jeromecoutant bf7dc5f8b8 STM32F2 assert in SetSysClock replaced 2018-08-13 15:48:26 +02:00
jeromecoutant dc02be705a STM32F1 assert in SetSysClock replaced 2018-08-13 15:04:02 +02:00
jeromecoutant 76356039d9 STM32F0 assert in SetSysClock replaced 2018-08-13 14:53:33 +02:00
Markus Siglreithmaier 97fef1160c STM32L4: Fix sleep implementation 
Correctly detect and handle the low power run mode when entering and exiting sleep mode.

The generic `hal_sleep` implementation tries to exit LPR mode always, resulting in a spin-loop during a critical section (disabled IRQ).
The new approach returns from LPR to Run mode if enabled (LPR bit set), enters sleep, and resets to the original state on wakeup (WFI).
 2018-08-13 09:21:31 +02:00
Cruz Monrreal e85acac175
Merge pull request #7717 from LMESTM/fix_checkfifo 
STM32: check for UART ongoing transfers before entering deepsleep
 2018-08-09 10:17:00 -05:00
Cruz Monrreal 54bc12f91c
Merge pull request #7643 from bcostm/fix_uart_remove_force_reset 
STM32: remove uart force_reset at init
 2018-08-07 09:14:20 -05:00
Laurent Meunier e12d98e1c0 Use HAL coding style for function naming 2018-08-07 13:42:46 +02:00
Laurent Meunier 402f3f1c3f STM32: check for UART ongoing transfers before entering deepsleep 
As suggested by Russ Butler in mbed-os issue #7328, and until there is an
implementation of mbed-os issue #4408, we are implementing a workaround
at HAL level to check if there is any ongoing serial transfer (which happens
if HW FIFO is not yet empty).

In case a transfer is ongoing, we're not entering deep sleep and
return immediately.
 2018-08-07 11:30:53 +02:00
Kari Haapalehto 96457ab1e0 mbed-os-example_blinky didn't work with wise-1530, so MTB_ADV_WISE_1530 
led configuration have been updated.
Also minor update to MTB_MXCHIP_EMW3166 led configuration, led3 is now
defined but not connected.
 2018-08-03 10:29:13 +03:00
Cruz Monrreal ae40a09036
Merge pull request #7508 from mprse/ticker_free 
Ticker free() - requirements, pseudo code, tests, implementation
 2018-08-02 23:05:14 -05:00
Przemyslaw Stekiel ace821017f Add implementation of ticker_free() function to CI boards. 
This PR provides implementation of ticker_free() function for the following boards:
ARCH_PRO
EV_COG_AD3029LZ
EV_COG_AD4050LZ
K22F
K64F
K82F
KW24D
KW41Z
LPC546XX
NRF51_DK
NRF52_DK
NUCLEO_F207ZG
NUCLEO_F401RE
NUCLEO_F429ZI
NUCLEO_F746ZG
REALTEK_RTL8195AM
 2018-08-02 09:48:10 +02:00
Cruz Monrreal f9862b84e5
Merge pull request #7668 from bcostm/fix_cleanup_f7_hal_inittick 
STM32F7: remove HAL_InitTick() declaration in us_ticker_data.h files
 2018-08-01 21:42:22 -05:00
Martin Kojtal 9df48f561b
Merge pull request #7606 from bcostm/PULL_REQUEST_CUBE_UPDATE_F1_V1.6.1 
STM32F1: update to CubeF1 V1.6.1
 2018-08-01 15:00:21 +02:00
Martin Kojtal 2ec99158ef
Merge pull request #7642 from ashok-rao/SPI_CS_fix 
Changing default SPI CS pin to SD card on MTB
 2018-08-01 14:57:26 +02:00
bcostm 2c96c5d270 STM32F7: remove HAL_InitTick() declaration in us_ticker_data.h files 2018-08-01 09:56:39 +02:00
Cruz Monrreal d65abb662f
Merge pull request #7289 from mikaleppanen/odin_iar_heap_inc 
On STM32F439xI IAR linker file decreased stack size and increased heap
 2018-07-31 11:36:52 -05:00
mudassar-ublox ffb4f926e9 Artistic style applied and updated power function 2018-07-30 19:41:02 +05:00
bcostm 9598dd9f12 STM32: remove uart force_reset at init 2018-07-30 14:52:31 +02:00
Ashok Rao 8c07fcd09f Changing default SPI CS pin to SD card on MTB 2018-07-30 12:23:37 +01:00
mudassar-ublox a8abeccdac UBLOX cellular api's for UDP and TCP 2018-07-26 19:20:38 +05:00
bcostm b47e599281 F1 ST CUBE V1.6.1: add I2C patches 2018-07-26 15:44:31 +02:00
bcostm 8ce35ba845 F1 ST CUBE V1.6.1 
- stm32f1xx hal V1.1.2
 2018-07-25 14:20:11 +02:00
Przemyslaw Stekiel c0ee843d63 Add lp/us ticker_free() functions stub. 
This patch adds only empty stubs of `us_ticker_free()` and `lp_ticker_free()` for all boards where these functions are not implemented.
 2018-07-25 08:58:38 +02:00
Cruz Monrreal 5d5ca62a5e
Merge pull request #7553 from bcostm/fix_L496_sct 
STM32L496: fix RAM size in ARM scatter file
 2018-07-23 10:14:05 -05:00
Cruz Monrreal 21dbbc5e8b
Merge pull request #7510 from mattbrown015/fix_stm32_gpio_irq_deepsleep 
STM32: Improve GPIO IRQ edge detection when waking from deepsleep
 2018-07-23 10:12:49 -05:00
bcostm bf8587ed50 STM32L496: fix RAM size in ARM scatter file 2018-07-19 14:02:05 +02:00
jeromecoutant 59fd0c0cce STM32F2/F4/F7 : LL API is now available 2018-07-18 15:17:46 +02:00
Cruz Monrreal 38744b9e68
Merge pull request #7498 from bcostm/fix_hsi_lse_lpuart 
STM32: enable HSI/LSE clocks for LPUART
 2018-07-14 13:33:35 -05:00
mattbrown015 7ef70223fb Improve GPIO IRQ edge detection when waking from deepsleep 2018-07-13 16:02:31 +01:00
jeromecoutant 8a0b83233a STM32 LPTICKER with LPTIM minor update 
Code cleaning (L0 Cube update, comment precision)
 2018-07-13 10:03:31 +02:00
bcostm 665de33cc6 stm32 lpuart: enable lse and hsi if not done 2018-07-12 15:58:02 +02:00
Cruz Monrreal e1df16e843
Merge pull request #7365 from jeromecoutant/PR_RTC_SHADOW 
STM32 RTC : bypass shadow registers
 2018-07-11 21:29:02 -05:00
bcostm 0b133be504 stm32 ticker: change th eplace where timer init in done, fix overflow issue with 16-bit timer 
- Move back the 16/32bit timer initialization in HAL_InitTick() and not in us_ticker_init()
- Use ticker_read_us() and us_ticker_read() in HAL_GetTick() to fix potential overflow issue with the 16bit timer

==> These corrections allow timer, rtc, sleep, tick tests to PASS
 2018-07-11 14:45:48 +02:00
bcostm fc50e28ae6 stm32 ticker: corrections in order to pass tests 2018-07-11 14:44:23 +02:00
bcostm 7097e07b62 stm32 ticker: typo corrections 2018-07-11 14:43:36 +02:00
bcostm d8e839a789 stm32 ticker: change license 2018-07-11 14:43:16 +02:00
bcostm 32031cbab3 stm32 ticker: rename hal_tick.h in us_ticker_data.h 2018-07-11 14:42:44 +02:00
bcostm fbd7a97e19 stm32 ticker: rename macro and update ST HAL Tick functions 
- rename TIM_MST_16BIT in TIM_MST_BIT_WIDTH in order to use it directly in ticker info structure
- change HAL_InitTick() and HAL_GetTick()
 2018-07-11 14:39:42 +02:00
bcostm b1bbd765b7 stm32 ticker: rename files and move functions 
- rename hal_tick_common.c in hal_tick_overrides.c
- move 16 and 32bits timer functions in us_ticker.c
 2018-07-11 14:36:58 +02:00
jeromecoutant 1052993236 STM32 RTC : bypass shadow registers 
- RTC_SSR for the subseconds
- RTC_TR for the time
- RTC_DR for the date

These registers were accessed through shadow registers which are synchronized with PCLK1 (APB1 clock).
They are now accessed directly in order to avoid waiting for the synchronization duration.
 2018-07-11 10:08:02 +02:00
Cruz Monrreal bcec185754
Merge pull request #7352 from bcostm/fix_rtc_ticker 
STM32: Fix RTC test issue on targets using a 16-bit timer for us_ticker
 2018-07-09 10:20:13 -05:00
bcostm a838cb21d1 save/restore timer registers before/after deepsleep 2018-07-04 16:44:00 +02:00
bcostm 9523bcf8c9 Use elapsed time only for 16bit timer 2018-07-04 16:43:21 +02:00
bcostm fcdd529f89 Re-enable IT CC1 after deepsleep 2018-07-04 10:16:32 +02:00
bcostm f785c23e89 HAL_GetTick returns elapsed time 2018-07-04 10:16:31 +02:00
bcostm 26cb388d14 Use us_ticker_read while SDK is not ready 2018-07-04 10:15:15 +02:00
bcostm b6beb74d9d DISCO_L496AG: update LEDs comments in PeripheralPins.c 2018-07-02 10:27:23 +02:00
bcostm a9ba4f9bf5 DISCO_L496AG: change LED1 and LED2 pins 2018-07-02 10:20:49 +02:00
bcostm 0c417ab8b7 astyle 2018-06-29 10:12:40 +02:00
bcostm 9be8541a30 STM32: add lpuart_clock_source config 
Keep same clock configuration as done before this PR (LSE and PCLK1).
Use a JSON file to change it.
 2018-06-29 10:10:29 +02:00
jeromecoutant 3721ac44d2 STM32 serial RX/TX active patch 
In serial_tx_active and serial_rx_active functions,
we check the internal state value with

HAL_UART_STATE_BUSY_TX = 0x21U,
HAL_UART_STATE_BUSY_RX = 0x22U,

It seems that value can also be :
HAL_UART_STATE_BUSY_TX_RX = 0x23U,
 2018-06-28 18:05:52 +02:00
jeromecoutant 78410e7032 TARGET_STM32L4 astyle 2018-06-27 14:46:00 +02:00
jeromecoutant ecffec8336 TARGET_STM32L1 astyle 2018-06-27 14:44:37 +02:00
jeromecoutant baf97d78aa TARGET_STM32L0 astyle 2018-06-27 14:43:59 +02:00
jeromecoutant e9d7128485 TARGET_STM32F7 astyle 2018-06-27 14:42:56 +02:00
jeromecoutant f50720e2a4 TARGET_STM32F4 astyle 2018-06-27 14:42:28 +02:00
jeromecoutant 6df23ee841 TARGET_STM32F3 astyle 2018-06-27 14:32:10 +02:00
jeromecoutant f9bd4768a5 TARGET_STM32F2 astyle 2018-06-27 14:31:31 +02:00
jeromecoutant c8313901fb TARGET_STM32F1 astyle 2018-06-27 14:31:04 +02:00
jeromecoutant 6066e68ec6 TARGET_STM32F0 astyle 2018-06-27 14:23:31 +02:00
jeromecoutant 433ba46132 TARGET_STM astyle 2018-06-27 14:21:07 +02:00
Boting Ren 6f9c76c949 fix LED_RED mapping on NUCLEO_F429ZI 2018-06-26 16:22:28 +09:00
Mika Leppänen 50a130b61d On STM32F439xI IAR linker file decreased stack size and increased heap 
Decreased stack size from 24kB to 1kB (stack is used on boot-up/interrupt
handler). Increased heap size from 65kB to 89kB.

Change is related to issue https://github.com/ARMmbed/mbed-os/issues/7137
where UBLOX_EVK_ODIN_W2 runs out of heap on WLAN.
 2018-06-25 10:19:16 +03:00
Cruz Monrreal 093b4f05a2
Merge pull request #7241 from LMESTM/Fix_DeepsleepStackUsage 
STM32: Reduce HAL_deepsleep stack usage
 2018-06-20 08:38:56 -05:00
Cruz Monrreal cc1e4f0ff8
Merge pull request #7205 from bcostm/fix_hash_data_alignment 
STM32: Fix data alignment issue in HASH function for F2, F7, L4
 2018-06-20 07:55:57 -05:00
Cruz Monrreal 567689c725
Merge pull request #7259 from SeppoTakalo/default_wifi 
Provide default WiFi interfaces for Ublox and Realtek
 2018-06-19 21:46:45 -05:00
Laurent MEUNIER 81adafb5a7 STM32: Reduce HAL_deepsleep stack usage 
There are cases where a call hal_deepsleep would overflow the idle task
stack, especially in developper or debug profile.

In order to avoid this case, we split ForceClockOutofDeepSleep
into two separate functions the two structure RCC_ClkInitStruct and
RCC_OscInitStruct are not allocated at the same time.
 2018-06-19 17:32:00 +02:00
Seppo Takalo b4726cbca5 Provide default WiFi interface for Ublox EVK ODIN W2 2018-06-19 16:40:55 +03:00
Martin Kojtal c964f2ee66
Merge pull request #7226 from juhoeskeli/wise_1570_app_start 
Make MTB_ADV_WISE_1570 respect MBED_APP_START & enable bootloader
 2018-06-19 14:12:07 +02:00
Juho Eskeli 699601535e Make MTB_ADV_WISE_1570 respect MBED_APP_START & enable bootloader 2018-06-15 13:05:00 +03:00
bcostm 09b8b53b27 Remove text related to channel2 2018-06-15 11:27:52 +02:00
bcostm 1cef655687 Add comments for HAL_InitTick function 2018-06-15 11:19:52 +02:00
Cruz Monrreal 276588f9fa
Merge pull request #7098 from SeeedJP/feature-cellular-mux 
[Wio 3G] Adding platform
 2018-06-14 10:17:19 -05:00
Cruz Monrreal 0a528ff558
Merge pull request #6831 from mprse/hal_crc_test 
Add HAL CRC test and header file
 2018-06-13 08:47:11 -05:00
bcostm b5a8dc513c fix hash alignment of F2, F7, L4 2018-06-13 11:51:24 +02:00
Cruz Monrreal 89876311ae
Merge pull request #7176 from KariHaapalehto/data_aligment 
Fix data aligment problem at STM32F4 hash write
 2018-06-11 21:27:50 -05:00
Cruz Monrreal 3d61cb59ab
Merge pull request #6948 from jeromecoutant/PR_ETHER 
STM32 ETH : remove TX RX locking interrupt perforation
 2018-06-11 09:02:21 -05:00
Cruz Monrreal 23bc4e0fe2
Merge pull request #7088 from bcostm/dev_F7_flash_dual_bank 
STM32F76x: Add support of dual bank flash mode
 2018-06-11 08:58:55 -05:00
Yoshihiro TSUBOI 16e706ecd4 [Wio 3G] Changed suggested points 
Changed accessibility cellular features member functions, fixed minor target issues
 2018-06-08 20:13:58 +09:00
Przemyslaw Stekiel 68631fcaa9 STM CRC driver: hal_crc_compute_partial() - validate input paramaters. 2018-06-07 15:06:35 +02:00
bcostm 11d0a8399b Add license 2018-06-06 14:05:22 +02:00
bcostm b087390a1a Remove HAL_TICK_DELAY (no more used) 2018-06-05 16:53:40 +02:00
bcostm e09e1147d8 Cleanup 
- Remove calls to HAL_SuspendTick and HAL_ResumeTick
- Rename stm_common.c in hal_tick_common.c
 2018-06-05 14:48:54 +02:00
Kari Haapalehto 0c3047f4cc Fix data aligment problem at STM32F4 hash write 2018-06-05 15:03:37 +03:00
bcostm 74c29cb0e5 Remove code related to timer channel 2 2018-06-05 11:21:02 +02:00
bcostm 91e826d459 Replace HAL_GetTick 2018-06-04 16:00:56 +02:00
jeromecoutant b79be416c8 Dual Bank Flash support update 2018-06-04 13:37:59 +02:00
bcostm cc14540140 Add support of Flash dual bank mode on DISCO_F769NI 2018-06-04 13:37:59 +02:00
bcostm b647ecf80c Add support of Flash dual bank mode on NUCLEO_767ZI 2018-06-04 13:37:59 +02:00
ytsuboi e5b8591818 [Wio 3G] Adding platform 2018-06-04 15:55:43 +09:00
Cruz Monrreal cabcdcf133
Merge pull request #7062 from jeromecoutant/PR_F413 
DISCO_F413ZH : map SPI3 to WIFI module
 2018-06-02 20:53:18 -05:00
Cruz Monrreal 07fb7c1adc
Merge pull request #6987 from jeromecoutant/PR_ADC 
STM32 ADC update
 2018-06-02 19:52:51 -05:00
Anna Bridge 9986abe499
Merge pull request #6803 from chuanga/wise-1510-uart-config 
Wise 1510 uart config
 2018-06-01 11:52:34 +01:00
jeromecoutant 2d0890b989 DISCO_F413ZH : pin value error 2018-05-31 13:55:55 +02:00
jeromecoutant 422e124854 DISCO_F413ZH : map SPI3 to WIFI module 2018-05-30 17:56:46 +02:00
jeromecoutant e3deaecc27 STM32 LPTICKER update for targets supporting RTC 2018-05-25 12:29:54 -05:00
jeromecoutant 39a9801675 STM32 LPTICKER : clean include file 2018-05-25 12:29:54 -05:00
jeromecoutant 1c4174d3eb STM32 RTC Init minor update 2018-05-25 12:26:05 -05:00
jeromecoutant 2b8d6cbcc5 STM32 LPTICKER : read counter 2018-05-25 12:26:05 -05:00
jeromecoutant 5701fd5ab6 STM32 LPTICKER update for targets supporting LPTIMER 2018-05-25 12:22:35 -05:00
Laurent MEUNIER beda4904d3 Make us_ticker common between 16 and 32 bits counters 2018-05-25 12:20:10 -05:00
Laurent MEUNIER c3d5daf80a Update STM32 16 bits us_tickers in line with new mbed HAL 
The new HAL allows to share the timer bit width and frequency,
the actual handling of mapping 16 bits counter up to 32 bits or
64 bits is now managed by mbed common layer.

This makes this ticker layer very similar to 32bits one and much
easier than before.
 2018-05-25 12:20:10 -05:00
Bartek Szatkowski 6e9f04bf2f Rename DEVICE_LOWPOWERTIMER to DEVICE_LPTICKER 
That's to match DEVICE_USTICKER.
 2018-05-25 12:20:09 -05:00
Alan Chuang 7f4272d9a7 make uart console port configurable via mbed_app.json 2018-05-25 16:30:57 +08:00
Steven Cartmell a92ac70e82 HAL CRC: Move STM32 implementation to common folder and add targets 2018-05-24 17:51:50 +01:00
Steven Cartmell 6b5dabe08b HAL CRC: Use HAL polynomial enum instead of STM32 enum 2018-05-24 17:51:50 +01:00
Steven Cartmell acbf41e673 HAL CRC: Basic implementation for STM32F0 2018-05-24 17:51:50 +01:00
Kevin Bracey 13dcef63e3
Merge pull request #6847 from ARMmbed/feature-emac 
Merge feature-emac branch into master
 2018-05-24 16:47:04 +03:00
Martin Kojtal d8cb72a0a2
Merge pull request #6273 from bulislaw/update_cmsis_5.3 
Update cmsis/rtx to version 5.3
 2018-05-24 09:37:40 +02:00
Asif Rizwan 332c6eabeb recompiled driver against NetworkInterface changes on latest feature-emac 2018-05-23 12:25:23 +03:00
Asif Rizwan ce08691dad WiFi EMAC class name reflected in WiFi drivers binaries 2018-05-23 12:25:22 +03:00
Asif Rizwan 657ac3f643 WIFI_EMAC class renamed to OdinWiFiEMAC, Formatting 
Revert "in ODIN emac initialization required before connection"
 2018-05-23 12:25:21 +03:00
Asif Rizwan 0b14f1277e EMAC adaption added, updated ODIN drivers to v2.5.0 RC1 2018-05-23 12:25:18 +03:00
Mika Leppänen ef68eb8b4d Enabled greentea and mbed-os-example-tls/client/sockets test for STM 2018-05-23 12:24:02 +03:00
Kevin Bracey 6930c6d3cf Ignore old EMAC Wifi drivers 
Suppress Odin W2 and Realtek Wi-fi drivers using .mbedignore
 2018-05-23 12:23:59 +03:00
Cruz Monrreal 3bcc076c0c
Merge pull request #6931 from jeromecoutant/PR_PERIPH 
STM32 : PeripheralPins.c and PinNames.h files alignment
 2018-05-22 14:56:37 -05:00
jeromecoutant 7fd4203b58 STM32L4 ADC internal channels update 2018-05-22 13:18:25 +02:00
jeromecoutant 881a8e31ff STM32L1 ADC internal channels update 2018-05-22 13:17:52 +02:00
jeromecoutant 4d3a54443d STM32L0 ADC internal channels update 2018-05-22 13:17:16 +02:00
jeromecoutant 06bca28268 STM32F7 ADC internal channels update 2018-05-22 13:16:37 +02:00
jeromecoutant e438bd6dc8 STM32F3 ADC internal channels update 2018-05-22 11:42:35 +02:00
jeromecoutant 5f21c3f73e STM32F2 ADC internal channels update 2018-05-22 11:37:09 +02:00
jeromecoutant 743a812be6 STM32F1 ADC internal channels update 2018-05-22 11:36:09 +02:00
jeromecoutant d7932c26eb STM32F0 ADC internal channels update 2018-05-22 11:35:23 +02:00
jeromecoutant cb579cba1c STM32F4 ADC internal channels update 2018-05-22 11:32:19 +02:00
bcostm 2d7b13c540 STM32 SPI: fix NSS pin configuration 2018-05-18 14:26:26 +02:00
jeromecoutant c31554f618 STM32 ETH : remove TX RX locking interrupt perforation 2018-05-18 10:53:02 +02:00
jeromecoutant b30f3abf11 STM32 PeripheralPins.c second update after review 
genpinmap script version 1.1
 2018-05-17 17:58:09 +02:00
jeromecoutant 3ac1855d93 STM32L4 DISCO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:05:14 +02:00
jeromecoutant 3e56a68eca STM32L0 DISCO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:05:10 +02:00
jeromecoutant b928439ef7 STM32F7 DISCO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:05:06 +02:00
jeromecoutant 2b9b817aed STM32F4 DISCO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:05:03 +02:00
jeromecoutant 02e8172538 STM32F3 DISCO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:04:58 +02:00
jeromecoutant 1e0ae6de14 STM32F1 DISCO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:04:55 +02:00
jeromecoutant b22c0d1bc1 STM32F0 DISCO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:04:51 +02:00
jeromecoutant 3e92ff1f85 STM32L4 NUCLEO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:04:41 +02:00
jeromecoutant 945bf78b6e STM32L1 NUCLEO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:04:36 +02:00
jeromecoutant b308d5cb71 STM32L0 NUCLEO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:04:31 +02:00
jeromecoutant d0da6dd34e STM32F7 NUCLEO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:04:27 +02:00
jeromecoutant bcadeff645 STM32F4 NUCLEO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:04:15 +02:00
jeromecoutant 817bdc213d STM32F3 NUCLEO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:04:10 +02:00
jeromecoutant 4ebbcc2197 STM32F2 NUCLEO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:03:56 +02:00
jeromecoutant 0025ebc0c7 STM32F1 NUCLEO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:03:33 +02:00
Cruz Monrreal 8be2e34390
Merge pull request #6832 from bcostm/PULL_REQUEST_CUBE_UPDATE_F3_V1.9.0 
STM32F3: Update with STM32CubeF3 V1.9.0
 2018-05-15 10:09:16 -05:00
jeromecoutant 0e510cfe3a STM32F0 NUCLEO : PeripheralPins.c and PinNames.h files alignment 2018-05-15 14:50:07 +02:00
Bartek Szatkowski 42b48821eb Fix platform failing to build after rebase 2018-05-14 12:18:21 +01:00
Cruz Monrreal 0f51ea031e
Merge pull request #6610 from pauluap/stm32_eth_remove_tx_rx_locking_interrupt_perforation 
Stm32 eth remove tx rx locking interrupt perforation
 2018-05-07 10:51:03 -05:00
bcostm 6154fd2598 F3 ST CUBE V1.9.0: remove pcd patch 
The Lock field is no more available in PCD structure.
 2018-05-07 10:58:49 +02:00
bcostm ccf71f0360 F3 ST CUBE V1.9.0: fix build errors with legacy macros 2018-05-07 10:58:49 +02:00
bcostm d0f8def2d7 F3 ST CUBE V1.9.0 2018-05-07 10:58:49 +02:00
Martin Kojtal 45b3fffe9a
Merge pull request #6729 from JammuKekkonen/f411re_add_bootloader_support 
Add bootloader support for NUCLEO_F411RE target
 2018-05-03 16:30:29 +01:00
Jammu Kekkonen d2cf341348 Add bootloader support for NUCLEO_F411RE target 2018-04-26 16:19:43 +03:00
jeromecoutant 7b5a79f56e STM32 RTC Init minor update 2018-04-24 13:50:57 +02:00
bcostm 893b759663 L0 ST CUBE V1.10.0: change adc sampling time 2018-04-18 14:06:21 +02:00
bcostm 61576f8131 L0 ST CUBE V1.10.0: spi and i2c corrections 2018-04-18 14:06:20 +02:00
bcostm 8191487a4d L0 ST CUBE V1.10.0 2018-04-18 14:06:20 +02:00
Cruz Monrreal e2567e5dad
Merge pull request #6599 from jeromecoutant/PR_WARNING 
STM32 compilation warning issues
 2018-04-16 10:41:36 -05:00
Cruz Monrreal fe44dc0468
Merge pull request #6601 from KariHaapalehto/add_mtb_adv_wise_1530 
Add new target MTB_ADV_WISE_1530
 2018-04-16 10:40:12 -05:00
Paul Thompson 20f11bc13f Extend changes to other STM32 devices that have the PCD_WriteEmptyTxFifo() function 2018-04-13 05:27:03 -07:00
Paul Thompson b45d4233e1 Make the atomic_clr_u32 conditional use raw values rather than computed, remove need for guards 2018-04-13 04:44:43 -07:00
Paul Thompson 2211a27f53 Drop usage of ilen, just use len and cast it to int32_t as appropriate 2018-04-13 00:27:00 -07:00
Paul Thompson 8f4a5e2093 Revert to original fix concentrating on type correctness 2018-04-12 10:09:53 -07:00
Paul Thompson 430784b084 Initial work was for unsigned-signed comparison fix. Current work fixes negative number issues 
Compile: stm32f7xx_hal_pcd.c
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c: In function 'PCD_WriteEmptyTxFifo':
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c:1310:11: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
   if (len > ep->maxpacket)
           ^
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c:1325:13: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
     if (len > ep->maxpacket)
             ^
 2018-04-12 09:43:18 -07:00
Paul Thompson c67f535fb3 Drop locking around TX and RX. The DMA channels are independent of each other 2018-04-12 09:42:28 -07:00
jeromecoutant 71d7d24bd6 STM32L4 : correct compilation warnings 2018-04-12 10:56:41 +02:00
jeromecoutant e7c4120550 STM32L1 : correct compilation warnings 2018-04-12 10:55:16 +02:00
jeromecoutant eeca430b23 STM32L0 : correct compilation warnings 2018-04-12 10:55:11 +02:00
jeromecoutant 2d0dce1db5 STM32F7 : correct compilation warnings 2018-04-12 10:55:02 +02:00
jeromecoutant 2fcf8d8990 STM32F4 : correct compilation warnings 2018-04-12 10:52:21 +02:00
jeromecoutant a540a21106 STM32F3 : correct compilation warnings 2018-04-12 10:51:33 +02:00
jeromecoutant 4e9e9f5c62 STM32F2 : correct compilation warnings 2018-04-12 10:51:18 +02:00
Kari Haapalehto f2b37b7d42 Add new target MTB_ADV_WISE_1530. 
MTB_ADV_WISE_1530 and MTB_USI_WM_BN_BM_22 includes same usi chip,
so common USI_WM_BN_BM_22 target has been created.
MTB_ADV_WISE_1530 and MTB_USI_WM_BN_BM_22 are inheting the common usi target
 2018-04-11 15:50:28 +03:00
jeromecoutant b6a8a50a28 STM32F1 : correct compilation warnings 2018-04-11 11:06:44 +02:00
jeromecoutant c2ee8f34b6 STM32F0 : correct compilation warnings 2018-04-11 09:57:54 +02:00
Paul Thompson f41cf081c9 STM32 : correct compilation warnings 2018-04-11 09:53:15 +02:00
Cruz Monrreal e913e917c0
Merge pull request #6544 from ithinuel/add_rak811_adc 
add ADC_AN0-2 mapped on PA_0-2
 2018-04-10 18:08:03 -05:00
Martin Kojtal 8b2eb20a54
Merge pull request #6553 from theotherjimmy/stmL4-armc6 
Correct armc6 detection logic for STM32L4
 2018-04-09 17:36:52 +02:00
Martin Kojtal 96084a3c67
Merge pull request #6561 from LMESTM/Stm32DeepSleepClock 
Stm32 deep sleep clock
 2018-04-09 17:11:23 +02:00
Martin Kojtal a3faf58a9e
Merge pull request #6511 from ashok-rao/MTB_USI_BM22 
Add new target USI WM-BN-BM-22
 2018-04-09 17:07:00 +02:00
Laurent MEUNIER ad4a250292 Style fix 2018-04-06 17:03:53 +02:00
Laurent MEUNIER 3d92af50ce Add delay to let clock stabilize when out of deep sleep 
Tests have shown that there is hich-up on MSI clock during the setup phase.
If this stabilization phase happens when application has restarted again
this can have side effects, like grambled UART characters typically.

So we're adding a delay before hading-over back to application.

With this modification, on NCULEO_L476RG, the wake-up time is increased
from 2ms to 2,5ms.
If possible this should be improved in the future to save 500 microseconds
of wak-up time.  See TODO
 2018-04-06 16:10:27 +02:00
Laurent MEUNIER 8007b1df7c Use temporarily MSI or HSI when exiting Deep Sleep 
There are cases where HW registers are found in unpexcepted state when
exiting Deep Sleep only few micro-seconds after it was entered.

By using an internal clock that does not depend on anythin and clocking
the system without using PLL, this allows SetSysClock default configuration
to run fine whatever possible configuration we find the HW in when
exiting Deep Sleep.

Also we shall restore interrupts only after all cloks are back to
expected running state.
 2018-04-06 16:10:27 +02:00
Jimmy Brisson d374bb4a5a Correct armc6 detection logic 2018-04-05 15:13:52 -05:00
Wilfried Chauveau de4d7043c9 add ADC_AN0-2 mapped on PA_0-2 2018-04-05 08:33:55 +01:00
bcostm 8412807669 Update stm32l151xba.h 2018-04-03 15:01:07 +02:00
bcostm 293b3bfdc0 STM32L1: allow redefinition of FLASH_SIZE macro 2018-04-03 14:23:14 +02:00
bcostm 8c0ff8be79 Fix typos causing ARM build error 2018-04-03 14:01:03 +02:00
bcostm d8aa587782 L1 ST CUBE V1.8.1 2018-04-03 14:01:02 +02:00
Ashok Rao 62e5dccd0b Remove irrelevant comments 2018-03-29 16:52:03 +01:00
Ashok Rao 1df5c020b9 Adding USI WM-BN-BM-22 as a new target 2018-03-29 16:20:54 +01:00
Wilfried Chauveau 85af9f96ea add IAR to the supported toolchain 2018-03-28 10:03:23 +01:00
Wilfried Chauveau c31676306a switch to stm32l151cb-a & work around flash size field width. 2018-03-26 18:00:18 +01:00
Wilfried Chauveau 495f8e4e5b add RF_TXCO_EN on PH1 and set HSI calibration to its default value 2018-03-23 10:19:49 +00:00
Wilfried Chauveau 758f3b2dbd add support for the RAK811 2018-03-23 10:19:49 +00:00
Cruz Monrreal 7c272fa3e8
Merge pull request #6412 from jeromecoutant/PR_L4_ADC 
STM32L4 ADC correct internal channel management
 2018-03-22 11:27:50 -05:00
Cruz Monrreal 04a3635eba
Merge pull request #6399 from jeromecoutant/PR_L4_TEMP 
STM32L4 ADC Internal Channel : correct sampling time
 2018-03-22 11:27:30 -05:00
jeromecoutant ef006931f8 STM32L4 ADC correct internal channel management 2018-03-21 10:57:57 +01:00
Cruz Monrreal 6cb6dd9e62
Merge pull request #6330 from bcostm/fix_pins_nucleo_l433rc_p 
NUCLEO_L433RC_P: fix pins definitions
 2018-03-20 14:56:05 -05:00
Cruz Monrreal d7dfab5c7e
Merge pull request #6370 from jeromecoutant/PR_LPT_RTC_OPTIM 
STM32 LPTICKER : optimize RTC wake up timer init
 2018-03-20 14:19:07 -05:00
jeromecoutant 6c369d17aa STM32L4 ADC Internal Channel : correct sampling time 2018-03-20 13:15:17 +01:00
Cruz Monrreal 0adef8a959
Merge pull request #6379 from bcostm/dev_DISCO_L496AG 
DISCO_L496AG: Add new platform
 2018-03-19 11:18:27 -05:00
Cruz Monrreal 05e72dc729
Merge pull request #6353 from jeromecoutant/PR_RTC_LSE 
STM32 RTC init
 2018-03-16 11:45:13 -05:00
bcostm f59f7581fb DISCO_L496AG: add entry in mbed_rtx.h 2018-03-16 10:02:12 +01:00
bcostm 64a824abd2 DISCO_L496AG: add system clock file (same as Nucleo) 2018-03-16 10:02:12 +01:00
bcostm ade8583044 DISCO_L496AG: add other pins related files 2018-03-16 10:02:11 +01:00
bcostm 63901a803c DISCO_L496AG: remove QSPI2 
Base adress not found in registers map file but found in CubeMX xml file.
 2018-03-16 10:02:11 +01:00