Watchdog is hardware driver. It interacts with HAL - provides wrapper to interact with the peripheral.
Provides basic functionality: start/stop, get timeout/max timeout.
It is automatically kicked by a timer, according to the timeout set in ctor.
For L0/L4/H7/F7/WB targets that have tickless enabled, remove the tickless from
us ticker and the delay ticks as the C++ wrapper layer is being removed
and replaced by the low layer handling.
For now, the few F4 targets with LPTIM are left with previous configuration
as test results are showing a few instabilities not yet understood.
LP TICKER mbed-os wrapper needs to be disabled as it introduces too much latencies.
LP TICKER wrapper has been disabled and we need to managed the HW constraints at low level:
- main HW constraint is that once the comparator has been programmed once,
driver cannot program it again before CMPOK HW flag is set, which takes about 3 30us cycles.
To make it even more complex, the driver also needs to cope with "LP ticker workaround"
See commit:
LP ticker workaround
There is an errata in LPTIM specification that explains that CMP Flag
condition is not an exact match (COUNTER = MATCH) but rather a
comparison (COUNTER >= MATCH).
Also the disable interrupt is more complete now:
- always check sleep manager status and restore it
- remove irq_handler as comparator is always programed and might get called
eventually when LP TICK is restarted
- reset delayed_prog
Also in set_interrupt, make sure interrupt does not fire early.
If needed, we decide to slightly delay the tick to cope with the HW limitation to
make sure it will fire as soon as HW is capable.
Functions are called under critical section as they may be called from
the IRQ handler now, not only from driver layer.
There is an errata in LPTIM specification that explains that CMP Flag
condition is not an exact match (COUNTER = MATCH) but rather a
comparison (COUNTER >= MATCH).
As a consequence the interrupt is firing early than expected when
programing a timestamp after the 0xFFFF wrap-around.
In order to
work-around this issue, we implement the below work-around.
In case timestamp is after the work-around, let's decide to program the
CMP value to 0xFFFF, which is the wrap-around value. There would anyway be
a wake-up at the time of wrap-around to let the OS update the system time.
When the wrap-around interrupt happen, OS will check the current time and
program again the timestamp to the proper value.
As the build tool in mbed-os 5.13 cannot appropriately deal with a segmented
bootloader when combining it with an application, this commit adjusts the
size reserved for interrupts (via the linker file) to avoid a bootloader
segmentation due to an unpopulated ROM area.
The microcontroller has a total of 60 vector interrupts + 16 exception
handlers. The allocated ROM flash for interrupts should be (60 + 16) x word
size in bytes = 76 x 4 = 304 = 0x130.
This commit changes the interrupt reserved space from 0x140 to 0x130.
The file 'fsl_powerquad_data.h' declares several dctXXX_cosFactor
arrays with sizes twice larger compared to the actual definitions in
'fsl_powerquad_data.c'.
As the timer code became more generic, coping with initialization on
demand, and variable width and speed us_ticker_api implementations,
wait_us has gradually gotten slower and slower.
Some platforms have reportedly seen overhead of wait_us() increase from
10µs to 30µs. These changes should fully reverse that drop, and even
make it better than ever.
Add fast paths for platforms that provide compile-time information about
us_ticker. Speed and code size is improved further if:
* Timer has >= 2^32 microsecond range, or better still is 32-bit 1MHz.
* Platform implements us_ticker_read() as a macro
* Timer is initialised at boot, rather than first use
The latter initialisation option is the default for STM, as this has
always been the case.
The build tool uses the sector size found in the CMSIS Pack to determine if
the size that can be specified by `target.restrict_size` is enough to fit
all the parts of a given binary. See `target.restrict_size` documentation
in the Mbed OS manual for more information.
The sector size found in the CMSIS Pack is overriden to allow the build
tool to accurately make the decision.
The target's sectors in the CMSIS Pack are defined in 32KB pages.
However, you can erase pages at the 512 byte level.
This commit changes defined sector erase size to 512 bytes instead of
32 Kilobytes.
Time drifting test cases use serial communication with the host and are unstable on CI.
Skip time-drifting test cases if SKIP_TIME_DRIFT_TESTS macro is defined.
The idea for the future is to use FPGA test shield for timing tests instead of host scripts.
Also remove `__ARM_FM` macro which in most cases was used to disable time drifting tests. In other cases replace `__ARM_FM` with `TARGET_ARM_FM` which is more suitable.
This allows Cypress to deliver middleware libraries with
precompiled libraries for SoftFP ahd HardFP, separated by
component-specific sub-directories:
COMPONENT_SOFTFP/TOOLCHAIN_GCC_ARM/libcy_capsense.a
COMPONENT_HARDFP/TOOLCHAIN_GCC_ARM/libcy_capsense.a
- mbed_watchdog_mgr has interface name mbed_wdog_manager_start(),mbed_wdog_manager_stop(),mbed_wdog_manager_kick()
- HwWatchdog is going to attach with LowPowerTIcker for periodic callback functionality
- mbed_wdog_manager_start() will either get start either by BL/RTOS Aps,it reads the timeout value specified via macro and macro gets defined in target.json file.
- mbed_wdog_manager_start() internally configure below HAL hw watchdog with timeout specified via target.json
- mbed_wdog_manager_start() internally divide the timeout(specified in target.json) by the 2 and attach LowPowerTicker with periodic callback of hw_kick()
- mbed_wdog_manager_start() internally create one instance of sw watchdog class,to access the static list data structure of sw watchdog class
- mbed_wdog_manager_kick() function periodically get called and refresh the hw watchdog to avoid watchdog reset
- converted C++ code into C based APIs
- added boolean to control watchdog start and stop
- Added detach from ticker on stop API
At high HCLK rate, M2351 cannot provide zero-wait-state flash performance. Besides,
cache is forcibly turned off for non-secure land for internal reason. We locate
'delay_loop_code' from flash to SRAM to achieve zero-wait-state performance.
Add a pulse when using hardware chip select for SPI transmissions.
CS is at low level when a transmission is on-going.
Be careful, this is not compatible with all modes. It will work only
if PHA is 0, ie spi mode is 0 or 2. See stm32xx reference manual,
chapter "NSS pulse mode" for more details.
Fix#10671
Signed-off-by: Vincent Veron <vincent.veron@st.com>
Deprecate wait() in favour of acquire(), try_acquire(),
try_acquire_for() and try_acquire_until().
Brings Semaphore more into line with CMSIS-RTOS 2 (which uses "acquire"),
itself (as it has "release"), and other classes having "try", "try for"
and "try until".
Also steps away from vague "wait" term - the primary operation here is
to acquire the semaphore, and this will of course sleep.
Fix WATCHDOG_STATUS_INVALID_ARGUMENT for timeout values from 1 ms to
407 ms (fix inability to set prescaler bits to zero).
Fix timeout <-> IWDG registers conversions.
Fix read & write access to IWDG_PR and IWDG_RLR registers.
Fix LSI RC frequency setting.
Limit MAX_TIMEOUT_MS to UINT32_MAX.
- Fix typo in module comment
- Redefine the default system behaviour in sleep mode
- Guard K64F enableWait flag
- Remove bit shifts from reset reason enum
- Add preprocessor guard to watchdog api that errors if the reset reason api is not also implemented
- Add RESET_REASON and WATCHDOG to K64F targets.json
- Add watchdog reference implementation
* The following v14.2 files are removed from nrfx/legacy:
nrf_drv_clock.h
nrf_drv_common.h
nrf_drv_gpiote.h
nrf_drv_spi.h
nrf_drv_twi.h
nrf_drv_uarth.h
* Remove unneeded references to "nrfx_glue.h" and "nrf_drv_common.h"
* Remove the definition of PACKED from app_util_platform.h (already defined
in mbed_toolchain.h)
* Update all scatterfiles to define MBED_RAM_START and MBED_RAM_SIZE. These
get defined in mbed_lib.json when building with a SoftDevice but were missing
when no SoftDevice is brought in.
* Remove SDK 14.2 SoftDevice files.
* Add missing header file to qspi_api.c.
- Adjust memory for SoftDevice
- Enable PRIO=5 for interrupt priority check
- Change NRF_SD_BLE_API_VERSION to 6
- Add handle and buffer for advertising and scanning
- Remove guard for phy update
- Change scatter files and mbed_lib.json for PR #8607
* Update TARGET_NRF5x/README.md to improve "Changing SoftDevice" section
and added section on NRF52840 CryptoCell310 Support
* Update the file list in TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/README.md
* Add missing CR-LF to Nordic-provided SDK file
* Rename a header file in the TARGET_SOFTDEVICE_S112 tree
This reverts commit 3d2fa535a71b7bad08c6a91a31d74f4492c8948c.
This was a breaking change for the "MBR" and "NONE" builds.
After testing it was also determined that copying the vector
table a second time wasn't required for the "FULL" build.
- Add MBR, NONE and OTA SoftDevice build options for S132 and S140
- Add S112 SoftDevice (single build option)
- Some folder restructuring in TARGET_SOFTDEVICE_COMMON was required
The 15.0 SDK doesn't support the nRF51 so it must continue to use the legacy
NRF drivers. Thus the original common_rtc.c, gpio_api.c and us_ticker.c are
restored and placed under TARGET_NRF5x/TARGET_NRF51.
Likewise the modified common_rtc.c, gpio_api.c and us_ticker.c are moved to
TARGET_NRF5x/TARGET_NRF52 so they are excluded from nRF51 builds.
Ensure that vector table gets initialized properly. The table that we
initialize in startup_nrf52840.S gets wiped out as the section is
declared as noinit. Fix this by implementing the weak function mbed_sdk_init
that inits the vector table.
When the SoftDevice (SD) is enabled we need to set the app_offset
to 0x26000 to make room for the SoftDevice. If we let the build
tools self-manage this, MBED_APP_START is coming out at 0x25000
which is not correct for the Nordic 15.0 SDK.
The app_offset value is translated to MBED_APP_START by the build
infrastructure. We were hard coding MBED_APP_START in the scatter
and ld files as a temporary measure while testing. This now sets
it properly if the SD is being brought in.
- Added legacy nrf_drv_rng.c as there is no merit in fully adopting nrfx_rng.c
- Added nrf_queue library component
- Removed apply_old_config.h (unused for some time now)
- Updated sdk_config.h for queue and RNG support for nRF52832
- Brought back RNG into targets.json for nRF52832
Note: nRF52840 still uses CryptoCell 310 for TRNG
- Use new NRFX header file
- Fix nRF52832 linker script/ld files (hardcoded addresses for now)
- Temporarily remove DEVICE_TRNG for nRF52832 (which broke the build)
- Improve serial_putc() fix so we don't rely on "extra" functions
- Missed some NRFX defines that needed to changed
- Set PWM base clock to 125kHz (needs to be reverted back to 1 MHz)
- Updated sdk_config.h for nRF52_DK builds
- Brought in updates from PR7779 (fix for nRF52 PWM issues)
Also addressed:
- removed dependency on legacy config (excluded apply_old_config.h)
- removed legacy pwm and saadc headers
- Arm Compiler 5 linking issue (a band-aid for now... needs to
be properly addressed for peripheral sharing)
- added missing header in SoftDevice file
- top level files ported from TARGET_NORDIC/TARGET_NRF5x/
Also addressed:
- fixed linking issue for gcc
- added support for nRF52-DK builds, but reverted to using nRF52840 sdk_config.h (must be updated)
- introduced "RTC" to targets.json (might need to be removed eventually)
Imports working McuBoot for reset.
Updates microsec ticker driver.
Default baudrate is set to 115200 to see TF-M boot messages.
Stack top is set to scatter file dependent and not hard-coded.
Musca-A1 is a Cortex-M33 based target with security extension enabled.
- ARM_MUSCA_A1 is the non-secure target running mbed-os.
- ARM_MUSCA_A1_S is the secure target running TF-M.
- TF-M sources were imported and patched in previous commits.
- TF-M secure bootloader (McuBoot) for MUSCA_A1 is submitted by a pre-built binary.
- A post-build hook concatenates The secure and non-secure binaries,
signs it and then concatenates the bootloader with the signed binary.
due to partial implementation. Having FUTURE_SEQUANA_M0 and
FUTURE_SEQUANA PSA targets is misleading.
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
In M2351 SPDMC (SMCC) test, it boots from secure code to non-secure bootloader, and finally
to non-secure test code itself. The boot sequence will takes longer than usual. In test
initiation, host will send sync signal 1s after reset device. But due to the longer boot
sequence, test code in device can miss the signal. We enlarge the reset idle time to fix
the issue.
On ARMC6 with optimization level "-Os", the two functions NVIC_SetVector/NVIC_GetVector
will be translated to illegal instruction for trapping due to NVIC_FLASH_VECTOR_ADDRESS
defined as direct 0. Fixed by defining NVIC_FLASH_VECTOR_ADDRESS as a symbol instead to
avoid such optimization error.
By default, FLASH_SIZE should be read from HW.
In case this is not the case, we define it here, as the size of FLASH
that is available to the application running on M4.
the flash is shared and split between cortex-M4 that
runs (mbed-os) application and the cortex-M0+ that
runs the BLE firmware.
The 512K allocated to the application was a
conservative that can now be updated.
With recent up-to-date BLE firmware flashed @ 0x080CB000,
there should be 812K available to application.
But there are boards out there that don't have an up-to-date
firmware, so we're keeping an intermediate, safer,
application size of 768K.
Change the heuristic for selection of CMSE in the tools python, so that
a non-TrustZone ARMv8 build can happen.
Ideally we would have more direct flagging in the targets, but this
refines the heuristic so the necessary behaviour can be easily
achieved.
* DOMAIN_NS=1 is based purely on the `-NS` suffix on the core name.
* Enabling CMSE in the compiler and outputting a secure import library
is now enabled when the core doesn't have an `-NS` suffix by either
the target label `TFM` being present or the flag `trustzone` being set.
This covers the existing ARMv8-M behaviour - TF-M builds have the TFM
label, as per its documentation; M2351 secure builds have no explicit
flagging, so we ensure that the M2351_NS target has the trustzone flag
set, and the out-of-tree secure target inherits that.
Some Nuvoton targets support DEVICE_FLASH but their corresponding COMPONENT_FLASHIAP
supports are not enabled. Enable them:
NUMAKER_PFM_M453
NUMAKER_PFM_M2351
Reimplement atomic code in inline assembly. This can improve
optimisation, and avoids potential architectural problems with using
LDREX/STREX intrinsics.
API further extended:
* Bitwise operations (fetch_and/fetch_or/fetch_xor)
* fetch_add and fetch_sub (like incr/decr, but returning old value -
aligning with C++11)
* compare_exchange_weak
* Explicit memory order specification
* Basic freestanding template overloads for C++
This gives our existing C implementation essentially all the functionality
needed by C++11.
An actual Atomic<T> template based upon these C functions could follow.
Purposes:
* Remove MbedOS-specific code from system_psoc6_{cm4,cm0plus}.c
to simplify updates to new PDL version (startup code is part of PDL).
* Unify mbed_sdk_init initialization sequence for both CPU cores.
This change is non-functional, sequence itself is not changed for any
of the PSoC 6 M4/M0 PSA/non-PSA targets.
According to their cmsis.h, FPU is present, so change targets.json to
use it.
* ARM_MPS2_M4: already was Cortex-M4F
* ARM_MPS2_M7: Cortex-M7 -> M7FD
* FVP_MPS2_M4: Cortex-M4 -> M4F
* FVP_MPS2_M7: Cortex-M7 -> M7FD
If they do not in fact have FPU, then cmsis.h should be modified to set
`__FPU_PRESENT` to 0. This will currently cause compilation problems
with ARMC6, but I'll be submitting a fix for that.
On NUC472, on wake-up from power-down mode, we may meet hard fault or some other
unknown error. Before its cause is found, we enter idle mode instead for a workaround.
To simulate power-down mode with idle mode, we also disable us_ticker during
power-down period.
PDL Flash API requires that the data buffer is 32-bit aligned, otherwise
programming can hung. Buffer declared as uint8_t array is not always
properly aligned, e.g. with gcc 6 when -Os option is used.
Flash driver 3.30:
Moved ipcWaitMessageStc structure to the RAM section called ".cy_sharedmem"
Added support Secure Boot devices
Moved CY_FLASH_EFFECTIVE_PAGE_SIZE to flash_api.c (the macro is Mbed specific).
GeneratedSource folders are BSP specific. No parts of the kit BSP can be reused
as generic chip support package. Remove TARGET_CY8C62XX directory,
and use flat BSP inheritance model:
MCU_PSOC6 -> MCU_PSOC6_M4 -> CY8CKIT_062_WIFI_BT
MCU_PSOC6 -> MCU_PSOC6_M0 -> CY8CKIT_062_WIFI_BT_M0
Add file MPS2.icf and startup_MPS2.S to suppout IAR of the target
AN382(ARM_MPS2_M0). Add "IAR" to supported_toolchain list.
Change-Id: I2b2ad7645166c4f973a8baa9c394521514183767
Signed-off-by: Shawn Shan <shawn.shan@arm.com>
Add file MPS2.icf and startup_MPS2.S to suppout IAR of the target
AN383(ARM_MPS2_M0P). Add "IAR" to supported_toolchain list.
Change-Id: Ib2278d34e265e53ad070aecd318ed4e6a355e3c0
Signed-off-by: Shawn Shan <shawn.shan@arm.com>
Add files MPS2.ld and startup_MPS2.S to support GCC_ARM of the target
AN382(ARM_MPS2_M0). Add "GCC_ARM" to supported_toolchains list.
Change-Id: I7046b698834c82e94015e51eef9a0f5e1315ddaa
Signed-off-by: Shawn Shan <shawn.shan@arm.com>
Add files MPS2.ld and startup_MPS2.S to support GCC_ARM of the target
AN383(ARM_MPS2_M0P). Add "GCC_ARM" to supported_toolchains list.
Change-Id: I48020b4f0f1b6e0aef3c53f5a3586bc9e9fca9c9
Signed-off-by: Shawn Shan <shawn.shan@arm.com>
Add file MPS2.icf and startup_MPS2.S to suppout IAR of the target
AN385(ARM_MPS2_M3). Add "IAR" to supported_toolchain list.
Change-Id: I038b05b8b21bd146a1568de897ed030ccd52ab79
Signed-off-by: Shawn Shan <shawn.shan@arm.com>
Add file MPS2.icf and startup_MPS2.S to suppout IAR of the target
AN386(ARM_MPS2_M4). Add "IAR" to supported_toolchain list.
Change-Id: I4f43617c870197b9d39a4d4c9c12456adcc6f96f
Signed-off-by: Shawn Shan <shawn.shan@arm.com>
Add file MPS2.icf and startup_MPS2.S to suppout IAR of the target
AN500(ARM_MPS2_M7). Add "IAR" to supported_toolchain list.
Change-Id: I0b8f018fc937727382b27ea0669940ae6675c834
Signed-off-by: Shawn Shan <shawn.shan@arm.com>
Add files MPS2.ld and startup_MPS2.S to support GCC_ARM of the target
AN385(ARM_MPS2_M3). Add "GCC_ARM" to supported_toolchains list.
Change-Id: I3110d4ab37a3294488a80a8dc1c929bfd87ce989
Signed-off-by: Shawn Shan <shawn.shan@arm.com>
Martin Kojtal
George Beckstein
Tymoteusz Bloch
Kevin Bracey
Laurent Meunier
Mahesh Mahadevan
ThunderSoft_mbed_os
Hugues Kamba
Devaraj Ranganna
George Beckstein
jeromecoutant
Alexandre Bourdiol
Maciej Bocianski
Mathias Brossard
Anna Bridge
Malavika Sajikumar
Vincent Veron
Qinghao Shi
Chun-Chieh Li
Jaeden Amero
desmond.chen
panyz0725@thundersoft.com
Filip Jagodzinski
d-kato
Przemyslaw Stekiel
Volodymyr Medvid
toyowata
Lingkai Dong
petroborys
Teijo Kinnunen
Hennadiy Kytsun
Rajkumar Kanagaraj
Chris Trowbridge
Ronny Liu
ale87jan
Steve Cartmell
Ganesh Ramachandran
Lukas Mandak
Steven Cooreman
Filip Jagodzinski
Bartek Szatkowski
RFulchiero
Naveen Kaje
Ralph F
Oren Cohen
Gabor Kertesz
Michael Schwarcz
Bilal Qamar
TeddyWiz
DESKTOP-UBVDC3M\Sachin
aqin
M. Rahimi
Guillermo Alonso
Wajahat Abbas
mudassar-ublox
Lin Gao
Ryan Morse
petroborys
Martin Kojtal
fred.li
JarekParal
Juho Eskeli
Leszek Rusinowicz
Lei Zhang
Shawn Shan