mirror of https://github.com/ARMmbed/mbed-os.git
PSOC6: update version of PDL flash driver
Flash driver 3.30: Moved ipcWaitMessageStc structure to the RAM section called ".cy_sharedmem" Added support Secure Boot devices Moved CY_FLASH_EFFECTIVE_PAGE_SIZE to flash_api.c (the macro is Mbed specific).pull/10413/head
parent
e8300553af
commit
ae716e2ab7
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@ -22,6 +22,10 @@
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#if DEVICE_FLASH
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/** Flash effective page size */
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#define CY_FLASH_EFFECTIVE_PAGE_SIZE 32
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int32_t flash_init(flash_t *obj)
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{
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(void)(obj);
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@ -1,6 +1,6 @@
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/***************************************************************************//**
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* \file cy_flash.h
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* \version 3.20
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* \version 3.30
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*
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* Provides the API declarations of the Flash driver.
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*
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@ -104,7 +104,7 @@
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* Crypto).
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* -# If you do not use the default startup, perform the following steps
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* before any flash write/erase operations:
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* \snippet flash\3.20\snippet\main.c Flash Initialization
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* \snippet flash/snippet/main.c Flash Initialization
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*
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* \subsection group_flash_config_rww Partially Blocking:
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* This method has a much shorter time window during which Flash accesses are not
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@ -112,7 +112,7 @@
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* Flash Write duration, for both cores. Blocking duration depends upon the API
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* sequence used.
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*
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* For API sequence Cy_Flash_StartErase() + Cy_Flash_StartProgram() there are
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* For API sequence Cy_Flash_StartEraseRow() + Cy_Flash_StartProgram() there are
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* four block-out regions during which the read is blocked using the software
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* driver (PDL). See <b>Figure 1</b>.
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*
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@ -216,7 +216,7 @@
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* (DMA and Crypto).
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* -# If you do not use the default startup, perform the following steps
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* before any flash write/erase operations:
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* \snippet flash\3.20\snippet\main.c Flash Initialization
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* \snippet flash/snippet/main.c Flash Initialization
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*
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* \subsection group_flash_config_emeeprom EEPROM section use:
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* If you plan to use "cy_em_eeprom" section for different purposes for both of
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@ -255,6 +255,21 @@
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* <table class="doxtable">
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* <tr><th>Version</th><th style="width: 52%;">Changes</th><th>Reason for Change</th></tr>
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* <tr>
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* <td rowspan="3">3.30</td>
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* <td>Moved ipcWaitMessageStc structure to the RAM section called ".cy_sharedmem".</td>
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* <td>Support Secure Boot devices.</td>
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* </tr>
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* <tr>
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* <td>Renamed Function Cy_Flash_StartErase() to Cy_Flash_StartEraseRow().</td>
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* <td>The driver improvements based on the usability feedback.</td>
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* </tr>
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* <tr>
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* <td>Added new API functions \ref Cy_Flash_EraseSector,
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* \ref Cy_Flash_StartEraseSector, \ref Cy_Flash_EraseSubsector,
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* \ref Cy_Flash_StartEraseSubsector </td>
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* <td>The driver improvements based on the usability feedback.</td>
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* </tr>
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* <tr>
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* <td rowspan="3">3.20</td>
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* <td>Flattened the organization of the driver source code into the single source directory and the single include directory.</td>
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* <td>Driver library directory-structure simplification.</td>
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@ -359,7 +374,7 @@ extern "C" {
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#define CY_FLASH_DRV_VERSION_MAJOR 3
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/** Driver minor version */
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#define CY_FLASH_DRV_VERSION_MINOR 20
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#define CY_FLASH_DRV_VERSION_MINOR 30
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#define CY_FLASH_ID (CY_PDL_DRV_ID(0x14UL)) /**< FLASH PDL ID */
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@ -377,8 +392,6 @@ extern "C" {
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/** Flash row size */
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#define CY_FLASH_SIZEOF_ROW (CPUSS_FLASHC_PA_SIZE * 4u)
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/** Flash effective page size */
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#define CY_FLASH_EFFECTIVE_PAGE_SIZE 32
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/** Long words flash row size */
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#define CY_FLASH_SIZEOF_ROW_LONG_UNITS (CY_FLASH_SIZEOF_ROW / sizeof(uint32_t))
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@ -430,11 +443,15 @@ typedef enum cy_en_flashdrv_status
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*/
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void Cy_Flash_Init(void);
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cy_en_flashdrv_status_t Cy_Flash_EraseRow(uint32_t rowAddr);
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cy_en_flashdrv_status_t Cy_Flash_StartEraseRow(uint32_t rowAddr);
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cy_en_flashdrv_status_t Cy_Flash_EraseSector(uint32_t sectorAddr);
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cy_en_flashdrv_status_t Cy_Flash_StartEraseSector(uint32_t sectorAddr);
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cy_en_flashdrv_status_t Cy_Flash_EraseSubsector(uint32_t subSectorAddr);
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cy_en_flashdrv_status_t Cy_Flash_StartEraseSubsector(uint32_t subSectorAddr);
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cy_en_flashdrv_status_t Cy_Flash_ProgramRow(uint32_t rowAddr, const uint32_t* data);
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cy_en_flashdrv_status_t Cy_Flash_WriteRow(uint32_t rowAddr, const uint32_t* data);
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cy_en_flashdrv_status_t Cy_Flash_StartWrite(uint32_t rowAddr, const uint32_t* data);
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cy_en_flashdrv_status_t Cy_Flash_StartProgram(uint32_t rowAddr, const uint32_t* data);
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cy_en_flashdrv_status_t Cy_Flash_StartErase(uint32_t rowAddr);
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cy_en_flashdrv_status_t Cy_Flash_IsOperationComplete(void);
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cy_en_flashdrv_status_t Cy_Flash_RowChecksum(uint32_t rowAddr, uint32_t* checksumPtr);
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cy_en_flashdrv_status_t Cy_Flash_CalculateHash(const uint32_t* data, uint32_t numberOfBytes, uint32_t* hashPtr);
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@ -451,11 +468,15 @@ uint32_t Cy_Flash_GetExternalStatus(void);
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void Cy_Flash_ResumeIrqHandler(void);
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#endif
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/* Macros to backward compatibility */
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/*******************************************************************************
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Backward compatibility macro. The following code is DEPRECATED and must
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not be used in new projects
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*******************************************************************************/
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#define Cy_Flash_IsWriteComplete(...) Cy_Flash_IsOperationComplete()
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#define Cy_Flash_IsProgramComplete(...) Cy_Flash_IsOperationComplete()
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#define Cy_Flash_IsEraseComplete(...) Cy_Flash_IsOperationComplete()
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#define CY_FLASH_NUMBER_ROWS (CY_FLASH_SIZE / CY_FLASH_SIZEOF_ROW)
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#define CY_FLASH_NUMBER_ROWS (CY_FLASH_SIZE / CY_FLASH_SIZEOF_ROW)
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#define Cy_Flash_StartErase Cy_Flash_StartEraseRow
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/** \endcond */
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@ -1,6 +1,6 @@
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/***************************************************************************//**
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* \file cy_flash.c
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* \version 3.20
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* \version 3.30
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*
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* \brief
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* Provides the public functions for the API for the PSoC 6 Flash Driver.
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@ -72,6 +72,10 @@ typedef struct
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#define CY_FLASH_OPCODE_PROGRAM_ROW ((0x06UL) << 24UL)
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/** SROM API opcode for row erase operation */
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#define CY_FLASH_OPCODE_ERASE_ROW ((0x1CUL) << 24UL)
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/** SROM API opcode for sub sector erase operation */
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#define CY_FLASH_OPCODE_ERASE_SUB_SECTOR ((0x1DUL) << 24UL)
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/** SROM API opcode for sector erase operation */
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#define CY_FLASH_OPCODE_ERASE_SECTOR ((0x14UL) << 24UL)
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/** SROM API opcode for flash checksum operation */
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#define CY_FLASH_OPCODE_CHECKSUM ((0x0BUL) << 24UL)
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/** SROM API opcode for flash hash operation */
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@ -146,9 +150,9 @@ typedef cy_en_flashdrv_status_t (*Cy_Flash_Proxy)(cy_stc_flash_context_t *contex
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#define CY_FLASH_START_PROGRAM_DELAY_TICKS (6000UL)
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/* Delay time for StartProgram function in us */
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#define CY_FLASH_START_PROGRAM_DELAY_TIME (900UL + CY_FLASH_DELAY_CORRECTIVE(CY_FLASH_START_PROGRAM_DELAY_TICKS))
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/* Number of the CM0P ticks for StartErase function delay corrective time */
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/* Number of the CM0P ticks for StartErase functions delay corrective time */
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#define CY_FLASH_START_ERASE_DELAY_TICKS (9500UL)
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/* Delay time for StartErase function in us */
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/* Delay time for StartErase functions in us */
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#define CY_FLASH_START_ERASE_DELAY_TIME (2200UL + CY_FLASH_DELAY_CORRECTIVE(CY_FLASH_START_ERASE_DELAY_TICKS))
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/* Number of the CM0P ticks for StartWrite function delay corrective time */
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#define CY_FLASH_START_WRITE_DELAY_TICKS (19000UL)
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@ -228,23 +232,23 @@ static volatile cy_stc_flash_context_t flashContext;
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{
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ipcWaitMessage->clientID = CY_FLASH_IPC_CLIENT_ID;
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ipcWaitMessage->pktType = CY_FLASH_ENTER_WAIT_LOOP;
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ipcWaitMessage->intrRelMask = 0u;
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ipcWaitMessage->intrRelMask = 0U;
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}
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if (cy_device->flashRwwRequired != 0u)
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if (cy_device->flashRwwRequired != 0U)
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{
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#if (CY_CPU_CORTEX_M4)
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cy_stc_sysint_t flashIntConfig =
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{
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(IRQn_Type)cy_device->cpussFmIrq, /* .intrSrc */
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0u /* .intrPriority */
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0U /* .intrPriority */
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};
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(void)Cy_SysInt_Init(&flashIntConfig, &Cy_Flash_ResumeIrqHandler);
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NVIC_EnableIRQ(flashIntConfig.intrSrc);
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#endif
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if (cy_device->flashPipeRequired != 0u)
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if (cy_device->flashPipeRequired != 0U)
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{
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(void)Cy_IPC_Pipe_RegisterCallback(CY_IPC_EP_CYPIPE_ADDR, &Cy_Flash_NotifyHandler,
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(uint32_t)CY_FLASH_IPC_CLIENT_ID);
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@ -320,12 +324,13 @@ static volatile cy_stc_flash_context_t flashContext;
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* and erase operations. If the default startup file is not used, or the function
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* SystemInit() is not called in your project, ensure to perform the following steps
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* before any flash or EmEEPROM write/erase operations:
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* \snippet flash\3.20\snippet\main.c Flash Initialization
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* \snippet flash/snippet/main.c Flash Initialization
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*
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*******************************************************************************/
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void Cy_Flash_Init(void)
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{
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#if !defined(CY_FLASH_RWW_DRV_SUPPORT_DISABLED)
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CY_SECTION(".cy_sharedmem")
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CY_ALIGN(4) static cy_stc_flash_notify_t ipcWaitMessageStc;
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Cy_Flash_InitExt(&ipcWaitMessageStc);
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@ -368,7 +373,7 @@ static cy_en_flashdrv_status_t Cy_Flash_SendCmd(uint32_t mode, uint32_t microsec
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uint32_t intr;
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uint32_t semaTryCount = 0uL;
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if (cy_device->flashRwwRequired != 0u)
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if (cy_device->flashRwwRequired != 0U)
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{
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/* Check for active core is CM0+, or CM4 on single core device */
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#if (CY_CPU_CORTEX_M0P)
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@ -376,7 +381,7 @@ static cy_en_flashdrv_status_t Cy_Flash_SendCmd(uint32_t mode, uint32_t microsec
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#else
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bool isPeerCoreEnabled = false;
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if (SFLASH_SINGLE_CORE == 0u)
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if (SFLASH_SINGLE_CORE == 0U)
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{
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isPeerCoreEnabled = true;
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}
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}
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else
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{
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while (0u != _FLD2VAL(IPC_STRUCT_ACQUIRE_SUCCESS, *ipcLockStatus))
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while (0U != _FLD2VAL(IPC_STRUCT_ACQUIRE_SUCCESS, *ipcLockStatus))
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{
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/* Polls whether the IPC is released and the Flash operation is performed */
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}
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@ -476,7 +481,7 @@ static cy_en_flashdrv_status_t Cy_Flash_SendCmd(uint32_t mode, uint32_t microsec
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}
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else
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{
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while (0u != _FLD2VAL(IPC_STRUCT_ACQUIRE_SUCCESS, *ipcLockStatus))
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while (0U != _FLD2VAL(IPC_STRUCT_ACQUIRE_SUCCESS, *ipcLockStatus))
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{
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/* Polls whether the IPC is released and the Flash operation is performed */
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}
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@ -623,7 +628,7 @@ static cy_en_flashdrv_status_t Cy_Flash_SendCmd(uint32_t mode, uint32_t microsec
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* a reason for failure. Does not return until the Write operation is
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* complete. Returns immediately and reports a \ref CY_FLASH_DRV_IPC_BUSY error in
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* the case when another process is writing to flash or erasing the row.
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* User firmware should not enter the Hibernate or Deep-Sleep mode until flash Erase
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* User firmware should not enter the Hibernate or Deep Sleep mode until flash Erase
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* is complete. The Flash operation is allowed in Sleep mode.
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* During the Flash operation, the device should not be reset, including the
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* XRES pin, a software reset, and watchdog reset sources. Also, low-voltage
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flashContext.arg2 = 0UL;
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flashContext.arg3 = 0UL;
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if (cy_device->flashEraseDelay != 0u)
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if (cy_device->flashEraseDelay != 0U)
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{
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result = Cy_Flash_SendCmd(CY_FLASH_BLOCKING_MODE, CY_FLASH_START_ERASE_DELAY);
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}
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}
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/*******************************************************************************
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* Function Name: Cy_Flash_StartEraseRow
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****************************************************************************//**
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*
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* Starts erasing a single row of flash. Returns immediately
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* and reports a successful start or reason for failure.
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* Reports a \ref CY_FLASH_DRV_IPC_BUSY error in the case when IPC structure is locked
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* by another process. User firmware should not enter the Hibernate or Deep Sleep mode until
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* flash Erase is complete. The Flash operation is allowed in Sleep mode.
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* During the flash operation, the device should not be reset, including the
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* XRES pin, a software reset, and watchdog reset sources. Also, the low-voltage
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* detect circuits should be configured to generate an interrupt instead of a reset.
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* Otherwise, portions of flash may undergo unexpected changes.
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* \note Before reading data from previously programmed/erased flash rows, the
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* user must clear the flash cache with the Cy_SysLib_ClearFlashCacheAndBuffer()
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* function.
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*
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* \param rowAddr Address of the flash row number.
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* The Read-while-Write violation occurs when the flash read operation is
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* initiated in the same flash sector where the flash erase operation is
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* performing. Refer to the device datasheet for the details.
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* Address must match row start address.
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*
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* \return Returns the status of the Flash operation,
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* see \ref cy_en_flashdrv_status_t.
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*
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*******************************************************************************/
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cy_en_flashdrv_status_t Cy_Flash_StartEraseRow(uint32_t rowAddr)
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{
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cy_en_flashdrv_status_t result = CY_FLASH_DRV_INVALID_INPUT_PARAMETERS;
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if (Cy_Flash_BoundsCheck(rowAddr) != false)
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{
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SystemCoreClockUpdate();
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/* Prepares arguments to be passed to SROM API */
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flashContext.opcode = CY_FLASH_OPCODE_ERASE_ROW;
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if (SFLASH_SINGLE_CORE != 0U)
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{
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flashContext.opcode |= CY_FLASH_BLOCKING_MODE;
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}
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flashContext.arg1 = rowAddr;
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flashContext.arg2 = 0UL;
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flashContext.arg3 = 0UL;
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if (cy_device->flashEraseDelay != 0U)
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{
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result = Cy_Flash_SendCmd(CY_FLASH_NON_BLOCKING_MODE, CY_FLASH_START_ERASE_DELAY);
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}
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else
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{
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result = Cy_Flash_SendCmd(CY_FLASH_NON_BLOCKING_MODE, CY_FLASH_NO_DELAY);
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}
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}
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return (result);
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}
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/*******************************************************************************
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* Function Name: Cy_Flash_EraseSector
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****************************************************************************//**
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*
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* This function erases a 256KB sector of flash. Reports success or
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* a reason for failure. Does not return until the Erase operation is
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* complete. Returns immediately and reports a \ref CY_FLASH_DRV_IPC_BUSY error in
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* the case when another process is writing to flash or erasing the row.
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* User firmware should not enter the Hibernate or Deep Sleep mode until flash Erase
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* is complete. The Flash operation is allowed in Sleep mode.
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* During the Flash operation, the device should not be reset, including the
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* XRES pin, a software reset, and watchdog reset sources. Also, low-voltage
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* detect circuits should be configured to generate an interrupt instead of a
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* reset. Otherwise, portions of flash may undergo unexpected changes.
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*
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* \param sectorAddr Address of the flash row number.
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* The Read-while-Write violation occurs when the flash read operation is
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* initiated in the same flash sector where the flash write operation is
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* performing. Refer to the device datasheet for the details.
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* Address must match row start address.
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*
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* \return Returns the status of the Flash operation,
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* see \ref cy_en_flashdrv_status_t.
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*
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*******************************************************************************/
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cy_en_flashdrv_status_t Cy_Flash_EraseSector(uint32_t sectorAddr)
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{
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cy_en_flashdrv_status_t result = CY_FLASH_DRV_INVALID_INPUT_PARAMETERS;
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/* Prepares arguments to be passed to SROM API */
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if (Cy_Flash_BoundsCheck(sectorAddr) != false)
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{
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SystemCoreClockUpdate();
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flashContext.opcode = CY_FLASH_OPCODE_ERASE_SECTOR | CY_FLASH_BLOCKING_MODE;
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flashContext.arg1 = sectorAddr;
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flashContext.arg2 = 0UL;
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flashContext.arg3 = 0UL;
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if (cy_device->flashEraseDelay != 0U)
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{
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result = Cy_Flash_SendCmd(CY_FLASH_BLOCKING_MODE, CY_FLASH_START_ERASE_DELAY);
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}
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else
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{
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result = Cy_Flash_SendCmd(CY_FLASH_BLOCKING_MODE, CY_FLASH_NO_DELAY);
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}
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}
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return (result);
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}
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/*******************************************************************************
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* Function Name: Cy_Flash_StartEraseSector
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****************************************************************************//**
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*
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* Starts erasing a 256KB sector of flash. Returns immediately
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* and reports a successful start or reason for failure.
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* Reports a \ref CY_FLASH_DRV_IPC_BUSY error in the case when IPC structure is locked
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* by another process. User firmware should not enter the Hibernate or Deep Sleep mode until
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* flash Erase is complete. The Flash operation is allowed in Sleep mode.
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* During the flash operation, the device should not be reset, including the
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* XRES pin, a software reset, and watchdog reset sources. Also, the low-voltage
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* detect circuits should be configured to generate an interrupt instead of a reset.
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* Otherwise, portions of flash may undergo unexpected changes.
|
||||
* \note Before reading data from previously programmed/erased flash rows, the
|
||||
* user must clear the flash cache with the Cy_SysLib_ClearFlashCacheAndBuffer()
|
||||
* function.
|
||||
*
|
||||
* \param rowAddr Address of the flash row number.
|
||||
* The Read-while-Write violation occurs when the flash read operation is
|
||||
* initiated in the same flash sector where the flash erase operation is
|
||||
* performing. Refer to the device datasheet for the details.
|
||||
* Address must match row start address.
|
||||
*
|
||||
* \return Returns the status of the Flash operation,
|
||||
* see \ref cy_en_flashdrv_status_t.
|
||||
*
|
||||
*******************************************************************************/
|
||||
cy_en_flashdrv_status_t Cy_Flash_StartEraseSector(uint32_t sectorAddr)
|
||||
{
|
||||
cy_en_flashdrv_status_t result = CY_FLASH_DRV_INVALID_INPUT_PARAMETERS;
|
||||
|
||||
if (Cy_Flash_BoundsCheck(sectorAddr) != false)
|
||||
{
|
||||
SystemCoreClockUpdate();
|
||||
|
||||
/* Prepares arguments to be passed to SROM API */
|
||||
flashContext.opcode = CY_FLASH_OPCODE_ERASE_SECTOR;
|
||||
if (SFLASH_SINGLE_CORE != 0U)
|
||||
{
|
||||
flashContext.opcode |= CY_FLASH_BLOCKING_MODE;
|
||||
}
|
||||
|
||||
flashContext.arg1 = sectorAddr;
|
||||
flashContext.arg2 = 0UL;
|
||||
flashContext.arg3 = 0UL;
|
||||
|
||||
if (cy_device->flashEraseDelay != 0U)
|
||||
{
|
||||
result = Cy_Flash_SendCmd(CY_FLASH_NON_BLOCKING_MODE, CY_FLASH_START_ERASE_DELAY);
|
||||
}
|
||||
else
|
||||
{
|
||||
result = Cy_Flash_SendCmd(CY_FLASH_NON_BLOCKING_MODE, CY_FLASH_NO_DELAY);
|
||||
}
|
||||
}
|
||||
|
||||
return (result);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_Flash_EraseSubsector
|
||||
****************************************************************************//**
|
||||
*
|
||||
* This function erases an 8-row subsector of flash. Reports success or
|
||||
* a reason for failure. Does not return until the Write operation is
|
||||
* complete. Returns immediately and reports a \ref CY_FLASH_DRV_IPC_BUSY error in
|
||||
* the case when another process is writing to flash or erasing the row.
|
||||
* User firmware should not enter the Hibernate or Deep-Sleep mode until flash Erase
|
||||
* is complete. The Flash operation is allowed in Sleep mode.
|
||||
* During the Flash operation, the device should not be reset, including the
|
||||
* XRES pin, a software reset, and watchdog reset sources. Also, low-voltage
|
||||
* detect circuits should be configured to generate an interrupt instead of a
|
||||
* reset. Otherwise, portions of flash may undergo unexpected changes.
|
||||
*
|
||||
* \param rowAddr Address of the flash row number.
|
||||
* The Read-while-Write violation occurs when the flash read operation is
|
||||
* initiated in the same flash sector where the flash write operation is
|
||||
* performing. Refer to the device datasheet for the details.
|
||||
* Address must match row start address.
|
||||
*
|
||||
* \return Returns the status of the Flash operation,
|
||||
* see \ref cy_en_flashdrv_status_t.
|
||||
*
|
||||
*******************************************************************************/
|
||||
cy_en_flashdrv_status_t Cy_Flash_EraseSubsector(uint32_t subSectorAddr)
|
||||
{
|
||||
cy_en_flashdrv_status_t result = CY_FLASH_DRV_INVALID_INPUT_PARAMETERS;
|
||||
|
||||
/* Prepares arguments to be passed to SROM API */
|
||||
if (Cy_Flash_BoundsCheck(subSectorAddr) != false)
|
||||
{
|
||||
SystemCoreClockUpdate();
|
||||
|
||||
flashContext.opcode = CY_FLASH_OPCODE_ERASE_SUB_SECTOR | CY_FLASH_BLOCKING_MODE;
|
||||
flashContext.arg1 = subSectorAddr;
|
||||
flashContext.arg2 = 0UL;
|
||||
flashContext.arg3 = 0UL;
|
||||
|
||||
if (cy_device->flashEraseDelay != 0U)
|
||||
{
|
||||
result = Cy_Flash_SendCmd(CY_FLASH_BLOCKING_MODE, CY_FLASH_START_ERASE_DELAY);
|
||||
}
|
||||
else
|
||||
{
|
||||
result = Cy_Flash_SendCmd(CY_FLASH_BLOCKING_MODE, CY_FLASH_NO_DELAY);
|
||||
}
|
||||
}
|
||||
|
||||
return (result);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_Flash_StartEraseSubsector
|
||||
****************************************************************************//**
|
||||
*
|
||||
* Starts erasing an 8-row subsector of flash. Returns immediately
|
||||
* and reports a successful start or reason for failure.
|
||||
* Reports a \ref CY_FLASH_DRV_IPC_BUSY error in the case when IPC structure is locked
|
||||
* by another process. User firmware should not enter the Hibernate or Deep-Sleep mode until
|
||||
* flash Erase is complete. The Flash operation is allowed in Sleep mode.
|
||||
* During the flash operation, the device should not be reset, including the
|
||||
* XRES pin, a software reset, and watchdog reset sources. Also, the low-voltage
|
||||
* detect circuits should be configured to generate an interrupt instead of a reset.
|
||||
* Otherwise, portions of flash may undergo unexpected changes.
|
||||
* \note Before reading data from previously programmed/erased flash rows, the
|
||||
* user must clear the flash cache with the Cy_SysLib_ClearFlashCacheAndBuffer()
|
||||
* function.
|
||||
*
|
||||
* \param rowAddr Address of the flash row number.
|
||||
* The Read-while-Write violation occurs when the flash read operation is
|
||||
* initiated in the same flash sector where the flash erase operation is
|
||||
* performing. Refer to the device datasheet for the details.
|
||||
* Address must match row start address.
|
||||
*
|
||||
* \return Returns the status of the Flash operation,
|
||||
* see \ref cy_en_flashdrv_status_t.
|
||||
*
|
||||
*******************************************************************************/
|
||||
cy_en_flashdrv_status_t Cy_Flash_StartEraseSubsector(uint32_t subSectorAddr)
|
||||
{
|
||||
cy_en_flashdrv_status_t result = CY_FLASH_DRV_INVALID_INPUT_PARAMETERS;
|
||||
|
||||
if (Cy_Flash_BoundsCheck(subSectorAddr) != false)
|
||||
{
|
||||
SystemCoreClockUpdate();
|
||||
|
||||
/* Prepares arguments to be passed to SROM API */
|
||||
flashContext.opcode = CY_FLASH_OPCODE_ERASE_SUB_SECTOR;
|
||||
if (SFLASH_SINGLE_CORE != 0U)
|
||||
{
|
||||
flashContext.opcode |= CY_FLASH_BLOCKING_MODE;
|
||||
}
|
||||
|
||||
flashContext.arg1 = subSectorAddr;
|
||||
flashContext.arg2 = 0UL;
|
||||
flashContext.arg3 = 0UL;
|
||||
|
||||
if (cy_device->flashEraseDelay != 0U)
|
||||
{
|
||||
result = Cy_Flash_SendCmd(CY_FLASH_NON_BLOCKING_MODE, CY_FLASH_START_ERASE_DELAY);
|
||||
}
|
||||
else
|
||||
{
|
||||
result = Cy_Flash_SendCmd(CY_FLASH_NON_BLOCKING_MODE, CY_FLASH_NO_DELAY);
|
||||
}
|
||||
}
|
||||
|
||||
return (result);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_Flash_ProgramRow
|
||||
****************************************************************************//**
|
||||
|
@ -720,7 +1011,7 @@ cy_en_flashdrv_status_t Cy_Flash_ProgramRow(uint32_t rowAddr, const uint32_t* da
|
|||
flashContext.arg2 = rowAddr;
|
||||
flashContext.arg3 = (uint32_t)data;
|
||||
|
||||
if (cy_device->flashProgramDelay != 0u)
|
||||
if (cy_device->flashProgramDelay != 0U)
|
||||
{
|
||||
result = Cy_Flash_SendCmd(CY_FLASH_BLOCKING_MODE, CY_FLASH_START_PROGRAM_DELAY);
|
||||
}
|
||||
|
@ -782,7 +1073,7 @@ cy_en_flashdrv_status_t Cy_Flash_WriteRow(uint32_t rowAddr, const uint32_t* data
|
|||
flashContext.arg2 = rowAddr;
|
||||
flashContext.arg3 = (uint32_t)data;
|
||||
|
||||
if (cy_device->flashWriteDelay != 0u)
|
||||
if (cy_device->flashWriteDelay != 0U)
|
||||
{
|
||||
result = Cy_Flash_SendCmd(CY_FLASH_BLOCKING_MODE, CY_FLASH_START_WRITE_DELAY);
|
||||
}
|
||||
|
@ -836,7 +1127,7 @@ cy_en_flashdrv_status_t Cy_Flash_StartWrite(uint32_t rowAddr, const uint32_t* da
|
|||
/* Checks whether the input parameters are valid */
|
||||
if ((Cy_Flash_BoundsCheck(rowAddr) != false) && (NULL != data))
|
||||
{
|
||||
result = Cy_Flash_StartErase(rowAddr);
|
||||
result = Cy_Flash_StartEraseRow(rowAddr);
|
||||
|
||||
if (CY_FLASH_DRV_OPERATION_STARTED == result)
|
||||
{
|
||||
|
@ -874,66 +1165,6 @@ cy_en_flashdrv_status_t Cy_Flash_IsOperationComplete(void)
|
|||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_Flash_StartErase
|
||||
****************************************************************************//**
|
||||
*
|
||||
* Starts erasing a single row of flash. Returns immediately
|
||||
* and reports a successful start or reason for failure.
|
||||
* Reports a \ref CY_FLASH_DRV_IPC_BUSY error in the case when IPC structure is locked
|
||||
* by another process. User firmware should not enter the Hibernate or Deep-Sleep mode until
|
||||
* flash Erase is complete. The Flash operation is allowed in Sleep mode.
|
||||
* During the flash operation, the device should not be reset, including the
|
||||
* XRES pin, a software reset, and watchdog reset sources. Also, the low-voltage
|
||||
* detect circuits should be configured to generate an interrupt instead of a reset.
|
||||
* Otherwise, portions of flash may undergo unexpected changes.
|
||||
* \note Before reading data from previously programmed/erased flash rows, the
|
||||
* user must clear the flash cache with the Cy_SysLib_ClearFlashCacheAndBuffer()
|
||||
* function.
|
||||
*
|
||||
* \param rowAddr Address of the flash row number.
|
||||
* The Read-while-Write violation occurs when the flash read operation is
|
||||
* initiated in the same flash sector where the flash erase operation is
|
||||
* performing. Refer to the device datasheet for the details.
|
||||
* Address must match row start address.
|
||||
*
|
||||
* \return Returns the status of the Flash operation,
|
||||
* see \ref cy_en_flashdrv_status_t.
|
||||
*
|
||||
*******************************************************************************/
|
||||
cy_en_flashdrv_status_t Cy_Flash_StartErase(uint32_t rowAddr)
|
||||
{
|
||||
cy_en_flashdrv_status_t result = CY_FLASH_DRV_INVALID_INPUT_PARAMETERS;
|
||||
|
||||
if (Cy_Flash_BoundsCheck(rowAddr) != false)
|
||||
{
|
||||
SystemCoreClockUpdate();
|
||||
|
||||
/* Prepares arguments to be passed to SROM API */
|
||||
flashContext.opcode = CY_FLASH_OPCODE_ERASE_ROW;
|
||||
if (SFLASH_SINGLE_CORE != 0u)
|
||||
{
|
||||
flashContext.opcode |= CY_FLASH_BLOCKING_MODE;
|
||||
}
|
||||
|
||||
flashContext.arg1 = rowAddr;
|
||||
flashContext.arg2 = 0UL;
|
||||
flashContext.arg3 = 0UL;
|
||||
|
||||
if (cy_device->flashEraseDelay != 0u)
|
||||
{
|
||||
result = Cy_Flash_SendCmd(CY_FLASH_NON_BLOCKING_MODE, CY_FLASH_START_ERASE_DELAY);
|
||||
}
|
||||
else
|
||||
{
|
||||
result = Cy_Flash_SendCmd(CY_FLASH_NON_BLOCKING_MODE, CY_FLASH_NO_DELAY);
|
||||
}
|
||||
}
|
||||
|
||||
return (result);
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name: Cy_Flash_StartProgram
|
||||
****************************************************************************//**
|
||||
|
@ -948,7 +1179,7 @@ cy_en_flashdrv_status_t Cy_Flash_StartErase(uint32_t rowAddr)
|
|||
* detect circuits should be configured to generate an interrupt instead of a reset.
|
||||
* Otherwise, portions of flash may undergo unexpected changes.\n
|
||||
* Before calling this function, the target flash region must be erased by
|
||||
* the StartErase/EraseRow function.\n
|
||||
* the StartEraseRow/EraseRow function.\n
|
||||
* Data to be programmed must be located in the SRAM memory region.
|
||||
* \note Before reading data from previously programmed/erased flash rows, the
|
||||
* user must clear the flash cache with the Cy_SysLib_ClearFlashCacheAndBuffer()
|
||||
|
@ -979,7 +1210,7 @@ cy_en_flashdrv_status_t Cy_Flash_StartProgram(uint32_t rowAddr, const uint32_t*
|
|||
/* Prepares arguments to be passed to SROM API */
|
||||
flashContext.opcode = CY_FLASH_OPCODE_PROGRAM_ROW;
|
||||
|
||||
if (SFLASH_SINGLE_CORE != 0u)
|
||||
if (SFLASH_SINGLE_CORE != 0U)
|
||||
{
|
||||
flashContext.opcode |= CY_FLASH_BLOCKING_MODE;
|
||||
}
|
||||
|
@ -988,7 +1219,7 @@ cy_en_flashdrv_status_t Cy_Flash_StartProgram(uint32_t rowAddr, const uint32_t*
|
|||
flashContext.arg2 = rowAddr;
|
||||
flashContext.arg3 = (uint32_t)data;
|
||||
|
||||
if (cy_device->flashProgramDelay != 0u)
|
||||
if (cy_device->flashProgramDelay != 0U)
|
||||
{
|
||||
result = Cy_Flash_SendCmd(CY_FLASH_NON_BLOCKING_MODE, CY_FLASH_START_PROGRAM_DELAY);
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue