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Code Issues Projects Releases Wiki Activity

Cypress: Fix issue #10613

pull/10747/head
Hennadiy Kytsun 2019-06-03 16:26:52 +03:00
parent f18e3364e9
commit 7447cac66c
7 changed files with 7 additions and 63 deletions
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10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_4343W/device/TOOLCHAIN_ARM/startup_psoc6_02_cm4.S
View File

@ -735,15 +735,7 @@ sdhc_1_interrupt_general_IRQHandler
ELSE
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, =Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, =(Heap_Mem + Heap_Size)
LDR R3, =Stack_Mem
BX LR
ENDP
IMPORT __use_two_region_memory
ALIGN

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/TOOLCHAIN_ARM/startup_psoc6_01_cm4.S
View File

@ -672,15 +672,7 @@ pass_interrupt_dacs_IRQHandler
ELSE
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, =Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, =(Heap_Mem + Heap_Size)
LDR R3, =Stack_Mem
BX LR
ENDP
IMPORT __use_two_region_memory
ALIGN

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/TARGET_MCU_PSOC6_M0/TOOLCHAIN_ARM/startup_psoc6_01_cm0plus.S
View File

@ -295,15 +295,7 @@ NvicMux31_IRQHandler
ELSE
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, =Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, =(Heap_Mem + Heap_Size)
LDR R3, =Stack_Mem
BX LR
ENDP
IMPORT __use_two_region_memory
ALIGN

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/TARGET_MCU_PSOC6_M4/TOOLCHAIN_ARM/startup_psoc6_01_cm4.S
View File

@ -672,15 +672,7 @@ pass_interrupt_dacs_IRQHandler
ELSE
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, =Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, =(Heap_Mem + Heap_Size)
LDR R3, =Stack_Mem
BX LR
ENDP
IMPORT __use_two_region_memory
ALIGN

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CMOD_062_4343W/device/TOOLCHAIN_ARM/startup_psoc6_02_cm4.S
View File

@ -735,15 +735,7 @@ sdhc_1_interrupt_general_IRQHandler
ELSE
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, =Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, =(Heap_Mem + Heap_Size)
LDR R3, =Stack_Mem
BX LR
ENDP
IMPORT __use_two_region_memory
ALIGN

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW943012P6EVB_01/device/TARGET_MCU_PSOC6_M0/TOOLCHAIN_ARM/startup_psoc6_01_cm0plus.S
View File

@ -295,15 +295,7 @@ NvicMux31_IRQHandler
ELSE
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, =Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, =(Heap_Mem + Heap_Size)
LDR R3, =Stack_Mem
BX LR
ENDP
IMPORT __use_two_region_memory
ALIGN

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW943012P6EVB_01/device/TARGET_MCU_PSOC6_M4/TOOLCHAIN_ARM/startup_psoc6_01_cm4.S
View File

@ -672,15 +672,7 @@ pass_interrupt_dacs_IRQHandler
ELSE
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, =Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, =(Heap_Mem + Heap_Size)
LDR R3, =Stack_Mem
BX LR
ENDP
IMPORT __use_two_region_memory
ALIGN