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STM32L0 warning compilation 

[-Wparentheses-equality]
pull/10793/head
jeromecoutant 2019-06-07 17:17:44 +02:00
parent 7d05f22b31
commit daf8d114c4
1 changed files with 14 additions and 14 deletions
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28
targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_tim.c
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@ -394,11 +394,11 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat
/* Check the parameters */
assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
if((htim->State == HAL_TIM_STATE_BUSY))
if(htim->State == HAL_TIM_STATE_BUSY)
{
return HAL_BUSY;
}
else if((htim->State == HAL_TIM_STATE_READY))
else if(htim->State == HAL_TIM_STATE_READY)
{
if((pData == 0U ) && (Length > 0U))
{
@ -765,11 +765,11 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
if((htim->State == HAL_TIM_STATE_BUSY))
if(htim->State == HAL_TIM_STATE_BUSY)
{
return HAL_BUSY;
}
else if((htim->State == HAL_TIM_STATE_READY))
else if(htim->State == HAL_TIM_STATE_READY)
{
if(((uint32_t)pData == 0U ) && (Length > 0U))
{
@ -1243,11 +1243,11 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
if((htim->State == HAL_TIM_STATE_BUSY))
if(htim->State == HAL_TIM_STATE_BUSY)
{
return HAL_BUSY;
}
else if((htim->State == HAL_TIM_STATE_READY))
else if(htim->State == HAL_TIM_STATE_READY)
{
if(((uint32_t)pData == 0U ) && (Length > 0U))
{
@ -1714,11 +1714,11 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
if((htim->State == HAL_TIM_STATE_BUSY))
if(htim->State == HAL_TIM_STATE_BUSY)
{
return HAL_BUSY;
}
else if((htim->State == HAL_TIM_STATE_READY))
else if(htim->State == HAL_TIM_STATE_READY)
{
if((pData == 0U ) && (Length > 0U))
{
@ -2505,11 +2505,11 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
/* Check the parameters */
assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
if((htim->State == HAL_TIM_STATE_BUSY))
if(htim->State == HAL_TIM_STATE_BUSY)
{
return HAL_BUSY;
}
else if((htim->State == HAL_TIM_STATE_READY))
else if(htim->State == HAL_TIM_STATE_READY)
{
if((((pData1 == 0U) || (pData2 == 0U) )) && (Length > 0U))
{
@ -3227,11 +3227,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t
assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
assert_param(IS_TIM_DMA_LENGTH(BurstLength));
if((htim->State == HAL_TIM_STATE_BUSY))
if(htim->State == HAL_TIM_STATE_BUSY)
{
return HAL_BUSY;
}
else if((htim->State == HAL_TIM_STATE_READY))
else if(htim->State == HAL_TIM_STATE_READY)
{
if((BurstBuffer == 0U ) && (BurstLength > 0U))
{
@ -3429,11 +3429,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t B
assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
assert_param(IS_TIM_DMA_LENGTH(BurstLength));
if((htim->State == HAL_TIM_STATE_BUSY))
if(htim->State == HAL_TIM_STATE_BUSY)
{
return HAL_BUSY;
}
else if((htim->State == HAL_TIM_STATE_READY))
else if(htim->State == HAL_TIM_STATE_READY)
{
if((BurstBuffer == 0U ) && (BurstLength > 0U))
{