mirror of https://github.com/ARMmbed/mbed-os.git
Updates after rebase
- postbuild: Use find_secure_image and update prebuilt binaries - Add CMSIS driver headers - Align with 2-region memory modelpull/9221/head
parent
36a8514dbd
commit
96268d91ef
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@ -30,27 +30,35 @@
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#endif
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#if !defined(MBED_RAM_START)
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#define MBED_RAM_START NVIC_RAM_VECTOR_LIMIT // 0x20010170
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#define MBED_RAM_START NS_DATA_START
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#endif
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#if !defined(MBED_RAM_SIZE)
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#define MBED_RAM_SIZE (NS_DATA_SIZE - NVIC_RAM_VECTOR_SIZE) // 0xfe90
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#define MBED_RAM_SIZE NS_DATA_SIZE
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#endif
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LR_CODE MBED_ROM_START NS_CODE_SIZE {
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ER_CODE MBED_ROM_START NS_CODE_SIZE {
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#define VECTOR_SIZE NVIC_RAM_VECTOR_SIZE
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#if !defined(MBED_BOOT_STACK_SIZE)
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#define MBED_BOOT_STACK_SIZE 0x400
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#endif
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#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
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LR_CODE MBED_ROM_START MBED_ROM_SIZE {
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ER_CODE MBED_ROM_START MBED_ROM_SIZE {
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*.o (VECTOR +First)
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.ANY (+RO)
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}
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RW_IRAM1 MBED_RAM_START MBED_RAM_SIZE {
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RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) {
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* (+RW) ; RW data that gets copied from Flash to SRAM
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* (+ZI) ; ZI data that gets initialised to zero in SRAM
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}
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HEAP_STACK +0 ALIGN 8 {
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startup_cmsdk_musca_ns.o (HEAP, +First)
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startup_cmsdk_musca_ns.o (STACK, +Last)
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
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}
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ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
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}
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}
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@ -23,27 +23,7 @@
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;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
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;*/
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; <h> Stack Configuration
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; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Stack_Size EQU 0x00001000
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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__stack_base
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Stack_Mem SPACE Stack_Size
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__initial_sp
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; <h> Heap Configuration
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; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Heap_Size EQU 0x00001000
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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__initial_sp EQU 0x20020000 ; Top of RAM
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; Vector Table Mapped to Address 0 at Reset
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@ -257,31 +237,4 @@ $handler_name PROC
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ALIGN
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; User Initial Stack & Heap
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EXPORT __stack_base
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EXPORT __initial_sp
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IF :DEF:__MICROLIB
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EXPORT __heap_base
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EXPORT __heap_limit
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ELSE
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IMPORT __use_two_region_memory
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EXPORT __user_initial_stackheap
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__user_initial_stackheap PROC
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LDR R0, = Heap_Mem
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LDR R1, = (Stack_Mem + Stack_Size)
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LDR R2, = (Heap_Mem + Heap_Size)
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LDR R3, = Stack_Mem
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BX LR
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ENDP
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ENDIF
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ALIGN
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END
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@ -25,6 +25,11 @@
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#include "../../../partition/region_defs.h"
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#include "../cmsis_nvic.h"
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/* Stack size is 1K for Mbed-OS */
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#if !defined(MBED_BOOT_STACK_SIZE)
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#define MBED_BOOT_STACK_SIZE 0x400
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#endif
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MEMORY
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{
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CODE_RAM (rx) : ORIGIN = NS_CODE_START, LENGTH = ((TOTAL_CODE_SRAM_SIZE / 2) - BL2_HEADER_SIZE)
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@ -32,8 +37,7 @@ MEMORY
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RAM (rwx) : ORIGIN = NVIC_RAM_VECTOR_LIMIT, LENGTH = (NS_DATA_SIZE - NVIC_RAM_VECTOR_SIZE)
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}
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__heap_size__ = 0x00003000;
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__stack_size__ = 0x00003000;
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__stack_size__ = MBED_BOOT_STACK_SIZE;
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/* Library configurations */
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GROUP(libgcc.a libc.a libm.a libnosys.a)
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@ -68,9 +72,9 @@ SECTIONS
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__exidx_end = .;
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/* The text section is loaded into Flash but runs from SRAM
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* The load address is aligned to 4 bytes
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* The load address is aligned to 8 bytes
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*/
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.text : ALIGN(4)
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.text : ALIGN(8)
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{
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*(.text*)
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@ -92,7 +96,7 @@ SECTIONS
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KEEP(*(.eh_frame*))
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} >CODE_RAM
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. = ALIGN(4); /* This alignment is needed to make the section size 4 bytes aligned */
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. = ALIGN(8); /* This alignment is needed to make the section size 8 bytes aligned */
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/* Create same symbols that armclang does so that in the c files
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* we do not have to deal with the compiler type
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@ -109,7 +113,7 @@ SECTIONS
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* define __STARTUP_COPY_MULTIPLE in startup_cmsdk_musca_ns.S */
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.copy.table :
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{
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. = ALIGN(4);
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. = ALIGN(8);
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__copy_table_start__ = .;
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LONG (__etext)
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LONG (__data_start__)
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@ -124,7 +128,7 @@ SECTIONS
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* define __STARTUP_CLEAR_BSS_MULTIPLE in startup_cmsdk_musca_ns.S */
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.zero.table :
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{
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. = ALIGN(4);
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. = ALIGN(8);
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__zero_table_start__ = .;
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LONG (__bss_start__)
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LONG (__bss_end__ - __bss_start__)
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@ -135,19 +139,19 @@ SECTIONS
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__etext = .;
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.data : ALIGN(4)
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.data : ALIGN(8)
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{
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__data_start__ = .;
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*(vtable)
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*(.data*)
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. = ALIGN(4);
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. = ALIGN(8);
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/* preinit data */
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP(*(.preinit_array))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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. = ALIGN(4);
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. = ALIGN(8);
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/* init data */
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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@ -155,7 +159,7 @@ SECTIONS
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PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(4);
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. = ALIGN(8);
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/* finit data */
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP(*(SORT(.fini_array.*)))
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@ -163,7 +167,7 @@ SECTIONS
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PROVIDE_HIDDEN (__fini_array_end = .);
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KEEP(*(.jcr*))
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. = ALIGN(4);
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. = ALIGN(8);
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/* All data end */
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__data_end__ = .;
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@ -171,25 +175,16 @@ SECTIONS
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.bss :
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{
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. = ALIGN(4);
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. = ALIGN(8);
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__bss_start__ = .;
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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. = ALIGN(8);
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__bss_end__ = .;
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} > RAM
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bss_size = __bss_end__ - __bss_start__;
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.heap (COPY):
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{
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__HeapBase = .;
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__end__ = .;
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end = __end__;
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KEEP(*(.heap*))
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__HeapLimit = .;
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} > RAM
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.stack :
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{
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. = ALIGN(8);
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@ -198,20 +193,20 @@ SECTIONS
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. += __stack_size__;
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__StackTop = .;
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} > RAM
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PROVIDE(__stack = __StackTop);
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.heap :
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.heap (COPY):
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{
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. = ALIGN(8);
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__end__ = .;
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PROVIDE(end = .);
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__HeapBase = .;
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. += __heap_size__;
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__end__ = .;
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end = __end__;
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KEEP(*(.heap*))
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. += (ORIGIN(RAM) + LENGTH(RAM) - .);
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__HeapLimit = .;
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__heap_limit = .; /* Add for _sbrk */
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} > RAM
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PROVIDE(__stack = __StackTop);
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/* Check if data + heap + stack exceeds RAM limit */
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ASSERT(__StackTop <= (NS_DATA_START + NS_DATA_SIZE), "RAM region overflowed")
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}
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Binary file not shown.
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@ -21,5 +21,5 @@
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void NVIC_SystemReset(void)
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{
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psa_system_reset();
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mbed_psa_system_reset();
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}
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@ -0,0 +1,49 @@
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Permissive Binary License
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||||
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Version 1.0, December 2018
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Redistribution. Redistribution and use in binary form, without
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modification, are permitted provided that the following conditions are
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met:
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1) Redistributions must reproduce the above copyright notice and the
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following disclaimer in the documentation and/or other materials
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||||
provided with the distribution.
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2) Unless to the extent explicitly permitted by law, no reverse
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||||
engineering, decompilation, or disassembly of this software is
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permitted.
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3) Redistribution as part of a software development kit must include the
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accompanying file named DEPENDENCIES and any dependencies listed in
|
||||
that file.
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||||
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||||
4) Neither the name of the copyright holder nor the names of its
|
||||
contributors may be used to endorse or promote products derived from
|
||||
this software without specific prior written permission.
|
||||
|
||||
Limited patent license. The copyright holders (and contributors) grant a
|
||||
worldwide, non-exclusive, no-charge, royalty-free patent license to
|
||||
make, have made, use, offer to sell, sell, import, and otherwise
|
||||
transfer this software, where such license applies only to those patent
|
||||
claims licensable by the copyright holders (and contributors) that are
|
||||
necessarily infringed by this software. This patent license shall not
|
||||
apply to any combinations that include this software. No hardware is
|
||||
licensed hereunder.
|
||||
|
||||
If you institute patent litigation against any entity (including a
|
||||
cross-claim or counterclaim in a lawsuit) alleging that the software
|
||||
itself infringes your patent(s), then your rights granted under this
|
||||
license shall terminate as of the date such litigation is filed.
|
||||
|
||||
DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
|
||||
CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT
|
||||
NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
|
||||
TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
|
|
@ -0,0 +1,33 @@
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# MUSCA_A1_NS prebuilt secure binaries
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||||
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This directory tree contains Secure images released under Permissive Binary License.
|
||||
|
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Built by mbed-cli using GNU Arm Embedded - version 6.3.1
|
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|
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These images were compiled by the following command:
|
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## tfm.bin
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|
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```sh
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mbed compile -t GCC_ARM -m ARM_MUSCA_A1_S --app-config tools/psa/tfm/mbed_app.json --profile release
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```
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|
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## spm_smoke.bin
|
||||
|
||||
```sh
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mbed test --compile -t GCC_ARM -m ARM_MUSCA_A1_S --app-config tools/psa/tfm/mbed_app.json -n tests-psa-spm_smoke -DUSE_PSA_TEST_PARTITIONS -DUSE_SMOKE_TESTS_PART1 --profile release
|
||||
```
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|
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## spm_client.bin
|
||||
|
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```sh
|
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mbed test --compile -t GCC_ARM -m ARM_MUSCA_A1_S --app-config tools/psa/tfm/mbed_app.json -n tests-psa-spm_client -DUSE_PSA_TEST_PARTITIONS -DUSE_CLIENT_TESTS_PART1 --profile release
|
||||
```
|
||||
|
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## spm_server.bin
|
||||
|
||||
```sh
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mbed test --compile -t GCC_ARM -m ARM_MUSCA_A1_S --app-config tools/psa/tfm/mbed_app.json -n tests-psa-spm_server -DUSE_PSA_TEST_PARTITIONS -DUSE_SERVER_TESTS_PART1 -DUSE_SERVER_TESTS_PART2 --profile release
|
||||
```
|
||||
|
||||
To update the prebuilt binaries run the previous commands.
|
||||
Binary file not shown.
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Binary file not shown.
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|
@ -0,0 +1,69 @@
|
|||
/*
|
||||
* Copyright (c) 2013-2016 ARM Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
* $Date: 2. Jan 2014
|
||||
* $Revision: V2.00
|
||||
*
|
||||
* Project: Common Driver definitions
|
||||
*/
|
||||
|
||||
/* History:
|
||||
* Version 2.00
|
||||
* Changed prefix ARM_DRV -> ARM_DRIVER
|
||||
* Added General return codes definitions
|
||||
* Version 1.10
|
||||
* Namespace prefix ARM_ added
|
||||
* Version 1.00
|
||||
* Initial release
|
||||
*/
|
||||
|
||||
#ifndef __DRIVER_COMMON_H
|
||||
#define __DRIVER_COMMON_H
|
||||
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
#define ARM_DRIVER_VERSION_MAJOR_MINOR(major,minor) (((major) << 8) | (minor))
|
||||
|
||||
/**
|
||||
\brief Driver Version
|
||||
*/
|
||||
typedef struct _ARM_DRIVER_VERSION {
|
||||
uint16_t api; ///< API version
|
||||
uint16_t drv; ///< Driver version
|
||||
} ARM_DRIVER_VERSION;
|
||||
|
||||
/* General return codes */
|
||||
#define ARM_DRIVER_OK 0 ///< Operation succeeded
|
||||
#define ARM_DRIVER_ERROR -1 ///< Unspecified error
|
||||
#define ARM_DRIVER_ERROR_BUSY -2 ///< Driver is busy
|
||||
#define ARM_DRIVER_ERROR_TIMEOUT -3 ///< Timeout occurred
|
||||
#define ARM_DRIVER_ERROR_UNSUPPORTED -4 ///< Operation not supported
|
||||
#define ARM_DRIVER_ERROR_PARAMETER -5 ///< Parameter error
|
||||
#define ARM_DRIVER_ERROR_SPECIFIC -6 ///< Start of driver specific errors
|
||||
|
||||
/**
|
||||
\brief General power states
|
||||
*/
|
||||
typedef enum _ARM_POWER_STATE {
|
||||
ARM_POWER_OFF, ///< Power off: no operation possible
|
||||
ARM_POWER_LOW, ///< Low Power mode: retain state, detect and signal wake-up events
|
||||
ARM_POWER_FULL ///< Power on: full operation at maximum performance
|
||||
} ARM_POWER_STATE;
|
||||
|
||||
#endif /* __DRIVER_COMMON_H */
|
||||
|
|
@ -0,0 +1,153 @@
|
|||
/*
|
||||
* Copyright (c) 2016-2018 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef __DRIVER_MPC_H
|
||||
#define __DRIVER_MPC_H
|
||||
|
||||
#include "Driver_Common.h"
|
||||
|
||||
/* API version */
|
||||
#define ARM_MPC_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,0)
|
||||
|
||||
/* Error code returned by the driver functions */
|
||||
#define ARM_MPC_ERR_NOT_INIT (ARM_DRIVER_ERROR_SPECIFIC - 1) ///< MPC not initialized */
|
||||
#define ARM_MPC_ERR_NOT_IN_RANGE (ARM_DRIVER_ERROR_SPECIFIC - 2) ///< Address does not belong to a range controlled by the MPC */
|
||||
#define ARM_MPC_ERR_NOT_ALIGNED (ARM_DRIVER_ERROR_SPECIFIC - 3) ///< Address is not aligned on the block size of this MPC */
|
||||
#define ARM_MPC_ERR_INVALID_RANGE (ARM_DRIVER_ERROR_SPECIFIC - 4) ///< The given address range to configure is invalid
|
||||
#define ARM_MPC_ERR_RANGE_SEC_ATTR_NON_COMPATIBLE (ARM_DRIVER_ERROR_SPECIFIC - 4) ///< The given range cannot be accessed with the wanted security attributes */
|
||||
#define ARM_MPC_ERR_UNSPECIFIED (ARM_DRIVER_ERROR_SPECIFIC - 5) ///< Unspecified error */
|
||||
|
||||
/* Security attribute used in various place of the API */
|
||||
typedef enum _ARM_MPC_SEC_ATTR {
|
||||
ARM_MPC_ATTR_SECURE, ///< Secure attribute
|
||||
ARM_MPC_ATTR_NONSECURE, ///< Non-secure attribute
|
||||
/* Used when getting the configuration of a memory range and some blocks are
|
||||
* secure whereas some other are non secure */
|
||||
ARM_MPC_ATTR_MIXED, ///< Mixed attribute
|
||||
} ARM_MPC_SEC_ATTR;
|
||||
|
||||
/* Function documentation */
|
||||
/**
|
||||
\fn ARM_DRIVER_VERSION ARM_MPC_GetVersion (void)
|
||||
\brief Get driver version.
|
||||
\return \ref ARM_DRIVER_VERSION
|
||||
|
||||
\fn int32_t ARM_MPC_Initialize (void)
|
||||
\brief Initialize MPC Interface.
|
||||
\return Returns error code.
|
||||
|
||||
\fn int32_t ARM_MPC_Uninitialize (void)
|
||||
\brief De-initialize MPC Interface. The controlled memory region
|
||||
should not be accessed after a call to this function, as
|
||||
it is allowed to configure everything to be secure (to
|
||||
prevent information leak for example).
|
||||
\return Returns error code.
|
||||
|
||||
\fn int32_t ARM_MPC_GetBlockSize (uint32_t* blk_size)
|
||||
\brief Get the block size of the MPC. All regions must be aligned
|
||||
on this block size (base address and limit+1 address).
|
||||
\param[out] blk_size: The block size in bytes.
|
||||
\return Returns error code.
|
||||
|
||||
\fn int32_t ARM_MPC_GetCtrlConfig (uint32_t* ctrl_val)
|
||||
\brief Get some information on how the MPC IP is configured.
|
||||
\param[out] ctrl_val: MPC control configuration
|
||||
\return Returns error code.
|
||||
|
||||
\fn int32_t ARM_MPC_SetCtrlConfig (uint32_t ctrl)
|
||||
\brief Set new control configuration for the MPC IP.
|
||||
\param[in] ctrl: New control configuration.
|
||||
\return Returns error code.
|
||||
|
||||
\fn int32_t ARM_MPC_ConfigRegion (uintptr_t base,
|
||||
uintptr_t limit,
|
||||
ARM_MPC_SEC_ATTR attr)
|
||||
\brief Configure a memory region (base and limit included).
|
||||
Both base and limit addresses must belong to the same
|
||||
memory range, and this range must be managed by this MPC.
|
||||
Also, some ranges are only allowed to be configured as
|
||||
secure/non-secure, because of hardware requirements
|
||||
(security aliases), and only a relevant security attribute
|
||||
is therefore allowed for such ranges.
|
||||
\param[in] base: Base address of the region to configure. This
|
||||
bound is included in the configured region.
|
||||
This must be aligned on the block size of this MPC.
|
||||
\param[in] limit: Limit address of the region to configure. This
|
||||
bound is included in the configured region.
|
||||
Limit+1 must be aligned on the block size of this MPC.
|
||||
\param[in] attr: Wanted security attribute of the region.
|
||||
\return Returns error code.
|
||||
|
||||
\fn int32_t ARM_MPC_GetRegionConfig (uintptr_t base,
|
||||
uintptr_t limit,
|
||||
ARM_MPC_SEC_ATTR *attr)
|
||||
\brief Gets a memory region (base and limit included).
|
||||
\param[in] base: Base address of the region to poll. This
|
||||
bound is included. It does not need to be aligned
|
||||
in any way.
|
||||
\param[in] limit: Limit address of the region to poll. This
|
||||
bound is included. (limit+1) does not need to be aligned
|
||||
in any way.
|
||||
\param[out] attr: Security attribute of the region.
|
||||
If the region has mixed secure/non-secure,
|
||||
a special value is returned (\ref ARM_MPC_SEC_ATTR).
|
||||
|
||||
In case base and limit+1 addresses are not aligned on
|
||||
the block size, the enclosing region with base and
|
||||
limit+1 aligned on block size will be queried.
|
||||
In case of early termination of the function (error), the
|
||||
security attribute will be set to ARM_MPC_ATTR_MIXED.
|
||||
\return Returns error code.
|
||||
|
||||
\fn int32_t ARM_MPC_EnableInterrupt (void)
|
||||
\brief Enable MPC interrupt.
|
||||
\return Returns error code.
|
||||
|
||||
\fn void ARM_MPC_DisableInterrupt (void)
|
||||
\brief Disable MPC interrupt.
|
||||
|
||||
\fn void ARM_MPC_ClearInterrupt (void)
|
||||
\brief Clear MPC interrupt.
|
||||
|
||||
\fn uint32_t ARM_MPC_InterruptState (void)
|
||||
\brief MPC interrupt state.
|
||||
\return Returns 1 if the interrupt is active, 0 otherwise.
|
||||
|
||||
\fn int32_t ARM_MPC_LockDown (void)
|
||||
\brief Lock down the MPC configuration.
|
||||
\return Returns error code.
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Access structure of the MPC Driver.
|
||||
*/
|
||||
typedef struct _ARM_DRIVER_MPC {
|
||||
ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_MPC_GetVersion : Get driver version.
|
||||
int32_t (*Initialize) (void); ///< Pointer to \ref ARM_MPC_Initialize : Initialize the MPC Interface.
|
||||
int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_MPC_Uninitialize : De-initialize the MPC Interface.
|
||||
int32_t (*GetBlockSize) (uint32_t* blk_size); ///< Pointer to \ref ARM_MPC_GetBlockSize : Get MPC block size
|
||||
int32_t (*GetCtrlConfig) (uint32_t* ctrl_val); ///< Pointer to \ref ARM_MPC_GetCtrlConfig : Get the MPC control configuration flags.
|
||||
int32_t (*SetCtrlConfig) (uint32_t ctrl); ///< Pointer to \ref ARM_MPC_SetCtrlConfig : Set the MPC control configuration flags.
|
||||
int32_t (*ConfigRegion) (uintptr_t base, uintptr_t limit, ARM_MPC_SEC_ATTR attr); ///< Pointer to \ref ARM_MPC_ConfigRegion : Configure a region using the driver for the specific MPC.
|
||||
int32_t (*GetRegionConfig) (uintptr_t base, uintptr_t limit, ARM_MPC_SEC_ATTR *attr); ///< Pointer to \ref ARM_MPC_GetRegionConfig : Get the configuration of a specific region on this MPC.
|
||||
int32_t (*EnableInterrupt) (void); ///< Pointer to \ref ARM_MPC_EnableInterrupt : Enable MPC interrupt.
|
||||
void (*DisableInterrupt) (void); ///< Pointer to \ref ARM_MPC_DisableInterrupt : Disable MPC interrupt.
|
||||
void (*ClearInterrupt) (void); ///< Pointer to \ref ARM_MPC_ClearInterrupt : Clear MPC interrupt.
|
||||
uint32_t (*InterruptState) (void); ///< Pointer to \ref ARM_MPC_InterruptState : MPC interrupt State.
|
||||
int32_t (*LockDown) (void); ///< Pointer to \ref ARM_MPC_LockDown : Lock down the MPC configuration.
|
||||
} const ARM_DRIVER_MPC;
|
||||
|
||||
#endif /* __DRIVER_MPC_H */
|
||||
|
||||
|
|
@ -0,0 +1,116 @@
|
|||
/*
|
||||
* Copyright (c) 2016 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef __CMSIS_PPC_DRV_H__
|
||||
#define __CMSIS_PPC_DRV_H__
|
||||
|
||||
#include "Driver_Common.h"
|
||||
|
||||
/* API version */
|
||||
#define ARM_PPC_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,0)
|
||||
|
||||
/* Security attribute used to configure the peripheral */
|
||||
typedef enum _ARM_PPC_SecAttr {
|
||||
ARM_PPC_SECURE_ONLY, ///< Secure access
|
||||
ARM_PPC_NONSECURE_ONLY, ///< Non-secure access
|
||||
} ARM_PPC_SecAttr;
|
||||
|
||||
/* Privilege attribute used to configure the peripheral */
|
||||
typedef enum _ARM_PPC_PrivAttr {
|
||||
ARM_PPC_PRIV_AND_NONPRIV, ///< Privilege and non-privilege access
|
||||
ARM_PPC_PRIV_ONLY, ///< Privilege only access
|
||||
} ARM_PPC_PrivAttr;
|
||||
|
||||
/* Function documentation */
|
||||
/**
|
||||
\fn ARM_DRIVER_VERSION ARM_PPC_GetVersion (void)
|
||||
\brief Get driver version.
|
||||
\return \ref ARM_DRIVER_VERSION
|
||||
|
||||
\fn int32_t ARM_PPC_Initialize (void)
|
||||
\brief Initialize PPC Interface.
|
||||
\return Returns ARM error code.
|
||||
|
||||
\fn int32_t ARM_PPC_Uninitialize (void)
|
||||
\brief De-initialize MPC Interface.
|
||||
\return Returns ARM error code.
|
||||
|
||||
\fn int32_t ARM_PPC_ConfigPeriph (uint8_t periph,
|
||||
ARM_PPC_SecAttr sec_attr,
|
||||
ARM_PPC_PrivAttr priv_attr)
|
||||
\brief Configures a peripheral controlled by the given PPC.
|
||||
\param[in] periph: Peripheral position in SPCTRL and NSPCTRL registers.
|
||||
\param[in] sec_attr: Secure attribute value.
|
||||
\param[in] priv_attr: Privilege attrivute value.
|
||||
|
||||
Secure Privilege Control Block ( SPCTRL )
|
||||
Non-Secure Privilege Control Block ( NSPCTRL )
|
||||
|
||||
\return Returns ARM error code.
|
||||
|
||||
\fn int32_t ARM_PPC_IsPeriphSecure (uint8_t periph)
|
||||
\brief Check if the peripheral is configured to be secure.
|
||||
\param[in] periph: Peripheral position in SPCTRL and NSPCTRL registers.
|
||||
|
||||
Secure Privilege Control Block ( SPCTRL )
|
||||
Non-Secure Privilege Control Block ( NSPCTRL )
|
||||
|
||||
\return Returns 1 if the peripheral is configured as secure,
|
||||
0 for non-secure.
|
||||
|
||||
\fn uint32_t ARM_PPC_IsPeriphPrivOnly (uint8_t periph)
|
||||
\brief Check if the peripheral is configured to be privilege only.
|
||||
\param[in] periph: Peripheral position in SPCTRL and NSPCTRL registers.
|
||||
|
||||
Secure Privilege Control Block ( SPCTRL )
|
||||
Non-Secure Privilege Control Block ( NSPCTRL )
|
||||
|
||||
\return Returns 1 if the peripheral is configured as privilege access
|
||||
only, 0 for privilege and unprivilege access mode.
|
||||
|
||||
\fn int32_t ARM_PPC_EnableInterrupt (void)
|
||||
\brief Enable PPC interrupt.
|
||||
\return Returns ARM error code.
|
||||
|
||||
\fn void ARM_PPC_DisableInterrupt (void)
|
||||
\brief Disable PPC interrupt.
|
||||
|
||||
\fn void ARM_PPC_ClearInterrupt (void)
|
||||
\brief Clear PPC interrupt.
|
||||
|
||||
\fn int32_t ARM_PPC_InterruptState (void)
|
||||
\brief PPC interrupt state.
|
||||
\return Returns 1 if the interrupt is active, 0 otherwise.
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Access structure of the MPC Driver.
|
||||
*/
|
||||
typedef struct _ARM_DRIVER_PPC {
|
||||
ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_PPC_GetVersion : Get driver version.
|
||||
int32_t (*Initialize) (void); ///< Pointer to \ref ARM_PPC_Initialize : Initialize the PPC Interface.
|
||||
int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_PPC_Uninitialize : De-initialize the PPC Interface.
|
||||
int32_t (*ConfigPeriph) (uint8_t periph, ARM_PPC_SecAttr sec_attr, ARM_PPC_PrivAttr priv_attr); ///< Pointer to \ref ARM_PPC_ConfigPeriph : Configure a peripheral controlled by the PPC.
|
||||
uint32_t (*IsPeriphSecure) (uint8_t periph); ///< Pointer to \ref IsPeriphSecure : Check if the peripheral is configured to be secure.
|
||||
uint32_t (*IsPeriphPrivOnly) (uint8_t periph); ///< Pointer to \ref IsPeriphPrivOnly : Check if the peripheral is configured to be privilege only.
|
||||
int32_t (*EnableInterrupt) (void); ///< Pointer to \ref ARM_PPC_EnableInterrupt : Enable PPC interrupt.
|
||||
void (*DisableInterrupt) (void); ///< Pointer to \ref ARM_PPC_DisableInterrupt : Disable PPC interrupt.
|
||||
void (*ClearInterrupt) (void); ///< Pointer to \ref ARM_PPC_ClearInterrupt : Clear PPC interrupt.
|
||||
uint32_t (*InterruptState) (void); ///< Pointer to \ref ARM_PPC_InterruptState : PPC interrupt State.
|
||||
} const ARM_DRIVER_PPC;
|
||||
|
||||
#endif /* __CMSIS_PPC_DRV_H__ */
|
||||
|
||||
|
|
@ -45,29 +45,17 @@
|
|||
|
||||
#elif defined(TARGET_MUSCA_A1)
|
||||
|
||||
/******************** ARMC ********************/
|
||||
#if defined (__CC_ARM) || (defined (__ARMCC_VERSION) && \
|
||||
(__ARMCC_VERSION >= 6010050))
|
||||
extern uint32_t __initial_sp;
|
||||
extern uint32_t __stack_base;
|
||||
#define ISR_STACK_START ((unsigned char*) &__stack_base)
|
||||
#define ISR_STACK_SIZE ((uint32_t)((uint32_t) &__initial_sp - (uint32_t) &__stack_base))
|
||||
|
||||
#ifndef INITIAL_SP
|
||||
#define INITIAL_SP ((uint32_t)&__initial_sp)
|
||||
#endif
|
||||
|
||||
/******************** GCC ********************/
|
||||
#elif defined (__GNUC__)
|
||||
extern uint32_t __StackTop;
|
||||
extern uint32_t __StackLimit;
|
||||
#define ISR_STACK_START ((unsigned char*) &__StackLimit)
|
||||
#define ISR_STACK_SIZE ((uint32_t)((uint32_t) &__StackTop - (uint32_t) &__StackLimit))
|
||||
|
||||
#ifndef INITIAL_SP
|
||||
#define INITIAL_SP ((uint32_t)&__StackTop)
|
||||
#endif
|
||||
|
||||
#if defined(__ARMCC_VERSION)
|
||||
extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Base[];
|
||||
extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Length[];
|
||||
#define HEAP_START Image$$ARM_LIB_HEAP$$ZI$$Base
|
||||
#define HEAP_SIZE Image$$ARM_LIB_HEAP$$ZI$$Length
|
||||
#elif defined(__GNUC__)
|
||||
/* No region declarations needed */
|
||||
#elif defined(__ICCARM__)
|
||||
/* No region declarations needed */
|
||||
#else
|
||||
#error "no toolchain defined"
|
||||
#endif
|
||||
|
||||
#endif /* TARGET_MUSCA_A1 */
|
||||
|
|
|
|||
|
|
@ -5450,6 +5450,7 @@
|
|||
],
|
||||
"extra_labels_add": ["MUSCA_A1_NS", "PSA", "TFM"],
|
||||
"post_binary_hook": {"function": "ArmMuscaA1Code.binary_hook"},
|
||||
"secure_image_filename": "tfm.bin",
|
||||
"overrides": {
|
||||
"non-secure-rom-start": "0x000a0400",
|
||||
"non-secure-rom-size": "0x5f800",
|
||||
|
|
@ -5473,7 +5474,7 @@
|
|||
"components_add": ["FLASHIAP"],
|
||||
"extra_labels_add": ["MUSCA_A1_S", "PSA", "TFM"],
|
||||
"deliver_to_target": "ARM_MUSCA_A1_NS",
|
||||
"delivery_dir": "TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device",
|
||||
"delivery_dir": "TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/prebuilt",
|
||||
"overrides": {
|
||||
"secure-rom-start": "0x10020400",
|
||||
"secure-rom-size": "0x7f800",
|
||||
|
|
|
|||
|
|
@ -30,15 +30,18 @@ SCRIPT_DIR = dirname(abspath(__file__))
|
|||
MBED_OS_ROOT = abspath(path_join(SCRIPT_DIR, os.pardir, os.pardir))
|
||||
MUSCA_A1_BASE = path_join(MBED_OS_ROOT, 'targets', 'TARGET_ARM_SSG', 'TARGET_MUSCA_A1')
|
||||
|
||||
def musca_tfm_bin(t_self, non_secure_bin):
|
||||
def musca_tfm_bin(t_self, non_secure_bin, secure_bin):
|
||||
tempdir = tempfile.mkdtemp()
|
||||
flash_layout = path_join(MUSCA_A1_BASE, 'partition', 'flash_layout.h')
|
||||
mcuboot_bin = path_join(MUSCA_A1_BASE, 'TARGET_MUSCA_A1_NS', 'device', 'mcuboot.bin')
|
||||
secure_bin = path_join(MUSCA_A1_BASE, 'TARGET_MUSCA_A1_NS', 'device', 'tfm.bin')
|
||||
mcuboot_bin = path_join(MUSCA_A1_BASE, 'TARGET_MUSCA_A1_NS', 'prebuilt', 'mcuboot.bin')
|
||||
ns_bin_name, ns_bin_ext = splitext(basename(non_secure_bin))
|
||||
concatenated_bin = path_join(tempdir, 'tfm_' + ns_bin_name + ns_bin_ext)
|
||||
signed_bin = path_join(tempdir, 'tfm_' + ns_bin_name + '_signed' + ns_bin_ext)
|
||||
|
||||
assert os.path.isfile(flash_layout)
|
||||
assert os.path.isfile(secure_bin)
|
||||
assert os.path.isfile(non_secure_bin)
|
||||
|
||||
#1. Concatenate secure TFM and non-secure mbed binaries
|
||||
output = Assembly(flash_layout, concatenated_bin)
|
||||
output.add_image(secure_bin, "SECURE")
|
||||
|
|
|
|||
|
|
@ -31,6 +31,7 @@ from tools.paths import TOOLS_BOOTLOADERS
|
|||
from tools.utils import json_file_to_dict, NotSupportedException
|
||||
from tools.psa import find_secure_image
|
||||
|
||||
|
||||
__all__ = ["target", "TARGETS", "TARGET_MAP", "TARGET_NAMES", "CORE_LABELS",
|
||||
"CORE_ARCH", "HookError", "generate_py_target", "Target",
|
||||
"CUMULATIVE_ATTRIBUTES", "get_resolution_order"]
|
||||
|
|
@ -674,12 +675,21 @@ class PSOC6Code:
|
|||
else:
|
||||
psoc6_complete(t_self, elf, binf)
|
||||
|
||||
|
||||
class ArmMuscaA1Code:
|
||||
"""Musca-A1 Hooks"""
|
||||
@staticmethod
|
||||
def binary_hook(t_self, resources, elf, binf):
|
||||
from tools.targets.ARM_MUSCA_A1 import musca_tfm_bin
|
||||
musca_tfm_bin(t_self, binf)
|
||||
configured_secure_image_filename = t_self.target.secure_image_filename
|
||||
secure_bin = find_secure_image(
|
||||
t_self.notify,
|
||||
resources,
|
||||
binf,
|
||||
configured_secure_image_filename,
|
||||
FileType.BIN
|
||||
)
|
||||
musca_tfm_bin(t_self, binf, secure_bin)
|
||||
|
||||
|
||||
class LPC55S69Code:
|
||||
|
|
|
|||
Loading…
Reference in New Issue