Commit Graph

362 Commits (80d58e55722107d2d004704de7b6050f0eb2e91e)

Author SHA1 Message Date
Jimmy Brisson 15a9a0382b Enable Compiling with ARMC6 across all targets
remove duplicate sys.cpp
2017-09-11 13:20:32 -05:00
ccli8 cacc444b73 [M487] Support USB device/host 2017-08-22 09:27:31 +08:00
Jimmy Brisson 0f0a461209 Merge pull request #4832 from OpenNuvoton/nuvoton
NUC472/M453: Fix several startup and hal bugs
2017-08-14 11:38:18 -05:00
Jimmy Brisson 097720670e Merge pull request #4631 from OpenNuvoton/nuvoton_nano130
Add new target NUMAKER_PFM_NANO130
2017-08-14 11:35:58 -05:00
MS30 CCChang12 346209ed2f [NANO130] Adjust the stack size in IAR toolchains 2017-08-10 15:35:02 +08:00
ccli8 f8af225dda [M487] Remove support for uVisor core debug message via STDIO
This is necessary. Otherwise, program will hang in uninitialized STDIO UART because uVisor core doesn't enable it.
2017-08-03 18:48:31 +08:00
ccli8 9ac0d90937 [M487] Move target configuration from mbed_lib.json to targets.json 2017-08-03 13:40:32 +08:00
ccli8 afb5aba8d9 [M487] Fix compile warnings with IAR toolchain 2017-08-03 13:33:17 +08:00
ccli8 99d12b1eb8 [M487] Fix compile warnings with GCC_ARM toolchain 2017-08-03 11:10:15 +08:00
ccli8 b31d6f6eaa [M487] Fix compile warnings with ARM toolchain 2017-08-03 09:24:05 +08:00
cyliangtw 6b8724b27d [NUC472] Sync SPI mode with NUC472 BSP V3.02.001 2017-08-01 14:40:54 +08:00
ccli8 d885de6ec5 [NUC472/M453] Move target configuration from mbed_lib.json to targets.json 2017-08-01 14:40:48 +08:00
ccli8 8092c3611b [NUC472/M453] Add comment for Receive Time-out IF in SPI HAL 2017-08-01 14:40:42 +08:00
ccli8 c7fcd071e9 [NUC472/M453] Add sanity check for serial format 2017-08-01 14:40:37 +08:00
ccli8 5e335de67e [NUC472/M453] Set LED4 to LED1
No real LED4. Just for passing ATS.
2017-08-01 14:40:31 +08:00
ccli8 ea1de8c9a8 [NUC472/M453] Remove mbed_sdk_init_forced()
1. With mbed OS 5, mbed_sdk_init() is ensured to call before C++ global object constructor.
2. Refine startup file with GCC_ARM toolchain related to this modification.
2017-08-01 14:40:25 +08:00
ccli8 6c9fda4e3e [NUC472/M453] Fix lp_ticker typo 2017-08-01 14:40:20 +08:00
ccli8 ea7a0fdf74 [NUC472/M453] Add comment in gpio_irq_init() 2017-08-01 14:40:14 +08:00
ccli8 46cb684a32 [NUC472] Conform to mbed TLS H/W acceleration support 2017-08-01 14:40:08 +08:00
ccli8 8067f9ac91 [NUC472/M453] Move SystemInit() to register unlock range for perhaps future protected register access 2017-08-01 14:40:02 +08:00
ccli8 2844be6434 [NUC472/M453] Fix RTC time doesn't continue across reset cycle 2017-08-01 14:39:57 +08:00
ccli8 c4df35d1b5 [NUC472/M453] Fix region end address error with IAR toolchain 2017-08-01 14:39:50 +08:00
ccli8 306d8449b3 [M487] Remove NVIC_SetVector/NVIC_GetVector to match updated boot flow 2017-08-01 10:53:40 +08:00
ccli8 670822a581 [M487] Update spi_master_block_write() API 2017-08-01 10:47:39 +08:00
ccli8 bc7193508e [M487] Fix GCC linker script with uVisor 2017-08-01 10:37:28 +08:00
ccli8 52d5a61e29 [M487] Fix include file error in case-sensitive environment 2017-08-01 10:37:27 +08:00
ccli8 0803267eab [M487] Add ticker API us_ticker_fire_interrupt and lp_ticker_fire_interrupt 2017-08-01 10:37:26 +08:00
ccli8 b54e7e9639 [M487] Remove debug code in I2C HAL 2017-08-01 10:37:25 +08:00
ccli8 ed5ef0cc54 [M487] Refine coding style 2017-08-01 10:37:16 +08:00
ccli8 7b564c7f52 [M487] Add comment for Receive Time-out IF in SPI HAL 2017-08-01 10:32:50 +08:00
ccli8 7cfb7ae8f8 [M487] Add sanity check for serial format 2017-08-01 10:32:48 +08:00
ccli8 7a60b35d52 [M487] Set LED4 to LED1
No real LED4. Just for passing ATS.
2017-08-01 10:32:46 +08:00
ccli8 355b4336d6 [M487] Remove dead code 2017-08-01 10:32:43 +08:00
ccli8 8c76476929 [M487] Remove mbed_sdk_init_forced()
1. With mbed OS 5, mbed_sdk_init() is ensured to call before C++ global object constructor.
2. Refine startup file with GCC_ARM toolchain related to this modification.
2017-08-01 10:32:41 +08:00
ccli8 e99dc63d1b [M487] Fix lp_ticker typo 2017-08-01 10:32:38 +08:00
ccli8 642a2acb92 [Nuvoton] Give universal rtx configuration for all Nuvoton targets 2017-08-01 10:32:34 +08:00
ccli8 77ea786c04 [M487] Fix abnormal pulse on re-configuring pwmout
The issue is met in ARM mbed CI test tests-api-pwm.
2017-08-01 10:31:52 +08:00
ccli8 39a9f05491 [M487] Fix ARM mbed CI pwm test failed 2017-08-01 10:31:50 +08:00
ccli8 f182d7fcae [M487] Add internal configuration control_01 2017-08-01 10:31:48 +08:00
ccli8 9c90cfd304 [M487] Add Arduino UNO pins D14 and D15 2017-08-01 10:31:45 +08:00
ccli8 d709deffc6 [M487] Fix emitting uvisor core debug message through USB VCOM 2017-08-01 10:31:43 +08:00
ccli8 e49ceb173e [M487] Support initial stack allocated on SPIM CCM memory 2017-08-01 10:31:41 +08:00
ccli8 694838b706 [M487] Guard from initial stack allocated on SPIM CCM memory not initialized yet
Not add this guard in IAR toolchain due to its unsupported ILINK syntax
2017-08-01 10:31:38 +08:00
cyliangtw aa47503435 [M487] Revise CAN & AES to fulfill real-chip 2017-08-01 10:31:36 +08:00
ccli8 b516019b12 [M487] Add comment in gpio_irq_init() 2017-08-01 10:24:07 +08:00
ccli8 b7dedbe917 [M487] Align with BSP 2017-08-01 10:24:04 +08:00
ccli8 23672b09a2 [M487] Support bootloader 2017-08-01 10:23:58 +08:00
ccli8 cc2ab31d2c [M487] Divert SRAM bank2 (32 KB) to CCM from SPIM cache
Extend SRAM from 128 KB to 160 KB
2017-08-01 10:23:56 +08:00
ccli8 30ab1007e4 [M487] Support one-to-many mapping in the same pin map 2017-08-01 10:23:55 +08:00
ccli8 bcb96a12e1 [M487] Add SPI MOSI0/MISO0 into pin map
SPI MOSI0/MISO0 can use as SPI standard MOSI/MISO pins
2017-08-01 10:23:54 +08:00
ccli8 ef50c180fc [M487] Add LED4 to pass ATS 2017-08-01 10:23:52 +08:00
ccli8 280d767700 [M487] Update startup files
1. Add SYS_DISABLE_POR() in startup_M480.c
2. Fix FMC_T::CYCCTL access is not unlocked
3. Sync system_M480.c with BSP
2017-08-01 10:23:51 +08:00
ccli8 82a5b5dd34 [M487] Fix board header for real chip 2017-08-01 10:23:50 +08:00
ccli8 12536436f8 [M487] Conform to mbed TLS H/W acceleration support released with mbed OS 5.3 2017-08-01 10:23:48 +08:00
ccli8 7578541021 [M487] Fix some compile warnings 2017-08-01 10:23:47 +08:00
ccli8 4d4d1a89f9 [M487] Change OS_CLOCK to 192 MHz 2017-08-01 10:23:45 +08:00
ccli8 aaf26a12e1 [M487] Fix compile error with GCC_ARM toolchain 2017-08-01 10:23:44 +08:00
ccli8 90e35febc1 [M487] Alpha support for real chip
Real chip is incompatible with test chip due to change of pinout. From this on, test chip is unsupported.
2017-08-01 10:23:43 +08:00
ccli8 59acfb3a47 [M487] Correct comment for RTC time error in 1 sec after boot 2017-08-01 10:23:40 +08:00
ccli8 2fc3d1721b [M487] Fix RTC time doesn't continue across reset cycle 2017-08-01 10:23:39 +08:00
ccli8 00b69c7ddd [M487] Change comment for serial_getc/serial_putc 2017-08-01 10:23:38 +08:00
ccli8 e3fb76f0d9 [M487] Fix region end address error with IAR toolchain 2017-08-01 10:23:37 +08:00
ccli8 3f97ad3cdd [M487] Rename sleep/deepsleep to hal_sleep/hal_deepsleep 2017-08-01 10:23:36 +08:00
ccli8 4cc90e54d5 [M487] Fix serial error with sync/async calls interlaced 2017-08-01 10:23:34 +08:00
ccli8 3f650566d9 [M487] Fix pwmout power-down condition 2017-08-01 10:23:33 +08:00
ccli8 bea7548717 [M487] Fix DMA channel over-allocate 2017-08-01 10:23:32 +08:00
ccli8 5e9999424a [M487] Fix flash algorithm
1. Remove setting of not released register ICPCON
2. Enable FMC_APUEN to update APROM
2017-08-01 10:23:31 +08:00
ccli8 3a8be6c711 [M487] Remove 'FIXME' comment in flash_api.c 2017-08-01 10:23:29 +08:00
ccli8 bced49325a [M487] Support flash 2017-08-01 10:19:54 +08:00
ccli8 898a4bb4bd [M487] Refine serial PDMA code 2017-08-01 10:19:50 +08:00
ccli8 422871ab4d [M487] Refine SPI PDMA code 2017-08-01 10:19:48 +08:00
ccli8 a76d55a555 [M487] Add dma_modbase() to get PDMA base address 2017-08-01 10:19:45 +08:00
ccli8 aeee0e8b57 [M487] Fix pwmout power-down condition 2017-08-01 10:19:42 +08:00
ccli8 ae33f9eed7 [M487] Fix PDMA error on timeout 2017-08-01 10:19:39 +08:00
ccli8 65de13454e [M487] Prepare support for one-to-many mappings in the same pin map
Also fix bumped bug which doesn't call NU_MODBASE() to retrieve module base address
2017-08-01 10:19:33 +08:00
ccli8 04bd652a56 [M487] Add configuration option MBED_CONF_M480_USB_DEVICE_HSUSBD 2017-08-01 10:19:30 +08:00
cyliangtw d32607294f [M487] Support CAN feature 2017-08-01 10:19:25 +08:00
ccli8 95e0bc094a [M487] Change sbrk() allocation to be 32-byte aligned 2017-08-01 10:19:22 +08:00
ccli8 acee0379c7 [M487] Remove power-down support from us_ticker 2017-08-01 10:19:19 +08:00
ccli8 3dc5f2da34 [M487] Support uvisor debug message through stdio uart 2017-08-01 10:19:16 +08:00
ccli8 ebe56466cc [M487] Fix us_ticker drift error > 5% 2017-08-01 10:19:14 +08:00
ccli8 44572cf1a8 [M487] Fix link error in uvisor-enabled application 2017-08-01 10:19:11 +08:00
ccli8 ee622a0c51 [M487] Fix compile error with Travis CI
Use MBED_CONF_RTOS_PRESENT to filter out des/sha alternative for mbed OS 2.
2017-08-01 10:19:09 +08:00
cyliangtw b91f064be7 [M487] Add CAN, AES and Eth 2017-08-01 10:18:54 +08:00
ccli8 98a79c872b [M487] Support NuMaker-PFM-M487 board 2017-08-01 10:14:24 +08:00
MS30 CCChang12 38e78fa8b3 [NANO130] Ticker: add fire interrupt now function 2017-07-25 18:07:47 +08:00
MS30 CCChang12 c7cd9b607c [NANO130] Change dummy to spi_fill in spi_api.c 2017-07-25 18:03:27 +08:00
Jimmy Brisson 1f94ede86c Merge pull request #4744 from deepikabhavnani/spi_issue_4743
Allow user to set default transfer byte for block read
2017-07-24 14:45:30 -05:00
Deepika 1b797e9081 Closed review comments
1. Doxygen and Grammar related
2. Change dummy to spi_fill
3. Remove NXP driver and add default loop in spi block read (same as all
other drivers)
2017-07-21 09:46:22 -05:00
MS30 CCChang12 5f58104640 [NANO130] Fix the file name case problem, verified on Ubuntu Linux 2017-07-18 20:00:08 +08:00
MS30 CCChang12 4f66d2d809 [NANO130] Fix the file name case problem for building code in Linux system 2017-07-14 09:39:08 +08:00
Martin Kojtal 10ea63b8e7 Ticker: add fire interrupt now function
fire_interrupt function should be used for events in the past. As we have now
64bit timestamp, we can figure out what is in the past, and ask a target to invoke
an interrupt immediately. The previous attemps in the target HAL tickers were not ideal, as it can wrap around easily (16 or 32 bit counters). This new
functionality should solve this problem.

set_interrupt for tickers in HAL code should not handle anything but the next match interrupt. If it was in the past is handled by the upper layer.

It is possible that we are setting next event to the close future, so once it is set it is already in the past. Therefore we add a check after set interrupt to verify it is in future.
If it is not, we fire interrupt immediately. This results in
two events - first one immediate, correct one. The second one might be scheduled in far future (almost entire ticker range),
that should be discarded.

The specification for the fire_interrupts are:
- should set pending bit for the ticker interrupt (as soon as possible),
the event we are scheduling is already in the past, and we do not want to skip
any events
- no arguments are provided, neither return value, not needed
- ticker should be initialized prior calling this function (no need to check if it is already initialized)

All our targets provide this new functionality, removing old misleading if (timestamp is in the past) checks.
2017-07-13 12:23:25 +01:00
MS30 CCChang12 2050095b0f [NANO130] remove usage of mktime/localtime in rtc_api.c 2017-07-12 13:53:59 +08:00
MS30 CCChang12 83f395c07c [NANO130] Fix symbol of IAR toolchain 2017-07-12 11:01:03 +08:00
MS30 CCChang12 00fa0f64c1 [NANO130] Remove dead code 2017-07-12 10:49:40 +08:00
MS30 CCChang12 3bbacad6a7 [NANO130] Remove mbed_sdk_init_forced()
1. With mbed OS 5, mbed_sdk_init() is ensured to call before C++ global object constructor.
2. Refine startup file with GCC_ARM toolchain related to this modification.
2017-07-11 17:50:20 +08:00
cyliangtw 2f8e3fbfff [NANO130] remove dead code 2017-07-05 11:11:43 +08:00
MS30 CCChang12 6c870ca65f [NANO130] Fix issues in OS 5.5 Greentea test
1. Support CMSIS_VECTAB_VIRTUAL feature
2. Reduce the register sync waiting time in LP ticker
3. Adjust the stack and heap size in GCC and IAR toolchains
2017-06-23 17:24:22 +08:00
cyliangtw bc0fc2ea4e [NANO130] Align with mbed master
1. Remove RTX_CM_lib.h modification for NANO130 platform
2. Remove semaphore test code's speific modification for NANO130 platform
3. Fix duplicate definitions of __NVIC_SetVector/__NVIC_GetVector
4. Add spi_master_block_write()
2017-06-19 20:06:23 +08:00
MS30 CCChang12 80b74f3139 [NANO130] Modify pin names for mbed board 2017-06-12 15:45:47 +08:00
MS30 CCChang12 a2d0b021a6 [NANO130] Fix first PWM pulse may not be correct issue 2017-06-12 14:24:28 +08:00
Sam Grove 547320e99c Rename function st_rtc_localtime with _rtc_localtime 2017-06-07 23:24:48 -05:00
Vincent Coubard f880e44145 remove usage of mktime/localtime in favor of dedicated functions.
The use of mktime was causing a fault when called in interrupt handler because on GCC it lock the mutex protecting the environment, To overcome this issue, this patch add dedicated routine to convert a time_t into a tm and vice versa.
In the process mktime has been optimized and is now an order of magnitude faster than the routines present in the C library.
2017-06-07 22:06:22 -05:00
Sam Grove 5f138810a9 Merge pull request #4294 from ARMmbed/feature_cmsis5
Update CMSIS-Core and RTX to version 5
2017-06-02 23:44:32 -05:00
Martin Kojtal e229a49182 Merge pull request #4207 from geky/spi-remove-byte-locking
spi: Add SPI block-write to C++ and HAL for performance
2017-06-01 14:03:36 +02:00
Bartek Szatkowski 85cc9c8381 Remove deprecated RTX4 config options 2017-05-30 18:55:55 +01:00
Bartek Szatkowski b793a3fb89 Update codebase for CMSIS5/RTX5
Update all of mbed-os to use RTX5.
2017-05-30 18:55:52 +01:00
Bartek Szatkowski b97ffe8fdc CMSIS5: Replace target defined NVIC_Set/GetVector with CMSIS implementation 2017-05-30 18:55:51 +01:00
Sam Grove d11289b576 Merge pull request #4165 from adustm/can_init
fix #3863 Add an mbed API that allows the init of the CAN at the bus frequency
2017-05-26 10:45:19 -05:00
Christopher Haster c1de19e49e spi: Added default spi_master_block_write implementation to all targets
There is an easy default implementation of spi_master_block_write that
just calls spi_master_write in a loop, so the default implementation
of spi_master_block_write has been added to all targets.
2017-05-25 12:04:58 -05:00
MS30 CCChang12 369d65fd0d [NANO130] Fix issues in ci-test 2017-05-25 14:29:38 +08:00
adustm 3d44a3fcc3 add can_init_freq for NUVOTON platforms 2017-05-15 14:27:22 +02:00
MS30 CCChang12 9dcd7256cb [NANO130] Fix compile warnings in all toolchains 2017-05-11 10:48:52 +08:00
MS30 CCChang12 c5c7f3c2e2 [NANO130] Fix RTC incorrect time issue after system reset 2017-05-11 10:21:59 +08:00
MS30 CCChang12 e1af4657e9 [NANO130] Fix issues in Greentea test 2017-05-09 10:24:05 +08:00
ccli8 08c778d18d [NUC472/M453] Change comment for serial_getc/serial_putc 2017-05-09 09:22:41 +08:00
ccli8 e7b737ddad [NUC472/M453] Fix serial error with sync/async calls interlaced
Serial implementation uses different vector handlers for sync/async calls respectively. The issue can be reproduced with the following flow:
1. Register sync mode callback with Serial.attach().
2. Sync call with Serial.putc()/getc().
3. Change to async call with Serial.write()/read().
4. Change back to sync call with Serial.putc()/getc().
Now, vector handller is still for async mode, not for sync mode.

To fix it:
1. Introduce internal function serial_enable_interrupt() for both sync/async vector handler enable/disable.
   Original HAL function serial_irq_set() is reduced to call it for sync mode vector handler enable/disable.
2. Introduce internal function serial_rollback_interrupt() to roll back sync mode vector handler at end of async transfer.
2017-05-02 09:31:09 +08:00
MS30 CCChang12 4753787293 [NANO130] Support IAR toolchain 2017-04-28 15:30:16 +08:00
MS30 CCChang12 8d581bbc27 [NANO130] Support Serial async mode 2017-04-28 09:59:30 +08:00
MS30 CCChang12 ac9f59fda5 [NANO130] Fix LP_TICKER and RTC sometimes test fail issue 2017-04-27 10:05:49 +08:00
MS30 CCChang12 a96bea8631 [NANO130] Support ADC 2017-04-26 14:11:47 +08:00
MS30 CCChang12 3be0aaf8aa [NANO130] Support PWM 2017-04-21 13:21:46 +08:00
MS30 CCChang12 3f09447ded [NANO130] Support LP_TICKER, RTC, and beta version of SLEEP 2017-04-21 11:42:58 +08:00
ccli8 32a7e6ba5e [NUC472/M453] Fix pwmout power-down condition 2017-04-20 16:13:37 +08:00
MS30 CCChang12 f98c54948c [NANO130] fix USB TX/RX pin 2017-04-20 15:40:46 +08:00
ccli8 e55553e749 [NUC472/M453] Fix DMA channel over-allocate 2017-04-20 14:57:09 +08:00
ccli8 d2f0d20614 [NANO130] Polish dma_api.c 2017-04-20 14:36:46 +08:00
ccli8 b219a3ee18 [NANO130] Fix SPI slave failed 2017-04-20 13:13:39 +08:00
ccli8 71cd9c3b55 [NANO130] Support SPI 2017-04-18 17:40:21 +08:00
ccli8 70a618835a [NANO130] Beta support for DMA 2017-04-18 15:13:58 +08:00
MS30 CCChang12 b00996b145 [NANO130] Alpha support for DMA 2017-04-17 10:03:18 +08:00
ccli8 21f90cb120 [NANO130] Support I2C 2017-04-14 14:35:31 +08:00
ccli8 edee7c36a2 [NANO130] Add guard code to prevent from relocating vector table 2017-04-14 14:29:09 +08:00
ccli8 00c727d140 [NANO130] Fix NU_MODINDEX_Pos error 2017-04-14 10:04:18 +08:00
MS30 CCChang12 99290462f6 [NANO] Alpha support 2017-04-13 11:32:51 +08:00
ccli8 40a9852608 [NUC472] Fix flash algorithm
1. Remove setting of not released register ICPCON
2. Enable FMC_APUEN to update APROM
2017-04-05 11:10:48 +08:00
cyliangtw b55708ec65 [NUC472] remove stray tabs to avoid formatting slips 2017-03-30 09:17:35 +08:00
cyliangtw c9e9052c5d [NUC472/M453] remove redundant comment of flash_api 2017-03-23 20:43:52 +08:00
cyliangtw ab814661e5 [NUC472/M453] Fixed scatterAssert of ROM limit 2017-03-23 15:25:08 +08:00
cyliangtw c1b8509b23 [NUC472] Enable HW AES 2017-03-23 10:03:58 +08:00
cyliangtw 1e163e8848 [NUC472/M453] Support bootloader 2017-03-23 09:54:03 +08:00
ccli8 d554f6e4e0 [NUC472/M453] Support flash 2017-03-23 09:54:03 +08:00
ccli8 5720725a3d [NUC472/M453] Refine serial PDMA code 2017-03-10 16:18:14 +08:00
ccli8 502e8ce2a5 [NUC472/M453] Refine SPI PDMA code 2017-03-10 16:18:14 +08:00
ccli8 867072fe70 [NUC472/M453] Add dma_modbase() to get PDMA base address 2017-03-10 16:18:14 +08:00
ccli8 49a2a221a4 [NUC472/M453] Fix pwmout power-down condition 2017-03-10 16:18:14 +08:00
ccli8 4e96f8b721 [NUC472/M453] Fix PDMA error on timeout 2017-03-10 16:18:14 +08:00
ccli8 1da33e809f [NUC472/M453] Refine pin/peripheral/pin map definitions
Change NUC472 analogin_api.c accordingly
2017-03-10 16:18:14 +08:00
ccli8 4e4c294fa3 [NUC472/M453] Fix incorrect use of peripheral name as peripheral base address 2017-03-10 16:18:14 +08:00
Christopher Haster aff49d8d1e Renamed files in platform to match source names
critical.h     -> mbed_critical.h
sleep.h        -> mbed_sleep.h
toolchain.h    -> mbed_toolchain.h
rtc_time.h     -> mbed_rtc_time.h
semihost_api.h -> mbed_semihost_api.h
wait_api.h     -> mbed_wait_api.h
2017-02-22 18:17:54 -06:00
ccli8 0bd8fb22c4 [NUC472] Support no-XRAM configuration 2017-02-14 09:12:02 +08:00
Sam Grove d8151d7991 Merge pull request #3590 from OpenNuvoton/nuvoton
[NUC472/M453] Export IAR project and other bugfixes
2017-02-13 10:12:02 -06:00
Bartek Szatkowski 6a045a49a9 Platform: Add sleep/deepsleep user facing functions
Add sleep/deepsleep functions to platform layer which are replacing HAL
functions with the same name, rename existing symbols in HAL layer
to hal_sleep/hal_deepsleep. This way sleep functions
are always available, even if target doesn't implement them, which makes
the code using sleep clearer. It also enables us to make decision on in
which builds (debug/release) the sleep will be enabled.
2017-01-19 09:39:29 +00:00
ccli8 0a0b326da6 [NUC472/M453] Change sbrk() allocation to be 32-byte aligned 2017-01-16 09:48:27 +08:00
ccli8 453f60e9c1 [NUC472/M453] Remove power-down support from us_ticker 2017-01-16 09:48:21 +08:00
Martin Kojtal e7361ebc44 Merge pull request #3365 from OpenNuvoton/nuvoton_usb
[NUC472/M453] Support USB device
2016-12-30 12:43:53 +01:00
ccli8 fff8357c1e [NUC472] Fix compile error with Travis CI
Use MBED_CONF_RTOS_PRESENT to filter out mbedtls alternative for mbed OS 2.
2016-12-15 11:43:43 +08:00
cyliangtw e4a5401b9b [NUC472/M453] Fix GCC warnings 2016-12-13 15:41:41 +08:00
ccli8 64e27b2e3d [NUC472/M453] Fix stuck in lp_ticker_init() 2016-12-13 11:10:51 +08:00
cyliangtw ec945db013 [NUC472] Resolve TRNG GCC warning 2016-12-13 11:10:51 +08:00
ccli8 3ff2df1875 [NUC472] Fix compile error for SHA-256 alternative on some condition
Also include non-issue refinement for SHA-1/SHA-256 alternatives.
2016-12-13 11:10:51 +08:00
ccli8 6af60f9b32 [NUC472/M453] Fix PWM clock error in BSP driver 2016-12-13 11:10:51 +08:00
ccli8 f796eb5d2d [NUC472/M453] Change UART RTS/CTS to low level active 2016-12-13 11:10:51 +08:00
ccli8 59e38666ae [NUC472/M453] Fix serial async transfer failed as data with is 16/32 2016-12-13 11:10:51 +08:00
ccli8 8c0948d605 [NUC472/M453] Integrate with Travis CI
1. Add targets into build_travis.py and tests.py.
2. Add target SPI pins into SPI SD test samples.
3. Rename target TOOLCHAIN_GCC_ARM/retarget.c to avoid name collision of compiled retarget.o with platform/retargets.cpp.
2016-12-09 13:46:38 +08:00
ccli8 7f4881fbb2 [NUC472/M453] Support USB device 2016-12-05 15:12:15 +08:00
ccli8 e1995dbe79 [NUC472/M453] Fix spi_master_transfer failed as bit width is 32 2016-11-25 15:32:25 +08:00
ccli8 137053343e [M453] Fix button naming error 2016-11-23 14:35:09 +08:00
ccli8 d24c71fad9 [NUC472/M453] Correct return of i2c_byte_write() on NAK 2016-11-22 13:45:01 +08:00
ccli8 57a22cd4ab [NUC472/M453] Fix CI I2C EEPROM failed 2016-11-22 09:56:54 +08:00
ccli8 f4890f68f1 [NUC472] Remove SPI MOSI1 and MISO1 pins from pinmap
These pins are for SPI 2-bit mode (not dual mode) and cannot be for SPI standard use.
2016-11-22 09:56:54 +08:00
ccli8 6c1fca60a5 [M453] Remove SPI MOSI1 and MISO1 pins from pinmap
These pins are for SPI 2-bit mode (not dual mode) and cannot be for SPI standard use.
2016-11-22 09:56:54 +08:00
ccli8 e1acb06d05 [NUC472] Rename variable name in analog-in 2016-11-22 09:56:53 +08:00
ccli8 bb1617c5f8 [M453] Fix EADC module is initialized multiple times
Also fix EADC module name EADC is hardcoded.
2016-11-22 09:56:53 +08:00
ccli8 35b2ad5a2c [NUC472] Fix CI tests-api-analogin failed
1. Fix UNO pins A5-A7 don't support analog-in by replacing ADC with EADC to implement analog-in HAL.
2. Update CLK driver to fix EADC clock divider setting error. Also fix CLK_Idle() together.
2016-11-22 09:56:53 +08:00
ccli8 fe883d42ab [M453] Fix CI tests-api-analogin failed
1. Fix ADC convert finish check error.
2. Set ADC Vref to internal by default.
2016-11-22 09:56:53 +08:00
ccli8 e0f97e5c80 [NUC472/M453] Support separate enable of GPIO IRQ de-bounce 2016-11-22 09:56:53 +08:00
ccli8 657d90db2c [NUC472/M453] Fix I2C issues
1. Fix error on return of i2c_byte_write().
2. Fix error in zero-length transfer corner case.
2016-11-22 09:56:53 +08:00
ccli8 4ae76be2ce [NUC472/M453] Reduce (interrupt) stack size from 4 KB to 2 KB 2016-11-07 12:28:20 +08:00
ccli8 c557842d68 [NUC472] Reduce (interrupt) stack size from 12 KB to 4 KB 2016-11-07 10:59:42 +08:00
ccli8 2922de8dff [NUC472/M453] Remove dead code in device.h 2016-11-07 10:59:42 +08:00
ccli8 e09d9a15f5 [NUC472/M453] Support UART H/W module shared by multiple serial S/W objects
1. With GCC_ARM and uARM, some greentea tests fail due to no support for this.
2. Bind UART H/W module to correct serial S/W object for interrupt.
2016-11-07 10:59:42 +08:00
cyliangtw a044a65996 fixed misaligned lines in can_api.c of NUC472 & M453 2016-11-01 11:44:44 +08:00
cyliangtw da8fd8b5b7 remove dead code in can_api.c of NUC472 & M453 2016-11-01 11:29:09 +08:00
cyliangtw 33cfe1f599 remove dead code in device.h of NUC472 & M453 2016-10-28 18:39:56 +08:00
cyliangtw 6889c1368b replace tab by 4 space char 2016-10-27 16:31:29 +08:00
cyliangtw 85c45a5174 [NUC472] Fix SetBaudRate 5% inaccuracy issue 2016-10-21 14:01:17 +08:00
cyliangtw ae12346b8e [M453] Support CAN 2016-10-20 15:12:36 +08:00
cyliangtw 6e64d730b5 support NUC472 CAN 2016-10-20 15:12:35 +08:00
ccli8 4ec07510b3 [NUC472] Fix PWM1 clock source setting error 2016-10-20 15:12:35 +08:00
ccli8 005f032cae [NUC472] Rename SD_0/SD_1 SD_0_0/SD_0_1 to match real SD H/W 2016-10-20 15:12:31 +08:00
ccli8 15dbd36492 [M453] Move files to match ARM mbed's restructure
1. Move M451Series.h to device.
2. Move StdDriver to device.
3. Move TOOLCHAIN_* to device.
4. Move cmsis*, startup_M451Series.c, and system_M451Series.c/h to device.
2016-10-11 13:49:25 +08:00
ccli8 6683032999 [NUC472] Fix SD pinmaps are not extern'ed 2016-10-11 10:55:08 +08:00
ccli8 1f2f4e3bb3 [NUC472/M453] Move files to match ARM mbed's restructure
1. Move USBHALHost_M451.cpp and USBHALHost_NUC472.cpp.
2. Move TARGET_M451/mbed_lib.json.
3. Move TARGET_NUC472/crypto.
4. Move TARGET_NUC472/mbed_lib.json.
2016-10-11 10:55:08 +08:00
ccli8 c75d54c668 [NUC472] Fix pin definition error regarding SD, I2C, and SPI
1. Fix pin definition error regarding SD.
2. Fix pin definition error regarding I2C.
3. Fix pin definition error regarding SPI.
4. Add pinmap for SD.
2016-10-11 10:55:08 +08:00
ccli8 c2b9089332 [NUC472] Fix buffer overflow in BSP SD driver 2016-10-11 10:55:08 +08:00
cyliangtw 11c05afc62 support mesh in IAR tool chain 2016-10-11 10:55:08 +08:00
cyliangtw a1b383a604 support mesh in GCC tool chain 2016-10-11 10:55:08 +08:00
ccli8 21e8c5bd52 [M453] Fix warnings generated by armcc 2016-10-11 10:55:08 +08:00
ccli8 a9d65e46a3 [NUC472] Fix warnings generated by armcc 2016-10-11 10:55:08 +08:00