mirror of https://github.com/ARMmbed/mbed-os.git
[M487] Support one-to-many mapping in the same pin map
ccli8
parent
bcb96a12e1
commit
30ab1007e4
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@ -114,10 +114,17 @@ const PinMap PinMap_PWM[] = {
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{PA_5, PWM_0_0, SYS_GPA_MFPL_PA5MFP_EPWM0_CH0},
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{PA_6, PWM_1_5, SYS_GPA_MFPL_PA6MFP_EPWM1_CH5},
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{PA_7, PWM_1_4, (int) SYS_GPA_MFPL_PA7MFP_EPWM1_CH4},
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{PB_0, PWM_0_5, SYS_GPB_MFPL_PB0MFP_EPWM0_CH5},
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{NU_PINNAME_BIND(PB_0, PWM_0_5), PWM_0_5, SYS_GPB_MFPL_PB0MFP_EPWM0_CH5},
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{PB_0, PWM_1_5, SYS_GPB_MFPL_PB0MFP_EPWM1_CH5},
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{NU_PINNAME_BIND(PB_0, PWM_1_5), PWM_1_5, SYS_GPB_MFPL_PB0MFP_EPWM1_CH5},
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{PB_1, PWM_0_4, SYS_GPB_MFPL_PB1MFP_EPWM0_CH4},
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{NU_PINNAME_BIND(PB_1, PWM_0_4), PWM_0_4, SYS_GPB_MFPL_PB1MFP_EPWM0_CH4},
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{PB_1, PWM_1_4, SYS_GPB_MFPL_PB1MFP_EPWM1_CH4},
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{NU_PINNAME_BIND(PB_1, PWM_1_4), PWM_1_4, SYS_GPB_MFPL_PB1MFP_EPWM1_CH4},
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{PB_2, PWM_0_3, SYS_GPB_MFPL_PB2MFP_EPWM0_CH3},
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{PB_3, PWM_0_2, SYS_GPB_MFPL_PB3MFP_EPWM0_CH2},
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{PB_4, PWM_0_1, SYS_GPB_MFPL_PB4MFP_EPWM0_CH1},
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@ -153,8 +160,12 @@ const PinMap PinMap_PWM[] = {
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{PE_10, PWM_0_2, SYS_GPE_MFPH_PE10MFP_EPWM0_CH2},
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{PE_11, PWM_0_3, SYS_GPE_MFPH_PE11MFP_EPWM0_CH3},
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{PE_12, PWM_0_4, SYS_GPE_MFPH_PE12MFP_EPWM0_CH4},
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{PE_13, PWM_0_5, SYS_GPE_MFPH_PE13MFP_EPWM0_CH5},
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{NU_PINNAME_BIND(PE_13, PWM_0_5), PWM_0_5, SYS_GPE_MFPH_PE13MFP_EPWM0_CH5},
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{PE_13, PWM_1_0, SYS_GPE_MFPH_PE13MFP_EPWM1_CH0},
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{NU_PINNAME_BIND(PE_13, PWM_1_0), PWM_1_0, SYS_GPE_MFPH_PE13MFP_EPWM1_CH0},
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{PG_5, PWM_0_3, SYS_GPG_MFPL_PG5MFP_EPWM0_CH3},
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{PG_6, PWM_0_2, SYS_GPG_MFPL_PG6MFP_EPWM0_CH2},
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{PG_7, PWM_0_1, (int) SYS_GPG_MFPL_PG7MFP_EPWM0_CH1},
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@ -168,8 +179,12 @@ const PinMap PinMap_PWM[] = {
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const PinMap PinMap_UART_TX[] = {
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{PA_1, UART_0, SYS_GPA_MFPL_PA1MFP_UART0_TXD},
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{PA_3, UART_1, SYS_GPA_MFPL_PA3MFP_UART1_TXD},
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{NU_PINNAME_BIND(PA_3, UART_1), UART_1, SYS_GPA_MFPL_PA3MFP_UART1_TXD},
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{PA_3, UART_4, SYS_GPA_MFPL_PA3MFP_UART4_TXD},
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{NU_PINNAME_BIND(PA_3, UART_4), UART_4, SYS_GPA_MFPL_PA3MFP_UART4_TXD},
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{PA_5, UART_5, SYS_GPA_MFPL_PA5MFP_UART5_TXD},
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{PA_7, UART_0, SYS_GPA_MFPL_PA7MFP_UART0_TXD},
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{PA_9, UART_1, SYS_GPA_MFPH_PA9MFP_UART1_TXD},
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@ -185,8 +200,12 @@ const PinMap PinMap_UART_TX[] = {
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{PB_15, UART_3, SYS_GPB_MFPH_PB15MFP_UART3_TXD},
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{PC_1, UART_2, SYS_GPC_MFPL_PC1MFP_UART2_TXD},
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{PC_3, UART_3, SYS_GPC_MFPL_PC3MFP_UART3_TXD},
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{PC_5, UART_2, SYS_GPC_MFPL_PC5MFP_UART2_TXD},
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{NU_PINNAME_BIND(PC_5, UART_2), UART_2, SYS_GPC_MFPL_PC5MFP_UART2_TXD},
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{PC_5, UART_4, SYS_GPC_MFPL_PC5MFP_UART4_TXD},
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{NU_PINNAME_BIND(PC_5, UART_4), UART_4, SYS_GPC_MFPL_PC5MFP_UART4_TXD},
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{PC_7, UART_4, SYS_GPC_MFPL_PC7MFP_UART4_TXD},
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{PC_10, UART_3, SYS_GPC_MFPH_PC10MFP_UART3_TXD},
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{PC_12, UART_0, SYS_GPC_MFPH_PC12MFP_UART0_TXD},
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@ -210,16 +229,23 @@ const PinMap PinMap_UART_TX[] = {
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{PH_0, UART_5, SYS_GPH_MFPL_PH0MFP_UART5_TXD},
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{PH_2, UART_4, SYS_GPH_MFPL_PH2MFP_UART4_TXD},
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{PH_8, UART_1, SYS_GPH_MFPH_PH8MFP_UART1_TXD},
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{PH_10, UART_0, SYS_GPH_MFPH_PH10MFP_UART0_TXD},
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{NU_PINNAME_BIND(PH_10, UART_0), UART_0, SYS_GPH_MFPH_PH10MFP_UART0_TXD},
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{PH_10, UART_4, SYS_GPH_MFPH_PH10MFP_UART4_TXD},
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{NU_PINNAME_BIND(PH_10, UART_4), UART_4, SYS_GPH_MFPH_PH10MFP_UART4_TXD},
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{NC, NC, 0}
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};
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const PinMap PinMap_UART_RX[] = {
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{PA_0, UART_0, SYS_GPA_MFPL_PA0MFP_UART0_RXD},
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{PA_2, UART_1, SYS_GPA_MFPL_PA2MFP_UART1_RXD},
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{NU_PINNAME_BIND(PA_2, UART_1), UART_1, SYS_GPA_MFPL_PA2MFP_UART1_RXD},
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{PA_2, UART_4, SYS_GPA_MFPL_PA2MFP_UART4_RXD},
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{NU_PINNAME_BIND(PA_2, UART_4), UART_4, SYS_GPA_MFPL_PA2MFP_UART4_RXD},
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{PA_4, UART_5, SYS_GPA_MFPL_PA4MFP_UART5_RXD},
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{PA_6, UART_0, SYS_GPA_MFPL_PA6MFP_UART0_RXD},
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{PA_8, UART_1, SYS_GPA_MFPH_PA8MFP_UART1_RXD},
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@ -235,8 +261,12 @@ const PinMap PinMap_UART_RX[] = {
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{PB_14, UART_3, SYS_GPB_MFPH_PB14MFP_UART3_RXD},
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{PC_0, UART_2, SYS_GPC_MFPL_PC0MFP_UART2_RXD},
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{PC_2, UART_3, SYS_GPC_MFPL_PC2MFP_UART3_RXD},
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{PC_4, UART_2, SYS_GPC_MFPL_PC4MFP_UART2_RXD},
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{NU_PINNAME_BIND(PC_4, UART_2), UART_2, SYS_GPC_MFPL_PC4MFP_UART2_RXD},
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{PC_4, UART_4, SYS_GPC_MFPL_PC4MFP_UART4_RXD},
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{NU_PINNAME_BIND(PC_4, UART_4), UART_4, SYS_GPC_MFPL_PC4MFP_UART4_RXD},
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{PC_6, UART_4, SYS_GPC_MFPL_PC6MFP_UART4_RXD},
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{PC_8, UART_1, SYS_GPC_MFPH_PC8MFP_UART1_RXD},
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{PC_9, UART_3, SYS_GPC_MFPH_PC9MFP_UART3_RXD},
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@ -260,8 +290,11 @@ const PinMap PinMap_UART_RX[] = {
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{PH_1, UART_5, SYS_GPH_MFPL_PH1MFP_UART5_RXD},
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{PH_3, UART_4, SYS_GPH_MFPL_PH3MFP_UART4_RXD},
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{PH_9, UART_1, SYS_GPH_MFPH_PH9MFP_UART1_RXD},
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{PH_11, UART_0, SYS_GPH_MFPH_PH11MFP_UART0_RXD},
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{NU_PINNAME_BIND(PH_11, UART_0), UART_0, SYS_GPH_MFPH_PH11MFP_UART0_RXD},
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{PH_11, UART_4, SYS_GPH_MFPH_PH11MFP_UART4_RXD},
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{NU_PINNAME_BIND(PH_11, UART_4), UART_4, SYS_GPH_MFPH_PH11MFP_UART4_RXD},
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{NC, NC, 0}
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};
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@ -314,7 +347,10 @@ const PinMap PinMap_UART_CTS[] = {
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const PinMap PinMap_SPI_MOSI[] = {
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{PA_0, SPI_0, SYS_GPA_MFPL_PA0MFP_SPI0_MOSI0},
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{NU_PINNAME_BIND(PA_0, SPI_0), SPI_0, SYS_GPA_MFPL_PA0MFP_SPI0_MOSI0},
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{PA_0, SPI_1, SYS_GPA_MFPL_PA0MFP_SPI1_MOSI},
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{NU_PINNAME_BIND(PA_0, SPI_1), SPI_1, SYS_GPA_MFPL_PA0MFP_SPI1_MOSI},
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{PA_8, SPI_3, SYS_GPA_MFPH_PA8MFP_SPI3_MOSI},
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{PA_15, SPI_3, SYS_GPA_MFPH_PA15MFP_SPI3_MOSI},
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{PB_4, SPI_2, SYS_GPB_MFPL_PB4MFP_SPI2_MOSI},
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@ -326,8 +362,12 @@ const PinMap PinMap_SPI_MOSI[] = {
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{PC_11, SPI_4, SYS_GPC_MFPH_PC11MFP_SPI4_MOSI},
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{PD_0, SPI_1, SYS_GPD_MFPL_PD0MFP_SPI1_MOSI},
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{PD_6, SPI_2, SYS_GPD_MFPL_PD6MFP_SPI2_MOSI},
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{PE_0, SPI_0, SYS_GPE_MFPL_PE0MFP_SPI0_MOSI0},
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{NU_PINNAME_BIND(PE_0, SPI_0), SPI_0, SYS_GPE_MFPL_PE0MFP_SPI0_MOSI0},
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{PE_0, SPI_2, SYS_GPE_MFPL_PE0MFP_SPI2_MOSI},
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{NU_PINNAME_BIND(PE_0, SPI_2), SPI_2, SYS_GPE_MFPL_PE0MFP_SPI2_MOSI},
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{PE_2, SPI_4, SYS_GPE_MFPL_PE2MFP_SPI4_MOSI},
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{PE_10, SPI_3, SYS_GPE_MFPH_PE10MFP_SPI3_MOSI},
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{PF_6, SPI_1, SYS_GPF_MFPL_PF6MFP_SPI1_MOSI},
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@ -340,7 +380,10 @@ const PinMap PinMap_SPI_MOSI[] = {
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const PinMap PinMap_SPI_MISO[] = {
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{PA_1, SPI_0, SYS_GPA_MFPL_PA1MFP_SPI0_MISO0},
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{NU_PINNAME_BIND(PA_1, SPI_0), SPI_0, SYS_GPA_MFPL_PA1MFP_SPI0_MISO0},
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{PA_1, SPI_1, SYS_GPA_MFPL_PA1MFP_SPI1_MISO},
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{NU_PINNAME_BIND(PA_1, SPI_1), SPI_1, SYS_GPA_MFPL_PA1MFP_SPI1_MISO},
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{PA_9, SPI_3, SYS_GPA_MFPH_PA9MFP_SPI3_MISO},
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{PA_14, SPI_3, SYS_GPA_MFPH_PA14MFP_SPI3_MISO},
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{PB_5, SPI_2, SYS_GPB_MFPL_PB5MFP_SPI2_MISO},
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@ -352,8 +395,12 @@ const PinMap PinMap_SPI_MISO[] = {
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{PC_12, SPI_4, SYS_GPC_MFPH_PC12MFP_SPI4_MISO},
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{PD_1, SPI_1, SYS_GPD_MFPL_PD1MFP_SPI1_MISO},
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{PD_7, SPI_2, SYS_GPD_MFPL_PD7MFP_SPI2_MISO},
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{PE_1, SPI_0, SYS_GPE_MFPL_PE1MFP_SPI0_MISO0},
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{NU_PINNAME_BIND(PE_1, SPI_0), SPI_0, SYS_GPE_MFPL_PE1MFP_SPI0_MISO0},
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{PE_1, SPI_2, SYS_GPE_MFPL_PE1MFP_SPI2_MISO},
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{NU_PINNAME_BIND(PE_1, SPI_2), SPI_2, SYS_GPE_MFPL_PE1MFP_SPI2_MISO},
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{PE_3, SPI_4, SYS_GPE_MFPL_PE3MFP_SPI4_MISO},
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{PE_9, SPI_3, SYS_GPE_MFPH_PE9MFP_SPI3_MISO},
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{PF_7, SPI_1, SYS_GPF_MFPL_PF7MFP_SPI1_MISO},
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@ -366,7 +413,10 @@ const PinMap PinMap_SPI_MISO[] = {
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const PinMap PinMap_SPI_SCLK[] = {
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{PA_2, SPI_0, SYS_GPA_MFPL_PA2MFP_SPI0_CLK},
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{NU_PINNAME_BIND(PA_2, SPI_0), SPI_0, SYS_GPA_MFPL_PA2MFP_SPI0_CLK},
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{PA_2, SPI_1, SYS_GPA_MFPL_PA2MFP_SPI1_CLK},
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{NU_PINNAME_BIND(PA_2, SPI_1), SPI_1, SYS_GPA_MFPL_PA2MFP_SPI1_CLK},
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{PA_7, SPI_2, SYS_GPA_MFPL_PA7MFP_SPI2_CLK},
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{PA_10, SPI_3, SYS_GPA_MFPH_PA10MFP_SPI3_CLK},
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{PA_13, SPI_3, SYS_GPA_MFPH_PA13MFP_SPI3_CLK},
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@ -386,15 +436,21 @@ const PinMap PinMap_SPI_SCLK[] = {
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{PG_3, SPI_3, SYS_GPG_MFPL_PG3MFP_SPI3_CLK},
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{PG_6, SPI_4, SYS_GPG_MFPL_PG6MFP_SPI4_CLK},
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{PH_6, SPI_2, SYS_GPH_MFPL_PH6MFP_SPI2_CLK},
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{PH_8, SPI_0, SYS_GPH_MFPH_PH8MFP_SPI0_CLK},
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{NU_PINNAME_BIND(PH_8, SPI_0), SPI_0, SYS_GPH_MFPH_PH8MFP_SPI0_CLK},
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{PH_8, SPI_2, SYS_GPH_MFPH_PH8MFP_SPI2_CLK},
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{NU_PINNAME_BIND(PH_8, SPI_2), SPI_2, SYS_GPH_MFPH_PH8MFP_SPI2_CLK},
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{NC, NC, 0}
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};
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const PinMap PinMap_SPI_SSEL[] = {
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{PA_3, SPI_0, SYS_GPA_MFPL_PA3MFP_SPI0_SS},
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{NU_PINNAME_BIND(PA_3, SPI_0), SPI_0, SYS_GPA_MFPL_PA3MFP_SPI0_SS},
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{PA_3, SPI_1, SYS_GPA_MFPL_PA3MFP_SPI1_SS},
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{NU_PINNAME_BIND(PA_3, SPI_1), SPI_1, SYS_GPA_MFPL_PA3MFP_SPI1_SS},
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{PA_6, SPI_2, SYS_GPA_MFPL_PA6MFP_SPI2_SS},
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{PA_11, SPI_3, SYS_GPA_MFPH_PA11MFP_SPI3_SS},
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{PA_12, SPI_3, SYS_GPA_MFPH_PA12MFP_SPI3_SS},
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@ -412,8 +468,11 @@ const PinMap PinMap_SPI_SSEL[] = {
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{PG_2, SPI_3, SYS_GPG_MFPL_PG2MFP_SPI3_SS},
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{PG_5, SPI_4, SYS_GPG_MFPL_PG5MFP_SPI4_SS},
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{PH_7, SPI_2, SYS_GPH_MFPL_PH7MFP_SPI2_SS},
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{PH_9, SPI_0, SYS_GPH_MFPH_PH9MFP_SPI0_SS},
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{NU_PINNAME_BIND(PH_9, SPI_0), SPI_0, SYS_GPH_MFPH_PH9MFP_SPI0_SS},
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{PH_9, SPI_2, SYS_GPH_MFPH_PH9MFP_SPI2_SS},
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{NU_PINNAME_BIND(PH_9, SPI_2), SPI_2, SYS_GPH_MFPH_PH9MFP_SPI2_SS},
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{NC, NC, 0}
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};
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@ -36,7 +36,7 @@ extern "C" {
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#define NU_PIN_BIND(PINNAME) (((unsigned int)(PINNAME) & NU_PIN_BIND_Msk) >> NU_PIN_BIND_Pos)
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#define NU_PIN_MODINDEX(PINNAME) (((unsigned int)(PINNAME) & NU_PIN_MODINDEX_Msk) >> NU_PIN_MODINDEX_Pos)
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#define NU_PINNAME(PORT, PIN) ((((unsigned int) (PORT)) << (NU_PINPORT_Pos)) | (((unsigned int) (PIN)) << NU_PININDEX_Pos))
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#define NU_PINNAME_BIND(PINNAME, modname) NU_PINNAME_BIND_(NU_PINPORT(PINNAME), NU_PININDEX(PINNAME), modname)
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#define NU_PINNAME_BIND(PINNAME, modname) ((PinName) NU_PINNAME_BIND_(NU_PINPORT(PINNAME), NU_PININDEX(PINNAME), modname))
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#define NU_PINNAME_BIND_(PORT, PIN, modname) ((((unsigned int)(PORT)) << NU_PINPORT_Pos) | (((unsigned int)(PIN)) << NU_PININDEX_Pos) | (NU_MODINDEX(modname) << NU_PIN_MODINDEX_Pos) | NU_PIN_BIND_Msk)
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#define NU_PORT_BASE(PORT) ((GPIO_T *)(((uint32_t) GPIOA_BASE) + 0x40 * PORT))
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