mirror of https://github.com/ARMmbed/mbed-os.git
[M487] Support USB device/host
ccli8
parent
99a8467b70
commit
cacc444b73
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@ -57,6 +57,8 @@ typedef enum {
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#include "USBEndpoints_NUC472.h"
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#elif defined(TARGET_NUMAKER_PFM_M453)
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#include "USBEndpoints_M453.h"
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#elif defined(TARGET_M480)
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#include "USBEndpoints_M480.h"
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#else
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#error "Unknown target type"
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#endif
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@ -132,7 +132,7 @@ private:
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bool (USBHAL::*epCallback[8 - 2])(void);
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#elif defined(TARGET_STM)
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PCD_HandleTypeDef hpcd;
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#elif defined(TARGET_NUMAKER_PFM_NUC472)
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#elif defined(TARGET_NUMAKER_PFM_NUC472) || defined(TARGET_M480)
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bool (USBHAL::*epCallback[14 - 2])(void);
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#else
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bool (USBHAL::*epCallback[32 - 2])(void);
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@ -0,0 +1,93 @@
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#if (MBED_CONF_TARGET_USB_DEVICE_HSUSBD == 0)
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#define NU_MAX_EPX_BUFSIZE 4096
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#else
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#define NU_MAX_EPX_BUFSIZE 4096
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#endif
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#define NU_EP2EPL(ep) ((ep) >> 1)
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#if (MBED_CONF_TARGET_USB_DEVICE_HSUSBD == 0)
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#define NU_EP2EPH(ep) (((ep) >> 1) + 1)
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#define NU_EPL2EPH(ep) ((ep) + 1)
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#define NU_EPH2EPL(ep) ((ep) - 1)
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#define NUMBER_OF_PHYSICAL_ENDPOINTS 8
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#else
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#define NU_EP2EPH(ep) (((ep) >> 1) - 1)
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#define NU_EPX2EP(ep) ((ep == CEP) ? EP0OUT : ((ep) - EPA + EP1OUT))
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#define NU_EPL2EPH(ep) ((ep) - 1)
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#define NU_EPH2EPL(ep) ((ep) + 1)
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#define NUMBER_OF_PHYSICAL_ENDPOINTS 12
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#endif
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#define NU_EP_DIR_Pos 0
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#define NU_EP_DIR_Msk (1 << NU_EP_DIR_Pos)
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#define NU_EP_DIR_OUT 0
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#define NU_EP_DIR_IN 1
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#define NU_EP_TYPE(ep) (((ep) & NU_EP_TYPE_Msk) >> NU_EP_TYPE_Pos)
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#define NU_EP_NUM(ep) (((ep) & NU_EP_NUM_Msk) >> NU_EP_NUM_Pos)
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#define NU_EP_DIR(ep) (((ep) & NU_EP_DIR_Msk) >> NU_EP_DIR_Pos)
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#define NU_EP_NUM_DIR(ep) ((NU_EP_NUM(ep) << 1) | NU_EP_DIR(ep))
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#define EP0OUT (0)
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#define EP0IN (1)
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#define EP1OUT (2)
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#define EP1IN (3)
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#define EP2OUT (4)
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#define EP2IN (5)
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#define EP3OUT (6)
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#define EP3IN (7)
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#define EP4OUT (8)
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#define EP4IN (9)
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#define EP5OUT (10)
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#define EP5IN (11)
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#define EP6OUT (12)
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#define EP6IN (13)
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/* Maximum Packet sizes */
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#define MAX_PACKET_SIZE_EP0 64
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#define MAX_PACKET_SIZE_EP1 64
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#define MAX_PACKET_SIZE_EP2 64
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#define MAX_PACKET_SIZE_EP3 0x60
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#define MAX_PACKET_SIZE_EP4 64
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#define MAX_PACKET_SIZE_EP5 64
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#define MAX_PACKET_SIZE_EP6 64
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#define MAX_PACKET_SIZE_EP7 64
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#if (MBED_CONF_TARGET_USB_DEVICE_HSUSBD == 1)
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#define MAX_PACKET_SIZE_EP8 64
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#define MAX_PACKET_SIZE_EP9 64
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#define MAX_PACKET_SIZE_EP10 64
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#define MAX_PACKET_SIZE_EP11 64
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#endif
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/* Generic endpoints - intended to be portable accross devices */
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/* and be suitable for simple USB devices. */
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/* Bulk endpoints */
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#define EPBULK_OUT EP5OUT
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#define EPBULK_IN EP6IN
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#define EPBULK_OUT_callback EP5_OUT_callback
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#define EPBULK_IN_callback EP6_IN_callback
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/* Interrupt endpoints */
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#define EPINT_OUT EP1OUT
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#define EPINT_IN EP2IN
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#define EPINT_OUT_callback EP1_OUT_callback
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#define EPINT_IN_callback EP2_IN_callback
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/* Isochronous endpoints */
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#define EPISO_OUT EP3OUT
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#define EPISO_IN EP4IN
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#define EPISO_OUT_callback EP3_OUT_callback
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#define EPISO_IN_callback EP4_IN_callback
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#define MAX_PACKET_SIZE_EPBULK 64
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#define MAX_PACKET_SIZE_EPINT 64
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#define MAX_PACKET_SIZE_EPISO 1023
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#if (MBED_CONF_TARGET_USB_DEVICE_HSUSBD == 1)
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#define HSUSBD_GET_EP_MAX_PAYLOAD(ep) HSUSBD->EP[ep].EPMPS
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#define HSUSBD_GET_EP_DATA_COUNT(ep) (HSUSBD->EP[ep].EPDATCNT & 0xFFFFF)
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#define HSUSBD_SET_EP_SHORT_PACKET(ep) HSUSBD->EP[ep].EPRSPCTL = ((HSUSBD->EP[ep].EPRSPCTL & 0x10) | 0x40)
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#define HSUSBD_GET_EP_INT_EN(ep) HSUSBD->EP[ep].EPINTEN
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#endif
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File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,427 @@
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/* mbed Microcontroller Library
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* Copyright (c) 2015-2016 Nuvoton
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#if defined(TARGET_M480)
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#include "mbed.h"
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#include "USBHALHost.h"
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#include "dbg.h"
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#include "pinmap.h"
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#define HCCA_SIZE sizeof(HCCA)
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#define ED_SIZE sizeof(HCED)
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#define TD_SIZE sizeof(HCTD)
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#define TOTAL_SIZE (HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE) + (MAX_TD*TD_SIZE))
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#ifndef USBH_HcRhDescriptorA_POTPGT_Pos
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#define USBH_HcRhDescriptorA_POTPGT_Pos (24)
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#endif
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#ifndef USBH_HcRhDescriptorA_POTPGT_Msk
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#define USBH_HcRhDescriptorA_POTPGT_Msk (0xfful << USBH_HcRhDescriptorA_POTPGT_Pos)
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#endif
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static volatile MBED_ALIGN(256) uint8_t usb_buf[TOTAL_SIZE]; // 256 bytes aligned!
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USBHALHost * USBHALHost::instHost;
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USBHALHost::USBHALHost()
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{
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instHost = this;
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memInit();
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memset((void*)usb_hcca, 0, HCCA_SIZE);
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for (int i = 0; i < MAX_ENDPOINT; i++) {
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edBufAlloc[i] = false;
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}
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for (int i = 0; i < MAX_TD; i++) {
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tdBufAlloc[i] = false;
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}
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}
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void USBHALHost::init()
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{
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// Unlock protected registers
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SYS_UnlockReg();
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/* Enable IP clock */
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CLK->AHBCLK |= CLK_AHBCLK_USBHCKEN_Msk | (1 << 4) | CLK_AHBCLK_HSUSBDCKEN_Msk;
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/* USB Host desired input clock is 48 MHz. Set as PLL divided by 4 (192/4 = 48) */
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CLK->CLKDIV0 = (CLK->CLKDIV0 & ~CLK_CLKDIV0_USBDIV_Msk) | (3 << CLK_CLKDIV0_USBDIV_Pos);
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/* Enable USBD and OTG clock */
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CLK->APBCLK0 |= CLK_APBCLK0_USBDCKEN_Msk | CLK_APBCLK0_OTGCKEN_Msk;
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/* Configure USB to USB Host role */
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SYS->USBPHY = SYS_USBPHY_HSUSBEN_Msk | SYS_USBPHY_HSUSBROLE_STD_USBH | SYS_USBPHY_USBEN_Msk | SYS_USBPHY_SBO_Msk | SYS_USBPHY_USBROLE_STD_USBH;
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wait_us(20);
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SYS->USBPHY |= SYS_USBPHY_HSUSBACT_Msk;
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/*---------------------------------------------------------------------------------------------------------*/
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/* Init I/O Multi-function */
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/*---------------------------------------------------------------------------------------------------------*/
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/* USB_VBUS_EN (USB 1.1 VBUS power enable pin) multi-function pin - PB.15 */
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pin_function(PB_15, SYS_GPB_MFPH_PB15MFP_USB_VBUS_EN);
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/* USB_VBUS_ST (USB 1.1 over-current detect pin) multi-function pin - PC.14 */
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pin_function(PC_14, SYS_GPC_MFPH_PC14MFP_USB_VBUS_ST);
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/* HSUSB_VBUS_EN (USB 2.0 VBUS power enable pin) multi-function pin - PB.10 */
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pin_function(PB_10, SYS_GPB_MFPH_PB10MFP_HSUSB_VBUS_EN);
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/* HSUSB_VBUS_ST (USB 2.0 over-current detect pin) multi-function pin - PB.11 */
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pin_function(PB_11, SYS_GPB_MFPH_PB11MFP_HSUSB_VBUS_ST);
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/* Configure pins for USB 1.1 port: VBUS/D+/D-/ID */
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pin_function(PA_12, SYS_GPA_MFPH_PA12MFP_USB_VBUS);
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pin_function(PA_13, SYS_GPA_MFPH_PA13MFP_USB_D_N);
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pin_function(PA_14, SYS_GPA_MFPH_PA14MFP_USB_D_P);
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pin_function(PA_15, (int) SYS_GPA_MFPH_PA15MFP_USB_OTG_ID);
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SYS_LockReg();
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HSUSBH->USBPCR0 = 0x160; /* enable PHY 0 */
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HSUSBH->USBPCR1 = 0x520; /* enable PHY 1 */
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// Overcurrent flag is low active
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USBH->HcMiscControl |= USBH_HcMiscControl_OCAL_Msk;
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// Disable HC interrupts
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USBH->HcInterruptDisable = OR_INTR_ENABLE_MIE;
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// Needed by some controllers
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USBH->HcControl = 0;
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// Software reset
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USBH->HcCommandStatus = OR_CMD_STATUS_HCR;
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while (USBH->HcCommandStatus & OR_CMD_STATUS_HCR);
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// Put HC in reset state
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USBH->HcControl = (USBH->HcControl & ~OR_CONTROL_HCFS) | OR_CONTROL_HC_RSET;
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// HCD must wait 10ms for HC reset complete
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wait_ms(100);
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USBH->HcControlHeadED = 0; // Initialize Control ED list head to 0
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USBH->HcBulkHeadED = 0; // Initialize Bulk ED list head to 0
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USBH->HcHCCA = (uint32_t) usb_hcca;
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USBH->HcFmInterval = DEFAULT_FMINTERVAL; // Frame interval = 12000 - 1
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// MPS = 10,104
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USBH->HcPeriodicStart = FI * 90 / 100; // 90% of frame interval
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USBH->HcLSThreshold = 0x628; // Low speed threshold
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// Put HC in operational state
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USBH->HcControl = (USBH->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER;
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// FIXME
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USBH->HcRhDescriptorA = USBH->HcRhDescriptorA & ~(USBH_HcRhDescriptorA_NOCP_Msk | USBH_HcRhDescriptorA_OCPM_Msk | USBH_HcRhDescriptorA_PSM_Msk);
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// Issue SetGlobalPower command
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USBH->HcRhStatus = USBH_HcRhStatus_LPSC_Msk;
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// Power On To Power Good Time, in 2 ms units
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wait_ms(((USBH->HcRhDescriptorA & USBH_HcRhDescriptorA_POTPGT_Msk) >> USBH_HcRhDescriptorA_POTPGT_Pos) * 2);
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// Clear Interrrupt Status
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USBH->HcInterruptStatus |= USBH->HcInterruptStatus;
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// Enable interrupts we care about
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USBH->HcInterruptEnable = OR_INTR_ENABLE_MIE | OR_INTR_ENABLE_WDH | OR_INTR_ENABLE_RHSC;
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NVIC_SetVector(USBH_IRQn, (uint32_t)(_usbisr));
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NVIC_EnableIRQ(USBH_IRQn);
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// Check for any connected devices
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if (USBH->HcRhPortStatus[0] & OR_RH_PORT_CCS) {
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// Device connected
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wait_ms(150);
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deviceConnected(0, 1, USBH->HcRhPortStatus[0] & OR_RH_PORT_LSDA);
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}
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// Check for any connected devices
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if (USBH->HcRhPortStatus[1] & OR_RH_PORT_CCS) {
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// Device connected
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wait_ms(150);
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deviceConnected(0, 2, USBH->HcRhPortStatus[1] & OR_RH_PORT_LSDA);
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}
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}
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uint32_t USBHALHost::controlHeadED()
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{
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return USBH->HcControlHeadED;
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}
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uint32_t USBHALHost::bulkHeadED()
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{
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return USBH->HcBulkHeadED;
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}
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uint32_t USBHALHost::interruptHeadED()
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{
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// FIXME: Only support one INT ED?
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return usb_hcca->IntTable[0];
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}
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void USBHALHost::updateBulkHeadED(uint32_t addr)
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{
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USBH->HcBulkHeadED = addr;
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}
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void USBHALHost::updateControlHeadED(uint32_t addr)
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{
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USBH->HcControlHeadED = addr;
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}
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void USBHALHost::updateInterruptHeadED(uint32_t addr)
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{
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// FIXME: Only support one INT ED?
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usb_hcca->IntTable[0] = addr;
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}
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void USBHALHost::enableList(ENDPOINT_TYPE type)
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{
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switch(type) {
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case CONTROL_ENDPOINT:
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USBH->HcCommandStatus = OR_CMD_STATUS_CLF;
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USBH->HcControl |= OR_CONTROL_CLE;
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break;
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case ISOCHRONOUS_ENDPOINT:
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// FIXME
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break;
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case BULK_ENDPOINT:
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USBH->HcCommandStatus = OR_CMD_STATUS_BLF;
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USBH->HcControl |= OR_CONTROL_BLE;
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break;
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case INTERRUPT_ENDPOINT:
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USBH->HcControl |= OR_CONTROL_PLE;
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break;
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}
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}
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bool USBHALHost::disableList(ENDPOINT_TYPE type)
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{
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switch(type) {
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case CONTROL_ENDPOINT:
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if(USBH->HcControl & OR_CONTROL_CLE) {
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USBH->HcControl &= ~OR_CONTROL_CLE;
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return true;
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}
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return false;
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case ISOCHRONOUS_ENDPOINT:
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// FIXME
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return false;
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case BULK_ENDPOINT:
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if(USBH->HcControl & OR_CONTROL_BLE) {
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USBH->HcControl &= ~OR_CONTROL_BLE;
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return true;
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}
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return false;
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case INTERRUPT_ENDPOINT:
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if(USBH->HcControl & OR_CONTROL_PLE) {
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USBH->HcControl &= ~OR_CONTROL_PLE;
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return true;
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}
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return false;
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}
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return false;
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}
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void USBHALHost::memInit()
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{
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usb_hcca = (volatile HCCA *)usb_buf;
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usb_edBuf = usb_buf + HCCA_SIZE;
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usb_tdBuf = usb_buf + HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE);
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}
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volatile uint8_t * USBHALHost::getED()
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{
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for (int i = 0; i < MAX_ENDPOINT; i++) {
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if ( !edBufAlloc[i] ) {
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edBufAlloc[i] = true;
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return (volatile uint8_t *)(usb_edBuf + i*ED_SIZE);
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}
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}
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perror("Could not allocate ED\r\n");
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return NULL; //Could not alloc ED
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}
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volatile uint8_t * USBHALHost::getTD()
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{
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int i;
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for (i = 0; i < MAX_TD; i++) {
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if ( !tdBufAlloc[i] ) {
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tdBufAlloc[i] = true;
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return (volatile uint8_t *)(usb_tdBuf + i*TD_SIZE);
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}
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}
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perror("Could not allocate TD\r\n");
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return NULL; //Could not alloc TD
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}
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void USBHALHost::freeED(volatile uint8_t * ed)
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{
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int i;
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i = (ed - usb_edBuf) / ED_SIZE;
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edBufAlloc[i] = false;
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}
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void USBHALHost::freeTD(volatile uint8_t * td)
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{
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int i;
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i = (td - usb_tdBuf) / TD_SIZE;
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tdBufAlloc[i] = false;
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}
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void USBHALHost::resetRootHub()
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{
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// Reset port1
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USBH->HcRhPortStatus[0] = OR_RH_PORT_PRS;
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while (USBH->HcRhPortStatus[0] & OR_RH_PORT_PRS);
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USBH->HcRhPortStatus[0] = OR_RH_PORT_PRSC;
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USBH->HcRhPortStatus[1] = OR_RH_PORT_PRS;
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while (USBH->HcRhPortStatus[1] & OR_RH_PORT_PRS);
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USBH->HcRhPortStatus[1] = OR_RH_PORT_PRSC;
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}
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void USBHALHost::_usbisr(void)
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{
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if (instHost) {
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instHost->UsbIrqhandler();
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}
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}
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void USBHALHost::UsbIrqhandler()
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{
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uint32_t ints = USBH->HcInterruptStatus;
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|
||||
// Root hub status change interrupt
|
||||
if (ints & OR_INTR_STATUS_RHSC) {
|
||||
uint32_t ints_roothub = USBH->HcRhStatus;
|
||||
uint32_t ints_port1 = USBH->HcRhPortStatus[0];
|
||||
uint32_t ints_port2 = USBH->HcRhPortStatus[1];
|
||||
|
||||
// Port1: ConnectStatusChange
|
||||
if (ints_port1 & OR_RH_PORT_CSC) {
|
||||
if (ints_roothub & OR_RH_STATUS_DRWE) {
|
||||
// When DRWE is on, Connect Status Change means a remote wakeup event.
|
||||
} else {
|
||||
if (ints_port1 & OR_RH_PORT_CCS) {
|
||||
// Root device connected
|
||||
|
||||
// wait 150ms to avoid bounce
|
||||
wait_ms(150);
|
||||
|
||||
//Hub 0 (root hub), Port 1 (count starts at 1), Low or High speed
|
||||
deviceConnected(0, 1, ints_port1 & OR_RH_PORT_LSDA);
|
||||
} else {
|
||||
// Root device disconnected
|
||||
|
||||
if (!(ints & OR_INTR_STATUS_WDH)) {
|
||||
usb_hcca->DoneHead = 0;
|
||||
}
|
||||
|
||||
// wait 200ms to avoid bounce
|
||||
wait_ms(200);
|
||||
|
||||
deviceDisconnected(0, 1, NULL, usb_hcca->DoneHead & 0xFFFFFFFE);
|
||||
|
||||
if (ints & OR_INTR_STATUS_WDH) {
|
||||
usb_hcca->DoneHead = 0;
|
||||
USBH->HcInterruptStatus = OR_INTR_STATUS_WDH;
|
||||
}
|
||||
}
|
||||
}
|
||||
USBH->HcRhPortStatus[0] = OR_RH_PORT_CSC;
|
||||
}
|
||||
|
||||
// Port1: ConnectStatusChange
|
||||
if (ints_port2 & OR_RH_PORT_CSC) {
|
||||
if (ints_roothub & OR_RH_STATUS_DRWE) {
|
||||
// When DRWE is on, Connect Status Change means a remote wakeup event.
|
||||
} else {
|
||||
if (ints_port2 & OR_RH_PORT_CCS) {
|
||||
// Root device connected
|
||||
|
||||
// wait 150ms to avoid bounce
|
||||
wait_ms(150);
|
||||
|
||||
//Hub 0 (root hub), Port 2 (count starts at 2), Low or High speed
|
||||
deviceConnected(0, 2, ints_port2 & OR_RH_PORT_LSDA);
|
||||
} else {
|
||||
// Root device disconnected
|
||||
|
||||
if (!(ints & OR_INTR_STATUS_WDH)) {
|
||||
usb_hcca->DoneHead = 0;
|
||||
}
|
||||
|
||||
// wait 200ms to avoid bounce
|
||||
wait_ms(200);
|
||||
|
||||
deviceDisconnected(0, 2, NULL, usb_hcca->DoneHead & 0xFFFFFFFE);
|
||||
|
||||
if (ints & OR_INTR_STATUS_WDH) {
|
||||
usb_hcca->DoneHead = 0;
|
||||
USBH->HcInterruptStatus = OR_INTR_STATUS_WDH;
|
||||
}
|
||||
}
|
||||
}
|
||||
USBH->HcRhPortStatus[1] = OR_RH_PORT_CSC;
|
||||
}
|
||||
|
||||
|
||||
// Port1: Reset completed
|
||||
if (ints_port1 & OR_RH_PORT_PRSC) {
|
||||
USBH->HcRhPortStatus[0] = OR_RH_PORT_PRSC;
|
||||
}
|
||||
// Port1: PortEnableStatusChange
|
||||
if (ints_port1 & OR_RH_PORT_PESC) {
|
||||
USBH->HcRhPortStatus[0] = OR_RH_PORT_PESC;
|
||||
}
|
||||
|
||||
// Port2: PortOverCurrentIndicatorChange
|
||||
if (ints_port2 & OR_RH_PORT_OCIC) {
|
||||
USBH->HcRhPortStatus[1] = OR_RH_PORT_OCIC;
|
||||
}
|
||||
|
||||
// Port2: Reset completed
|
||||
if (ints_port2 & OR_RH_PORT_PRSC) {
|
||||
USBH->HcRhPortStatus[1] = OR_RH_PORT_PRSC;
|
||||
}
|
||||
// Port2: PortEnableStatusChange
|
||||
if (ints_port2 & OR_RH_PORT_PESC) {
|
||||
USBH->HcRhPortStatus[1] = OR_RH_PORT_PESC;
|
||||
}
|
||||
USBH->HcInterruptStatus = OR_INTR_STATUS_RHSC;
|
||||
}
|
||||
|
||||
// Writeback Done Head interrupt
|
||||
if (ints & OR_INTR_STATUS_WDH) {
|
||||
transferCompleted(usb_hcca->DoneHead & 0xFFFFFFFE);
|
||||
USBH->HcInterruptStatus = OR_INTR_STATUS_WDH;
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
#endif
|
||||
|
|
@ -294,7 +294,7 @@ void HSUSBD_StandardRequest(void)
|
|||
if ((gUsbCmd.bmRequestType & 0x80ul) == 0x80ul) { /* request data transfer direction */
|
||||
/* Device to host */
|
||||
switch (gUsbCmd.bRequest) {
|
||||
case GET_CONFIGURATION: {
|
||||
case USBD_GET_CONFIGURATION: {
|
||||
/* Return current configuration setting */
|
||||
HSUSBD_PrepareCtrlIn((uint8_t *)&g_hsusbd_UsbConfig, 1ul);
|
||||
|
||||
|
|
@ -302,14 +302,14 @@ void HSUSBD_StandardRequest(void)
|
|||
HSUSBD_ENABLE_CEP_INT(HSUSBD_CEPINTEN_INTKIEN_Msk);
|
||||
break;
|
||||
}
|
||||
case GET_DESCRIPTOR: {
|
||||
case USBD_GET_DESCRIPTOR: {
|
||||
if (!HSUSBD_GetDescriptor()) {
|
||||
HSUSBD_CLR_CEP_INT_FLAG(HSUSBD_CEPINTSTS_INTKIF_Msk);
|
||||
HSUSBD_ENABLE_CEP_INT(HSUSBD_CEPINTEN_INTKIEN_Msk);
|
||||
}
|
||||
break;
|
||||
}
|
||||
case GET_INTERFACE: {
|
||||
case USBD_GET_INTERFACE: {
|
||||
/* Return current interface setting */
|
||||
HSUSBD_PrepareCtrlIn((uint8_t *)&g_hsusbd_UsbAltInterface, 1ul);
|
||||
|
||||
|
|
@ -317,7 +317,7 @@ void HSUSBD_StandardRequest(void)
|
|||
HSUSBD_ENABLE_CEP_INT(HSUSBD_CEPINTEN_INTKIEN_Msk);
|
||||
break;
|
||||
}
|
||||
case GET_STATUS: {
|
||||
case USBD_GET_STATUS: {
|
||||
/* Device */
|
||||
if (gUsbCmd.bmRequestType == 0x80ul) {
|
||||
if ((g_hsusbd_sInfo->gu8ConfigDesc[7] & 0x40ul) == 0x40ul) {
|
||||
|
|
@ -350,7 +350,7 @@ void HSUSBD_StandardRequest(void)
|
|||
} else {
|
||||
/* Host to device */
|
||||
switch (gUsbCmd.bRequest) {
|
||||
case CLEAR_FEATURE: {
|
||||
case USBD_CLEAR_FEATURE: {
|
||||
if((gUsbCmd.wValue & 0xfful) == FEATURE_ENDPOINT_HALT) {
|
||||
|
||||
uint32_t epNum, i;
|
||||
|
|
@ -370,7 +370,7 @@ void HSUSBD_StandardRequest(void)
|
|||
HSUSBD_ENABLE_CEP_INT(HSUSBD_CEPINTEN_STSDONEIEN_Msk);
|
||||
break;
|
||||
}
|
||||
case SET_ADDRESS: {
|
||||
case USBD_SET_ADDRESS: {
|
||||
g_hsusbd_UsbAddr = (uint8_t)gUsbCmd.wValue;
|
||||
/* Status Stage */
|
||||
HSUSBD_CLR_CEP_INT_FLAG(HSUSBD_CEPINTSTS_STSDONEIF_Msk);
|
||||
|
|
@ -378,7 +378,7 @@ void HSUSBD_StandardRequest(void)
|
|||
HSUSBD_ENABLE_CEP_INT(HSUSBD_CEPINTEN_STSDONEIEN_Msk);
|
||||
break;
|
||||
}
|
||||
case SET_CONFIGURATION: {
|
||||
case USBD_SET_CONFIGURATION: {
|
||||
g_hsusbd_UsbConfig = (uint8_t)gUsbCmd.wValue;
|
||||
g_hsusbd_Configured = (uint8_t)1ul;
|
||||
/* Status stage */
|
||||
|
|
@ -387,7 +387,7 @@ void HSUSBD_StandardRequest(void)
|
|||
HSUSBD_ENABLE_CEP_INT(HSUSBD_CEPINTEN_STSDONEIEN_Msk);
|
||||
break;
|
||||
}
|
||||
case SET_FEATURE: {
|
||||
case USBD_SET_FEATURE: {
|
||||
if ((gUsbCmd.wValue & 0x3ul) == 2ul) { /* TEST_MODE */
|
||||
g_hsusbd_EnableTestMode = (uint8_t)1ul;
|
||||
g_hsusbd_TestSelector = (uint8_t)(gUsbCmd.wIndex >> 8);
|
||||
|
|
@ -402,7 +402,7 @@ void HSUSBD_StandardRequest(void)
|
|||
HSUSBD_ENABLE_CEP_INT(HSUSBD_CEPINTEN_STSDONEIEN_Msk);
|
||||
break;
|
||||
}
|
||||
case SET_INTERFACE: {
|
||||
case USBD_SET_INTERFACE: {
|
||||
g_hsusbd_UsbAltInterface = (uint8_t)gUsbCmd.wValue;
|
||||
if (g_hsusbd_pfnSetInterface != NULL) {
|
||||
g_hsusbd_pfnSetInterface((uint32_t)g_hsusbd_UsbAltInterface);
|
||||
|
|
@ -442,11 +442,11 @@ void HSUSBD_StandardRequest(void)
|
|||
void HSUSBD_UpdateDeviceState(void)
|
||||
{
|
||||
switch (gUsbCmd.bRequest) {
|
||||
case SET_ADDRESS: {
|
||||
case USBD_SET_ADDRESS: {
|
||||
HSUSBD_SET_ADDR(g_hsusbd_UsbAddr);
|
||||
break;
|
||||
}
|
||||
case SET_CONFIGURATION: {
|
||||
case USBD_SET_CONFIGURATION: {
|
||||
if (g_hsusbd_UsbConfig == 0ul) {
|
||||
uint32_t volatile i;
|
||||
/* Reset PID DATA0 */
|
||||
|
|
@ -458,7 +458,7 @@ void HSUSBD_UpdateDeviceState(void)
|
|||
}
|
||||
break;
|
||||
}
|
||||
case SET_FEATURE: {
|
||||
case USBD_SET_FEATURE: {
|
||||
if(gUsbCmd.wValue == FEATURE_ENDPOINT_HALT) {
|
||||
uint32_t idx;
|
||||
idx = (uint32_t)(gUsbCmd.wIndex & 0xFul);
|
||||
|
|
@ -479,7 +479,7 @@ void HSUSBD_UpdateDeviceState(void)
|
|||
}
|
||||
break;
|
||||
}
|
||||
case CLEAR_FEATURE: {
|
||||
case USBD_CLEAR_FEATURE: {
|
||||
if(gUsbCmd.wValue == FEATURE_ENDPOINT_HALT) {
|
||||
uint32_t idx;
|
||||
idx = (uint32_t)(gUsbCmd.wIndex & 0xFul);
|
||||
|
|
|
|||
|
|
@ -117,7 +117,10 @@ extern "C"
|
|||
#define SYS_USBPHY_USBROLE_STD_USBH (0x1UL << SYS_USBPHY_USBROLE_Pos) /*!< Standard USB host \hideinitializer */
|
||||
#define SYS_USBPHY_USBROLE_ID_DEPH (0x2UL << SYS_USBPHY_USBROLE_Pos) /*!< ID dependent device \hideinitializer */
|
||||
#define SYS_USBPHY_USBROLE_ON_THE_GO (0x3UL << SYS_USBPHY_USBROLE_Pos) /*!< On-The-Go device \hideinitializer */
|
||||
|
||||
#define SYS_USBPHY_HSUSBROLE_STD_USBD (0x0UL << SYS_USBPHY_HSUSBROLE_Pos) /*!< Standard USB device \hideinitializer */
|
||||
#define SYS_USBPHY_HSUSBROLE_STD_USBH (0x1UL << SYS_USBPHY_HSUSBROLE_Pos) /*!< Standard USB host \hideinitializer */
|
||||
#define SYS_USBPHY_HSUSBROLE_ID_DEPH (0x2UL << SYS_USBPHY_HSUSBROLE_Pos) /*!< ID dependent device \hideinitializer */
|
||||
#define SYS_USBPHY_HSUSBROLE_ON_THE_GO (0x3UL << SYS_USBPHY_HSUSBROLE_Pos) /*!< On-The-Go device \hideinitializer */
|
||||
|
||||
/*---------------------------------------------------------------------------------------------------------*/
|
||||
/* Multi-Function constant definitions. */
|
||||
|
|
|
|||
|
|
@ -267,7 +267,7 @@ void USBD_StandardRequest(void)
|
|||
if((g_usbd_SetupPacket[0] & 0x80ul) == 0x80ul) { /* request data transfer direction */
|
||||
/* Device to host */
|
||||
switch(g_usbd_SetupPacket[1]) {
|
||||
case GET_CONFIGURATION: {
|
||||
case USBD_GET_CONFIGURATION: {
|
||||
/* Return current configuration setting */
|
||||
/* Data stage */
|
||||
addr = USBD_BUF_BASE + USBD_GET_EP_BUF_ADDR(EP0);
|
||||
|
|
@ -278,12 +278,12 @@ void USBD_StandardRequest(void)
|
|||
USBD_PrepareCtrlOut(0, 0ul);
|
||||
break;
|
||||
}
|
||||
case GET_DESCRIPTOR: {
|
||||
case USBD_GET_DESCRIPTOR: {
|
||||
USBD_GetDescriptor();
|
||||
USBD_PrepareCtrlOut(0, 0ul); /* For status stage */
|
||||
break;
|
||||
}
|
||||
case GET_INTERFACE: {
|
||||
case USBD_GET_INTERFACE: {
|
||||
/* Return current interface setting */
|
||||
/* Data stage */
|
||||
addr = USBD_BUF_BASE + USBD_GET_EP_BUF_ADDR(EP0);
|
||||
|
|
@ -294,7 +294,7 @@ void USBD_StandardRequest(void)
|
|||
USBD_PrepareCtrlOut(0, 0ul);
|
||||
break;
|
||||
}
|
||||
case GET_STATUS: {
|
||||
case USBD_GET_STATUS: {
|
||||
/* Device */
|
||||
if(g_usbd_SetupPacket[0] == 0x80ul) {
|
||||
uint8_t u8Tmp;
|
||||
|
|
@ -342,7 +342,7 @@ void USBD_StandardRequest(void)
|
|||
} else {
|
||||
/* Host to device */
|
||||
switch(g_usbd_SetupPacket[1]) {
|
||||
case CLEAR_FEATURE: {
|
||||
case USBD_CLEAR_FEATURE: {
|
||||
if(g_usbd_SetupPacket[2] == FEATURE_ENDPOINT_HALT) {
|
||||
uint32_t epNum, i;
|
||||
|
||||
|
|
@ -363,7 +363,7 @@ void USBD_StandardRequest(void)
|
|||
USBD_SET_PAYLOAD_LEN(EP0, 0ul);
|
||||
break;
|
||||
}
|
||||
case SET_ADDRESS: {
|
||||
case USBD_SET_ADDRESS: {
|
||||
g_usbd_UsbAddr = g_usbd_SetupPacket[2];
|
||||
/* Status Stage */
|
||||
USBD_SET_DATA1(EP0);
|
||||
|
|
@ -371,7 +371,7 @@ void USBD_StandardRequest(void)
|
|||
|
||||
break;
|
||||
}
|
||||
case SET_CONFIGURATION: {
|
||||
case USBD_SET_CONFIGURATION: {
|
||||
g_usbd_UsbConfig = g_usbd_SetupPacket[2];
|
||||
|
||||
if(g_usbd_pfnSetConfigCallback) {
|
||||
|
|
@ -383,7 +383,7 @@ void USBD_StandardRequest(void)
|
|||
USBD_SET_PAYLOAD_LEN(EP0, 0ul);
|
||||
break;
|
||||
}
|
||||
case SET_FEATURE: {
|
||||
case USBD_SET_FEATURE: {
|
||||
if( (g_usbd_SetupPacket[0] & 0xFul) == 0ul ) { /* 0: device */
|
||||
if((g_usbd_SetupPacket[2] == 3ul) && (g_usbd_SetupPacket[3] == 0ul)) { /* 3: HNP enable */
|
||||
OTG->CTL |= (OTG_CTL_HNPREQEN_Msk | OTG_CTL_BUSREQ_Msk);
|
||||
|
|
@ -401,7 +401,7 @@ void USBD_StandardRequest(void)
|
|||
|
||||
break;
|
||||
}
|
||||
case SET_INTERFACE: {
|
||||
case USBD_SET_INTERFACE: {
|
||||
g_usbd_UsbAltInterface = g_usbd_SetupPacket[2];
|
||||
if(g_usbd_pfnSetInterface != NULL) {
|
||||
g_usbd_pfnSetInterface(g_usbd_UsbAltInterface);
|
||||
|
|
@ -491,7 +491,7 @@ void USBD_CtrlIn(void)
|
|||
}
|
||||
} else {
|
||||
/* In ACK for Set address */
|
||||
if((g_usbd_SetupPacket[0] == REQ_STANDARD) && (g_usbd_SetupPacket[1] == SET_ADDRESS)) {
|
||||
if((g_usbd_SetupPacket[0] == REQ_STANDARD) && (g_usbd_SetupPacket[1] == USBD_SET_ADDRESS)) {
|
||||
addr = USBD_GET_ADDR();
|
||||
if((addr != g_usbd_UsbAddr) && (addr == 0ul)) {
|
||||
USBD_SET_ADDR(g_usbd_UsbAddr);
|
||||
|
|
|
|||
|
|
@ -69,17 +69,17 @@ extern const S_USBD_INFO_T gsInfo;
|
|||
#define REQ_VENDOR 0x40ul
|
||||
|
||||
/* USB Standard Request */
|
||||
#define GET_STATUS 0x00ul
|
||||
#define CLEAR_FEATURE 0x01ul
|
||||
#define SET_FEATURE 0x03ul
|
||||
#define SET_ADDRESS 0x05ul
|
||||
#define GET_DESCRIPTOR 0x06ul
|
||||
#define SET_DESCRIPTOR 0x07ul
|
||||
#define GET_CONFIGURATION 0x08ul
|
||||
#define SET_CONFIGURATION 0x09ul
|
||||
#define GET_INTERFACE 0x0Aul
|
||||
#define SET_INTERFACE 0x0Bul
|
||||
#define SYNC_FRAME 0x0Cul
|
||||
#define USBD_GET_STATUS 0x00ul
|
||||
#define USBD_CLEAR_FEATURE 0x01ul
|
||||
#define USBD_SET_FEATURE 0x03ul
|
||||
#define USBD_SET_ADDRESS 0x05ul
|
||||
#define USBD_GET_DESCRIPTOR 0x06ul
|
||||
#define USBD_SET_DESCRIPTOR 0x07ul
|
||||
#define USBD_GET_CONFIGURATION 0x08ul
|
||||
#define USBD_SET_CONFIGURATION 0x09ul
|
||||
#define USBD_GET_INTERFACE 0x0Aul
|
||||
#define USBD_SET_INTERFACE 0x0Bul
|
||||
#define USBD_SYNC_FRAME 0x0Cul
|
||||
|
||||
/* USB Descriptor Type */
|
||||
#define DESC_DEVICE 0x01ul
|
||||
|
|
|
|||
Loading…
Reference in New Issue