mirror of https://github.com/ARMmbed/mbed-os.git
[M453] Support CAN
parent
6e64d730b5
commit
ae12346b8e
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@ -110,6 +110,10 @@ typedef enum {
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DMA_0 = (int) NU_MODNAME(PDMA_BASE, 0)
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} DMAName;
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typedef enum {
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CAN_0 = (int) NU_MODNAME(CAN0_BASE, 0)
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} CANName;
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#ifdef __cplusplus
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}
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#endif
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@ -359,3 +359,19 @@ const PinMap PinMap_SPI_SSEL[] = {
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{NC, NC, 0}
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};
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const PinMap PinMap_CAN_TD[] = {
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{PC_0, CAN_0, SYS_GPC_MFPL_PC0MFP_CAN0_TXD},
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{PA_1, CAN_0, SYS_GPA_MFPL_PA1MFP_CAN0_TXD},
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{PA_12, CAN_0, SYS_GPA_MFPH_PA12MFP_CAN0_TXD},
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{NC, NC, 0}
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};
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const PinMap PinMap_CAN_RD[] = {
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{PC_1, CAN_0, SYS_GPC_MFPL_PC1MFP_CAN0_RXD},
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{PA_0, CAN_0, SYS_GPA_MFPL_PA0MFP_CAN0_RXD},
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{PA_13, CAN_0, SYS_GPA_MFPH_PA13MFP_CAN0_RXD},
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{NC, NC, 0}
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};
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@ -65,6 +65,11 @@ extern const PinMap PinMap_SD_DAT1[];
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extern const PinMap PinMap_SD_DAT2[];
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extern const PinMap PinMap_SD_DAT3[];
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//*** CAN ***
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extern PinMap const PinMap_CAN_TD[];
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extern PinMap const PinMap_CAN_RD[];
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#ifdef __cplusplus
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}
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#endif
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@ -38,7 +38,7 @@
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#define DEVICE_SPI_ASYNCH 1
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#define DEVICE_SPISLAVE 1
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#define DEVICE_CAN 0
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//#define DEVICE_CAN 1
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#define DEVICE_RTC 1
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@ -123,6 +123,10 @@ struct sleep_s {
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int powerdown;
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};
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struct can_s {
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CANName can;
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char index;
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};
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#ifdef __cplusplus
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}
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#endif
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@ -0,0 +1,306 @@
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/* mbed Microcontroller Library
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* Copyright (c) 2015-2016 Nuvoton
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "can_api.h"
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#include "m451_gpio.h"
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#include "m451_can.h"
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#if DEVICE_CAN
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#include <string.h>
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#include "cmsis.h"
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#include "pinmap.h"
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#include "PeripheralPins.h"
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#include "nu_modutil.h"
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#include "nu_miscutil.h"
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#include "nu_bitutil.h"
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#include "critical.h"
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#define NU_CAN_DEBUG 0
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#define CAN_NUM 1
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static uint32_t can_irq_ids[CAN_NUM] = {0};
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static can_irq_handler can0_irq_handler;
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static const struct nu_modinit_s can_modinit_tab[] = {
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{CAN_0, CAN0_MODULE, 0, 0, CAN0_RST, CAN0_IRQn, NULL},
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{NC, 0, 0, 0, 0, (IRQn_Type) 0, NULL}
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};
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void can_init(can_t *obj, PinName rd, PinName td)
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{
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uint32_t can_td = (CANName)pinmap_peripheral(td, PinMap_CAN_TD);
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uint32_t can_rd = (CANName)pinmap_peripheral(rd, PinMap_CAN_RD);
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obj->can = (CANName)pinmap_merge(can_td, can_rd);
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MBED_ASSERT((int)obj->can != NC);
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const struct nu_modinit_s *modinit = get_modinit(obj->can, can_modinit_tab);
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MBED_ASSERT(modinit != NULL);
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MBED_ASSERT(modinit->modname == obj->can);
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// Reset this module
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SYS_ResetModule(modinit->rsetidx);
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// Enable IP clock
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CLK_EnableModuleClock(modinit->clkidx);
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obj->index = 0;
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pinmap_pinout(td, PinMap_CAN_TD);
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pinmap_pinout(rd, PinMap_CAN_RD);
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/* For M453 mbed Board Transmitter Setting (RS Pin) */
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GPIO_SetMode(PA, BIT0| BIT1, GPIO_MODE_OUTPUT);
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PA0 = 0x00;
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PA1 = 0x00;
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CAN_Open((CAN_T *)obj->can, 500000, CAN_NORMAL_MODE);
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can_filter(obj, 0, 0, CANStandard, 0);
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}
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void can_free(can_t *obj)
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{
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const struct nu_modinit_s *modinit = get_modinit(obj->can, can_modinit_tab);
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MBED_ASSERT(modinit != NULL);
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MBED_ASSERT(modinit->modname == obj->can);
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// Reset this module
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SYS_ResetModule(modinit->rsetidx);
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CLK_DisableModuleClock(modinit->clkidx);
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}
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int can_frequency(can_t *obj, int hz)
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{
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CAN_SetBaudRate((CAN_T *)obj->can, hz);
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return CAN_GetCANBitRate((CAN_T *)obj->can);
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}
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static void can_irq(CANName name, int id)
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{
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CAN_T *can = (CAN_T *)NU_MODBASE(name);
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uint32_t u8IIDRstatus;
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u8IIDRstatus = can->IIDR;
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if(u8IIDRstatus == 0x00008000) { /* Check Status Interrupt Flag (Error status Int and Status change Int) */
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/**************************/
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/* Status Change interrupt*/
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/**************************/
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if(can->STATUS & CAN_STATUS_RXOK_Msk) {
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can->STATUS &= ~CAN_STATUS_RXOK_Msk; /* Clear Rx Ok status*/
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can0_irq_handler(can_irq_ids[id], IRQ_RX);
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}
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if(can->STATUS & CAN_STATUS_TXOK_Msk) {
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can->STATUS &= ~CAN_STATUS_TXOK_Msk; /* Clear Tx Ok status*/
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can0_irq_handler(can_irq_ids[id], IRQ_TX);
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}
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/**************************/
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/* Error Status interrupt */
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/**************************/
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if(can->STATUS & CAN_STATUS_EWARN_Msk) {
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can0_irq_handler(can_irq_ids[id], IRQ_ERROR);
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}
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if(can->STATUS & CAN_STATUS_BOFF_Msk) {
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can0_irq_handler(can_irq_ids[id], IRQ_BUS);
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}
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} else if (u8IIDRstatus!=0) {
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//CAN_MsgInterrupt(can, u8IIDRstatus);
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can0_irq_handler(can_irq_ids[id], IRQ_OVERRUN);
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CAN_CLR_INT_PENDING_BIT(can, ((can->IIDR) -1)); /* Clear Interrupt Pending */
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} else if(can->WU_STATUS == 1) {
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can->WU_STATUS = 0; /* Write '0' to clear */
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can0_irq_handler(can_irq_ids[id], IRQ_WAKEUP);
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}
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}
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void CAN0_IRQHandler(void)
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{
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can_irq(CAN_0, 0);
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}
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void can_irq_init(can_t *obj, can_irq_handler handler, uint32_t id)
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{
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can0_irq_handler = handler;
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can_irq_ids[obj->index] = id;
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}
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void can_irq_free(can_t *obj)
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{
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CAN_DisableInt((CAN_T *)obj->can, (CAN_CON_IE_Msk|CAN_CON_SIE_Msk|CAN_CON_EIE_Msk));
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can_irq_ids[obj->index] = 0;
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NVIC_DisableIRQ(CAN0_IRQn);
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}
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void can_irq_set(can_t *obj, CanIrqType irq, uint32_t enable)
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{
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CAN_EnterInitMode((CAN_T*)obj->can, ((enable != 0 )? CAN_CON_IE_Msk :0) );
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// ((CAN_T *)(obj->can))->CON = (((CAN_T *)(obj->can))->CON ) | ((enable != 0 )? CAN_CON_IE_Msk :0);
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switch (irq)
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{
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case IRQ_ERROR:
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//case IRQ_PASSIVE:
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//case IRQ_ARB:
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((CAN_T *)(obj->can))->CON = (((CAN_T *)(obj->can))->CON) |CAN_CON_EIE_Msk;
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break;
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case IRQ_RX:
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case IRQ_TX:
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case IRQ_BUS:
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case IRQ_OVERRUN:
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case IRQ_WAKEUP:
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((CAN_T *)(obj->can))->CON = (((CAN_T *)(obj->can))->CON) |CAN_CON_SIE_Msk;
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break;
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default:
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break;
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}
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CAN_LeaveInitMode((CAN_T*)obj->can);
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NVIC_SetVector(CAN0_IRQn, (uint32_t)&CAN0_IRQHandler);
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NVIC_EnableIRQ(CAN0_IRQn);
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}
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int can_write(can_t *obj, CAN_Message msg, int cc)
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{
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STR_CANMSG_T CMsg;
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CMsg.IdType = (uint32_t)msg.format;
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CMsg.FrameType = (uint32_t)!msg.type;
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CMsg.Id = msg.id;
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CMsg.DLC = msg.len;
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memcpy((void *)&CMsg.Data[0],(const void *)&msg.data[0], (unsigned int)8);
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return CAN_Transmit((CAN_T *)(obj->can), cc, &CMsg);
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}
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int can_read(can_t *obj, CAN_Message *msg, int handle)
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{
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STR_CANMSG_T CMsg;
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if(!CAN_Receive((CAN_T *)(obj->can), handle, &CMsg))
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return 0;
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msg->format = (CANFormat)CMsg.IdType;
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msg->type = (CANType)!CMsg.FrameType;
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msg->id = CMsg.Id;
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msg->len = CMsg.DLC;
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memcpy(&msg->data[0], &CMsg.Data[0], 8);
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return 1;
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}
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int can_mode(can_t *obj, CanMode mode)
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{
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int success = 0;
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switch (mode)
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{
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case MODE_RESET:
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CAN_LeaveTestMode((CAN_T*)obj->can);
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success = 1;
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break;
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case MODE_NORMAL:
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CAN_EnterTestMode((CAN_T*)(obj->can), CAN_TEST_BASIC_Msk);
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success = 1;
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break;
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case MODE_SILENT:
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CAN_EnterTestMode((CAN_T*)(obj->can), CAN_TEST_SILENT_Msk);
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success = 1;
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break;
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case MODE_TEST_LOCAL:
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case MODE_TEST_GLOBAL:
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CAN_EnterTestMode((CAN_T*)(obj->can), CAN_TEST_LBACK_Msk);
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success = 1;
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break;
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case MODE_TEST_SILENT:
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CAN_EnterTestMode((CAN_T*)(obj->can), CAN_TEST_SILENT_Msk | CAN_TEST_LBACK_Msk);
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success = 1;
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break;
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default:
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success = 0;
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break;
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}
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return success;
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}
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int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t handle)
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{
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return CAN_SetRxMsg((CAN_T *)(obj->can), handle , (uint32_t)format, id);
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}
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void can_reset(can_t *obj)
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{
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const struct nu_modinit_s *modinit = get_modinit(obj->can, can_modinit_tab);
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MBED_ASSERT(modinit != NULL);
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MBED_ASSERT(modinit->modname == obj->can);
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// Reset this module
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SYS_ResetModule(modinit->rsetidx);
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}
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unsigned char can_rderror(can_t *obj)
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{
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CAN_T *can = (CAN_T *)(obj->can);
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return ((can->ERR>>8)&0xFF);
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}
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unsigned char can_tderror(can_t *obj)
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{
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CAN_T *can = (CAN_T *)(obj->can);
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return ((can->ERR)&0xFF);
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}
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void can_monitor(can_t *obj, int silent)
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{
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CAN_EnterTestMode((CAN_T *)(obj->can), CAN_TEST_SILENT_Msk);
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}
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#endif // DEVICE_CAN
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@ -158,7 +158,11 @@ int32_t CAN_SetRxMsg(CAN_T *tCAN, uint32_t u32MsgNum , uint32_t u32IDType, uint3
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int32_t CAN_SetRxMsgAndMsk(CAN_T *tCAN, uint32_t u32MsgNum , uint32_t u32IDType, uint32_t u32ID, uint32_t u32IDMask);
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int32_t CAN_SetTxMsg(CAN_T *tCAN, uint32_t u32MsgNum , STR_CANMSG_T* pCanMsg);
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int32_t CAN_TriggerTxMsg(CAN_T *tCAN, uint32_t u32MsgNum);
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uint32_t CAN_GetCANBitRate(CAN_T *tCAN);
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void CAN_EnterInitMode(CAN_T *tCAN, uint8_t u8Mask);
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void CAN_LeaveInitMode(CAN_T *tCAN);
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void CAN_EnterTestMode(CAN_T *tCAN, uint8_t u8TestMask);
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void CAN_LeaveTestMode(CAN_T *tCAN);
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/*@}*/ /* end of group CAN_EXPORTED_FUNCTIONS */
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@ -2096,7 +2096,7 @@
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"is_disk_virtual": true,
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"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
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"inherits": ["Target"],
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"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG"],
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"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "CAN"],
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"features": ["LWIP"],
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"release_versions": ["2", "5"],
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"device_name": "NUC472HI8AE"
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"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
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"inherits": ["Target"],
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"progen": {"target": "numaker-pfm-m453"},
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"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
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"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "CAN"],
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"release_versions": ["2", "5"],
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"device_name": "M453VG6AE"
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}
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