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[NANO130] Fix compile warnings in all toolchains

pull/4631/head
MS30 CCChang12 2017-05-11 10:48:52 +08:00
parent c5c7f3c2e2
commit 9dcd7256cb
12 changed files with 73 additions and 225 deletions
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2
targets/TARGET_NUVOTON/TARGET_NANO100/TARGET_NUMAKER_PFM_NANO130/PeripheralNames.h
View File

@ -64,7 +64,7 @@ typedef enum {
typedef enum {
UART_0 = (int) NU_MODNAME(UART0_BASE, 0, 0),
UART_1 = (int) NU_MODNAME(UART1_BASE, 1, 0),
// FIXME: board-specific
// NOTE: board-specific
STDIO_UART = UART_0
} UARTName;

2
targets/TARGET_NUVOTON/TARGET_NANO100/TARGET_NUMAKER_PFM_NANO130/PeripheralPins.c
View File

@ -200,7 +200,6 @@ const PinMap PinMap_PWM[] = {
//*** SERIAL ***
const PinMap PinMap_UART_TX[] = {
{PA_2, UART_1, SYS_PA_L_MFP_PA2_MFP_UART1_RX},
{PA_3, UART_1, SYS_PA_L_MFP_PA3_MFP_UART1_TX},
{PA_15, UART_0, SYS_PA_H_MFP_PA15_MFP_UART0_TX},
{PB_1, UART_0, SYS_PB_L_MFP_PB1_MFP_UART0_TX},
@ -214,7 +213,6 @@ const PinMap PinMap_UART_TX[] = {
const PinMap PinMap_UART_RX[] = {
{PA_2, UART_1, SYS_PA_L_MFP_PA2_MFP_UART1_RX},
{PA_3, UART_1, SYS_PA_L_MFP_PA3_MFP_UART1_TX},
{PA_14, UART_0, SYS_PA_H_MFP_PA14_MFP_UART0_RX},
{PB_0, UART_0, SYS_PB_L_MFP_PB0_MFP_UART0_RX},
{PB_4, UART_1, SYS_PB_L_MFP_PB4_MFP_UART1_RX},

12
targets/TARGET_NUVOTON/TARGET_NANO100/TARGET_NUMAKER_PFM_NANO130/PinNames.h
View File

@ -105,23 +105,13 @@ typedef enum {
D14 = PA_10,
D15 = PA_11,
// FIXME: other board-specific naming
// NOTE: other board-specific naming
// UART naming
USBTX = PA_15,
USBRX = PA_14,
STDIO_UART_TX = USBTX,
STDIO_UART_RX = USBRX,
// LED naming
#if 0
LED1 = PB_0,
LED2 = PB_1,
LED3 = PE_9,
LED4 = PE_10,
LED5 = PE_11,
LED6 = PD_8,
LED7 = PD_9,
LED8 = PC_7,
#endif
LED1 = PA_12,
LED2 = PA_13,
LED3 = LED1,

9
targets/TARGET_NUVOTON/TARGET_NANO100/TARGET_NUMAKER_PFM_NANO130/mbed_overrides.c
View File

@ -14,13 +14,13 @@
* limitations under the License.
*/
#include "analogin_api.h"
#include "cmsis.h"
// NOTE: Ensurce mbed_sdk_init() will get called before C++ global object constructor.
#if defined(__CC_ARM) || defined(__GNUC__)
void mbed_sdk_init_forced(void) __attribute__((constructor(101)));
#elif defined(__ICCARM__)
// FIXME: How to achieve it in IAR?
// TODO: How to achieve it in IAR?
#endif
@ -63,11 +63,6 @@ void mbed_sdk_init(void)
/* Set HCLK frequency 42MHz */
CLK_SetCoreClock(42000000);
#if DEVICE_ANALOGIN
/* Vref connect to internal */
// SYS->VREFCTL = (SYS->VREFCTL & ~SYS_VREFCTL_VREFCTL_Msk) | SYS_VREFCTL_VREF_3_072V;
#endif
/* Update System Core Clock */
/* User can use SystemCoreClockUpdate() to calculate SystemCoreClock. */
SystemCoreClockUpdate();

7
targets/TARGET_NUVOTON/TARGET_NANO100/analogin_api.c
View File

@ -49,7 +49,7 @@ void analogin_init(analogin_t *obj, PinName pin)
const struct nu_modinit_s *modinit = get_modinit(obj->adc, adc_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->adc);
MBED_ASSERT((ADCName) modinit->modname == obj->adc);
ADC_T *adc_base = (ADC_T *) NU_MODBASE(obj->adc);
uint32_t chn = NU_MODSUBINDEX(obj->adc);
@ -99,7 +99,7 @@ void analogin_deinit(PinName pin)
const struct nu_modinit_s *modinit = get_modinit(obj.adc, adc_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj.adc);
MBED_ASSERT((ADCName) modinit->modname == obj.adc);
ADC_T *adc_base = (ADC_T *) NU_MODBASE(obj.adc);
uint32_t chn = NU_MODSUBINDEX(obj.adc);
@ -128,7 +128,8 @@ uint16_t analogin_read_u16(analogin_t *obj)
}
adc_busy_flag = 1;
ADC_START_CONV(adc_base);
// Start the A/D conversion
adc_base->CR |= ADC_CR_ADST_Msk;
// Wait for conversion finish
while (! ADC_GET_INT_FLAG(adc_base, ADC_ADF_INT) & ADC_ADF_INT) ;
ADC_CLR_INT_FLAG(ADC, ADC_ADF_INT);

199
targets/TARGET_NUVOTON/TARGET_NANO100/device/startup_Nano100Series.c
View File

@ -71,51 +71,50 @@ extern int main(void);
/* Default empty handler */
void Default_Handler(void);
void Default_Handler_1(void);
/* Reset handler */
void Reset_Handler(void);
/* Cortex-M0 core handlers */
WEAK_ALIAS_FUNC(NMI_Handler, Default_Handler) // NMI Handler
WEAK_ALIAS_FUNC(HardFault_Handler, Default_Handler_a) // Hard Fault Handler
WEAK_ALIAS_FUNC(HardFault_Handler, Default_Handler) // Hard Fault Handler
WEAK_ALIAS_FUNC(SVC_Handler, Default_Handler) // SVCall Handler
WEAK_ALIAS_FUNC(PendSV_Handler, Default_Handler) // PendSV Handler
WEAK_ALIAS_FUNC(SysTick_Handler, Default_Handler) // SysTick Handler
/* Peripherals handlers */
WEAK_ALIAS_FUNC(BOD_IRQHandler, Default_Handler_0) // Brownout low voltage detected interrupt
WEAK_ALIAS_FUNC(WDT_IRQHandler, Default_Handler_1) // Watch Dog Timer interrupt
WEAK_ALIAS_FUNC(EINT0_IRQHandler, Default_Handler_2) // External signal interrupt from PB.14 pin
WEAK_ALIAS_FUNC(EINT1_IRQHandler, Default_Handler_3) // External signal interrupt from PB.15 pin
WEAK_ALIAS_FUNC(GPABC_IRQHandler, Default_Handler_4) // External interrupt from PA[15:0]/PB[15:0]/PC[15:0]
WEAK_ALIAS_FUNC(GPDEF_IRQHandler, Default_Handler_5) // External interrupt from PD[15:0]/PE[15:0]/PF[7:0]
WEAK_ALIAS_FUNC(PWM0_IRQHandler, Default_Handler_6) // PWM 0 interrupt
WEAK_ALIAS_FUNC(PWM1_IRQHandler, Default_Handler_7) // PWM 1 interrupt
WEAK_ALIAS_FUNC(TMR0_IRQHandler, Default_Handler_8) // Timer 0 interrupt
WEAK_ALIAS_FUNC(TMR1_IRQHandler, Default_Handler_9) // Timer 1 interrupt
WEAK_ALIAS_FUNC(TMR2_IRQHandler, Default_Handler_10) // Timer 2 interrupt
WEAK_ALIAS_FUNC(TMR3_IRQHandler, Default_Handler_11) // Timer 3 interrupt
WEAK_ALIAS_FUNC(UART0_IRQHandler, Default_Handler_12) // UART0 interrupt
WEAK_ALIAS_FUNC(UART1_IRQHandler, Default_Handler_13) // UART1 interrupt
WEAK_ALIAS_FUNC(SPI0_IRQHandler, Default_Handler_14) // SPI0 interrupt
WEAK_ALIAS_FUNC(SPI1_IRQHandler, Default_Handler_15) // SPI1 interrupt
WEAK_ALIAS_FUNC(SPI2_IRQHandler, Default_Handler_16) // SPI2 interrupt
WEAK_ALIAS_FUNC(HIRC_IRQHandler, Default_Handler_17) // HIRC interrupt
WEAK_ALIAS_FUNC(I2C0_IRQHandler, Default_Handler_18) // I2C0 interrupt
WEAK_ALIAS_FUNC(I2C1_IRQHandler, Default_Handler_19) // I2C1 interrupt
WEAK_ALIAS_FUNC(SC2_IRQHandler, Default_Handler_20) // SC2 interrupt
WEAK_ALIAS_FUNC(SC0_IRQHandler, Default_Handler_21) // SC0 interrupt
WEAK_ALIAS_FUNC(SC1_IRQHandler, Default_Handler_22) // SC1 interrupt
WEAK_ALIAS_FUNC(USBD_IRQHandler, Default_Handler_23) // USB FS Device interrupt
WEAK_ALIAS_FUNC(BOD_IRQHandler, Default_Handler) // Brownout low voltage detected interrupt
WEAK_ALIAS_FUNC(WDT_IRQHandler, Default_Handler) // Watch Dog Timer interrupt
WEAK_ALIAS_FUNC(EINT0_IRQHandler, Default_Handler) // External signal interrupt from PB.14 pin
WEAK_ALIAS_FUNC(EINT1_IRQHandler, Default_Handler) // External signal interrupt from PB.15 pin
WEAK_ALIAS_FUNC(GPABC_IRQHandler, Default_Handler) // External interrupt from PA[15:0]/PB[15:0]/PC[15:0]
WEAK_ALIAS_FUNC(GPDEF_IRQHandler, Default_Handler) // External interrupt from PD[15:0]/PE[15:0]/PF[7:0]
WEAK_ALIAS_FUNC(PWM0_IRQHandler, Default_Handler) // PWM 0 interrupt
WEAK_ALIAS_FUNC(PWM1_IRQHandler, Default_Handler) // PWM 1 interrupt
WEAK_ALIAS_FUNC(TMR0_IRQHandler, Default_Handler) // Timer 0 interrupt
WEAK_ALIAS_FUNC(TMR1_IRQHandler, Default_Handler) // Timer 1 interrupt
WEAK_ALIAS_FUNC(TMR2_IRQHandler, Default_Handler) // Timer 2 interrupt
WEAK_ALIAS_FUNC(TMR3_IRQHandler, Default_Handler) // Timer 3 interrupt
WEAK_ALIAS_FUNC(UART0_IRQHandler, Default_Handler) // UART0 interrupt
WEAK_ALIAS_FUNC(UART1_IRQHandler, Default_Handler) // UART1 interrupt
WEAK_ALIAS_FUNC(SPI0_IRQHandler, Default_Handler) // SPI0 interrupt
WEAK_ALIAS_FUNC(SPI1_IRQHandler, Default_Handler) // SPI1 interrupt
WEAK_ALIAS_FUNC(SPI2_IRQHandler, Default_Handler) // SPI2 interrupt
WEAK_ALIAS_FUNC(HIRC_IRQHandler, Default_Handler) // HIRC interrupt
WEAK_ALIAS_FUNC(I2C0_IRQHandler, Default_Handler) // I2C0 interrupt
WEAK_ALIAS_FUNC(I2C1_IRQHandler, Default_Handler) // I2C1 interrupt
WEAK_ALIAS_FUNC(SC2_IRQHandler, Default_Handler) // SC2 interrupt
WEAK_ALIAS_FUNC(SC0_IRQHandler, Default_Handler) // SC0 interrupt
WEAK_ALIAS_FUNC(SC1_IRQHandler, Default_Handler) // SC1 interrupt
WEAK_ALIAS_FUNC(USBD_IRQHandler, Default_Handler) // USB FS Device interrupt
// Reserved
WEAK_ALIAS_FUNC(LCD_IRQHandler, Default_Handler_25) // LCD interrupt
WEAK_ALIAS_FUNC(PDMA_IRQHandler, Default_Handler_26) // PDMA interrupt
WEAK_ALIAS_FUNC(I2S_IRQHandler, Default_Handler_27) // I2S interrupt
WEAK_ALIAS_FUNC(PDWU_IRQHandler, Default_Handler_28) // Power Down Wake up interrupt
WEAK_ALIAS_FUNC(ADC_IRQHandler, Default_Handler_29) // ADC interrupt
WEAK_ALIAS_FUNC(DAC_IRQHandler, Default_Handler_30) // DAC interrupt
WEAK_ALIAS_FUNC(RTC_IRQHandler, Default_Handler_31) // Real time clock interrupt
WEAK_ALIAS_FUNC(LCD_IRQHandler, Default_Handler) // LCD interrupt
WEAK_ALIAS_FUNC(PDMA_IRQHandler, Default_Handler) // PDMA interrupt
WEAK_ALIAS_FUNC(I2S_IRQHandler, Default_Handler) // I2S interrupt
WEAK_ALIAS_FUNC(PDWU_IRQHandler, Default_Handler) // Power Down Wake up interrupt
WEAK_ALIAS_FUNC(ADC_IRQHandler, Default_Handler) // ADC interrupt
WEAK_ALIAS_FUNC(DAC_IRQHandler, Default_Handler) // DAC interrupt
WEAK_ALIAS_FUNC(RTC_IRQHandler, Default_Handler) // Real time clock interrupt
/* Vector table */
#if defined(__CC_ARM)
@ -262,137 +261,3 @@ void Default_Handler(void)
{
while (1);
}
void Default_Handler_a(void)
{
while (1);
}
void Default_Handler_0(void)
{
while (1);
}
void Default_Handler_1(void)
{
while (1);
}
void Default_Handler_2(void)
{
while (1);
}
void Default_Handler_3(void)
{
while (1);
}
void Default_Handler_4(void)
{
while (1);
}
void Default_Handler_5(void)
{
while (1);
}
void Default_Handler_6(void)
{
while (1);
}
void Default_Handler_7(void)
{
while (1);
}
void Default_Handler_8(void)
{
while (1);
}
void Default_Handler_9(void)
{
while (1);
}
void Default_Handler_10(void)
{
while (1);
}
void Default_Handler_11(void)
{
while (1);
}
void Default_Handler_12(void)
{
while (1);
}
void Default_Handler_13(void)
{
while (1);
}
void Default_Handler_14(void)
{
while (1);
}
void Default_Handler_15(void)
{
while (1);
}
void Default_Handler_16(void)
{
while (1);
}
void Default_Handler_17(void)
{
while (1);
}
void Default_Handler_18(void)
{
while (1);
}
void Default_Handler_19(void)
{
while (1);
}
void Default_Handler_20(void)
{
while (1);
}
void Default_Handler_21(void)
{
while (1);
}
void Default_Handler_22(void)
{
while (1);
}
void Default_Handler_23(void)
{
while (1);
}
void Default_Handler_24(void)
{
while (1);
}
void Default_Handler_25(void)
{
while (1);
}
void Default_Handler_26(void)
{
while (1);
}
void Default_Handler_27(void)
{
while (1);
}
void Default_Handler_28(void)
{
while (1);
}
void Default_Handler_29(void)
{
while (1);
}
void Default_Handler_30(void)
{
while (1);
}
void Default_Handler_31(void)
{
while (1);
}

5
targets/TARGET_NUVOTON/TARGET_NANO100/gpio_irq_api.c
View File

@ -22,6 +22,7 @@
#include "cmsis.h"
#include "pinmap.h"
#include "PeripheralPins.h"
#include "mbed_error.h"
#include "nu_bitutil.h"
#define NU_MAX_PIN_PER_PORT 16
@ -188,6 +189,8 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
gpio_base->IER &= ~(GPIO_INT_FALLING << pin_index);
}
break;
default:
break;
}
}
@ -236,7 +239,7 @@ static void gpio_irq(struct nu_gpio_irq_var *var)
uint32_t ier = gpio_base->IER;
while (isrc) {
int pin_index = nu_ctz(isrc);
PinName pin = port_pin(port_index, pin_index);
PinName pin = (PinName) NU_PINNAME(port_index, pin_index);
gpio_irq_t *obj = var->obj_arr;
while (obj) {
if (obj->pin == pin)

8
targets/TARGET_NUVOTON/TARGET_NANO100/i2c_api.c
View File

@ -24,7 +24,7 @@
#include "nu_modutil.h"
#include "nu_miscutil.h"
#include "nu_bitutil.h"
#include "critical.h"
#include "mbed_critical.h"
#define NU_I2C_DEBUG 0
@ -126,7 +126,7 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl)
const struct nu_modinit_s *modinit = get_modinit(obj->i2c.i2c, i2c_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->i2c.i2c);
MBED_ASSERT((I2CName) modinit->modname == obj->i2c.i2c);
// Reset this module
SYS_ResetModule(modinit->rsetidx);
@ -442,7 +442,7 @@ static int i2c_do_trsn(i2c_t *obj, uint32_t i2c_ctl, int sync)
break;
}
case 0xF8: // Bus Released
if (i2c_ctl & (I2C_CON_START_Msk | I2C_CON_STOP_Msk) == I2C_CON_STOP_Msk) {
if ((i2c_ctl & (I2C_CON_START_Msk | I2C_CON_STOP_Msk)) == I2C_CON_STOP_Msk) {
return 0;
}
else {
@ -1023,7 +1023,7 @@ static void i2c_enable_vector_interrupt(i2c_t *obj, uint32_t handler, int enable
{
const struct nu_modinit_s *modinit = get_modinit(obj->i2c.i2c, i2c_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->i2c.i2c);
MBED_ASSERT((I2CName) modinit->modname == obj->i2c.i2c);
if (enable) {
NVIC_SetVector(modinit->irq_n, handler);

2
targets/TARGET_NUVOTON/TARGET_NANO100/lp_ticker.c
View File

@ -153,7 +153,7 @@ void lp_ticker_set_interrupt(timestamp_t timestamp)
TIMER_Stop((TIMER_T *) NU_MODBASE(timer3_modinit.modname));
/**
* FIXME: Scheduled alarm may go off incorrectly due to wrap around.
* NOTE: Scheduled alarm may go off incorrectly due to wrap around.
* Conditions in which delta is negative:
* 1. Wrap around
* 2. Newly scheduled alarm is behind now

8
targets/TARGET_NUVOTON/TARGET_NANO100/pwmout_api.c
View File

@ -70,7 +70,7 @@ void pwmout_init(pwmout_t* obj, PinName pin)
const struct nu_modinit_s *modinit = get_modinit(obj->pwm, pwm_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->pwm);
MBED_ASSERT((PWMName) modinit->modname == obj->pwm);
PWM_T *pwm_base = (PWM_T *) NU_MODBASE(obj->pwm);
uint32_t chn = NU_MODSUBINDEX(obj->pwm);
@ -112,7 +112,7 @@ void pwmout_free(pwmout_t* obj)
const struct nu_modinit_s *modinit = get_modinit(obj->pwm, pwm_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->pwm);
MBED_ASSERT((PWMName) modinit->modname == obj->pwm);
((struct nu_pwm_var *) modinit->var)->en_msk &= ~(1 << chn);
@ -177,7 +177,6 @@ void pwmout_pulsewidth_us(pwmout_t* obj, int us)
int pwmout_allow_powerdown(void)
{
uint32_t modinit_mask = pwm_modinit_mask;
#if 0
while (modinit_mask) {
int pwm_idx = nu_ctz(modinit_mask);
const struct nu_modinit_s *modinit = pwm_modinit_tab + pwm_idx;
@ -185,13 +184,12 @@ int pwmout_allow_powerdown(void)
PWM_T *pwm_base = (PWM_T *) NU_MODBASE(modinit->modname);
uint32_t chn = NU_MODSUBINDEX(modinit->modname);
// Disallow entering power-down mode if PWM counter is enabled.
if ((pwm_base->CNTEN & (1 << chn)) && pwm_base->CMPDAT[chn]) {
if (pwm_base->OE & (1 << chn)) {
return 0;
}
}
modinit_mask &= ~(1 << pwm_idx);
}
#endif
return 1;
}

17
targets/TARGET_NUVOTON/TARGET_NANO100/serial_api.c
View File

@ -410,7 +410,7 @@ static void uart_irq(serial_t *obj)
}
}
// FIXME: Ignore all other interrupt flags. Clear them. Otherwise, program will get stuck in interrupt.
// NOTE: Ignore all other interrupt flags. Clear them. Otherwise, program will get stuck in interrupt.
uart_base->ISR = uart_base->ISR;
uart_base->FSR = uart_base->FSR;
}
@ -546,7 +546,7 @@ void serial_tx_abort_asynch(serial_t *obj)
if (obj->serial.dma_usage_tx != DMA_USAGE_NEVER) {
if (obj->serial.dma_chn_id_tx != DMA_ERROR_OUT_OF_CHANNELS) {
PDMA_DisableInt(obj->serial.dma_chn_id_tx, PDMA_IER_TD_IE_Msk);
// FIXME: On NUC472, next PDMA transfer will fail with PDMA_STOP() called. Cause is unknown.
// NOTE: On NUC472, next PDMA transfer will fail with PDMA_STOP() called.
//PDMA_STOP(obj->serial.dma_chn_id_tx);
dma_enable(obj->serial.dma_chn_id_tx, 0);
}
@ -563,7 +563,7 @@ void serial_rx_abort_asynch(serial_t *obj)
if (obj->serial.dma_usage_rx != DMA_USAGE_NEVER) {
if (obj->serial.dma_chn_id_rx != DMA_ERROR_OUT_OF_CHANNELS) {
PDMA_DisableInt(obj->serial.dma_chn_id_rx, PDMA_IER_TD_IE_Msk);
// FIXME: On NUC472, next PDMA transfer will fail with PDMA_STOP() called. Cause is unknown.
// NOTE: On NUC472, next PDMA transfer will fail with PDMA_STOP() called.
//PDMA_STOP(obj->serial.dma_chn_id_rx);
dma_enable(obj->serial.dma_chn_id_rx, 0);
}
@ -696,7 +696,6 @@ static int serial_is_tx_complete(serial_t *obj)
{
// NOTE: Exclude tx fifo empty check due to no such interrupt on DMA way
//return (obj->tx_buff.pos == obj->tx_buff.length) && UART_GET_TX_EMPTY(((UART_T *) NU_MODBASE(obj->serial.uart)));
// FIXME: Premature abort???
return (obj->tx_buff.pos == obj->tx_buff.length);
}
@ -765,7 +764,7 @@ static uint32_t serial_rx_event_check(serial_t *obj)
}
if ((obj->char_match != SERIAL_RESERVED_CHAR_MATCH) && obj->char_found) {
event |= SERIAL_EVENT_RX_CHARACTER_MATCH;
// FIXME: Timing to reset char_found?
// NOTE: Timing to reset char_found?
//obj->char_found = 0;
}
@ -776,14 +775,14 @@ static void uart_dma_handler_tx(uint32_t id, uint32_t event_dma)
{
serial_t *obj = (serial_t *) id;
// FIXME: Pass this error to caller
// TODO: Pass this error to caller
if (event_dma & DMA_EVENT_ABORT) {
}
// Expect UART IRQ will catch this transfer done event
if (event_dma & DMA_EVENT_TRANSFER_DONE) {
obj->tx_buff.pos = obj->tx_buff.length;
}
// FIXME: Pass this error to caller
// TODO: Pass this error to caller
if (event_dma & DMA_EVENT_TIMEOUT) {
}
@ -794,14 +793,14 @@ static void uart_dma_handler_rx(uint32_t id, uint32_t event_dma)
{
serial_t *obj = (serial_t *) id;
// FIXME: Pass this error to caller
// TODO: Pass this error to caller
if (event_dma & DMA_EVENT_ABORT) {
}
// Expect UART IRQ will catch this transfer done event
if (event_dma & DMA_EVENT_TRANSFER_DONE) {
obj->rx_buff.pos = obj->rx_buff.length;
}
// FIXME: Pass this error to caller
// TODO: Pass this error to caller
if (event_dma & DMA_EVENT_TIMEOUT) {
}

27
targets/TARGET_NUVOTON/TARGET_NANO100/spi_api.c
View File

@ -128,7 +128,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->spi.spi);
MBED_ASSERT((SPIName) modinit->modname == obj->spi.spi);
// Reset this module
SYS_ResetModule(modinit->rsetidx);
@ -182,7 +182,7 @@ void spi_free(spi_t *obj)
const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->spi.spi);
MBED_ASSERT((SPIName) modinit->modname == obj->spi.spi);
SPI_DisableInt(((SPI_T *) NU_MODBASE(obj->spi.spi)), (SPI_FIFO_RXOVR_INTEN_MASK | SPI_FIFO_RX_INTEN_MASK | SPI_FIFO_TX_INTEN_MASK));
NVIC_DisableIRQ(modinit->irq_n);
@ -379,7 +379,7 @@ void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx,
// DMA way
const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->spi.spi);
MBED_ASSERT((SPIName) modinit->modname == obj->spi.spi);
// Configure tx DMA
dma_enable(obj->spi.dma_chn_id_tx, 1); // Enable this DMA channel
@ -467,7 +467,7 @@ void spi_abort_asynch(spi_t *obj)
if (obj->spi.dma_chn_id_tx != DMA_ERROR_OUT_OF_CHANNELS) {
PDMA_DisableInt(obj->spi.dma_chn_id_tx, PDMA_IER_TD_IE_Msk);
// FIXME: On NUC472, next PDMA transfer will fail with PDMA_STOP() called. Cause is unknown.
// NOTE: On NUC472, next PDMA transfer will fail with PDMA_STOP() called.
//PDMA_STOP(obj->spi.dma_chn_id_tx);
dma_enable(obj->spi.dma_chn_id_tx, 0);
}
@ -476,7 +476,7 @@ void spi_abort_asynch(spi_t *obj)
if (obj->spi.dma_chn_id_rx != DMA_ERROR_OUT_OF_CHANNELS) {
PDMA_DisableInt(obj->spi.dma_chn_id_rx, PDMA_IER_TD_IE_Msk);
// FIXME: On NUC472, next PDMA transfer will fail with PDMA_STOP() called. Cause is unknown.
// NOTE: On NUC472, next PDMA transfer will fail with PDMA_STOP() called.
//PDMA_STOP(obj->spi.dma_chn_id_rx);
dma_enable(obj->spi.dma_chn_id_rx, 0);
}
@ -488,7 +488,7 @@ void spi_abort_asynch(spi_t *obj)
spi_enable_vector_interrupt(obj, 0, 0);
spi_master_enable_interrupt(obj, 0, SPI_FIFO_RX_INTEN_MASK | SPI_FIFO_TX_INTEN_MASK);
// FIXME: SPI H/W may get out of state without the busy check.
// NOTE: SPI H/W may get out of state without the busy check.
while (SPI_IS_BUSY(spi_base));
SPI_ClearRxFIFO(spi_base);
@ -516,7 +516,6 @@ uint32_t spi_irq_handler_asynch(spi_t *obj)
uint8_t spi_active(spi_t *obj)
{
SPI_T *spi_base = (SPI_T *) NU_MODBASE(obj->spi.spi);
// FIXME
/*
if ((obj->rx_buff.buffer && obj->rx_buff.pos < obj->rx_buff.length)
|| (obj->tx_buff.buffer && obj->tx_buff.pos < obj->tx_buff.length) ){
@ -593,7 +592,7 @@ static void spi_enable_vector_interrupt(spi_t *obj, uint32_t handler, uint8_t en
{
const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->spi.spi);
MBED_ASSERT((SPIName) modinit->modname == obj->spi.spi);
struct nu_spi_var *var = (struct nu_spi_var *) modinit->var;
@ -835,20 +834,20 @@ static void spi_dma_handler_tx(uint32_t id, uint32_t event_dma)
{
spi_t *obj = (spi_t *) id;
// FIXME: Pass this error to caller
// TODO: Pass this error to caller
if (event_dma & DMA_EVENT_ABORT) {
}
// Expect SPI IRQ will catch this transfer done event
if (event_dma & DMA_EVENT_TRANSFER_DONE) {
obj->tx_buff.pos = obj->tx_buff.length;
}
// FIXME: Pass this error to caller
// TODO: Pass this error to caller
if (event_dma & DMA_EVENT_TIMEOUT) {
}
const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->spi.spi);
MBED_ASSERT((SPIName) modinit->modname == obj->spi.spi);
void (*vec)(void) = (void (*)(void)) NVIC_GetVector(modinit->irq_n);
vec();
@ -858,20 +857,20 @@ static void spi_dma_handler_rx(uint32_t id, uint32_t event_dma)
{
spi_t *obj = (spi_t *) id;
// FIXME: Pass this error to caller
// TODO: Pass this error to caller
if (event_dma & DMA_EVENT_ABORT) {
}
// Expect SPI IRQ will catch this transfer done event
if (event_dma & DMA_EVENT_TRANSFER_DONE) {
obj->rx_buff.pos = obj->rx_buff.length;
}
// FIXME: Pass this error to caller
// TODO: Pass this error to caller
if (event_dma & DMA_EVENT_TIMEOUT) {
}
const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->spi.spi);
MBED_ASSERT((SPIName) modinit->modname == obj->spi.spi);
void (*vec)(void) = (void (*)(void)) NVIC_GetVector(modinit->irq_n);
vec();