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[M487] Prepare support for one-to-many mappings in the same pin map 

Also fix bumped bug which doesn't call NU_MODBASE() to retrieve module base address
pull/4608/head
ccli8 2017-02-15 10:48:31 +08:00
parent 04bd652a56
commit 65de13454e
4 changed files with 120 additions and 93 deletions
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134
targets/TARGET_NUVOTON/TARGET_M480/TARGET_NUMAKER_PFM_M487/PeripheralNames.h
View File

@ -23,106 +23,114 @@
extern "C" {
#endif
#define NU_MODNAME(MODBASE, SUBINDEX) ((MODBASE) | (SUBINDEX))
#define NU_MODBASE(MODNAME) ((MODNAME) & 0xFFFFFFE0)
#define NU_MODSUBINDEX(MODNAME) ((MODNAME) & 0x0000001F)
// NOTE: Check all module base addresses (XXX_BASE in BSP) for free bit fields to define module name
// which encodes module base address and module index/subindex.
#define NU_MODSUBINDEX_Pos 0
#define NU_MODSUBINDEX_Msk (0x1Ful << NU_MODSUBINDEX_Pos)
#define NU_MODINDEX_Pos 20
#define NU_MODINDEX_Msk (0xFul << NU_MODINDEX_Pos)
#define NU_MODNAME(MODBASE, INDEX, SUBINDEX) ((MODBASE) | ((INDEX) << NU_MODINDEX_Pos) | ((SUBINDEX) << NU_MODSUBINDEX_Pos))
#define NU_MODBASE(MODNAME) ((MODNAME) & ~(NU_MODINDEX_Msk | NU_MODSUBINDEX_Msk))
#define NU_MODINDEX(MODNAME) (((MODNAME) & NU_MODINDEX_Msk) >> NU_MODINDEX_Pos)
#define NU_MODSUBINDEX(MODNAME) (((MODNAME) & NU_MODSUBINDEX_Msk) >> NU_MODSUBINDEX_Pos)
#if 0
typedef enum {
GPIO_A = (int) NU_MODNAME(GPIOA_BASE, 0),
GPIO_B = (int) NU_MODNAME(GPIOB_BASE, 0),
GPIO_C = (int) NU_MODNAME(GPIOC_BASE, 0),
GPIO_D = (int) NU_MODNAME(GPIOD_BASE, 0),
GPIO_E = (int) NU_MODNAME(GPIOE_BASE, 0),
GPIO_F = (int) NU_MODNAME(GPIOF_BASE, 0),
GPIO_G = (int) NU_MODNAME(GPIOG_BASE, 0),
GPIO_H = (int) NU_MODNAME(GPIOH_BASE, 0)
GPIO_A = (int) NU_MODNAME(GPIOA_BASE, 0, 0),
GPIO_B = (int) NU_MODNAME(GPIOB_BASE, 1, 0),
GPIO_C = (int) NU_MODNAME(GPIOC_BASE, 2, 0),
GPIO_D = (int) NU_MODNAME(GPIOD_BASE, 3, 0),
GPIO_E = (int) NU_MODNAME(GPIOE_BASE, 4, 0),
GPIO_F = (int) NU_MODNAME(GPIOF_BASE, 5, 0),
GPIO_G = (int) NU_MODNAME(GPIOG_BASE, 6, 0),
GPIO_H = (int) NU_MODNAME(GPIOH_BASE, 7, 0)
} GPIOName;
#endif
typedef enum {
ADC_0_0 = (int) NU_MODNAME(EADC_BASE, 0),
ADC_0_1 = (int) NU_MODNAME(EADC_BASE, 1),
ADC_0_2 = (int) NU_MODNAME(EADC_BASE, 2),
ADC_0_3 = (int) NU_MODNAME(EADC_BASE, 3),
ADC_0_4 = (int) NU_MODNAME(EADC_BASE, 4),
ADC_0_5 = (int) NU_MODNAME(EADC_BASE, 5),
ADC_0_6 = (int) NU_MODNAME(EADC_BASE, 6),
ADC_0_7 = (int) NU_MODNAME(EADC_BASE, 7),
ADC_0_8 = (int) NU_MODNAME(EADC_BASE, 8),
ADC_0_9 = (int) NU_MODNAME(EADC_BASE, 9),
ADC_0_10 = (int) NU_MODNAME(EADC_BASE, 10),
ADC_0_11 = (int) NU_MODNAME(EADC_BASE, 11),
ADC_0_12 = (int) NU_MODNAME(EADC_BASE, 12),
ADC_0_13 = (int) NU_MODNAME(EADC_BASE, 13),
ADC_0_14 = (int) NU_MODNAME(EADC_BASE, 14),
ADC_0_15 = (int) NU_MODNAME(EADC_BASE, 15)
ADC_0_0 = (int) NU_MODNAME(EADC_BASE, 0, 0),
ADC_0_1 = (int) NU_MODNAME(EADC_BASE, 0, 1),
ADC_0_2 = (int) NU_MODNAME(EADC_BASE, 0, 2),
ADC_0_3 = (int) NU_MODNAME(EADC_BASE, 0, 3),
ADC_0_4 = (int) NU_MODNAME(EADC_BASE, 0, 4),
ADC_0_5 = (int) NU_MODNAME(EADC_BASE, 0, 5),
ADC_0_6 = (int) NU_MODNAME(EADC_BASE, 0, 6),
ADC_0_7 = (int) NU_MODNAME(EADC_BASE, 0, 7),
ADC_0_8 = (int) NU_MODNAME(EADC_BASE, 0, 8),
ADC_0_9 = (int) NU_MODNAME(EADC_BASE, 0, 9),
ADC_0_10 = (int) NU_MODNAME(EADC_BASE, 0, 10),
ADC_0_11 = (int) NU_MODNAME(EADC_BASE, 0, 11),
ADC_0_12 = (int) NU_MODNAME(EADC_BASE, 0, 12),
ADC_0_13 = (int) NU_MODNAME(EADC_BASE, 0, 13),
ADC_0_14 = (int) NU_MODNAME(EADC_BASE, 0, 14),
ADC_0_15 = (int) NU_MODNAME(EADC_BASE, 0, 15)
} ADCName;
typedef enum {
UART_0 = (int) NU_MODNAME(UART0_BASE, 0),
UART_1 = (int) NU_MODNAME(UART1_BASE, 0),
UART_2 = (int) NU_MODNAME(UART2_BASE, 0),
UART_3 = (int) NU_MODNAME(UART3_BASE, 0),
UART_4 = (int) NU_MODNAME(UART4_BASE, 0),
UART_5 = (int) NU_MODNAME(UART5_BASE, 0),
UART_0 = (int) NU_MODNAME(UART0_BASE, 0, 0),
UART_1 = (int) NU_MODNAME(UART1_BASE, 1, 0),
UART_2 = (int) NU_MODNAME(UART2_BASE, 2, 0),
UART_3 = (int) NU_MODNAME(UART3_BASE, 3, 0),
UART_4 = (int) NU_MODNAME(UART4_BASE, 4, 0),
UART_5 = (int) NU_MODNAME(UART5_BASE, 5, 0),
// FIXME: board-specific
STDIO_UART = UART_1
} UARTName;
typedef enum {
SPI_0 = (int) NU_MODNAME(SPI0_BASE, 0),
SPI_1 = (int) NU_MODNAME(SPI1_BASE, 0),
SPI_2 = (int) NU_MODNAME(SPI2_BASE, 0),
SPI_3 = (int) NU_MODNAME(SPI3_BASE, 0),
SPI_4 = (int) NU_MODNAME(SPI4_BASE, 0)
SPI_0 = (int) NU_MODNAME(SPI0_BASE, 0, 0),
SPI_1 = (int) NU_MODNAME(SPI1_BASE, 1, 0),
SPI_2 = (int) NU_MODNAME(SPI2_BASE, 2, 0),
SPI_3 = (int) NU_MODNAME(SPI3_BASE, 3, 0),
SPI_4 = (int) NU_MODNAME(SPI4_BASE, 4, 0)
} SPIName;
typedef enum {
I2C_0 = (int) NU_MODNAME(I2C0_BASE, 0),
I2C_1 = (int) NU_MODNAME(I2C1_BASE, 0),
I2C_2 = (int) NU_MODNAME(I2C2_BASE, 0)
I2C_0 = (int) NU_MODNAME(I2C0_BASE, 0, 0),
I2C_1 = (int) NU_MODNAME(I2C1_BASE, 1, 0),
I2C_2 = (int) NU_MODNAME(I2C2_BASE, 2, 0)
} I2CName;
typedef enum {
PWM_0_0 = (int) NU_MODNAME(PWM0_BASE, 0),
PWM_0_1 = (int) NU_MODNAME(PWM0_BASE, 1),
PWM_0_2 = (int) NU_MODNAME(PWM0_BASE, 2),
PWM_0_3 = (int) NU_MODNAME(PWM0_BASE, 3),
PWM_0_4 = (int) NU_MODNAME(PWM0_BASE, 4),
PWM_0_5 = (int) NU_MODNAME(PWM0_BASE, 5),
PWM_0_0 = (int) NU_MODNAME(PWM0_BASE, 0, 0),
PWM_0_1 = (int) NU_MODNAME(PWM0_BASE, 0, 1),
PWM_0_2 = (int) NU_MODNAME(PWM0_BASE, 0, 2),
PWM_0_3 = (int) NU_MODNAME(PWM0_BASE, 0, 3),
PWM_0_4 = (int) NU_MODNAME(PWM0_BASE, 0, 4),
PWM_0_5 = (int) NU_MODNAME(PWM0_BASE, 0, 5),
PWM_1_0 = (int) NU_MODNAME(PWM1_BASE, 0),
PWM_1_1 = (int) NU_MODNAME(PWM1_BASE, 1),
PWM_1_2 = (int) NU_MODNAME(PWM1_BASE, 2),
PWM_1_3 = (int) NU_MODNAME(PWM1_BASE, 3),
PWM_1_4 = (int) NU_MODNAME(PWM1_BASE, 4),
PWM_1_5 = (int) NU_MODNAME(PWM1_BASE, 5)
PWM_1_0 = (int) NU_MODNAME(PWM1_BASE, 1, 0),
PWM_1_1 = (int) NU_MODNAME(PWM1_BASE, 1, 1),
PWM_1_2 = (int) NU_MODNAME(PWM1_BASE, 1, 2),
PWM_1_3 = (int) NU_MODNAME(PWM1_BASE, 1, 3),
PWM_1_4 = (int) NU_MODNAME(PWM1_BASE, 1, 4),
PWM_1_5 = (int) NU_MODNAME(PWM1_BASE, 1, 5)
} PWMName;
typedef enum {
TIMER_0 = (int) NU_MODNAME(TIMER0_BASE, 0),
TIMER_1 = (int) NU_MODNAME(TIMER1_BASE, 0),
TIMER_2 = (int) NU_MODNAME(TIMER2_BASE, 0),
TIMER_3 = (int) NU_MODNAME(TIMER3_BASE, 0),
TIMER_0 = (int) NU_MODNAME(TIMER0_BASE, 0, 0),
TIMER_1 = (int) NU_MODNAME(TIMER1_BASE, 1, 0),
TIMER_2 = (int) NU_MODNAME(TIMER2_BASE, 2, 0),
TIMER_3 = (int) NU_MODNAME(TIMER3_BASE, 3, 0),
} TIMERName;
typedef enum {
RTC_0 = (int) NU_MODNAME(RTC_BASE, 0)
RTC_0 = (int) NU_MODNAME(RTC_BASE, 0, 0)
} RTCName;
typedef enum {
DMA_0 = (int) NU_MODNAME(PDMA_BASE, 0)
DMA_0 = (int) NU_MODNAME(PDMA_BASE, 0, 0)
} DMAName;
typedef enum {
SD_0 = (int) NU_MODNAME(SDH0_BASE, 0),
SD_1 = (int) NU_MODNAME(SDH1_BASE, 0)
SD_0 = (int) NU_MODNAME(SDH0_BASE, 0, 0),
SD_1 = (int) NU_MODNAME(SDH1_BASE, 1, 0)
} SDName;
typedef enum {
CAN_0 = (int) NU_MODNAME(CAN0_BASE, 0),
CAN_1 = (int) NU_MODNAME(CAN1_BASE, 0)
CAN_0 = (int) NU_MODNAME(CAN0_BASE, 0, 0),
CAN_1 = (int) NU_MODNAME(CAN1_BASE, 1, 0)
} CANName;
#ifdef __cplusplus

33
targets/TARGET_NUVOTON/TARGET_M480/TARGET_NUMAKER_PFM_M487/PinNames.h
View File

@ -22,13 +22,32 @@
extern "C" {
#endif
#define NU_PORT_SHIFT 12
#define NU_PINNAME_TO_PORT(name) ((unsigned int)(name) >> NU_PORT_SHIFT)
#define NU_PINNAME_TO_PIN(name) ((unsigned int)(name) & ~(0xFFFFFFFF << NU_PORT_SHIFT))
#define NU_PORT_N_PIN_TO_PINNAME(port, pin) ((((unsigned int) (port)) << (NU_PORT_SHIFT)) | ((unsigned int) (pin)))
#define NU_PORT_BASE(port) ((GPIO_T *)(((uint32_t) GPIOA_BASE) + 0x40 * port))
#define NU_MFP_POS(pin) ((pin % 8) * 4)
#define NU_MFP_MSK(pin) (0xful << NU_MFP_POS(pin))
#define NU_PININDEX_Pos 0
#define NU_PININDEX_Msk (0xFFul << NU_PININDEX_Pos)
#define NU_PINPORT_Pos 8
#define NU_PINPORT_Msk (0xFul << NU_PINPORT_Pos)
#define NU_PIN_MODINDEX_Pos 12
#define NU_PIN_MODINDEX_Msk (0xFul << NU_PIN_MODINDEX_Pos)
#define NU_PIN_BIND_Pos 16
#define NU_PIN_BIND_Msk (0x1ul << NU_PIN_BIND_Pos)
#define NU_PININDEX(PINNAME) (((unsigned int)(PINNAME) & NU_PININDEX_Msk) >> NU_PININDEX_Pos)
#define NU_PINPORT(PINNAME) (((unsigned int)(PINNAME) & NU_PINPORT_Msk) >> NU_PINPORT_Pos)
#define NU_PIN_BIND(PINNAME) (((unsigned int)(PINNAME) & NU_PIN_BIND_Msk) >> NU_PIN_BIND_Pos)
#define NU_PIN_MODINDEX(PINNAME) (((unsigned int)(PINNAME) & NU_PIN_MODINDEX_Msk) >> NU_PIN_MODINDEX_Pos)
#define NU_PINNAME(PORT, PIN) ((((unsigned int) (PORT)) << (NU_PINPORT_Pos)) | (((unsigned int) (PIN)) << NU_PININDEX_Pos))
#define NU_PINNAME_BIND(PINNAME, modname) NU_PINNAME_BIND_(NU_PINPORT(PINNAME), NU_PININDEX(PINNAME), modname)
#define NU_PINNAME_BIND_(PORT, PIN, modname) ((((unsigned int)(PORT)) << NU_PINPORT_Pos) | (((unsigned int)(PIN)) << NU_PININDEX_Pos) | (NU_MODINDEX(modname) << NU_PIN_MODINDEX_Pos) | NU_PIN_BIND_Msk)
#define NU_PORT_BASE(PORT) ((GPIO_T *)(((uint32_t) GPIOA_BASE) + 0x40 * PORT))
#define NU_MFP_POS(PIN) ((PIN % 8) * 4)
#define NU_MFP_MSK(PIN) (0xful << NU_MFP_POS(PIN))
// LEGACY
#define NU_PINNAME_TO_PIN(PINNAME) NU_PININDEX(PINNAME)
#define NU_PINNAME_TO_PORT(PINNAME) NU_PINPORT(PINNAME)
#define NU_PINNAME_TO_MODSUBINDEX(PINNAME) NU_PIN_MODINDEX(PINNAME)
#define NU_PORT_N_PIN_TO_PINNAME(PORT, PIN) NU_PINNAME((PORT), (PIN))
typedef enum {
PIN_INPUT,

34
targets/TARGET_NUVOTON/TARGET_M480/can_api.c
View File

@ -83,7 +83,7 @@ extern void CAN_EnterTestMode(CAN_T *tCAN, uint8_t u8TestMask);
PA2 = 0x00;
PA3 = 0x00;
#endif
CAN_Open((CAN_T *)obj->can, 500000, CAN_NORMAL_MODE);
CAN_Open((CAN_T *)NU_MODBASE(obj->can), 500000, CAN_NORMAL_MODE);
can_filter(obj, 0, 0, CANStandard, 0);
}
@ -105,9 +105,9 @@ void can_free(can_t *obj)
int can_frequency(can_t *obj, int hz)
{
CAN_SetBaudRate((CAN_T *)obj->can, hz);
CAN_SetBaudRate((CAN_T *)NU_MODBASE(obj->can), hz);
return CAN_GetCANBitRate((CAN_T *)obj->can);
return CAN_GetCANBitRate((CAN_T *)NU_MODBASE(obj->can));
}
static void can_irq(CANName name, int id)
@ -196,7 +196,7 @@ void can_irq_init(can_t *obj, can_irq_handler handler, uint32_t id)
void can_irq_free(can_t *obj)
{
CAN_DisableInt((CAN_T *)obj->can, (CAN_CON_IE_Msk|CAN_CON_SIE_Msk|CAN_CON_EIE_Msk));
CAN_DisableInt((CAN_T *)NU_MODBASE(obj->can), (CAN_CON_IE_Msk|CAN_CON_SIE_Msk|CAN_CON_EIE_Msk));
can_irq_ids[obj->index] = 0;
@ -233,9 +233,9 @@ void can_irq_set(can_t *obj, CanIrqType irq, uint32_t enable)
break;
}
CAN_EnterInitMode((CAN_T*)obj->can, u8Mask);
CAN_EnterInitMode((CAN_T*)NU_MODBASE(obj->can), u8Mask);
CAN_LeaveInitMode((CAN_T*)obj->can);
CAN_LeaveInitMode((CAN_T*)NU_MODBASE(obj->can));
if(!obj->index)
{
@ -260,14 +260,14 @@ int can_write(can_t *obj, CAN_Message msg, int cc)
CMsg.DLC = msg.len;
memcpy((void *)&CMsg.Data[0],(const void *)&msg.data[0], (unsigned int)8);
return CAN_Transmit((CAN_T *)(obj->can), cc, &CMsg);
return CAN_Transmit((CAN_T *)(NU_MODBASE(obj->can)), cc, &CMsg);
}
int can_read(can_t *obj, CAN_Message *msg, int handle)
{
STR_CANMSG_T CMsg;
if(!CAN_Receive((CAN_T *)(obj->can), handle, &CMsg))
if(!CAN_Receive((CAN_T *)(NU_MODBASE(obj->can)), handle, &CMsg))
return 0;
msg->format = (CANFormat)CMsg.IdType;
@ -285,28 +285,28 @@ int can_mode(can_t *obj, CanMode mode)
switch (mode)
{
case MODE_RESET:
CAN_LeaveTestMode((CAN_T*)obj->can);
CAN_LeaveTestMode((CAN_T*)NU_MODBASE(obj->can));
success = 1;
break;
case MODE_NORMAL:
CAN_EnterTestMode((CAN_T*)(obj->can), CAN_TEST_BASIC_Msk);
CAN_EnterTestMode((CAN_T*)NU_MODBASE(obj->can), CAN_TEST_BASIC_Msk);
success = 1;
break;
case MODE_SILENT:
CAN_EnterTestMode((CAN_T*)(obj->can), CAN_TEST_SILENT_Msk);
CAN_EnterTestMode((CAN_T*)NU_MODBASE(obj->can), CAN_TEST_SILENT_Msk);
success = 1;
break;
case MODE_TEST_LOCAL:
case MODE_TEST_GLOBAL:
CAN_EnterTestMode((CAN_T*)(obj->can), CAN_TEST_LBACK_Msk);
CAN_EnterTestMode((CAN_T*)NU_MODBASE(obj->can), CAN_TEST_LBACK_Msk);
success = 1;
break;
case MODE_TEST_SILENT:
CAN_EnterTestMode((CAN_T*)(obj->can), CAN_TEST_SILENT_Msk | CAN_TEST_LBACK_Msk);
CAN_EnterTestMode((CAN_T*)NU_MODBASE(obj->can), CAN_TEST_SILENT_Msk | CAN_TEST_LBACK_Msk);
success = 1;
break;
@ -322,7 +322,7 @@ int can_mode(can_t *obj, CanMode mode)
int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t handle)
{
return CAN_SetRxMsg((CAN_T *)(obj->can), handle , (uint32_t)format, id);
return CAN_SetRxMsg((CAN_T *)NU_MODBASE(obj->can), handle , (uint32_t)format, id);
}
@ -340,19 +340,19 @@ void can_reset(can_t *obj)
unsigned char can_rderror(can_t *obj)
{
CAN_T *can = (CAN_T *)(obj->can);
CAN_T *can = (CAN_T *)NU_MODBASE(obj->can);
return ((can->ERR>>8)&0xFF);
}
unsigned char can_tderror(can_t *obj)
{
CAN_T *can = (CAN_T *)(obj->can);
CAN_T *can = (CAN_T *)NU_MODBASE(obj->can);
return ((can->ERR)&0xFF);
}
void can_monitor(can_t *obj, int silent)
{
CAN_EnterTestMode((CAN_T *)(obj->can), CAN_TEST_SILENT_Msk);
CAN_EnterTestMode((CAN_T *)NU_MODBASE(obj->can), CAN_TEST_SILENT_Msk);
}
#endif // DEVICE_CAN

12
targets/TARGET_NUVOTON/TARGET_M480/serial_api.c
View File

@ -312,7 +312,7 @@ void serial_baud(serial_t *obj, int baudrate) {
#endif
// Flush Tx FIFO. Otherwise, output data may get lost on this change.
while (! UART_IS_TX_EMPTY(((UART_T *) obj->serial.uart)));
while (! UART_IS_TX_EMPTY((UART_T *) NU_MODBASE(obj->serial.uart)));
obj->serial.baudrate = baudrate;
UART_Open((UART_T *) NU_MODBASE(obj->serial.uart), baudrate);
@ -327,7 +327,7 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
#endif
// Flush Tx FIFO. Otherwise, output data may get lost on this change.
while (! UART_IS_TX_EMPTY(((UART_T *) obj->serial.uart)));
while (! UART_IS_TX_EMPTY((UART_T *) NU_MODBASE(obj->serial.uart)));
// TODO: Assert for not supported parity and data bits
obj->serial.databits = data_bits;
@ -404,7 +404,7 @@ void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, Pi
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
{
// Flush Tx FIFO. Otherwise, output data may get lost on this change.
while (! UART_IS_TX_EMPTY(((UART_T *) obj->serial.uart)));
while (! UART_IS_TX_EMPTY((UART_T *) NU_MODBASE(obj->serial.uart)));
const struct nu_modinit_s *modinit = get_modinit(obj->serial.uart, uart_modinit_tab);
MBED_ASSERT(modinit != NULL);
@ -605,7 +605,7 @@ int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx
// M451: Start of source address
// M480: Start of source address
PDMA_SAR_INC, // Source address incremental
(uint32_t) obj->serial.uart, // Destination address
(uint32_t) NU_MODBASE(obj->serial.uart), // Destination address
PDMA_DAR_FIX); // Destination address fixed
PDMA_SetBurstType(obj->serial.dma_chn_id_tx,
PDMA_REQ_SINGLE, // Single mode
@ -662,7 +662,7 @@ void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_widt
(rx_width == 8) ? PDMA_WIDTH_8 : (rx_width == 16) ? PDMA_WIDTH_16 : PDMA_WIDTH_32,
rx_length);
PDMA_SetTransferAddr(obj->serial.dma_chn_id_rx,
(uint32_t) obj->serial.uart, // Source address
(uint32_t) NU_MODBASE(obj->serial.uart), // Source address
PDMA_SAR_FIX, // Source address fixed
(uint32_t) rx, // NOTE:
// NUC472: End of destination address
@ -684,7 +684,7 @@ void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_widt
void serial_tx_abort_asynch(serial_t *obj)
{
// Flush Tx FIFO. Otherwise, output data may get lost on this change.
while (! UART_IS_TX_EMPTY(((UART_T *) obj->serial.uart)));
while (! UART_IS_TX_EMPTY((UART_T *) NU_MODBASE(obj->serial.uart)));
if (obj->serial.dma_usage_tx != DMA_USAGE_NEVER) {
if (obj->serial.dma_chn_id_tx != DMA_ERROR_OUT_OF_CHANNELS) {