mirror of https://github.com/ARMmbed/mbed-os.git
[NUC472/M453] Fix PWM clock error in BSP driver
parent
f796eb5d2d
commit
6af60f9b32
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@ -55,7 +55,11 @@ uint32_t PWM_ConfigCaptureChannel(PWM_T *pwm, uint32_t u32ChannelNum, uint32_t u
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{
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//clock source is from PCLK
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SystemCoreClockUpdate();
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u32PWMClockSrc = SystemCoreClock;
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if(pwm == PWM0)
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u32PWMClockSrc = CLK_GetPCLK0Freq();
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else//(pwm == PWM1)
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u32PWMClockSrc = CLK_GetPCLK1Freq();
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}
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u32PWMClockSrc /= 1000;
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@ -142,7 +146,11 @@ uint32_t PWM_ConfigOutputChannel2(PWM_T *pwm,
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{
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//clock source is from PCLK
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SystemCoreClockUpdate();
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u32PWMClockSrc = SystemCoreClock;
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if(pwm == PWM0)
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u32PWMClockSrc = CLK_GetPCLK0Freq();
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else//(pwm == PWM1)
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u32PWMClockSrc = CLK_GetPCLK1Freq();
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}
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for(u16Prescale = 1; u16Prescale < 0xFFF; u16Prescale++)//prescale could be 0~0xFFF
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@ -70,7 +70,7 @@ uint32_t PWM_ConfigOutputChannel2 (PWM_T *pwm,
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH01SEL_Msk) == 1)
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u32PWM_CLock = __LXT;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH01SEL_Msk) == 2)
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u32PWM_CLock = SystemCoreClock;
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u32PWM_CLock = CLK_GetPCLKFreq();
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH01SEL_Msk) == 3)
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u32PWM_CLock = __HIRC;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH01SEL_Msk) == 4)
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@ -81,7 +81,7 @@ uint32_t PWM_ConfigOutputChannel2 (PWM_T *pwm,
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH23SEL_Msk) == (1 << CLK_CLKSEL2_PWM0CH23SEL_Pos))
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u32PWM_CLock = __LXT;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH23SEL_Msk) == (2 << CLK_CLKSEL2_PWM0CH23SEL_Pos))
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u32PWM_CLock = SystemCoreClock;
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u32PWM_CLock = CLK_GetPCLKFreq();
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH23SEL_Msk) == (3 << CLK_CLKSEL2_PWM0CH23SEL_Pos))
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u32PWM_CLock = __HIRC;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH23SEL_Msk) == (4 << CLK_CLKSEL2_PWM0CH23SEL_Pos))
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@ -92,7 +92,7 @@ uint32_t PWM_ConfigOutputChannel2 (PWM_T *pwm,
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH45SEL_Msk) == (1 << CLK_CLKSEL2_PWM0CH45SEL_Pos))
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u32PWM_CLock = __LXT;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH45SEL_Msk) == (2 << CLK_CLKSEL2_PWM0CH45SEL_Pos))
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u32PWM_CLock = SystemCoreClock;
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u32PWM_CLock = CLK_GetPCLKFreq();
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH45SEL_Msk) == (3 << CLK_CLKSEL2_PWM0CH45SEL_Pos))
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u32PWM_CLock = __HIRC;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH45SEL_Msk) == (4 << CLK_CLKSEL2_PWM0CH45SEL_Pos))
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@ -105,7 +105,7 @@ uint32_t PWM_ConfigOutputChannel2 (PWM_T *pwm,
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH01SEL_Msk) == (1 << CLK_CLKSEL2_PWM1CH01SEL_Pos))
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u32PWM_CLock = __LXT;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH01SEL_Msk) == (2 << CLK_CLKSEL2_PWM1CH01SEL_Pos))
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u32PWM_CLock = SystemCoreClock;
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u32PWM_CLock = CLK_GetPCLKFreq();
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH01SEL_Msk) == (3 << CLK_CLKSEL2_PWM1CH01SEL_Pos))
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u32PWM_CLock = __HIRC;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH01SEL_Msk) == (4 << CLK_CLKSEL2_PWM1CH01SEL_Pos))
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@ -116,7 +116,7 @@ uint32_t PWM_ConfigOutputChannel2 (PWM_T *pwm,
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH23SEL_Msk) == (1 << CLK_CLKSEL2_PWM1CH23SEL_Pos))
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u32PWM_CLock = __LXT;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH23SEL_Msk) == (2 << CLK_CLKSEL2_PWM1CH23SEL_Pos))
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u32PWM_CLock = SystemCoreClock;
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u32PWM_CLock = CLK_GetPCLKFreq();
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH23SEL_Msk) == (3 << CLK_CLKSEL2_PWM1CH23SEL_Pos))
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u32PWM_CLock = __HIRC;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH23SEL_Msk) == (4 << CLK_CLKSEL2_PWM1CH23SEL_Pos))
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@ -127,7 +127,7 @@ uint32_t PWM_ConfigOutputChannel2 (PWM_T *pwm,
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH45SEL_Msk) == (1 << CLK_CLKSEL2_PWM1CH45SEL_Pos))
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u32PWM_CLock = __LXT;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH45SEL_Msk) == (2 << CLK_CLKSEL2_PWM1CH45SEL_Pos))
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u32PWM_CLock = SystemCoreClock;
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u32PWM_CLock = CLK_GetPCLKFreq();
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH45SEL_Msk) == (3 << CLK_CLKSEL2_PWM1CH45SEL_Pos))
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u32PWM_CLock = __HIRC;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH45SEL_Msk) == (4 << CLK_CLKSEL2_PWM1CH45SEL_Pos))
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@ -218,7 +218,7 @@ uint32_t PWM_ConfigCaptureChannel (PWM_T *pwm,
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH01SEL_Msk) == 1)
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u32PWM_CLock = __LXT;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH01SEL_Msk) == 2)
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u32PWM_CLock = SystemCoreClock;
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u32PWM_CLock = CLK_GetPCLKFreq();
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH01SEL_Msk) == 3)
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u32PWM_CLock = __HIRC;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH01SEL_Msk) == 4)
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@ -229,7 +229,7 @@ uint32_t PWM_ConfigCaptureChannel (PWM_T *pwm,
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH23SEL_Msk) == (1 << CLK_CLKSEL2_PWM0CH23SEL_Pos))
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u32PWM_CLock = __LXT;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH23SEL_Msk) == (2 << CLK_CLKSEL2_PWM0CH23SEL_Pos))
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u32PWM_CLock = SystemCoreClock;
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u32PWM_CLock = CLK_GetPCLKFreq();
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH23SEL_Msk) == (3 << CLK_CLKSEL2_PWM0CH23SEL_Pos))
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u32PWM_CLock = __HIRC;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH23SEL_Msk) == (4 << CLK_CLKSEL2_PWM0CH23SEL_Pos))
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@ -240,7 +240,7 @@ uint32_t PWM_ConfigCaptureChannel (PWM_T *pwm,
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH45SEL_Msk) == (1 << CLK_CLKSEL2_PWM0CH45SEL_Pos))
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u32PWM_CLock = __LXT;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH45SEL_Msk) == (2 << CLK_CLKSEL2_PWM0CH45SEL_Pos))
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u32PWM_CLock = SystemCoreClock;
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u32PWM_CLock = CLK_GetPCLKFreq();
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH45SEL_Msk) == (3 << CLK_CLKSEL2_PWM0CH45SEL_Pos))
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u32PWM_CLock = __HIRC;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM0CH45SEL_Msk) == (4 << CLK_CLKSEL2_PWM0CH45SEL_Pos))
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@ -253,7 +253,7 @@ uint32_t PWM_ConfigCaptureChannel (PWM_T *pwm,
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH01SEL_Msk) == (1 << CLK_CLKSEL2_PWM1CH01SEL_Pos))
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u32PWM_CLock = __LXT;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH01SEL_Msk) == (2 << CLK_CLKSEL2_PWM1CH01SEL_Pos))
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u32PWM_CLock = SystemCoreClock;
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u32PWM_CLock = CLK_GetPCLKFreq();
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH01SEL_Msk) == (3 << CLK_CLKSEL2_PWM1CH01SEL_Pos))
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u32PWM_CLock = __HIRC;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH01SEL_Msk) == (4 << CLK_CLKSEL2_PWM1CH01SEL_Pos))
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@ -264,7 +264,7 @@ uint32_t PWM_ConfigCaptureChannel (PWM_T *pwm,
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH23SEL_Msk) == (1 << CLK_CLKSEL2_PWM1CH23SEL_Pos))
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u32PWM_CLock = __LXT;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH23SEL_Msk) == (2 << CLK_CLKSEL2_PWM1CH23SEL_Pos))
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u32PWM_CLock = SystemCoreClock;
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u32PWM_CLock = CLK_GetPCLKFreq();
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH23SEL_Msk) == (3 << CLK_CLKSEL2_PWM1CH23SEL_Pos))
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u32PWM_CLock = __HIRC;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH23SEL_Msk) == (4 << CLK_CLKSEL2_PWM1CH23SEL_Pos))
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@ -275,7 +275,7 @@ uint32_t PWM_ConfigCaptureChannel (PWM_T *pwm,
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH45SEL_Msk) == (1 << CLK_CLKSEL2_PWM1CH45SEL_Pos))
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u32PWM_CLock = __LXT;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH45SEL_Msk) == (2 << CLK_CLKSEL2_PWM1CH45SEL_Pos))
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u32PWM_CLock = SystemCoreClock;
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u32PWM_CLock = CLK_GetPCLKFreq();
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH45SEL_Msk) == (3 << CLK_CLKSEL2_PWM1CH45SEL_Pos))
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u32PWM_CLock = __HIRC;
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else if ((CLK->CLKSEL2 & CLK_CLKSEL2_PWM1CH45SEL_Msk) == (4 << CLK_CLKSEL2_PWM1CH45SEL_Pos))
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