Commit Graph

362 Commits (80d58e55722107d2d004704de7b6050f0eb2e91e)

Author SHA1 Message Date
ccli8 313f322cf7 [Nuvoton] Replace __wrap__sbrk with overriding _sbrk
With _sbrk being weak, we can override it directly rather than #if to support heap with
two-region model.
2018-07-26 15:47:25 +08:00
Deepika 2bbe043793 [M2351] Adding missing ENDP for ARM 2018-07-13 10:56:45 -05:00
ccli8 e61c5146c6 [M2351] Fix binary-compatible across compilers in secure functions
1. Rename m2351_stddriver_sup.h/c to stddriver_secure.h/.c for naming consistency
2. Add hal_secure.h to include hal-exported secure functions
3. Change return/argument type in secure functions:
   (1) Change int to int32_t
   (2) Change PinName to int32_t
   (3) Change time_t to int64_t
4. Update secure lib/bin accordingly
2018-07-12 18:01:41 +08:00
ccli8 6bf8e191af [M2351] Support configurable for partitioning flash/SRAM 2018-07-12 18:01:39 +08:00
ccli8 778aa1e766 [M2351] Place default secure binary/library 2018-07-12 18:01:38 +08:00
ccli8 31bf7bf342 [M2351] Fix include file name error on case-sensitive system 2018-07-12 18:01:36 +08:00
ccli8 d350f45b4b [M2351] Synchronize lp_ticker code to us_ticker
This is to make us_ticker/lp_ticker code consistent.
2018-07-12 18:01:35 +08:00
ccli8 688029a511 [M2351] Remove special handling for dummy interrupt in lp_ticker
It is because dummy interrupt is very rare or pending time caused by it
is very short.
2018-07-12 18:01:34 +08:00
ccli8 c382e9642e [M2351] Upgrade chip version to B from A
There is a reset halt issue with PLL in A version.
To switch back to A version for some reason, define NU_CHIP_MAJOR to 1.
2018-07-12 17:52:10 +08:00
ccli8 c725f188ec [M2351] Change pinout to meet NuMaker-PFM-M2351 V1.1 2018-07-12 17:52:09 +08:00
ccli8 93ee13adbe [M2351] Change secure flash/SRAM to 256KB/32KB as default
This is to compilant with CMSIS pack.
2018-07-12 17:52:08 +08:00
ccli8 c3c661da8d [M2351] Change secure/non-secure stack/heap size
1. Change RTOS-less main stack/RTOS ISR stack size to 2KiB
2. Change secure/non-secure heap size to 16KiB/32KiB for IAR
2018-07-12 17:52:07 +08:00
ccli8 04f723755b [M2351] Meet new RTC HAL spec (Mbed OS 5.9)
1. Power down RTC access from CPU domain in rtc_free. After rtc_free, RTC gets
   inaccessible from CPU domain but keeps counting.
2. Fix RTC cannot cross reset cycle.
2018-07-12 17:52:06 +08:00
ccli8 6729b65236 [M2351] Meet new lp_ticker HAL spec (Mbed OS 5.9)
1. Add LPTICKER in device_has option of targets.json file.
2. Disable interrupt in lp_ticker_init
3. Add lp_ticker_free
4. Enable interrupt in lp_ticker_set_interrupt/lp_ticker_fire_interrupt
5. Disable interupt in ISR
2018-07-12 17:52:05 +08:00
ccli8 9cbc8b21ee [M2351] Meet new us_ticker HAL spec (Mbed OS 5.9)
1. Add USTICKER in device_has option of targets.json file.
2. Disable interrupt in us_ticker_init
3. Add us_ticker_free
4. Enable interrupt in us_ticker_set_interrupt/us_ticker_fire_interrupt
5. Disable interrupt in ISR
2018-07-12 17:52:03 +08:00
ccli8 de83cb2892 [M2351] Add secure gateway functions SYS_LockReg_S/SYS_UnlockReg_S 2018-07-12 17:52:02 +08:00
ccli8 990665512d [M2351] Add SD pinmap 2018-07-12 17:52:01 +08:00
ccli8 89d32227a0 [M2351] Replace __attribute__((cmse_nonsecure_entry)) with compiler agnostic __NONSECURE_ENTRY 2018-07-12 17:51:59 +08:00
ccli8 767e74b1db [M2351] Support TrustZone and bootloader for IAR 2018-07-12 17:51:58 +08:00
ccli8 8f1623f717 [M2351] Add consistency check for CRYPTO/CRPT's secure attribute and TRNG/Mbed TLS H/W 2018-07-12 17:51:55 +08:00
ccli8 2854b57091 [M2351] Remove dead code with '#if 0' in SPI 2018-07-12 17:51:54 +08:00
ccli8 13e1209c83 [M2351] Support PWM out 2018-07-12 17:51:52 +08:00
ccli8 d05ef693ac [M2351] Support analog-in 2018-07-12 17:51:51 +08:00
ccli8 1da430f1e9 [M2351] Support TRNG
To change TRNG security state, we need to:
1. Change CRPT/CRYPTO bit in NVIC/SCU in partition_M2351.h
2. Add/remove TRNG in device_has list in targets.json to match partition_M2351.h
2018-07-12 17:51:50 +08:00
ccli8 dd7fd76758 [M2351] Centralize size configuration for secure flash, secure SRAM, NSC, and bootloader 2018-07-12 17:51:48 +08:00
ccli8 ca63abae73 [M2351] Change NSC location
NSC location has the following requirements:
1. By IDAU, 0~0x4000 is secure. NSC can only locate in 0x4000~0x10000000.
2. Greentea flash IAP uses last 4 sectors for its test. Avoid this range.
3. Greentea NVSTORE uses last 2 sectors or 4KB x 2 for its test. Avoid this range.
2018-07-12 17:51:48 +08:00
ccli8 42aa7fe0c5 [M2351] Upgrade partition format
Following BSP, this upgrade makes partitioning flash/SRAM clear.
flash_api.c relies on flash partition, so it is updated accordingly.
2018-07-12 17:51:47 +08:00
ccli8 805049d80f [M2351] Fix page size in flash IAP
In Mbed OS, page size is program unit, which is different than FMC definition.
After fixing page size, we can pass NVSTORE test (mbed-os-features-nvstore-tests-nvstore-functionality).
2018-07-12 17:51:45 +08:00
ccli8 711cb64e95 [M2351] Support flash IAP 2018-07-12 17:51:44 +08:00
ccli8 fa0124ed8d [M2351] Add missing delay in lp_ticker 2018-07-12 17:51:43 +08:00
ccli8 06cb070442 [M2351] Trim HIRC48 to 48M against LXT 2018-07-12 17:51:42 +08:00
ccli8 649389a962 [M2351] Support I2C 2018-07-12 17:51:41 +08:00
ccli8 3ca24b62ff [M2351] Support SPI 2018-07-12 17:51:40 +08:00
ccli8 dcfe1d4283 [M2351] Refine UART code
1. Replace SYS_ResetModule/CLK_SetModuleClock/CLK_EnableModuleClock/CLK_DisableModuleClock with TrustZone-aware versions.
2. Configure all UART to secure
3. Support asynchronous transfer
4. Remove sleep management code, which has been replaced with Sleep Manager.
2018-07-12 17:51:38 +08:00
ccli8 ebf53b9f64 [M2351] Support PDMA 2018-07-12 17:51:38 +08:00
cyliangtw 999dd332e6 [M2351] Rework us_ticker and lp_ticker
The rework includes the following:
1. Remove ticker overflow handling because upper layer (mbed_ticker_api.c) has done with it.
   This makes us_ticker/lp_ticker implementation more succinct and avoids potential error.
2. Refine timer register access with low-power clock source
2018-07-12 17:51:37 +08:00
ccli8 236bf657b6 [M2351] Remove peripheral sleep management from hal_sleep/hal_deepsleep
The upper layer has introduced Sleep Manager to handle the task.
2018-07-12 17:51:36 +08:00
ccli8 6bfc90dc73 [M2351] Rework RTC
The rework includes the following:
1. Support year range beyond H/W RTC 2000~2099.
2. Refine RTC register access with low-power clock source
2018-07-12 17:51:34 +08:00
ccli8 f16b971482 [M2351] Fix GPIO to be TrustZone-aware
1. Revise NU_PORT_BASE to be TrustZone-aware
2. Add TrustZone-aware NU_GET_GPIO_PIN_DATA/NU_SET_GPIO_PIN_DATA to replace GPIO_PIN_DATA
3. Revise pin_function to be TrustZone-aware
2018-07-12 17:51:33 +08:00
ccli8 2aa2b7eb00 [M2351] Fix SystemCoreClockUpdate isn't called in non-secure domain 2018-07-12 17:51:32 +08:00
ccli8 0cb7633356 [M2351] Fix HCLK clock source
There is a reset halt issue with PLL in A version.
Work around it by using HIRC48 instead of PLL as HCLK clock source.
2018-07-12 17:51:31 +08:00
ccli8 135f1279ca [M2351] Add secure BSP driver function
SYS_ResetModule_S
CLK_SetModuleClock_S
CLK_EnableModuleClock_S
CLK_DisableModuleClock_S
2018-07-12 17:51:30 +08:00
ccli8 d84a90e29d [M2351] Unify secure/non-secure peripheral base based on partition file 2018-07-12 17:51:29 +08:00
ccli8 77e45d414b [M2351] Configure most modules to non-secure
All modules are configured to non-secure except:
1. TIMER0/1 hard-wired to secure and TIMER2/3 reserved for non-secure.
2. PDMA0 hard-wired to secure and PDMA1 reserved for non-secure.
3. RTC configured to secure and shared to non-secure through NSC.
4. CRYPTO configured to secure and shared to non-secure through NSC.
2018-07-12 17:51:28 +08:00
ccli8 2da6bf6301 [M2351] Fix STDIO UART 2018-07-12 17:51:27 +08:00
cyliangtw 0c3f0f7cb7 [M2351] To fulfill _rtc_localtime one more argument 2018-07-12 17:51:24 +08:00
cyliangtw 2b44eeaef5 [M2351] Add gpio_is_connected 2018-07-12 17:51:22 +08:00
cyliangtw ef7f04808d [M2351] Set secure SRAM size as 24KB in SAU & SCU 2018-07-12 17:51:21 +08:00
cyliangtw d99fbcb166 [M2351] Set 48KB SRAM and UART0 as non-secure 2018-07-12 17:51:20 +08:00
cyliangtw 12a7830c9a [M2351] Resolve reset halt issue in MP chip A version 2018-07-12 17:51:19 +08:00