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[M487] Fix compile warnings with GCC_ARM toolchain

pull/4608/head
ccli8 2017-08-03 11:10:15 +08:00
parent b31d6f6eaa
commit 99d12b1eb8
14 changed files with 39 additions and 37 deletions
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4
features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_NUVOTON/TARGET_M480/m480_netif.c
View File

@ -429,7 +429,9 @@ err_t
/* Packet receive task */
err = sys_sem_new(&RxReadySem, 0);
if(err != ERR_OK) LWIP_ASSERT("RxReadySem creation error", (err == ERR_OK));
if(err != ERR_OK) {
LWIP_ASSERT("RxReadySem creation error", (err == ERR_OK));
}
// In GCC code, DEFAULT_THREAD_STACKSIZE 512 bytes is not enough for rx_task
#if defined (__GNUC__)
// mbed OS 2.0, DEFAULT_THREAD_STACKSIZE*3

4
features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/sha/sha_alt_hw.c
View File

@ -323,8 +323,8 @@ void crypto_sha_update_nobuf(crypto_sha_context *ctx, const unsigned char *input
int rmn = ilen;
uint32_t sha_ctl_start = (CRPT->HMAC_CTL & ~(CRPT_HMAC_CTL_DMALAST_Msk | CRPT_HMAC_CTL_DMAEN_Msk | CRPT_HMAC_CTL_HMACEN_Msk)) | CRPT_HMAC_CTL_START_Msk;
uint32_t sha_opmode = (CRPT->HMAC_CTL & CRPT_HMAC_CTL_OPMODE_Msk) >> CRPT_HMAC_CTL_OPMODE_Pos;
uint32_t DGST0_old, DGST1_old, DGST2_old, DGST3_old, DGST4_old, DGST5_old, DGST6_old, DGST7_old,
DGST8_old, DGST9_old, DGST10_old, DGST11_old, DGST12_old, DGST13_old, DGST14_old, DGST15_old;
uint32_t DGST0_old = 0, DGST1_old = 0, DGST2_old = 0, DGST3_old = 0, DGST4_old = 0, DGST5_old = 0, DGST6_old = 0, DGST7_old = 0,
DGST8_old = 0, DGST9_old = 0, DGST10_old = 0, DGST11_old = 0, DGST12_old = 0, DGST13_old = 0, DGST14_old = 0, DGST15_old = 0;
while (rmn > 0) {
CRPT->HMAC_CTL = sha_ctl_start;

2
targets/TARGET_NUVOTON/TARGET_M480/TARGET_NUMAKER_PFM_M487/objects.h
View File

@ -128,7 +128,7 @@ struct trng_s {
struct can_s {
CANName can;
char index;
int index;
};
#ifdef __cplusplus
}

4
targets/TARGET_NUVOTON/TARGET_M480/analogin_api.c
View File

@ -51,7 +51,7 @@ void analogin_init(analogin_t *obj, PinName pin)
const struct nu_modinit_s *modinit = get_modinit(obj->adc, adc_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->adc);
MBED_ASSERT(modinit->modname == (int) obj->adc);
EADC_T *eadc_base = (EADC_T *) NU_MODBASE(obj->adc);
@ -86,7 +86,7 @@ uint16_t analogin_read_u16(analogin_t *obj)
uint32_t chn = NU_MODSUBINDEX(obj->adc);
EADC_START_CONV(eadc_base, 1 << chn);
while (EADC_GET_DATA_VALID_FLAG(eadc_base, 1 << chn) != (1 << chn));
while (EADC_GET_DATA_VALID_FLAG(eadc_base, 1 << chn) != ((uint32_t) (1 << chn)));
uint16_t conv_res_12 = EADC_GET_CONV_DATA(eadc_base, chn);
// Just 12 bits are effective. Convert to 16 bits.
// conv_res_12: 0000 b11b10b9b8 b7b6b5b4 b3b2b1b0

6
targets/TARGET_NUVOTON/TARGET_M480/can_api.c
View File

@ -57,7 +57,7 @@ void can_init_freq(can_t *obj, PinName rd, PinName td, int hz)
const struct nu_modinit_s *modinit = get_modinit(obj->can, can_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->can);
MBED_ASSERT(modinit->modname == (int) obj->can);
// Reset this module
SYS_ResetModule(modinit->rsetidx);
@ -97,7 +97,7 @@ void can_free(can_t *obj)
const struct nu_modinit_s *modinit = get_modinit(obj->can, can_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->can);
MBED_ASSERT(modinit->modname == (int) obj->can);
// Reset this module
SYS_ResetModule(modinit->rsetidx);
@ -328,7 +328,7 @@ void can_reset(can_t *obj)
const struct nu_modinit_s *modinit = get_modinit(obj->can, can_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->can);
MBED_ASSERT(modinit->modname == (int) obj->can);
// Reset this module
SYS_ResetModule(modinit->rsetidx);

12
targets/TARGET_NUVOTON/TARGET_M480/device/StdDriver/m480_can.c
View File

@ -610,18 +610,18 @@ int32_t CAN_ReadMsgObj(CAN_T *tCAN, uint8_t u8MsgObj, uint8_t u8Release, STR_CAN
static int can_update_spt(int sampl_pt, int tseg, int *tseg1, int *tseg2)
{
*tseg2 = tseg + 1 - (sampl_pt * (tseg + 1)) / 1000;
if (*tseg2 < TSEG2_MIN) {
if (*tseg2 < ((int) TSEG2_MIN)) {
*tseg2 = TSEG2_MIN;
} else {
}
if (*tseg2 > TSEG2_MAX) {
if (*tseg2 > ((int) TSEG2_MAX)) {
*tseg2 = TSEG2_MAX;
} else {
}
*tseg1 = tseg - *tseg2;
if (*tseg1 > TSEG1_MAX) {
if (*tseg1 > ((int) TSEG1_MAX)) {
*tseg1 = TSEG1_MAX;
*tseg2 = tseg - *tseg1;
} else {
@ -679,14 +679,14 @@ uint32_t CAN_SetBaudRate(CAN_T *tCAN, uint32_t u32BaudRate)
}
/* tseg even = round down, odd = round up */
for (tseg = (TSEG1_MAX + TSEG2_MAX) * 2ul + 1ul; tseg >= (TSEG1_MIN + TSEG2_MIN) * 2ul; tseg--) {
for (tseg = (TSEG1_MAX + TSEG2_MAX) * 2ul + 1ul; tseg >= (int) ((TSEG1_MIN + TSEG2_MIN) * 2ul); tseg--) {
tsegall = 1ul + tseg / 2ul;
/* Compute all possible tseg choices (tseg=tseg1+tseg2) */
brp = clock_freq / (tsegall * u32BaudRate) + tseg % 2;
/* chose brp step which is possible in system */
brp = (brp / BRP_INC) * BRP_INC;
if ((brp < BRP_MIN) || (brp > BRP_MAX)) {
if ((brp < ((int) BRP_MIN)) || (brp > ((int) BRP_MAX))) {
continue;
}
rate = clock_freq / (brp * tsegall);
@ -728,7 +728,7 @@ uint32_t CAN_SetBaudRate(CAN_T *tCAN, uint32_t u32BaudRate)
sjw = SJW_MAX;
}
/* bt->sjw must not be higher than tseg2 */
if (tseg2 < sjw) {
if (tseg2 < ((int) sjw)) {
sjw = tseg2;
}

4
targets/TARGET_NUVOTON/TARGET_M480/device/StdDriver/m480_i2s.c
View File

@ -198,7 +198,7 @@ void I2S_DisableMCLK(I2S_T *i2s)
*/
void I2S_SetFIFO(I2S_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold)
{
i2s->CTL1 = (i2s->CTL1 & ~(I2S_CTL1_TXTH_Msk | I2S_CTL1_RXTH_Msk) |
i2s->CTL1 = ((i2s->CTL1 & ~(I2S_CTL1_TXTH_Msk | I2S_CTL1_RXTH_Msk)) |
(u32TxThreshold << I2S_CTL1_TXTH_Pos) |
(u32RxThreshold << I2S_CTL1_RXTH_Pos));
}
@ -225,7 +225,7 @@ void I2S_SetFIFO(I2S_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold)
*/
void I2S_ConfigureTDM(I2S_T *i2s, uint32_t u32ChannelWidth, uint32_t u32ChannelNum, uint32_t u32SyncWidth)
{
i2s->CTL0 = (i2s->CTL0 & ~(I2S_CTL0_TDMCHNUM_Msk | I2S_CTL0_CHWIDTH_Msk | I2S_CTL0_PCMSYNC_Msk) |
i2s->CTL0 = ((i2s->CTL0 & ~(I2S_CTL0_TDMCHNUM_Msk | I2S_CTL0_CHWIDTH_Msk | I2S_CTL0_PCMSYNC_Msk)) |
(u32ChannelWidth << I2S_CTL0_CHWIDTH_Pos) |
(u32ChannelNum << I2S_CTL0_TDMCHNUM_Pos) |
(u32SyncWidth << I2S_CTL0_PCMSYNC_Pos));

6
targets/TARGET_NUVOTON/TARGET_M480/device/StdDriver/m480_sdh.c
View File

@ -360,7 +360,7 @@ uint32_t SDH_Init(SDH_T *sdh)
{
uint32_t volatile i, status;
unsigned int resp;
unsigned int CIDBuffer[4];
uint32_t CIDBuffer[4];
uint32_t volatile u32CmdTimeOut;
SDH_INFO_T *pSD;
@ -630,7 +630,7 @@ uint32_t SDH_SelectCardType(SDH_T *sdh)
void SDH_Get_SD_info(SDH_T *sdh)
{
unsigned int R_LEN, C_Size, MULT, size;
unsigned int Buffer[4];
uint32_t Buffer[4];
unsigned char *ptr;
SDH_INFO_T *pSD;
@ -796,7 +796,7 @@ uint32_t SDH_Probe(SDH_T *sdh)
*/
uint32_t SDH_Read(SDH_T *sdh, uint8_t *pu8BufAddr, uint32_t u32StartSec, uint32_t u32SecCount)
{
uint32_t volatile bIsSendCmd = FALSE, buf;
uint32_t volatile bIsSendCmd = FALSE;
uint32_t volatile reg;
uint32_t volatile i, loop, status;
uint32_t blksize = SDH_BLOCK_SIZE;

6
targets/TARGET_NUVOTON/TARGET_M480/device/StdDriver/m480_spim.c
View File

@ -289,7 +289,7 @@ static void SPIM_ReadStatusRegister2(uint8_t dataBuf[], uint32_t u32NRx, uint32_
SwitchNBitOutput(u32NBit);
spim_write(cmdBuf, sizeof (cmdBuf));
SwitchNBitInput(u32NBit);
spim_read(dataBuf, sizeof (dataBuf));
spim_read(dataBuf, u32NRx);
SPIM_SET_SS_EN(0); /* CS deactivated. */
}
@ -349,7 +349,7 @@ static void SPIM_ReadStatusRegister3(uint8_t dataBuf[], uint32_t u32NRx, uint32_
SwitchNBitOutput(u32NBit);
spim_write(cmdBuf, sizeof (cmdBuf));
SwitchNBitInput(u32NBit);
spim_read(dataBuf, sizeof (dataBuf));
spim_read(dataBuf, u32NRx);
SPIM_SET_SS_EN(0); /* CS deactivated. */
}
@ -388,7 +388,7 @@ static void SPIM_ReadSecurityRegister(uint8_t dataBuf[], uint32_t u32NRx, uint32
SwitchNBitOutput(u32NBit);
spim_write(cmdBuf, sizeof (cmdBuf));
SwitchNBitInput(u32NBit);
spim_read(dataBuf, sizeof (dataBuf));
spim_read(dataBuf, u32NRx);
SPIM_SET_SS_EN(0); /* CS deactivated. */
}

8
targets/TARGET_NUVOTON/TARGET_M480/i2c_api.c
View File

@ -100,7 +100,7 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl)
const struct nu_modinit_s *modinit = get_modinit(obj->i2c.i2c, i2c_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->i2c.i2c);
MBED_ASSERT(modinit->modname == (int) obj->i2c.i2c);
// Reset this module
SYS_ResetModule(modinit->rsetidx);
@ -881,7 +881,7 @@ uint8_t i2c_active(i2c_t *obj)
{
const struct nu_modinit_s *modinit = get_modinit(obj->i2c.i2c, i2c_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->i2c.i2c);
MBED_ASSERT(modinit->modname == (int) obj->i2c.i2c);
// Vector will be changed for async transfer. Use it to judge if async transfer is on-going.
uint32_t vec = NVIC_GetVector(modinit->irq_n);
@ -909,7 +909,7 @@ static void i2c_enable_vector_interrupt(i2c_t *obj, uint32_t handler, int enable
{
const struct nu_modinit_s *modinit = get_modinit(obj->i2c.i2c, i2c_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->i2c.i2c);
MBED_ASSERT(modinit->modname == (int) obj->i2c.i2c);
if (enable) {
NVIC_SetVector(modinit->irq_n, handler);
@ -924,7 +924,7 @@ static void i2c_rollback_vector_interrupt(i2c_t *obj)
{
const struct nu_modinit_s *modinit = get_modinit(obj->i2c.i2c, i2c_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->i2c.i2c);
MBED_ASSERT(modinit->modname == (int) obj->i2c.i2c);
struct nu_i2c_var *var = (struct nu_i2c_var *) modinit->var;
i2c_enable_vector_interrupt(obj, (uint32_t) var->vec, 1);

4
targets/TARGET_NUVOTON/TARGET_M480/pwmout_api.c
View File

@ -66,7 +66,7 @@ void pwmout_init(pwmout_t* obj, PinName pin)
const struct nu_modinit_s *modinit = get_modinit(obj->pwm, pwm_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->pwm);
MBED_ASSERT(modinit->modname == (int) obj->pwm);
// NOTE: All channels (identified by PWMName) share a PWM module. This reset will also affect other channels of the same PWM module.
if (! ((struct nu_pwm_var *) modinit->var)->en_msk) {
@ -107,7 +107,7 @@ void pwmout_free(pwmout_t* obj)
const struct nu_modinit_s *modinit = get_modinit(obj->pwm, pwm_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->pwm);
MBED_ASSERT(modinit->modname == (int) obj->pwm);
((struct nu_pwm_var *) modinit->var)->en_msk &= ~(1 << chn);

12
targets/TARGET_NUVOTON/TARGET_M480/spi_api.c
View File

@ -116,7 +116,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->spi.spi);
MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
// Reset this module
SYS_ResetModule(modinit->rsetidx);
@ -166,7 +166,7 @@ void spi_free(spi_t *obj)
const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->spi.spi);
MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
SPI_DisableInt(((SPI_T *) NU_MODBASE(obj->spi.spi)), (SPI_FIFO_RXOV_INT_MASK | SPI_FIFO_RXTH_INT_MASK | SPI_FIFO_TXTH_INT_MASK));
NVIC_DisableIRQ(modinit->irq_n);
@ -331,7 +331,7 @@ void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx,
// DMA way
const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->spi.spi);
MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
PDMA_T *pdma_base = dma_modbase();
@ -504,7 +504,7 @@ static void spi_enable_vector_interrupt(spi_t *obj, uint32_t handler, uint8_t en
{
const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->spi.spi);
MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
if (enable) {
NVIC_SetVector(modinit->irq_n, handler);
@ -741,7 +741,7 @@ static void spi_dma_handler_tx(uint32_t id, uint32_t event_dma)
const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->spi.spi);
MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
void (*vec)(void) = (void (*)(void)) NVIC_GetVector(modinit->irq_n);
vec();
@ -764,7 +764,7 @@ static void spi_dma_handler_rx(uint32_t id, uint32_t event_dma)
const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
MBED_ASSERT(modinit != NULL);
MBED_ASSERT(modinit->modname == obj->spi.spi);
MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
void (*vec)(void) = (void (*)(void)) NVIC_GetVector(modinit->irq_n);
vec();

2
targets/TARGET_NUVOTON/TARGET_M480/trng_api.c
View File

@ -85,7 +85,7 @@ int trng_get_bytes(trng_t *obj, uint8_t *output, size_t length, size_t *output_l
memcpy(output, &tmpBuff, length);
*output_length = length;
} else {
for (int i = 0; i < (length/32); i++) {
for (unsigned i = 0; i < (length/32); i++) {
trng_get(output);
*output_length += 32;
output += 32;

2
targets/TARGET_NUVOTON/nu_modutil.c
View File

@ -23,7 +23,7 @@ const struct nu_modinit_s *get_modinit(uint32_t modname, const struct nu_modinit
MBED_ASSERT(modprop_tab != NULL);
const struct nu_modinit_s *modprop_ind = modprop_tab;
while (modprop_ind->modname != NC) {
if (modname == modprop_ind->modname) {
if ((int) modname == modprop_ind->modname) {
return modprop_ind;
}
else {