mirror of https://github.com/ARMmbed/mbed-os.git
[NANO130] Fix issues in OS 5.5 Greentea test
1. Support CMSIS_VECTAB_VIRTUAL feature 2. Reduce the register sync waiting time in LP ticker 3. Adjust the stack and heap size in GCC and IAR toolchainspull/4631/head
MS30 CCChang12
parent
bc0fc2ea4e
commit
6c870ca65f
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@ -671,8 +671,8 @@ extern "C" int errno;
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#if defined(TARGET_NUVOTON)
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// Overwrite _sbrk() to support two region model (heap and stack are two distinct regions).
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// __wrap__sbrk() is implemented in:
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// TARGET_NUMAKER_PFM_NUC472 hal/targets/cmsis/TARGET_NUVOTON/TARGET_NUC472/TARGET_NUMAKER_PFM_NUC472/TOOLCHAIN_GCC_ARM/retarget.c
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// TARGET_NUMAKER_PFM_M453 hal/targets/cmsis/TARGET_NUVOTON/TARGET_M451/TARGET_NUMAKER_PFM_M453/TOOLCHAIN_GCC_ARM/retarget.c
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// TARGET_NUMAKER_PFM_NUC472 targets/TARGET_NUVOTON/TARGET_NUC472/TARGET_NUMAKER_PFM_NUC472/TOOLCHAIN_GCC_ARM/nuc472_retarget.c
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// TARGET_NUMAKER_PFM_M453 targets/TARGET_NUVOTON/TARGET_M451/TARGET_NUMAKER_PFM_M453/TOOLCHAIN_GCC_ARM/m451_retarget.c
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extern "C" void *__wrap__sbrk(int incr);
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extern "C" caddr_t _sbrk(int incr) {
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return (caddr_t) __wrap__sbrk(incr);
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@ -2,7 +2,7 @@
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* Nuvoton NANO130 GCC linker script file
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*/
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StackSize = 0x800;
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StackSize = 0x600;
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MEMORY
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{
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@ -10,7 +10,7 @@ define symbol __ICFEDIT_region_IRAM_start__ = 0x20000000;
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define symbol __ICFEDIT_region_IRAM_end__ = 0x20004000 - 1;
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/*-Sizes-*/
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define symbol __ICFEDIT_size_cstack__ = 0x800;
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define symbol __ICFEDIT_size_heap__ = 0x1800;
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define symbol __ICFEDIT_size_heap__ = 0x1200;
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/**** End of ICF editor section. ###ICF###*/
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@ -0,0 +1,35 @@
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/* mbed Microcontroller Library
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* Copyright (c) 2015-2017 Nuvoton
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "cmsis_nvic.h"
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#include "platform/mbed_error.h"
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void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
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{
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// NOTE: On NANO130, relocating vector table is not supported due to just 16KB small SRAM.
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// Add guard code to prevent from unsupported relocating.
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uint32_t vector_static = NVIC_GetVector(IRQn);
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if (vector_static != vector) {
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error("No support for relocating vector table");
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}
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}
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uint32_t NVIC_GetVector(IRQn_Type IRQn)
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{
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uint32_t *vectors = (uint32_t*) NVIC_FLASH_VECTOR_ADDRESS;
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// Return the vector
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return vectors[IRQn + 16];
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}
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@ -33,4 +33,31 @@
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#endif
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#define NVIC_FLASH_VECTOR_ADDRESS 0
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** Set the ISR for IRQn
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*
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* Sets an Interrupt Service Routine vector for IRQn; if the feature is available, the vector table is relocated to SRAM
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* the first time this function is called
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* @param[in] IRQn The Interrupt Request number for which a vector will be registered
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* @param[in] vector The ISR vector to register for IRQn
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*/
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void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
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/** Get the ISR registered for IRQn
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*
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* Reads the Interrupt Service Routine currently registered for IRQn
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* @param[in] IRQn The Interrupt Request number the vector of which will be read
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* @return Returns the ISR registered for IRQn
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*/
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uint32_t NVIC_GetVector(IRQn_Type IRQn);
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#ifdef __cplusplus
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}
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#endif
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#endif
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@ -22,6 +22,7 @@
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#include "nu_modutil.h"
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#include "nu_miscutil.h"
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#include "mbed_critical.h"
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#include "mbed_wait_api.h"
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// lp_ticker tick = us = timestamp
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#define US_PER_TICK (1)
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@ -219,9 +220,6 @@ static void lp_ticker_arm_cd(void)
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uint32_t ctl_timer3 = timer3_base->CTL;
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ctl_timer3 &= ~TIMER_CTL_MODE_SEL_Msk;
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ctl_timer3 |= TIMER_ONESHOT_MODE;
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// Wait 3 cycles of engine clock to ensure previous CTL write action is finish
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nu_nop(SystemCoreClock / __LXT * 3);
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timer3_base->CTL = ctl_timer3;
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timer3_base->PRECNT = prescale_timer3;
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cd_minor_clks = cd_major_minor_clks;
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@ -230,8 +228,8 @@ static void lp_ticker_arm_cd(void)
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TIMER_EnableInt(timer3_base);
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TIMER_EnableWakeup((TIMER_T *) NU_MODBASE(timer3_modinit.modname));
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// Wait 3 cycles of engine clock to ensure previous CTL write action is finish
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nu_nop(SystemCoreClock / __LXT * 3);
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TIMER_Start(timer3_base);
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// Wait 2 cycles of engine clock to ensure previous CTL write action is finish
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wait_us(30 * 2);
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timer3_base->CTL = ctl_timer3 | TIMER_CTL_TMR_EN_Msk;
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}
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#endif
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@ -19,7 +19,7 @@
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#include <stdint.h>
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#if defined(TARGET_NUMAKER_PFM_NUC472)
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#if defined(TARGET_NUVOTON)
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#if defined(__CC_ARM)
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extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Base[];
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@ -45,68 +45,6 @@
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#error "no toolchain defined"
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#endif
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#elif defined(TARGET_NUMAKER_PFM_M453)
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#if defined(__CC_ARM)
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extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Base[];
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extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Length[];
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extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Base[];
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extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Length[];
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#define HEAP_START ((unsigned char*) Image$$ARM_LIB_HEAP$$ZI$$Base)
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#define HEAP_SIZE ((uint32_t) Image$$ARM_LIB_HEAP$$ZI$$Length)
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#define ISR_STACK_START ((unsigned char*)Image$$ARM_LIB_STACK$$ZI$$Base)
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#define ISR_STACK_SIZE ((uint32_t)Image$$ARM_LIB_STACK$$ZI$$Length)
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#elif defined(__GNUC__)
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extern uint32_t __StackTop[];
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extern uint32_t __StackLimit[];
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extern uint32_t __end__[];
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extern uint32_t __HeapLimit[];
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#define HEAP_START ((unsigned char*)__end__)
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#define HEAP_SIZE ((uint32_t)((uint32_t)__HeapLimit - (uint32_t)HEAP_START))
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#define ISR_STACK_START ((unsigned char*)__StackLimit)
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#define ISR_STACK_SIZE ((uint32_t)((uint32_t)__StackTop - (uint32_t)__StackLimit))
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#elif defined(__ICCARM__)
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/* No region declarations needed */
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#else
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#error "no toolchain defined"
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#endif
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#elif defined(TARGET_NUMAKER_PFM_NANO130)
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#ifndef OS_TASKCNT
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#define OS_TASKCNT 6
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#endif
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#ifndef OS_MAINSTKSIZE
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#define OS_MAINSTKSIZE 128
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#endif
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#ifndef OS_CLOCK
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#define OS_CLOCK 42000000
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#endif
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#if defined(__CC_ARM)
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extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Base[];
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extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Length[];
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extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Base[];
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extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Length[];
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#define HEAP_START ((unsigned char*) Image$$ARM_LIB_HEAP$$ZI$$Base)
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#define HEAP_SIZE ((uint32_t) Image$$ARM_LIB_HEAP$$ZI$$Length)
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#define ISR_STACK_START ((unsigned char*)Image$$ARM_LIB_STACK$$ZI$$Base)
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#define ISR_STACK_SIZE ((uint32_t)Image$$ARM_LIB_STACK$$ZI$$Length)
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#elif defined(__GNUC__)
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extern uint32_t __StackTop[];
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extern uint32_t __StackLimit[];
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extern uint32_t __end__[];
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extern uint32_t __HeapLimit[];
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#define HEAP_START ((unsigned char*)__end__)
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#define HEAP_SIZE ((uint32_t)((uint32_t)__HeapLimit - (uint32_t)HEAP_START))
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#define ISR_STACK_START ((unsigned char*)__StackLimit)
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#define ISR_STACK_SIZE ((uint32_t)((uint32_t)__StackTop - (uint32_t)__StackLimit))
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#elif defined(__ICCARM__)
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/* No region declarations needed */
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#else
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#error "no toolchain defined"
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#endif
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#endif
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#endif // TARGET_NUVOTON
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#endif // MBED_MBED_RTX_H
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@ -2920,6 +2920,7 @@
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"supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
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"inherits": ["Target"],
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"progen": {"target": "numaker-pfm-nano130"},
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"macros": ["CMSIS_VECTAB_VIRTUAL", "CMSIS_VECTAB_VIRTUAL_HEADER_FILE=\"cmsis_nvic.h\""],
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"device_has": ["ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH"],
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"release_versions": ["5"],
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"device_name": "NANO130KE3BN"
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