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[M487] Divert SRAM bank2 (32 KB) to CCM from SPIM cache 

Extend SRAM from 128 KB to 160 KB
pull/4608/head
ccli8 2017-06-01 11:31:50 +08:00
parent 30ab1007e4
commit cc2ab31d2c
5 changed files with 15 additions and 7 deletions
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4
targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_MICRO/M487.sct
View File

@ -20,9 +20,9 @@ LR_IROM1 0x00000000 {
.ANY (+RW +ZI)
}
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x20000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x28000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
}
}
ScatterAssert(LoadLimit(LR_IROM1) <= 0x00080000) ; 512 KB APROM
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20020000) ; 128 KB SRAM
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20028000) ; 160 KB SRAM

4
targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_STD/M487.sct
View File

@ -20,9 +20,9 @@ LR_IROM1 0x00000000 {
.ANY (+RW +ZI)
}
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x20000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x28000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
}
}
ScatterAssert(LoadLimit(LR_IROM1) <= 0x00080000) ; 512 KB APROM
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20020000) ; 128 KB SRAM
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20028000) ; 160 KB SRAM

2
targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_GCC_ARM/M487.ld
View File

@ -8,7 +8,7 @@ MEMORY
{
VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400
FLASH (rx) : ORIGIN = 0x00000400, LENGTH = 0x00080000 - 0x00000400
RAM_INTERN (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00020000 - 0x00000000
RAM_INTERN (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00028000 - 0x00000000
}
/**

4
targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_IAR/M487.icf
View File

@ -7,10 +7,10 @@ define symbol __ICFEDIT_intvec_start__ = 0x00000000;
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x00080000 - 1;
define symbol __ICFEDIT_region_IRAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_IRAM_end__ = 0x20020000 - 1;
define symbol __ICFEDIT_region_IRAM_end__ = 0x20028000 - 1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x800;
define symbol __ICFEDIT_size_heap__ = 0xC000;
define symbol __ICFEDIT_size_heap__ = 0x10000;
/**** End of ICF editor section. ###ICF###*/

8
targets/TARGET_NUVOTON/TARGET_M480/device/system_M480.c
View File

@ -80,5 +80,13 @@ void SystemInit (void)
/* Disable Flash Access Cycle Auto-tuning, set access cycle for CPU @ 192MHz */
FMC->CYCCTL = FMC_CYCCTL_FADIS_Msk | (8 << FMC_CYCCTL_CYCLE_Pos);
// Divert SRAM bank2 (32 KB) to CCM from SPIM cache
// NOTE: C-runtime not initialized yet. Ensure no static memory (global variable) are accessed in function below.
// NOTE: SPIM must keep enabled to run CCM mode.
CLK_EnableModuleClock(SPIM_MODULE);
SYS_ResetModule(SPIM_RST);
_SPIM_DISABLE_CACHE();
_SPIM_ENABLE_CCM();
while (! _SPIM_IS_CCM_EN());
}
/*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/