ARMmbed
/
mbed-os
mirror of https://github.com/ARMmbed/mbed-os.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
33,218 Commits
52 Branches
336 Tags
624 MiB
Commit Graph

590 Commits (0738aabb87476ae04ae9fae69f39250c2c9ce8ff)

Author SHA1 Message Date
Martin Kojtal 924af9481e
Merge pull request #10841 from VVESTM/vve_10827_spi_count 
TARGET_STM: Add DEVICE_SPI_COUNT to use SPIs without interference
 2019-06-26 09:09:38 +01:00
Martin Kojtal b0073bb70d
Merge pull request #10774 from fkjagodzinski/fix-uart_irq 
Fix serial IRQ handling
 2019-06-25 15:49:41 +01:00
Alexandre Bourdiol a339084684 STM32: pwmout_write: configure channel only when not already enabled 
Fix PWM glitch on write(), TARGET_STM/pwmout_api.c, #10734
 2019-06-20 17:49:16 +02:00
Vincent Veron 31eb49b918 TARGET_STM: Add DEVICE_SPI_COUNT to use SPIs without interference 
Extend to all STM targets the work done on PR10752.

Signed-off-by: Vincent Veron <vincent.veron@st.com>
 2019-06-14 14:15:56 +02:00
jeromecoutant 39ee51a017 STM32L4 warning compilation 
[-Wparentheses-equality]
 2019-06-07 18:10:17 +02:00
Filip Jagodzinski 53222fa448 STM32L4: Fix serial IRQ handling 
Check that the RX or TX interrupt is enabled before calling
a registered handler with RxIrq or TxIrq arg.
 2019-06-07 15:33:49 +02:00
jeromecoutant d919498745 STM32: common cmsis.h and device.h 2019-05-27 16:27:41 +02:00
jeromecoutant 570e9b0bf4 STM32 WATCHDOG : increase timeout value 2019-05-24 11:35:42 +02:00
jeromecoutant e29d64fc19 STM32 WATCHDOG : compilation issue with typed define 2019-05-24 11:35:40 +02:00
Guillermo Alonso 70bc390410 added QSPI support to target RHOMBIO_L476DMW1K 2019-05-07 15:44:09 +02:00
Martin Kojtal 1de0712272
Merge pull request #9944 from deepikabhavnani/stm32_splitheap 
GCC - Add support to split heap across 2-RAM banks
 2019-04-30 11:02:51 +01:00
Martin Kojtal 2cd7aa1148
Merge pull request #10303 from juhoeskeli/mem_changes 
STM32L4xx: IAR memory maps updated
 2019-04-29 13:46:46 +01:00
Anna Bridge 536da479dc
Merge pull request #10018 from deepikabhavnani/stm32_heap_armc6 
STM: Update linker script for using SRAM1 and SRAM2 in ARM
 2019-04-26 13:30:42 +01:00
Juho Eskeli 443974b864 STM32L4xx: IAR linker file updated to better use available memory 2019-04-23 12:53:53 +03:00
Deepika 4b7e163b57 Add missing boot stack size memory from heap calculation 2019-04-12 15:28:52 -05:00
Deepika feba293673 Update linker script for using SRAM1 and SRAM2 in ARM 
To have the flexibilty in application; to use any of the section
    (data/bss/heap) without updating linker script in every use case,
    following decisions are made:
    1. Fixed size and small sections moved to SRAM2 (32K)
        Vectors
        Crash data
        Remaining section - RW / ZI
    2. Large memory space should be used for variable sections
       RW/ZI
       Heap - (Minimum - 0x12000)
       Stack - At bottom
 2019-04-09 13:41:09 -05:00
Deepika 1576fb0aaa Add support for split heap in ST devices 2019-04-09 12:08:49 -05:00
Deepika 1a52587c2d Update the linker file to support single and multiple heap banks 2019-04-09 12:08:49 -05:00
Deepika 3593444e93 Add support of heap memory split between 2-RAM banks. 
Please note the heap address of the both the banks must not be contigious else
GCC considers it to be single memory bank and does allocation across the banks,
which might result into hard-fault
 2019-04-09 12:08:49 -05:00
Deepika 719d0fb94e Update linker script for split heap support 
To have the flexibilty in application; to use any of the section
(data/bss/heap) without updating linker script in every use case,
following decisions are made:

1. Fixed size and small sections moved to SRAM2 (32K)
    Vectors
    Crash data
    Stack
    Remaining section - Heap memory
2. Large memory space should be used for variable sections
   Data
   BSS
   Heap - Remaining section

Heap is moved to the end of both sections as GCC allocates till 4K boundary,
if end of heap is not aligned to 4K, that chunk of memory will go unutilized
 2019-04-09 12:08:49 -05:00
Marcus Chang 7c0714132c Expand sbrk to allocate memory from two regions 2019-04-09 12:08:49 -05:00
Deepika 36c7b2de86 uARM - Move heap region after IRAM1 
ARM_LIB_HEAP start is aligned to IRAM1 end, hence should be placed next to
RW_IRAM1 i.e. no other region in between.
 2019-04-09 12:01:01 -05:00
jeromecoutant ec00ea5655 STM32 ADC INTERNAL CHANNEL reset after read 
Internal channels use is enabling ADC "internal path"
which needs to be disabled after measurement
 2019-03-29 14:30:49 +01:00
Martin Kojtal f76436c955
Merge pull request #10181 from jeromecoutant/PR_STMOD 
DISCO_L496AG: Add PMOD and STMOD+ connector
 2019-03-22 11:17:12 +01:00
jeromecoutant 9ac9288229 DISCO_L496AG: Add PMOD and STMOD+ connector 2019-03-21 10:35:11 +01:00
Juho Eskeli a3beb1081e MTB_STM_L475: fix UART clock 2019-03-20 16:52:28 +02:00
Deepika 122549910e Add Crash report section to all uARM files 2019-02-28 19:54:38 -06:00
deepikabhavnani 0dc5561991 Guard RAM start and size defines 2019-02-28 19:54:38 -06:00
deepikabhavnani b598dc1f46 Target_STM: Add ARM_LIB_STACK and ARM_LIB_HEAP section 
Instead of user defined symbols in assembly files or C files,
use linker scripts to add heap and stack - this is inconsistent
with ARM std linker scripts
 2019-02-28 19:54:28 -06:00
Cruz Monrreal e1736cd06f
Merge pull request #9571 from mprse/fix_9523_rtos_less_issue 
Update to 2-region model for HEAP and Stack Memory
 2019-02-26 22:50:19 -06:00
bcostm aa2b76a995 STM32L4 USB: move HAL_PCD_EP_Abort function 
This function is for USB_OTG_FS devices only. Move it in the correct place (in "#ifdef USB_OTG_FS" area).
 2019-02-22 10:53:22 -06:00
bcostm 4ca33aa266 STM32L4 USB: add patch in CubeL4 hal driver 2019-02-22 10:53:22 -06:00
Cruz Monrreal bba538c714
Merge pull request #9777 from ashok-rao/MTB_STM_L475 
Adding STM32_L475 as a new MTB target
 2019-02-21 10:37:59 -06:00
Guillermo Alonso 16628d7b8d Change in license identifier, removed commented dead code 
Change in license identifier
Removed commented dead code
Removed some tab space
 2019-02-21 11:55:41 +01:00
Ashok Rao 9102b59824 Changing SPDX license identifier to BSD-3-Clause 2019-02-21 10:35:25 +00:00
Guillermo Alonso faf03e02dc added licence identifier texts 2019-02-20 17:48:07 +01:00
Ashok Rao 6c3b732b17 Removing redundant code comments 2019-02-20 15:22:11 +00:00
Ashok Rao a7c878bb47 Adding SPDX license identifer for all new files 2019-02-20 15:07:03 +00:00
Ashok Rao 56508cfc4e Adding SPDX license identifier 2019-02-20 15:02:59 +00:00
Ashok Rao 1849921466 Adding STM32_L475 as a new MTB target 2019-02-20 14:40:39 +00:00
Guillermo Alonso 7b2abc75c2 Added new target RHOMBIO_L476DMW1K 2019-02-20 12:10:53 +01:00
Deepika e522c4691e Target_STM:_sbrk updated to use limits from linker files no need to set defines 
_sbrk uses the exports from linker file __end and __HeapLimit to allocate memory
in heap. Linker scripts were updated accordingly to set the limits.
 2019-02-19 15:49:49 -06:00
Russ Butler 3bd3aca6db Add HAL API for analog out pinmap 
Add the function analogout_pinmap to all targets.
 2019-02-08 09:10:05 -06:00
Russ Butler 4818f88d73 Add HAL API for analog in pinmap 
Add the function analogin_pinmap to all targets.
 2019-02-08 09:09:51 -06:00
Nir Sonnenschein 8c2ad14ace
Merge pull request #9568 from ARMmbed/feature-cellular-refactor 
Merge feature cellular refactor
 2019-02-07 18:17:32 +02:00
Martin Kojtal ed53fe1ed4
Merge pull request #9534 from jeromecoutant/PR_FLOW 
STM32 Serial Flow Control
 2019-02-04 14:35:47 +01:00
Lin Gao 837e86df28 Updated linker script for IAR and ARM to increase heap size by moving BSS to the 32K ram 2019-02-01 16:03:20 -06:00
Lin Gao aa2d49ae0c Move BSS to SRAM2 to increase heap size on ST475 IOT board 2019-02-01 15:32:43 -06:00
jeromecoutant eec7126d37 STM32 Serial Flow Control 
Crash occured when RTS=CTS=NC
Now we chek if used pins are the same UART as TX and RX
 2019-01-31 17:11:23 +01:00
Ari Parkkila 7578d5b174 Cellular: Fix mbed2-build of onboard-modems 2019-01-29 01:08:17 -08:00
Martin Kojtal 489e52e428
Merge pull request #9410 from jeromecoutant/PR_F756_L486 
STM32F756 and STM32L486 alignment with STM32F746 and STM32L476
 2019-01-28 10:22:48 +01:00
Ari Parkkila 95839662c6 Cellular: Fix cellular specific Greentea tests 2019-01-24 23:34:44 -08:00
Martin Kojtal a6509cf47f
Merge pull request #9438 from c1728p9/qspi_update 
Use dedicated PinMap for each QSPI data line
 2019-01-23 14:25:14 +01:00
Russ Butler 82b131aa59 Use dedicated PinMap for each QSPI data line 
Split PinMap_QSPI_DATA into PinMap_QSPI_DATA0 - PinMap_QSPI_DATA3.
This allows pins to be selected more accurately.
 2019-01-22 12:11:15 -06:00
Ari Parkkila af0d2cf61d Cellular: Update API description to match better onboard_modem_api 2019-01-22 02:24:45 -08:00
Ari Parkkila c4de2f2f0e Cellular: Power API updated to match onboard_modem_api 2019-01-22 02:24:45 -08:00
Ari Parkkila 269d151b12 Cellular: Default modem drivers with FF_ARDUINO 2019-01-22 02:24:45 -08:00
Ari Parkkila 75caa75a96 Cellular: Add get_target_default_instance in CellularDevice 2019-01-22 02:24:45 -08:00
jeromecoutant 7876a653c6 STM32L476 / STM32L486 alignment 2019-01-17 11:15:39 -06:00
jeromecoutant 8e0663f8d8 STM32L496xG: increase IAR heap size 2019-01-17 11:15:19 -06:00
Martin Kojtal fd6ceda960
Merge pull request #9323 from jeromecoutant/PR_AST 
STM32: astyle check
 2019-01-11 14:06:05 +00:00
Cruz Monrreal 2454b25eba
Merge pull request #9092 from mprse/stack_unification_sec_try 
Interrupt stack size unification + test
 2019-01-10 16:08:44 -06:00
jeromecoutant b1a284a876 STM32: astyle check 2019-01-10 10:22:21 +01:00
kevin.ong d3dfc986b5 STM32L476VG: fix wrong pin map function on ADC channels 
This issue is start on https://github.com/ARMmbed/mbed-os/pull/6931

ADC pins must need STM_PIN_ANALOG_CONTROL_BIT to call LL_GPIO_EnablePinAnalogControl
 2019-01-10 00:39:18 +08:00
Przemyslaw Stekiel 58f6bf7292 [STM] Support boot stack size configuration option 2019-01-08 15:32:06 +01:00
Martin Kojtal 63eca294a1
Merge pull request #9163 from InfernoEmbedded/fix-8913-partner 
Don't use define checks on DEVICE_FOO macros (partner code)
 2019-01-07 16:37:24 +00:00
jeromecoutant 164fee0e61 STM32L4 ADC VBAT CHANNEL 2019-01-04 09:15:32 +01:00
Alastair D'Silva aa80b7c70a Don't use define checks on DEVICE_FOO macros (partner code) 
The DEVICE_FOO macros are always defined (either 0 or 1).

This patch replaces any instances of a define check on a DEVICE_FOO
macro with value test instead.

Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
 2018-12-20 20:02:29 +11:00
jeromecoutant 9790f67acc STM32L4 QSPI: correct register address 2018-12-13 10:56:39 +01:00
jeromecoutant 40f6d58b89 STM32 QSPI: remove QUADSPI_BK2 as dual bank feature is not supported 2018-12-13 10:56:37 +01:00
jeromecoutant b5bc128e36 STM32L496 : add QSPI definition 2018-12-13 10:56:31 +01:00
jeromecoutant 7c8de3c4e1 STM32 : removed unused QSPI pin names 2018-12-13 10:56:25 +01:00
jeromecoutant 6b226ffcef STM32 RTC update for easy maintenance 2018-12-04 11:08:30 +01:00
Senthil Ramakrishnan ef8c1c3cb6 Linker script modifications for crash data region 2018-11-16 13:59:59 -06:00
Teppo Järvelin 1b3db96634 Cellular: Added missing MDMRTS and MDMCTS for TARGET_MTB_ADV_WISE_1570. 2018-11-13 09:06:40 +02:00
Cruz Monrreal II 6b386f5237 Merge branch 'update_peripheral_pins' of ssh://github.com/MultiTechSystems/mbed into rollup 2018-11-08 13:24:07 -06:00
David Saada 542744d03c Support erase value in Flash HAL drivers, FlashIAP and block devices 2018-11-07 14:23:07 +02:00
Leon Lindenfelser a360b0012f Update peripheral pins 
1. Add missing SPI and I2C pins.
2. Remove pin definitions for pins that are no connects.
 2018-11-06 08:46:38 -06:00
bcostm 66ab546200 NUCLEO_L4R5ZI: fix 8-bytes data alignment 2018-10-26 10:58:00 +02:00
micgur01 6c191c0241 code review for Update linker scripts for bootloader target L496GZ 2018-10-24 11:17:56 +00:00
micgur01 2215a9ab5e code review for Update linker scripts for bootloader target L496GZ 2018-10-24 09:48:05 +00:00
micgur01 534883046d change mode to 664 2018-10-23 12:58:52 +00:00
micgur01 ff4b567537 Update linker scripts for bootloader for L496GZ 2018-10-23 12:57:05 +00:00
Cruz Monrreal 4903f324a1
Merge pull request #8013 from deepikabhavnani/stm_fix_align 
STM32: Fix alignment of execute region to 8byte boundary
 2018-10-10 08:40:55 -05:00
Deepika bf1a2c8485 [ST]: Fix alignment of execute region to 8-byte boundary in ARM linker files 
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files should strictly align to 8-byte boundary
 2018-10-09 14:47:14 -05:00
Martin Kojtal 17762b4998
Merge pull request #8263 from juhoeskeli/flash_api_stm32l4 
STM32L4: clear error programming flags before erase & program operations
 2018-10-09 10:33:50 -05:00
Cruz Monrreal 5a1c49fa6d
Merge pull request #8168 from jeromecoutant/PR_ADC_DISCOL496 
DISCO_L496AG : enable ADC
 2018-10-08 10:10:44 -05:00
Martin Kojtal 365d61e4a9
Merge pull request #7304 from cedrickkukela-cd/MTS_DRAGONFLY_L471QG_pull_request_feature_changes 
Add MTS dragonfly, MTS dragonfly l471
 2018-10-08 11:06:23 +02:00
Martin Kojtal 72fa1e0e8f
Merge pull request #8119 from jeromecoutant/PR_L4_ADC 
STM32L496 : wrong ADC init
 2018-10-05 19:53:25 +02:00
Martin Kojtal f7f6d4d2d8
Merge pull request #7585 from bcostm/dev_NUCLEO_L4R5ZI 
NUCLEO_L4R5ZI: add new platform
 2018-10-05 14:53:11 +02:00
Martin Kojtal 7a057d7ec8
Merge pull request #8085 from jeromecoutant/PR_RTC_LSI 
STM32 RTC : start LSI clock (for targets without LSE)
 2018-10-04 13:37:53 +02:00
Leon Lindenfelser 9f9a85830f Configure IAR stack size to 1KB 2018-10-02 13:34:16 -05:00
Juho Eskeli f7a030ef7c Remove redundant error flag clearing operation 2018-10-02 09:18:03 +03:00
bcostm 909ce3590a NUCLEO_L4R5ZI: set IAR linker stack size to 1KB 2018-09-27 12:03:08 +02:00
bcostm 5b4ff94bff NUCLEO_L4R5ZI: change _ALTx pins 2018-09-27 12:03:07 +02:00
bcostm ee5aff7e18 NUCLEO_L4R5ZI: remove PWM_5 pins as already used by us_ticker 2018-09-27 12:03:07 +02:00
bcostm a644ddd2e7 NUCLEO_L4R5ZI: enable bootloader 2018-09-27 12:03:07 +02:00
bcostm 3a722358b1 NUCLEO_L4R5ZI: add missing timer freeze macro 2018-09-27 12:03:07 +02:00
bcostm ef33ff5524 NUCLEO_L4R5ZI: add all board files 2018-09-27 12:03:07 +02:00
Leon Lindenfelser a80b2369c3 Decrease heap size in IAR linker so tests compile and use SRAM2 for IAR and GCC 2018-09-26 15:39:42 -05:00
Leon Lindenfelser 5ff0eb9d92 Rebase and changes for Dragonfly nano support 2018-09-26 15:39:42 -05:00
Leon Lindenfelser 31d04b05b7 Rebased on master mbed-os 9/7/18 
This required replacing hal_tick.h with us_ticker_data.h
 2018-09-26 15:37:33 -05:00
Leon Lindenfelser 3bb8543e5b Remove commented out code 2018-09-26 15:37:33 -05:00
Leon Lindenfelser 55bcf93574 Fixed spacing/tabs and clean up targets.json 2018-09-26 15:37:33 -05:00
Leon Lindenfelser fad95e9a7d Fix rev D radio init/power/reset and add back bootloader capability 2018-09-26 15:37:33 -05:00
cedrick kukela 463182d372 REV D change for modem on 2018-09-26 15:37:33 -05:00
cedrick kukela 1064994095 Rev c pin name fix 2018-09-26 15:37:33 -05:00
cedrick kukela 7f29f837d1 remove blanks 2018-09-26 15:37:33 -05:00
cedrick kukela 56fa71cbd3 delete file 2018-09-26 15:37:33 -05:00
cedrick kukela 50254bcc61 change startup and s file names to match target 2018-09-26 15:37:33 -05:00
cedrick kukela 5e1bb381cd fixing onboard modem init bug on mts dragonfly l471 2018-09-26 15:37:32 -05:00
cedrick kukela e2e5d9ed43 Ublox and PinName fixes 2018-09-26 15:37:32 -05:00
cedrick kukela c18eef804e adding TARGET MTS_DRAGONFLY_L471QG 2018-09-26 15:37:32 -05:00
Juho Eskeli 3a6b52fd15 Clear error programming flags before erase & program operations 2018-09-26 22:58:49 +03:00
jeromecoutant f510efff38 DISCO_L496AG : enable ADC 
See User Manual, VREF+ is not connected by default

NB: Use 2.5V as reference (instead of 3.3V)
for internal channels calculation
 2018-09-18 16:11:13 +02:00
Martin Kojtal b97ac0c353
Merge pull request #7787 from jeromecoutant/PR_MSI_LSE 
STM32L4 : code cleanup in MSI SetSysClock
 2018-09-17 14:22:29 +02:00
jeromecoutant 2a70879ffa STM32L496 : wrong ADC init 2018-09-13 16:31:49 +02:00
jeromecoutant 827c8bd486 STM32 RTC : remove not necessary macro 
__HAL_RCC_RTC_CLKPRESCALER is called in __HAL_RCC_RTC_CONFIG
 2018-09-11 14:14:19 +02:00
Cruz Monrreal d311a96061
Merge pull request #7950 from c1728p9/l4_malloc_fix 
Fix memory allocation on STM32L4 devices
 2018-09-07 22:50:05 -05:00
Russ Butler e084865e8e Fix comparison warning on STM32L4 devices 
Cast the pointer used in l4_retarget to uint32_t before comparing it
to fix the warning:
"comparison between pointer and integer"
 2018-09-06 16:07:03 +01:00
Maciej Bocianski 050604f1b8 DISCO_L475VG_IOT01A remove old QSPI pins 2018-09-05 09:58:20 +02:00
Russ Butler e2d003a420 Fix memory allocation on STM32L4 devices 
Depending on initial size allocated on STM32L4 devices with
TWO_RAM_REGIONS  set a crash may occur. This is because there is a
mismatch between the size newlib is expecting and the size actually
returned by _sbrk. This is because the STM32L4 implementation of _sbrk
is performing alignment internally.

This patch fixes this problem by removing the code in __wrap__sbrk
which performs the alignment.
 2018-08-31 18:31:52 -05:00
Maciej Bocianski 5195c820e6 standardise QSPI pin names 2018-08-24 12:09:51 +02:00
adustm 7dda4e4fc6 Implement qspi_free function 2018-08-22 15:02:10 +02:00
jeromecoutant 43258a8ff4 STM32 : add all QSPI pins in available targets 2018-08-22 15:02:08 +02:00
Maciej Bocianski 67798d6eb2 STM: add qspi pin names for DISCO_L475VG_IOT01A 2018-08-22 15:02:04 +02:00
adustm 2f06423a89 Add support for QSPI on DISCO_L476VG 2018-08-22 15:02:01 +02:00
Martin Kojtal d282c81e86 QSPI: add STM32L4 support 
Disco IoT board support for QSPI. As it does not have dual flash support in QSPI,
we need to fix qspi hal implementation.
 2018-08-22 15:00:17 +02:00
jeromecoutant b5c258e398 STM32L4 : code cleanup in MSI SetSysClock 2018-08-14 09:20:52 +02:00
jeromecoutant 063cad5992 STM32L4 assert in SetSysClock replaced 2018-08-13 16:01:49 +02:00
Laurent Meunier 402f3f1c3f STM32: check for UART ongoing transfers before entering deepsleep 
As suggested by Russ Butler in mbed-os issue #7328, and until there is an
implementation of mbed-os issue #4408, we are implementing a workaround
at HAL level to check if there is any ongoing serial transfer (which happens
if HW FIFO is not yet empty).

In case a transfer is ongoing, we're not entering deep sleep and
return immediately.
 2018-08-07 11:30:53 +02:00
bcostm bf8587ed50 STM32L496: fix RAM size in ARM scatter file 2018-07-19 14:02:05 +02:00
bcostm 7097e07b62 stm32 ticker: typo corrections 2018-07-11 14:43:36 +02:00
bcostm d8e839a789 stm32 ticker: change license 2018-07-11 14:43:16 +02:00
bcostm 32031cbab3 stm32 ticker: rename hal_tick.h in us_ticker_data.h 2018-07-11 14:42:44 +02:00
bcostm fbd7a97e19 stm32 ticker: rename macro and update ST HAL Tick functions 
- rename TIM_MST_16BIT in TIM_MST_BIT_WIDTH in order to use it directly in ticker info structure
- change HAL_InitTick() and HAL_GetTick()
 2018-07-11 14:39:42 +02:00
bcostm b6beb74d9d DISCO_L496AG: update LEDs comments in PeripheralPins.c 2018-07-02 10:27:23 +02:00
bcostm a9ba4f9bf5 DISCO_L496AG: change LED1 and LED2 pins 2018-07-02 10:20:49 +02:00
jeromecoutant 3721ac44d2 STM32 serial RX/TX active patch 
In serial_tx_active and serial_rx_active functions,
we check the internal state value with

HAL_UART_STATE_BUSY_TX = 0x21U,
HAL_UART_STATE_BUSY_RX = 0x22U,

It seems that value can also be :
HAL_UART_STATE_BUSY_TX_RX = 0x23U,
 2018-06-28 18:05:52 +02:00
jeromecoutant 78410e7032 TARGET_STM32L4 astyle 2018-06-27 14:46:00 +02:00
Cruz Monrreal cc1e4f0ff8
Merge pull request #7205 from bcostm/fix_hash_data_alignment 
STM32: Fix data alignment issue in HASH function for F2, F7, L4
 2018-06-20 07:55:57 -05:00
Martin Kojtal c964f2ee66
Merge pull request #7226 from juhoeskeli/wise_1570_app_start 
Make MTB_ADV_WISE_1570 respect MBED_APP_START & enable bootloader
 2018-06-19 14:12:07 +02:00
Juho Eskeli 699601535e Make MTB_ADV_WISE_1570 respect MBED_APP_START & enable bootloader 2018-06-15 13:05:00 +03:00
bcostm b5a8dc513c fix hash alignment of F2, F7, L4 2018-06-13 11:51:24 +02:00
bcostm b087390a1a Remove HAL_TICK_DELAY (no more used) 2018-06-05 16:53:40 +02:00
Cruz Monrreal 07fb7c1adc
Merge pull request #6987 from jeromecoutant/PR_ADC 
STM32 ADC update
 2018-06-02 19:52:51 -05:00
Alan Chuang 7f4272d9a7 make uart console port configurable via mbed_app.json 2018-05-25 16:30:57 +08:00
jeromecoutant 7fd4203b58 STM32L4 ADC internal channels update 2018-05-22 13:18:25 +02:00
jeromecoutant b30f3abf11 STM32 PeripheralPins.c second update after review 
genpinmap script version 1.1
 2018-05-17 17:58:09 +02:00
jeromecoutant 3ac1855d93 STM32L4 DISCO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:05:14 +02:00
jeromecoutant 3e92ff1f85 STM32L4 NUCLEO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:04:41 +02:00
Cruz Monrreal e2567e5dad
Merge pull request #6599 from jeromecoutant/PR_WARNING 
STM32 compilation warning issues
 2018-04-16 10:41:36 -05:00
Paul Thompson 20f11bc13f Extend changes to other STM32 devices that have the PCD_WriteEmptyTxFifo() function 2018-04-13 05:27:03 -07:00
jeromecoutant 71d7d24bd6 STM32L4 : correct compilation warnings 2018-04-12 10:56:41 +02:00
Jimmy Brisson d374bb4a5a Correct armc6 detection logic 2018-04-05 15:13:52 -05:00
Cruz Monrreal 7c272fa3e8
Merge pull request #6412 from jeromecoutant/PR_L4_ADC 
STM32L4 ADC correct internal channel management
 2018-03-22 11:27:50 -05:00
Cruz Monrreal 04a3635eba
Merge pull request #6399 from jeromecoutant/PR_L4_TEMP 
STM32L4 ADC Internal Channel : correct sampling time
 2018-03-22 11:27:30 -05:00
jeromecoutant ef006931f8 STM32L4 ADC correct internal channel management 2018-03-21 10:57:57 +01:00
Cruz Monrreal 6cb6dd9e62
Merge pull request #6330 from bcostm/fix_pins_nucleo_l433rc_p 
NUCLEO_L433RC_P: fix pins definitions
 2018-03-20 14:56:05 -05:00
jeromecoutant 6c369d17aa STM32L4 ADC Internal Channel : correct sampling time 2018-03-20 13:15:17 +01:00
bcostm 64a824abd2 DISCO_L496AG: add system clock file (same as Nucleo) 2018-03-16 10:02:12 +01:00
bcostm ade8583044 DISCO_L496AG: add other pins related files 2018-03-16 10:02:11 +01:00
bcostm 63901a803c DISCO_L496AG: remove QSPI2 
Base adress not found in registers map file but found in CubeMX xml file.
 2018-03-16 10:02:11 +01:00
bcostm eab3e95158 DISCO_L496AG: add PeripheralPins.c 2018-03-16 10:02:11 +01:00
bcostm 8fe02803e1 NUCLEO_L433RC_P: fix LEDs pin assignment 2018-03-12 11:30:52 +01:00
adustm 67953251f9 Use official toolchain defines 2018-02-23 10:29:29 +01:00
adustm f551255ded Add support of separate memories for heap and stack region swith the use of TWO_RAM_REGIONS define 2018-02-22 17:37:34 +01:00
adustm 02b2b01a83 Change STM32L475/76/86 GCC_ARM linker files to have HEAP in SRAM1 and stack in SRAM2 (after the interrupt vector) 2018-02-22 17:36:27 +01:00
Cruz Monrreal 1c5c1c79d0
Merge pull request #6027 from ithinuel/fix-target-names-for-murata-abz-and-adv-wise-1510 
rename MURATA type ABZ & WISE 1510 to their expected name
 2018-02-07 20:06:50 -06:00
Cruz Monrreal 1ac115d794
Merge pull request #6013 from kivaisan/add-wise-1570 
Add MTB_ADV_WISE_1570 target
 2018-02-07 20:05:38 -06:00
Wilfried Chauveau 6c9fcf3dd8 rename MURATA type ABZ & WISE_1510 to their expected name 2018-02-06 21:23:37 +00:00
Kimmo Vaisanen 4dad23a6a3 Add WISE-1570 external pin names 2018-02-05 14:47:52 +02:00
Kimmo Vaisanen 41490f48d0 Add MTB_ADV_WISE_1570 target 2018-02-05 14:31:20 +02:00
bcostm 937db051da STM32L476/486: change SRAM config for IAR 2018-02-02 10:23:28 +01:00
Cruz Monrreal f907012e55
Merge pull request #5962 from bcostm/fix_usart_irq_index 
STM32: Fix usart irq index
 2018-01-31 12:16:17 -06:00
Wilfried Chauveau 3608627a48 fix a silent conflict with PR #5947 2018-01-31 00:48:40 +00:00
Cruz Monrreal b87e98c57b
Merge pull request #5904 from ithinuel/add-wise-1510 
add support for STM32L443RC & WISE-1510
 2018-01-30 15:01:00 -06:00
Cruz Monrreal fff6c75e28
Merge pull request #5936 from jeromecoutant/PR_WEAK_PINMAP 
STM32 : set all PinMap structures as weak
 2018-01-30 14:56:42 -06:00
Cruz Monrreal 10e67e659c
Merge pull request #5947 from jeromecoutant/PR_L4_PLUART 
STM32L4 : add missing ST HAL UART functions
 2018-01-30 14:46:15 -06:00
bcostm 84269c7ca2 STM32 serial: improve irq index management for L4 devices 2018-01-29 17:23:21 +01:00
jeromecoutant 8f647beacb STM32 : set all PinMap structures as weak 
This allow custom overwrites
 2018-01-29 09:26:49 +01:00
Wilfried Chauveau e6b19d838c add support for STM32L443RC & WISE-1510 2018-01-26 17:06:39 +00:00
jeromecoutant c9c6857c7c STM32 NUCLEO F413ZH and L433RC : STDIO configuration 
#5795 patches are missing for these 2 targets
STDIO_UART_TX and STDIO_UART_RX can be now user defined
 2018-01-26 17:50:10 +01:00
jeromecoutant 7979f4d255 SMT32L4 : add missing ST HAL LPUART functions 
To enable/disable UART Clock in Stop Mode
 2018-01-26 16:24:54 +01:00
Cruz Monrreal f1cf77fa44
Merge pull request #5844 from adustm/DiscoIot_L475_iarlink 
ST-DISCO_L475VG_IOT01A: Improve SRAM use for IAR toolchain
 2018-01-23 16:23:08 -06:00
jeromecoutant 6086c51234 STM32LX : HAL_RCC_OscConfig update in PLL configuration 
check PLL settings before retuuning error
 2018-01-22 13:35:11 +01:00
Cruz Monrreal 635a82495c
Merge pull request #5834 from bcostm/PULL_REQUEST_CUBE_UPDATE_L4_V1.11.0 
STM32L4: Update ST Cube HAL to V1.11.0
 2018-01-16 16:36:37 -06:00
adustm 5104f2d1cc Improve SRAM use for IAR toolchain 
Use the entire SRAM2 with NVIC buffer + stack
  Increase HEAP size to 0x10000 in SRAM1
  Increase the available SRAM1 by 0x2000
 2018-01-12 15:49:27 +01:00
bcostm d50c329c68 Use legacy CAN api 2018-01-12 11:17:29 +01:00
bcostm 06f097884c Update stm32l4xxxx.h files 2018-01-12 11:11:32 +01:00
bcostm a4f9012a0a Update stm32l4xx.h files 2018-01-12 11:11:31 +01:00
bcostm dda34ea206 Update system_stm32l4xx.c with latest version 2018-01-12 11:11:31 +01:00
bcostm 43a31557dc Remove release notes file 2018-01-12 11:11:31 +01:00
bcostm 0448d64f62 Add more comments 2018-01-12 11:11:31 +01:00
bcostm 84577f9634 L4 ST CUBE V1.11.0 
Update to STM32CubeL4 V1.11.0

Conflicts solved:
	targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/stm32l433xx.h
	targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/stm32l4xx.h
	targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/stm32l496xx.h
	targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/stm32l4xx.h
	targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_conf.h
	targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_def.h
	targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_i2c.c
	targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_spi.h
 2018-01-12 11:11:31 +01:00
jeromecoutant 59b4b228c4 STM32L4: STDIO_UART_TX and STDIO_UART_RX can be now user defined 2018-01-08 11:12:35 +01:00
Jimmy Brisson 62a7ecddd3
Merge pull request #5570 from jeromecoutant/PR_STDIO 
STM32 UART init update
 2018-01-04 09:50:18 -06:00
jeromecoutant 4637279f51 STM32L4 : compilation issue 
Issue comes only when ST HAL macro USE_FULL_ASSERT is enabled
 2017-12-13 13:57:17 +01:00
Helmut Tschemernjak 63ad3aeae3 Added the proper defines for the STM32L432 bootloader support 2017-11-27 15:41:30 +01:00
Helmut Tschemernjak 4778a40643 Changed NVIC Flash base address to support the bootloader 2017-11-27 15:32:53 +01:00