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Merge pull request from mprse/stack_unification_sec_try 

Interrupt stack size unification + test
pull/9346/head
Cruz Monrreal 2019-01-10 16:08:44 -06:00 committed by GitHub
parent 12980f4acd ef681bf18d
commit 2454b25eba
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
445 changed files with 3177 additions and 596 deletions
TESTS/mbed_hal/stack_size_unification
rtos/TARGET_CORTEX
TOOLCHAIN_ARM_MICRO
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
mbed_boot.h
targets
TARGET_ARM_FM/TARGET_FVP_MPS2
TARGET_FVP_MPS2_M0/device
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_FVP_MPS2_M0P/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_FVP_MPS2_M3/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_FVP_MPS2_M4/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_FVP_MPS2_M7/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_ARM_SSG
TARGET_BEETLE/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_CM3DS_MPS2/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_IOTSS/TARGET_IOTSS_BEID/device/TOOLCHAIN_ARM_STD
TARGET_MPS2
TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD
TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD
TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD
TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD
TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD
TARGET_Analog_Devices
TARGET_ADUCM302X/TARGET_ADUCM3029
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_ADUCM4X50/TARGET_ADUCM4050
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_Atmel
TARGET_SAM_CortexM0P
TARGET_SAMD21G18A/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TARGET_SAMD21J18A/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TARGET_SAML21J18A/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TARGET_SAMR21G18A/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TARGET_SAM_CortexM4/TARGET_SAMG55J19/device/TOOLCHAIN_GCC_ARM
TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX
TARGET_MCU_PSOC6_M0/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_MCU_PSOC6_M4/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_Freescale
TARGET_K20XX
TARGET_K20D50M/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_TEENSY3_1/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TARGET_KLXX
TARGET_KL05Z/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_KL25Z/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TOOLCHAIN_GCC_CW_EWL
TOOLCHAIN_GCC_CW_NEWLIB
TOOLCHAIN_IAR
TARGET_KL26Z/device
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_KL46Z/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_MCUXpresso_MCUS
TARGET_K66F/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_K82F/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_KL27Z/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_KL43Z/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_KL82Z/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_KW24D/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_KW41Z/device/TOOLCHAIN_ARM_STD
TARGET_MCU_K22F/TARGET_MCU_K22F512/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_MCU_K24F/TARGET_MCU_K24F1M/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device
TOOLCHAIN_ARM_STD
TOOLCHAIN_GCC_ARM
TOOLCHAIN_IAR
TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_ARM_STD
Show More

76
TESTS/mbed_hal/stack_size_unification/main.cpp Normal file
View File

@ -0,0 +1,76 @@
/* mbed Microcontroller Library
* Copyright (c) 2019-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "mbed.h"
#include "greentea-client/test_env.h"
#include "unity.h"
#include "utest.h"
#ifdef TARGET_RENESAS
#error [NOT_SUPPORTED] Cortex-A target not supported for this test
#endif
using namespace utest::v1;
extern osThreadAttr_t _main_thread_attr;
extern uint32_t mbed_stack_isr_size;
/* Exception for Nordic boards - BLE requires 2KB ISR stack. */
#if defined(TARGET_NRF5x)
#define EXPECTED_ISR_STACK_SIZE (2048)
#else
#define EXPECTED_ISR_STACK_SIZE (1024)
#endif
#if defined(TARGET_NUCLEO_F070RB) || defined(TARGET_NANO100) || defined(TARGET_STM32F072RB) || defined(TARGET_TMPM46B) || defined(TARGET_TMPM066)
#define EXPECTED_MAIN_THREAD_STACK_SIZE (3072)
#else
#define EXPECTED_MAIN_THREAD_STACK_SIZE (4096)
#endif
#define EXPECTED_USER_THREAD_DEFAULT_STACK_SIZE (4096)
/* Test sizes of ISR stack, main thread stack, default user thread stack.
*
* On some platforms with lower RAM size (e.g. NUCLEO_F070RB - 16 KB RAM) it is impossible
* to create thread with default stack size to check its size, that is why we will
* check only macro which specifies default user thread stack.
*
*/
void stack_size_unification_test()
{
TEST_ASSERT_EQUAL(EXPECTED_ISR_STACK_SIZE, mbed_stack_isr_size);
TEST_ASSERT_EQUAL(EXPECTED_MAIN_THREAD_STACK_SIZE, _main_thread_attr.stack_size);
TEST_ASSERT_EQUAL(EXPECTED_USER_THREAD_DEFAULT_STACK_SIZE, OS_STACK_SIZE);
}
utest::v1::status_t test_setup(const size_t number_of_cases)
{
GREENTEA_SETUP(10, "default_auto");
return verbose_test_setup_handler(number_of_cases);
}
Case cases[] = {
Case("Stack size unification test", stack_size_unification_test)
};
Specification specification(test_setup, cases);
int main()
{
return !Harness::run(specification);
}

51
TESTS/mbed_hal/stack_size_unification/stack_size_unification.h Normal file
View File

@ -0,0 +1,51 @@
/* mbed Microcontroller Library
* Copyright (c) 2019-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/** \addtogroup hal_rtc_tests
* @{
*/
#ifndef MBED_STACK_SIZE_UNIFICATION_H
#define MBED_STACK_SIZE_UNIFICATION_H
#ifdef __cplusplus
extern "C" {
#endif
/** Test sizes of ISR stack, main thread stack, default user thread stack.
*
* Given is Mbed OS configuration.
* When ISR stack, main thread stack, default user thread stack sizes are defined.
* Then ISR stack size is equal to 1 KB,
* main thread stack size is equal to 4 KB,
* default user thread stack size is equal to 4 KB.
*
* NOTE:
* It is impossible to verify RTOS-less thread stack size since all tests are build with RTOS.
*/
void stack_size_unification_test(void);
/**@}*/
#ifdef __cplusplus
}
#endif
#endif
/** @}*/

4
rtos/TARGET_CORTEX/TOOLCHAIN_ARM_MICRO/mbed_boot_arm_micro.c
View File

@ -25,6 +25,10 @@ extern uint32_t __initial_sp[];
extern uint32_t __heap_base[];
extern uint32_t __heap_limit[];
#if !defined(ISR_STACK_SIZE)
#define ISR_STACK_SIZE ((uint32_t)1024)
#endif
/*
* mbed entry point for the MICROLIB toolchain
*

11
rtos/TARGET_CORTEX/TOOLCHAIN_ARM_STD/mbed_boot_arm_std.c
View File

@ -27,11 +27,20 @@
__value_in_regs struct __argc_argv __rt_lib_init(unsigned heapbase, unsigned heaptop);
void _platform_post_stackheap_init(void);
#if !defined(ISR_STACK_SIZE)
#if (defined(__CC_ARM))
extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Base[];
extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Length[];
#define ISR_STACK_START ((unsigned char*)Image$$ARM_LIB_STACK$$ZI$$Base)
#define ISR_STACK_SIZE ((uint32_t)Image$$ARM_LIB_STACK$$ZI$$Length)
#endif
#endif
#if !defined(HEAP_START)
/* Defined by linker script */
extern uint32_t Image$$RW_IRAM1$$ZI$$Limit[];
#define HEAP_START ((unsigned char*)Image$$RW_IRAM1$$ZI$$Limit)
#define HEAP_SIZE ((uint32_t)((uint32_t)INITIAL_SP - (uint32_t)HEAP_START))
#define HEAP_SIZE ((uint32_t)((uint32_t)ISR_STACK_START - (uint32_t)HEAP_START))
#endif
/*

11
rtos/TARGET_CORTEX/TOOLCHAIN_GCC_ARM/mbed_boot_gcc_arm.c
View File

@ -29,11 +29,20 @@ static osMutexId_t env_mutex_id;
static mbed_rtos_storage_mutex_t env_mutex_obj;
static osMutexAttr_t env_mutex_attr;
#if !defined(ISR_STACK_SIZE)
#if (defined(__GNUC__) && !defined(__CC_ARM) && !defined(__ARMCC_VERSION))
extern uint32_t __StackLimit;
extern uint32_t __StackTop;
#define ISR_STACK_START ((unsigned char*)&__StackLimit)
#define ISR_STACK_SIZE ((uint32_t)((uint32_t)&__StackTop - (uint32_t)&__StackLimit))
#endif
#endif
#if !defined(HEAP_START)
/* Defined by linker script */
extern uint32_t __end__[];
#define HEAP_START ((unsigned char*)__end__)
#define HEAP_SIZE ((uint32_t)((uint32_t)INITIAL_SP - (uint32_t)HEAP_START))
#define HEAP_SIZE ((uint32_t)((uint32_t)ISR_STACK_START - (uint32_t)HEAP_START))
#endif
extern void __libc_init_array(void);

5
rtos/TARGET_CORTEX/mbed_boot.h
View File

@ -50,11 +50,6 @@ extern "C" {
* @{
*/
/* Define stack sizes if they haven't been set already */
#if !defined(ISR_STACK_SIZE)
#define ISR_STACK_SIZE ((uint32_t)1024)
#endif
/* Heap limits - only used if set */
extern unsigned char *mbed_heap_start;
extern uint32_t mbed_heap_size;

6
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_GCC_ARM/MPS2.ld
View File

@ -31,6 +31,10 @@
#include "../memory_zones.h"
#include "../cmsis_nvic.h"
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
MEMORY
{
VECTORS (rx) : ORIGIN = MAPPABLE_START, LENGTH = MAPPABLE_SIZE
@ -66,7 +70,7 @@ MEMORY
*/
ENTRY(Reset_Handler)
STACK_SIZE = 0x400;
STACK_SIZE = MBED_BOOT_STACK_SIZE;
/* Size of the vector table in SRAM */
M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE;

5
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_IAR/MPS2.icf
View File

@ -48,8 +48,11 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SRAM2_START + ZBT_SRAM2_SIZE
/*-Sizes-*/
/* Heap and Stack size */
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __ICFEDIT_size_heap__ = 0x200000;
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;

8
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct
View File

@ -37,10 +37,14 @@
#include "../memory_zones.h"
#include "../cmsis_nvic.h"
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#if (defined(__stack_size__))
#define STACK_SIZE __stack_size__
#else
#define STACK_SIZE 0x0400
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#endif
; The vector table is loaded at address 0x00000000 in Flash memory region.
@ -56,7 +60,7 @@ LR_IROM2 ZBT_SRAM1_START ZBT_SRAM1_SIZE { ; load region size_region
.ANY (+RO)
}
; NVIC_VECTORS_SIZE Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
RW_IRAM1 (ZBT_SRAM2_START + NVIC_VECTORS_SIZE) (ZBT_SRAM2_SIZE - NVIC_VECTORS_SIZE) { ; RW data
RW_IRAM1 (ZBT_SRAM2_START + NVIC_VECTORS_SIZE) (ZBT_SRAM2_SIZE - NVIC_VECTORS_SIZE - STACK_SIZE) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK (ZBT_SRAM2_START + ZBT_SRAM2_SIZE) EMPTY - STACK_SIZE { ; Stack region growing down

6
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_GCC_ARM/MPS2.ld
View File

@ -66,7 +66,11 @@ MEMORY
*/
ENTRY(Reset_Handler)
STACK_SIZE = 0x400;
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
/* Size of the vector table in SRAM */
M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE;

5
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_IAR/MPS2.icf
View File

@ -48,8 +48,11 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SRAM2_START + ZBT_SRAM2_SIZE
/*-Sizes-*/
/* Heap and Stack size */
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __ICFEDIT_size_heap__ = 0x200000;
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;

8
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct
View File

@ -37,10 +37,14 @@
#include "../memory_zones.h"
#include "../cmsis_nvic.h"
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#if (defined(__stack_size__))
#define STACK_SIZE __stack_size__
#else
#define STACK_SIZE 0x0400
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#endif
; The vector table is loaded at address 0x00000000 in Flash memory region.
@ -56,7 +60,7 @@ LR_IROM2 ZBT_SRAM1_START ZBT_SRAM1_SIZE { ; load region size_region
.ANY (+RO)
}
; NVIC_VECTORS_SIZE Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
RW_IRAM1 (ZBT_SRAM2_START + NVIC_VECTORS_SIZE) (ZBT_SRAM2_SIZE - NVIC_VECTORS_SIZE) { ; RW data
RW_IRAM1 (ZBT_SRAM2_START + NVIC_VECTORS_SIZE) (ZBT_SRAM2_SIZE - NVIC_VECTORS_SIZE - STACK_SIZE) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK (ZBT_SRAM2_START + ZBT_SRAM2_SIZE) EMPTY - STACK_SIZE { ; Stack region growing down

6
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_GCC_ARM/MPS2.ld
View File

@ -66,7 +66,11 @@ MEMORY
*/
ENTRY(Reset_Handler)
STACK_SIZE = 0x400;
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
/* Size of the vector table in SRAM */
M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE;

5
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_IAR/MPS2.icf
View File

@ -48,8 +48,11 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SRAM2_START + ZBT_SRAM2_SIZE
/*-Sizes-*/
/* Heap and Stack size */
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __ICFEDIT_size_heap__ = 0x200000;
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;

8
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct
View File

@ -37,10 +37,14 @@
#include "../memory_zones.h"
#include "../cmsis_nvic.h"
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#if (defined(__stack_size__))
#define STACK_SIZE __stack_size__
#else
#define STACK_SIZE 0x0400
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#endif
; The vector table is loaded at address 0x00000000 in Flash memory region.
@ -56,7 +60,7 @@ LR_IROM2 ZBT_SRAM1_START ZBT_SRAM1_SIZE { ; load region size_region
.ANY (+RO)
}
; NVIC_VECTORS_SIZE Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
RW_IRAM1 (ZBT_SRAM2_START + NVIC_VECTORS_SIZE) (ZBT_SRAM2_SIZE - NVIC_VECTORS_SIZE) { ; RW data
RW_IRAM1 (ZBT_SRAM2_START + NVIC_VECTORS_SIZE) (ZBT_SRAM2_SIZE - NVIC_VECTORS_SIZE - STACK_SIZE) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK (ZBT_SRAM2_START + ZBT_SRAM2_SIZE) EMPTY - STACK_SIZE { ; Stack region growing down

6
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_GCC_ARM/MPS2.ld
View File

@ -31,6 +31,10 @@
#include "../memory_zones.h"
#include "../cmsis_nvic.h"
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
MEMORY
{
VECTORS (rx) : ORIGIN = MAPPABLE_START, LENGTH = MAPPABLE_SIZE
@ -66,7 +70,7 @@ MEMORY
*/
ENTRY(Reset_Handler)
STACK_SIZE = 0x400;
STACK_SIZE = MBED_BOOT_STACK_SIZE;
/* Size of the vector table in SRAM */
M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE;

5
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_IAR/MPS2.icf
View File

@ -48,8 +48,11 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SRAM2_START + ZBT_SRAM2_SIZE
/*-Sizes-*/
/* Heap and Stack size */
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __ICFEDIT_size_heap__ = 0x200000;
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;

8
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct
View File

@ -37,10 +37,14 @@
#include "../memory_zones.h"
#include "../cmsis_nvic.h"
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#if (defined(__stack_size__))
#define STACK_SIZE __stack_size__
#else
#define STACK_SIZE 0x0400
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#endif
; The vector table is loaded at address 0x00000000 in Flash memory region.
@ -56,7 +60,7 @@ LR_IROM2 ZBT_SRAM1_START ZBT_SRAM1_SIZE { ; load region size_region
.ANY (+RO)
}
; NVIC_VECTORS_SIZE Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
RW_IRAM1 (ZBT_SRAM2_START + NVIC_VECTORS_SIZE) (ZBT_SRAM2_SIZE - NVIC_VECTORS_SIZE) { ; RW data
RW_IRAM1 (ZBT_SRAM2_START + NVIC_VECTORS_SIZE) (ZBT_SRAM2_SIZE - NVIC_VECTORS_SIZE - STACK_SIZE) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK (ZBT_SRAM2_START + ZBT_SRAM2_SIZE) EMPTY - STACK_SIZE { ; Stack region growing down

6
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_GCC_ARM/MPS2.ld
View File

@ -66,7 +66,11 @@ MEMORY
*/
ENTRY(Reset_Handler)
STACK_SIZE = 0x400;
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
/* Size of the vector table in SRAM */
M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE;

5
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_IAR/MPS2.icf
View File

@ -48,8 +48,11 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SRAM2_START + ZBT_SRAM2_SIZE
/*-Sizes-*/
/* Heap and Stack size */
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __ICFEDIT_size_heap__ = 0x200000;
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;

14
targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_ARM_STD/BEETLE.sct
View File

@ -1,4 +1,5 @@
;/*
#! armcc -E;
/*
; * BEETLE CMSIS Library
; */
;/*
@ -22,6 +23,12 @@
; *** Scatter-Loading Description File ***
; *************************************************************
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x00040000 { ; load region size_region
ER_IROM1 0x00000000 0x00040000 { ; load address = execution address
*.o (RESET, +FIRST)
@ -30,7 +37,10 @@ LR_IROM1 0x00000000 0x00040000 { ; load region size_region
CORDIO_RO_2.1.o (*)
}
; Total: 80 vectors = 320 bytes (0x140) to be reserved in RAM
RW_IRAM1 (0x20000000+0x140) (0x20000-0x140) { ; RW data
RW_IRAM1 (0x20000000+0x140) (0x20000-0x140-Stack_Size) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK (0x20000000+0x20000) EMPTY -Stack_Size { ; stack
}
}

9
targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_GCC_ARM/BEETLE.ld
View File

@ -59,8 +59,11 @@ MEMORY
*/
ENTRY(Reset_Handler)
/* Heap 1/4 of ram and stack 1/8 */
__stack_size__ = 0x4000;
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
__stack_size__ = MBED_BOOT_STACK_SIZE;
__heap_size__ = 0x8000;
HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400;
@ -202,7 +205,7 @@ SECTIONS
__end__ = .;
PROVIDE(end = .);
__HeapBase = .;
. += HEAP_SIZE;
. = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE;
__HeapLimit = .;
__heap_limit = .; /* Add for _sbrk */
} > RAM

7
targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_IAR/BEETLE.icf
View File

@ -29,8 +29,13 @@ define symbol __ICFEDIT_region_ROM_end__ = 0x0003FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000140;
define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF;
/*-Sizes-*/
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
/* Heap and Stack size */
define symbol __ICFEDIT_size_cstack__ = 0x1000;
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0x4000;
/**** End of ICF editor section. ###ICF###*/

10
targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_ARM_STD/MPS2.sct
View File

@ -29,6 +29,12 @@
#include "../memory_zones.h"
#include "../cmsis_nvic.h"
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
; The vector table is loaded at address 0x00000000 in Flash memory region.
LR_IROM1 FLASH_START FLASH_SIZE {
ER_IROM1 FLASH_START FLASH_SIZE {
@ -38,10 +44,12 @@ LR_IROM1 FLASH_START FLASH_SIZE {
; Rest of the code is loaded to the ZBT SSRAM1.
LR_IROM2 ZBT_SSRAM1_START ZBT_SSRAM1_SIZE {
ER_IROM2 ZBT_SSRAM1_START ZBT_SSRAM1_SIZE {
ER_IROM2 ZBT_SSRAM1_START ZBT_SSRAM1_SIZE-Stack_Size {
*(InRoot$$Sections)
.ANY (+RO)
}
ARM_LIB_STACK ZBT_SSRAM1_START+ZBT_SSRAM1_SIZE EMPTY -Stack_Size { ; Stack region growing down
}
; At execution, RAM is set to be in ZBT SSRAM2 and 3, just after the vector
; table previously moved from Flash.
RW_IRAM1 (ZBT_SSRAM23_START + NVIC_VECTORS_SIZE) (ZBT_SSRAM23_SIZE - NVIC_VECTORS_SIZE) {

6
targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_GCC_ARM/MPS2.ld
View File

@ -25,6 +25,10 @@
#include "../memory_zones.h"
#include "../cmsis_nvic.h"
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
MEMORY
{
VECTORS (rx) : ORIGIN = FLASH_START, LENGTH = FLASH_SIZE
@ -61,7 +65,7 @@ MEMORY
ENTRY(Reset_Handler)
HEAP_SIZE = 0x4000;
STACK_SIZE = 0x1000;
STACK_SIZE = MBED_BOOT_STACK_SIZE;
/* Size of the vector table in SRAM */
M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE;

5
targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_IAR/MPS2.icf
View File

@ -57,7 +57,10 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SSRAM23_START + ZBT_SSRAM23_
/* Sizes */
/* Heap and Stack size */
define symbol __ICFEDIT_size_heap__ = 0xF000;
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __ICFEDIT_size_heap__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = 0x1000;
define memory mem with size = 4G;

11
targets/TARGET_ARM_SSG/TARGET_IOTSS/TARGET_IOTSS_BEID/device/TOOLCHAIN_ARM_STD/MPS2.sct
View File

@ -1,3 +1,4 @@
#! armcc -E
;* MPS2 CMSIS Library
;*
;* Copyright (c) 2006-2016 ARM Limited
@ -33,6 +34,12 @@
; *** Scatter-Loading Description File ***
; *************************************************************
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x00400000 { ; load region size_region
ER_IROM1 0x00000000 0x00400000 { ; load address = execution address
*.o (RESET, +First)
@ -40,8 +47,10 @@ LR_IROM1 0x00000000 0x00400000 { ; load region size_region
.ANY (+RO)
}
; Total: 80 vectors = 320 bytes (0x140) to be reserved in RAM
RW_IRAM1 (0x20000000+0x140) (0x400000-0x140) { ; RW data
RW_IRAM1 (0x20000000+0x140) (0x400000-0x140-Stack_Size) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down
}
}

11
targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct
View File

@ -1,3 +1,4 @@
#! armcc -E
;* MPS2 CMSIS Library
;*
;* Copyright (c) 2006-2016 ARM Limited
@ -33,6 +34,12 @@
; *** Scatter-Loading Description File ***
; *************************************************************
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x00400000 { ; load region size_region
ER_IROM1 0x00000000 0x00400000 { ; load address = execution address
*.o (RESET, +First)
@ -40,8 +47,10 @@ LR_IROM1 0x00000000 0x00400000 { ; load region size_region
.ANY (+RO)
}
; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100) { ; RW data
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down
}
}

11
targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct
View File

@ -1,3 +1,4 @@
#! armcc -E
;* MPS2 CMSIS Library
;*
;* Copyright (c) 2006-2016 ARM Limited
@ -33,6 +34,12 @@
; *** Scatter-Loading Description File ***
; *************************************************************
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x00400000 { ; load region size_region
ER_IROM1 0x00000000 0x00400000 { ; load address = execution address
*.o (RESET, +First)
@ -40,8 +47,10 @@ LR_IROM1 0x00000000 0x00400000 { ; load region size_region
.ANY (+RO)
}
; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100) { ; RW data
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down
}
}

11
targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct
View File

@ -1,3 +1,4 @@
#! armcc -E
;* MPS2 CMSIS Library
;*
;* Copyright (c) 2006-2016 ARM Limited
@ -33,6 +34,12 @@
; *** Scatter-Loading Description File ***
; *************************************************************
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x00400000 { ; load region size_region
ER_IROM1 0x00000000 0x00400000 { ; load address = execution address
*.o (RESET, +First)
@ -40,8 +47,10 @@ LR_IROM1 0x00000000 0x00400000 { ; load region size_region
.ANY (+RO)
}
; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100) { ; RW data
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down
}
}

12
targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct
View File

@ -1,3 +1,5 @@
#! armcc -E
;* MPS2 CMSIS Library
;*
;* Copyright (c) 2006-2016 ARM Limited
@ -33,6 +35,12 @@
; *** Scatter-Loading Description File ***
; *************************************************************
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x00400000 { ; load region size_region
ER_IROM1 0x00000000 0x00400000 { ; load address = execution address
*.o (RESET, +First)
@ -40,8 +48,10 @@ LR_IROM1 0x00000000 0x00400000 { ; load region size_region
.ANY (+RO)
}
; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100) { ; RW data
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down
}
}

12
targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct
View File

@ -1,3 +1,5 @@
#! armcc -E
;* MPS2 CMSIS Library
;*
;* Copyright (c) 2006-2016 ARM Limited
@ -33,6 +35,12 @@
; *** Scatter-Loading Description File ***
; *************************************************************
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x00400000 { ; load region size_region
ER_IROM1 0x00000000 0x00400000 { ; load address = execution address
*.o (RESET, +First)
@ -40,8 +48,10 @@ LR_IROM1 0x00000000 0x00400000 { ; load region size_region
.ANY (+RO)
}
; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100) { ; RW data
RW_IRAM1 (0x20000000+0x100) (0x400000-0x100-Stack_Size) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x20000000+0x400000 EMPTY -Stack_Size { ; Stack region growing down
}
}

12
targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_ARM_STD/ADuCM3029.sct
View File

@ -45,6 +45,12 @@
#define ADUCM_VECTOR_SIZE 0x1A0
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
FLASH0 MBED_APP_START ADUCM_VECTOR_SIZE {
*(.vectors, +First)
@ -63,11 +69,11 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE {
.ANY (+RW)
}
ADUCM_HEAP AlignExpr(+0, 16) EMPTY
(0x20003000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; heap
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY
(0x20004000 - AlignExpr(ImageLimit(RW_IRAM1), 16) - Stack_Size) { ; heap
}
ADUCM_STACK AlignExpr(+0, 16) EMPTY 0x1000 { ; stack
ARM_LIB_STACK AlignExpr(+0, 16) EMPTY Stack_Size { ; stack
}
ADUCM_IRAM2 0x20004000 0x4000 { ; bss section

9
targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_GCC_ARM/ADuCM3029.ld
View File

@ -33,7 +33,10 @@ MEMORY
/* Library configurations */
GROUP(libgcc.a libc.a libm.a libnosys.a)
/* Custom stack and heap sizes */
__stack_size__ = 0x1000;
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
__stack_size__ = MBED_BOOT_STACK_SIZE;
__heap_size__ = 0x2000;
/* select custom or default sizes for stack and heap */
@ -220,13 +223,13 @@ SECTIONS
__HeapBase = .;
__end__ = .;
end = __end__;
. += HEAP_SIZE;
. = ORIGIN(DSRAM_A) + LENGTH(DSRAM_A) - STACK_SIZE;
__HeapLimit = .;
} > DSRAM_A
/* Set stack top to end of DSRAM_A, and move stack limit down by
* size of stack_dummy section */
__StackTop = ORIGIN(DSRAM_C);
__StackTop = ORIGIN(DSRAM_A) + LENGTH(DSRAM_A);
__StackLimit = __StackTop - STACK_SIZE;
PROVIDE(__stack = __StackTop);

6
targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_IAR/ADuCM3029.icf
View File

@ -38,6 +38,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) {
define symbol MBED_APP_SIZE = 0x40000;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol ADUCM_SECTOR_SIZE = 0x800;
define symbol ADUCM_VECTOR_SIZE = 0x1A0;
@ -49,7 +53,7 @@ define region ROM_REGION = mem:[from MBED_APP_START+ADUCM_SECTO
define region RAM_bank1_region = mem:[from 0x20000200 size 0x00003E00];
define region RAM_bank2_region = mem:[from 0x20004000 size 0x00004000]
| mem:[from 0x20040000 size 0x00007000];
define block CSTACK with alignment = 16, size = 0x1000 { };
define block CSTACK with alignment = 16, size = MBED_BOOT_STACK_SIZE { };
define block HEAP with alignment = 16, size = 0x2000 { };
do not initialize { section .noinit };
initialize by copy { rw };

13
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_ARM_STD/ADuCM4050.sct
View File

@ -42,6 +42,12 @@
#define ADUCM_VECTOR_SIZE 0x1A0
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
FLASH0 MBED_APP_START ADUCM_VECTOR_SIZE {
*(.vectors, +First)
@ -62,6 +68,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE {
ADUCM_IRAM3 0x20048000 0x10000 { *(+ZI) }
ADUCM_HEAP AlignExpr(ImageLimit(RW_IRAM1), 16) EMPTY
(ImageBase(ADUCM_IRAM3) - 0x2000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } ; heap
ARM_LIB_HEAP AlignExpr(ImageLimit(RW_IRAM1), 16) EMPTY
(ImageBase(ADUCM_IRAM3) - Stack_Size - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } ; heap
ARM_LIB_STACK AlignExpr(+0, 16) EMPTY Stack_Size { ; stack
}
}

5
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_GCC_ARM/ADuCM4050.ld
View File

@ -34,7 +34,10 @@ MEMORY
GROUP(libgcc.a libc.a libm.a libnosys.a)
/* Custom stack and heap sizes */
__stack_size__ = 0x2000;
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
__stack_size__ = MBED_BOOT_STACK_SIZE;
__heap_size__ = 0x6000;
/* select custom or default sizes for stack and heap */

6
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_IAR/ADuCM4050.icf
View File

@ -38,6 +38,10 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) {
define symbol MBED_APP_SIZE = 0x7F000;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol ADUCM_SECTOR_SIZE = 0x800;
define symbol ADUCM_VECTOR_SIZE = 0x1A0;
@ -49,7 +53,7 @@ define region ROM_REGION = mem:[from MBED_APP_START+ADUCM_SECTO
define region RAM_bank1_region = mem:[from 0x20040000 size 0x00008000];
define region RAM_bank2_region = mem:[from 0x20000200 size 0x00006E00]
| mem:[from 0x20048000 size 0x00010000];
define block CSTACK with alignment = 16, size = 0x2000 { };
define block CSTACK with alignment = 16, size = MBED_BOOT_STACK_SIZE { };
define block HEAP with alignment = 16, size = 0x6000 { };
do not initialize { section .noinit };
initialize by copy { rw };

10
targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_ARM_STD/SAMD21G18A.sct
View File

@ -1,7 +1,14 @@
#! armcc -E
;SAMD21G18A
;256KB FLASH (0x40000) @ 0x000000000
;2KB RAM (0x8000) @ 0x20000000
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
;SAMD21G18A: 256KB FLASH (0x40000) + 32KB RAM (0x8000)
LR_IROM1 0x00000000 0x40000 { ; load region size_region
@ -15,5 +22,6 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region
RW_IRAM1 (0x20000000+0xB8) (0x8000-0xB8) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x20000000+0x8000 EMPTY -Stack_Size { ; Stack region growing down
}
}

14
targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_GCC_ARM/samd21g18a.ld
View File

@ -2,15 +2,18 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
SEARCH_DIR(.)
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
/* Memory Spaces Definitions */
MEMORY {
rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000
ram (rwx) : ORIGIN = 0x20000000 + 0xB8, LENGTH = 0x00008000 - 0xB8
}
/* The stack size used by the application. NOTE: you need to adjust according to your application. */
STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
/* Section Definitions */
SECTIONS {
.text :
@ -114,5 +117,10 @@ MEMORY {
_estack = .;
} > ram
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(ram) + LENGTH(ram);
__StackLimit = __StackTop - STACK_SIZE;
. = ALIGN(8);
}

12
targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_ARM_STD/SAMD21J18A.sct
View File

@ -1,7 +1,14 @@
#! armcc -E
;SAMD21J18A
;256KB FLASH (0x40000) @ 0x000000000
;2KB RAM (0x8000) @ 0x20000000
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
;SAMD21J18A: 256KB FLASH (0x40000) + 32KB RAM (0x8000)
LR_IROM1 0x00000000 0x40000 { ; load region size_region
@ -12,8 +19,9 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region
}
; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4+0x4) 8-byte alignment
RW_IRAM1 (0x20000000+0xB8) (0x8000-0xB8) { ; RW data
RW_IRAM1 (0x20000000+0xB8) (0x8000-0xB8-Stack_Size) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x20000000+0x8000 EMPTY -Stack_Size { ; Stack region growing down
}
}

14
targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_GCC_ARM/samd21j18a.ld
View File

@ -2,15 +2,18 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
SEARCH_DIR(.)
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
/* Memory Spaces Definitions */
MEMORY {
rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000
ram (rwx) : ORIGIN = 0x20000000 + 0xB8, LENGTH = 0x00008000 - 0xB8
}
/* The stack size used by the application. NOTE: you need to adjust according to your application. */
STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
/* Section Definitions */
SECTIONS {
.text :
@ -113,6 +116,11 @@ MEMORY {
. = ALIGN(8);
_estack = .;
} > ram
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - STACK_SIZE;
. = ALIGN(8);
}

12
targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_ARM_STD/SAML21J18A.sct
View File

@ -1,7 +1,15 @@
#! armcc -E
;SAML21J18A
;256KB FLASH (0x40000) @ 0x000000000
;32KB RAM (0x8000) @ 0x20000000
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
;SAML21J18A: 256KB FLASH (0x40000) + 32KB RAM (0x8000)
LR_IROM1 0x00000000 0x40000 { ; load region size_region
ER_IROM1 0x00000000 0x40000 { ; load address = execution address
@ -11,7 +19,9 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region
}
; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4+0x4) 8-byte alignment
RW_IRAM1 (0x20000000+0xB8) (0x8000-0xB8) { ; RW data
RW_IRAM1 (0x20000000+0xB8) (0x8000-0xB8-Stack_Size) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x20000000+0x8000 EMPTY -Stack_Size { ; Stack region growing down
}
}

14
targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_GCC_ARM/saml21j18a.ld
View File

@ -2,15 +2,18 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
SEARCH_DIR(.)
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
/* Memory Spaces Definitions */
MEMORY {
rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000
ram (rwx) : ORIGIN = 0x20000000 + 0xB8, LENGTH = 0x00008000 - 0xB8
}
/* The stack size used by the application. NOTE: you need to adjust according to your application. */
STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
/* Section Definitions */
SECTIONS {
.text :
@ -114,5 +117,10 @@ MEMORY {
_estack = .;
} > ram
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - STACK_SIZE;
. = ALIGN(8);
}

12
targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMR21G18A/device/TOOLCHAIN_ARM_STD/SAMR21G18A.sct
View File

@ -1,7 +1,14 @@
#! armcc -E
;SAMR21G18A
;256KB FLASH (0x40000) @ 0x000000000
;2KB RAM (0x8000) @ 0x20000000
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
;SAMR21G18A: 256KB FLASH (0x40000) + 32KB RAM (0x8000)
LR_IROM1 0x00000000 0x40000 { ; load region size_region
@ -12,8 +19,9 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region
}
; [RAM] Vector table dynamic copy: 44 vectors * 4 bytes = (0xB0) - alignment
RW_IRAM1 (0x20000000+0xB0) (0x8000-0xB0) { ; RW data
RW_IRAM1 (0x20000000+0xB0) (0x8000-0xB0-Stack_Size) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x20000000+0x8000 EMPTY -Stack_Size { ; Stack region growing down
}
}

14
targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMR21G18A/device/TOOLCHAIN_GCC_ARM/samr21g18a.ld
View File

@ -2,15 +2,18 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
SEARCH_DIR(.)
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
/* Memory Spaces Definitions */
MEMORY {
rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000
ram (rwx) : ORIGIN = 0x20000000 + 0xB0, LENGTH = 0x00008000 - 0xB0
}
/* The stack size used by the application. NOTE: you need to adjust according to your application. */
STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
/* Section Definitions */
SECTIONS {
.text :
@ -114,5 +117,10 @@ MEMORY {
_estack = .;
} > ram
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - STACK_SIZE;
. = ALIGN(8);
}

14
targets/TARGET_Atmel/TARGET_SAM_CortexM4/TARGET_SAMG55J19/device/TOOLCHAIN_GCC_ARM/samg55j19.ld
View File

@ -2,15 +2,18 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
SEARCH_DIR(.)
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
/* Memory Spaces Definitions */
MEMORY {
rom (rx) : ORIGIN = 0x00400000, LENGTH = 0x00080000
ram (rwx) : ORIGIN = 0x20000000 + 0x108, LENGTH = 0x00028000 - 0x108
}
/* The stack size used by the application. NOTE: you need to adjust according to your application. */
STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x3000;
/* Section Definitions */
SECTIONS {
.text :
@ -113,6 +116,11 @@ MEMORY {
. = ALIGN(8);
_estack = .;
} > ram
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - STACK_SIZE;
. = ALIGN(8);
}

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/cy8c6xx7_cm0plus.sct
View File

@ -46,6 +46,12 @@
#define MBED_RAM_SIZE 0x10000
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
; The defines below describe the location and size of blocks of memory in the target.
; Use these defines to specify the memory regions available for allocation.
@ -135,6 +141,10 @@ LR_IROM1 FLASH_START (FLASH_SIZE - 0x8000)
{
* (.noinit)
}
ARM_LIB_STACK RAM_START+RAM_SIZE EMPTY -Stack_Size
{ ; Stack region growing down
}
}

8
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld
View File

@ -44,6 +44,12 @@ ENTRY(Reset_Handler)
#define MBED_RAM_SIZE 0x10000
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
/* Force symbol to be entered in the output file as an undefined symbol. Doing
* this may, for example, trigger linking of additional modules from standard
* libraries. You may list several symbols for each EXTERN, and you may use
@ -307,7 +313,7 @@ SECTIONS
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(ram) + LENGTH(ram);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
__StackLimit = __StackTop - STACK_SIZE;
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */

8
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf
View File

@ -114,11 +114,17 @@ define symbol __ICFEDIT_region_ERAM2_end__ = 0x0;
define symbol __ICFEDIT_region_ERAM3_start__ = 0x0;
define symbol __ICFEDIT_region_ERAM3_end__ = 0x0;
/*-Sizes-*/
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
if (!isdefinedsymbol(__STACK_SIZE)) {
define symbol __ICFEDIT_size_cstack__ = 0x1000;
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
} else {
define symbol __ICFEDIT_size_cstack__ = __STACK_SIZE;
}
define symbol __ICFEDIT_size_proc_stack__ = 0x0;
if (!isdefinedsymbol(__HEAP_SIZE)) {
define symbol __ICFEDIT_size_heap__ = 0x4000;

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_ARM_STD/cy8c6xx7_cm4_dual.sct
View File

@ -46,6 +46,12 @@
#define MBED_RAM_SIZE 0x37800
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
; The defines below describe the location and size of blocks of memory in the target.
; Use these defines to specify the memory regions available for allocation.
@ -125,6 +131,10 @@ LR_IROM1 FLASH_START FLASH_SIZE
* (.cy_ramfunc)
.ANY (+RW, +ZI)
}
ARM_LIB_STACK RAM_START+RAM_SIZE EMPTY -Stack_Size
{ ; Stack region growing down
}
; Place variables in the section that should not be initialized during the
; device startup.

8
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld
View File

@ -44,6 +44,12 @@ ENTRY(Reset_Handler)
#define MBED_RAM_SIZE 0x37800
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
/* Force symbol to be entered in the output file as an undefined symbol. Doing
* this may, for example, trigger linking of additional modules from standard
* libraries. You may list several symbols for each EXTERN, and you may use
@ -305,7 +311,7 @@ SECTIONS
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(ram) + LENGTH(ram);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
__StackLimit = __StackTop - STACK_SIZE;
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */

7
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf
View File

@ -116,8 +116,13 @@ define symbol __ICFEDIT_region_ERAM2_end__ = 0x0;
define symbol __ICFEDIT_region_ERAM3_start__ = 0x0;
define symbol __ICFEDIT_region_ERAM3_end__ = 0x0;
/*-Sizes-*/
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
if (!isdefinedsymbol(__STACK_SIZE)) {
define symbol __ICFEDIT_size_cstack__ = 0x1000;
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
} else {
define symbol __ICFEDIT_size_cstack__ = __STACK_SIZE;
}

11
targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_ARM_STD/MK20D5.sct
View File

@ -1,3 +1,10 @@
#! armcc -E
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x20000 { ; load region size_region (132k)
ER_IROM1 0x00000000 0x20000 { ; load address = execution address
@ -7,8 +14,10 @@ LR_IROM1 0x00000000 0x20000 { ; load region size_region (132k)
}
; 8_byte_aligned(62 vect * 4 bytes) = 8_byte_aligned(0xF8) = 0xF8
; 0x4000 - 0xF8 = 0x3F08
RW_IRAM1 0x1FFFE0F8 0x3F08 {
RW_IRAM1 0x1FFFE0F8 0x3F08-Stack_Size {
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x1FFFE0F8+0x3F08 EMPTY -Stack_Size { ; Stack region growing down
}
}

8
targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_GCC_ARM/MK20D5.ld
View File

@ -2,6 +2,12 @@
* K20 ARM GCC linker script file
*/
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
MEMORY
{
VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400
@ -155,7 +161,7 @@ SECTIONS
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
__StackLimit = __StackTop - STACK_SIZE;
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */

6
targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_IAR/MK20D5.icf
View File

@ -11,8 +11,10 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x1fffe0f7;
define symbol __ICFEDIT_region_RAM_start__ = 0x1fffe0f8;
define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff;
/*-Sizes-*/
/*Heap 1/4 of ram and stack 1/8*/
define symbol __ICFEDIT_size_cstack__ = 0x600;
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0xC00;
/**** End of ICF editor section. ###ICF###*/

11
targets/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/device/TOOLCHAIN_ARM_STD/MK20DX256.sct
View File

@ -1,3 +1,10 @@
#! armcc -E
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k)
ER_IROM1 0x00000000 0x40000 { ; load address = execution address
@ -7,7 +14,9 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k)
}
; 8_byte_aligned(112 vect * 4 bytes) = 8_byte_aligned(0x1C0) = 0x1C0
; 0x10000 - 0x1C0 = 0xFE40
RW_IRAM1 0x1FFF81C0 0xFE40 {
RW_IRAM1 0x1FFF81C0 0xFE40-Stack_Size {
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x1FFF81C0+0xFE40 EMPTY -Stack_Size { ; Stack region growing down
}
}

8
targets/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/device/TOOLCHAIN_GCC_ARM/MK20DX256.ld
View File

@ -2,6 +2,12 @@
* K20DX256 ARM GCC linker script file
*/
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
MEMORY
{
VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400
@ -156,7 +162,7 @@ SECTIONS
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
__StackLimit = __StackTop - STACK_SIZE;
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */

12
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_ARM_STD/MKL05Z4.sct
View File

@ -1,3 +1,11 @@
#! armcc -E
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k)
ER_IROM1 0x00000000 0x8000 { ; load address = execution address
*.o (RESET, +First)
@ -6,7 +14,9 @@ LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k)
}
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
; 0x1000 - 0xC0 = 0xF40
RW_IRAM1 0x1FFFFCC0 0xF40 {
RW_IRAM1 0x1FFFFCC0 0xF40-Stack_Size {
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x1FFFFCC0+0xF40 EMPTY -Stack_Size { ; Stack region growing down
}
}

8
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_GCC_ARM/MKL05Z4.ld
View File

@ -2,6 +2,12 @@
* KL05Z ARM GCC linker script file, Martin Kojtal (0xc0170)
*/
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
MEMORY
{
VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000410
@ -146,7 +152,7 @@ SECTIONS
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
__StackLimit = __StackTop - STACK_SIZE;
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */

6
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_IAR/MKL05Z4.icf
View File

@ -11,8 +11,10 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x1ffffcbf;
define symbol __ICFEDIT_region_RAM_start__ = 0x1ffffcc0;
define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff;
/*-Sizes-*/
/*Heap 1/4 of ram and stack 1/8*/
define symbol __ICFEDIT_size_cstack__ = 0x200;
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0x400;
/**** End of ICF editor section. ###ICF###*/

11
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_STD/MKL25Z4.sct
View File

@ -1,3 +1,10 @@
#! armcc -E
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x20000 { ; load region size_region (32k)
ER_IROM1 0x00000000 0x20000 { ; load address = execution address
@ -7,8 +14,10 @@ LR_IROM1 0x00000000 0x20000 { ; load region size_region (32k)
}
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
; 0x4000 - 0xC0 = 0x3F40
RW_IRAM1 0x1FFFF0C0 0x3F40 {
RW_IRAM1 0x1FFFF0C0 0x3F40-Stack_Size {
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x1FFFF0C0+0x3F40 EMPTY -Stack_Size { ; Stack region growing down
}
}

8
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_ARM/MKL25Z4.ld
View File

@ -2,6 +2,12 @@
* KL25Z ARM GCC linker script file
*/
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
MEMORY
{
VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400
@ -155,7 +161,7 @@ SECTIONS
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
__StackLimit = __StackTop - STACK_SIZE;
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */

6
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_CW_EWL/MKL25Z4.ld
View File

@ -14,9 +14,13 @@ ENTRY(__thumb_startup)
_estack = 0x20003000; /* end of SRAM */
__SP_INIT = _estack;
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* Generate a link error if heap and stack don't fit into RAM */
__heap_size = 0x400; /* required amount of heap */
__stack_size = 0x400; /* required amount of stack */
__stack_size = MBED_BOOT_STACK_SIZE; /* required amount of stack */
/* Specify the memory areas */
MEMORY

8
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_CW_NEWLIB/MKL25Z4.ld
View File

@ -1,5 +1,11 @@
/* Linker script for mbed LPC1768 */
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
/* Linker script to configure memory regions. */
MEMORY
{
@ -145,7 +151,7 @@ SECTIONS
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
__StackLimit = __StackTop - STACK_SIZE;
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */

5
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_IAR/MKL25Z4.icf
View File

@ -11,7 +11,10 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x1ffff0bf;
define symbol __ICFEDIT_region_RAM_start__ = 0x1ffff0c0;
define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0xC00;
/**** End of ICF editor section. ###ICF###*/

8
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/device/TOOLCHAIN_GCC_ARM/MKL26Z4.ld
View File

@ -2,6 +2,12 @@
* KL25Z ARM GCC linker script file
*/
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
MEMORY
{
VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400
@ -155,7 +161,7 @@ SECTIONS
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
__StackLimit = __StackTop - STACK_SIZE;
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */

6
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/device/TOOLCHAIN_IAR/MKL26Z4.icf
View File

@ -11,8 +11,10 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x1ffff0bf;
define symbol __ICFEDIT_region_RAM_start__ = 0x1ffff0c0;
define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff;
/*-Sizes-*/
/*Heap 1/4 of ram and stack 1/8*/
define symbol __ICFEDIT_size_cstack__ = 0x800;
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0x1000;
/**** End of ICF editor section. ###ICF###*/

11
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_ARM_STD/MKL46Z4.sct
View File

@ -1,3 +1,10 @@
#! armcc -E
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k)
ER_IROM1 0x00000000 0x40000 { ; load address = execution address
@ -7,8 +14,10 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k)
}
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
; 0x8000 - 0xC0 = 0x7F40
RW_IRAM1 0x1FFFE0C0 0x7F40 {
RW_IRAM1 0x1FFFE0C0 0x7F40-Stack_Size {
.ANY (+RW +ZI)
}
ARM_LIB_STACK 0x1FFFE0C0+0x7F40 EMPTY -Stack_Size { ; Stack region growing down
}
}

8
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_GCC_ARM/MKL46Z4.ld
View File

@ -2,6 +2,12 @@
* KL46Z ARM GCC linker script file
*/
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
MEMORY
{
VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400
@ -155,7 +161,7 @@ SECTIONS
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
__StackLimit = __StackTop - STACK_SIZE;
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */

6
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_IAR/MKL46Z4.icf
View File

@ -11,8 +11,10 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x1fffe0bf;
define symbol __ICFEDIT_region_RAM_start__ = 0x1fffe0c0;
define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff;
/*-Sizes-*/
/*Heap 1/4 of ram and stack 1/8*/
define symbol __ICFEDIT_size_cstack__ = 0x1000;
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0x4000;
/**** End of ICF editor section. ###ICF###*/

8
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct
View File

@ -81,11 +81,15 @@
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#define Stack_Size MBED_BOOT_STACK_SIZE
#endif
#if (defined(__heap_size__))
@ -123,4 +127,6 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; lo
}
RW_IRAM1 ImageLimit(RW_m_data_2) { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}

6
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_GCC_ARM/MK66FN2M0xxx18.ld
View File

@ -44,6 +44,10 @@
** ###################################################################
*/
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* Entry Point */
ENTRY(Reset_Handler)
@ -51,7 +55,7 @@ __ram_vector_table__ = 1;
/* With the RTOS in use, this does not affect the main stack size. The size of
* the stack where main runs is determined via the RTOS. */
__stack_size__ = 0x400;
__stack_size__ = MBED_BOOT_STACK_SIZE;
__heap_size__ = 0x6000;

6
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_IAR/MK66FN2M0xxx18.icf
View File

@ -45,8 +45,10 @@
*/
define symbol __ram_vector_table__ = 1;
/* Heap 1/4 of ram and stack 1/8 */
define symbol __stack_size__=0x8000;
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __stack_size__=MBED_BOOT_STACK_SIZE;
define symbol __heap_size__=0x10000;
if (!isdefinedsymbol(MBED_APP_START)) {

8
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_ARM_STD/MK82FN256xxx15.sct
View File

@ -77,11 +77,15 @@
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#define Stack_Size MBED_BOOT_STACK_SIZE
#endif
#if (defined(__heap_size__))
@ -120,4 +124,6 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load
}
RW_IRAM1 ImageLimit(RW_m_data_2) { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}

6
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_GCC_ARM/MK82FN256xxx15.ld
View File

@ -47,6 +47,10 @@
** ###################################################################
*/
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* Entry Point */
ENTRY(Reset_Handler)
@ -54,7 +58,7 @@ __ram_vector_table__ = 1;
/* With the RTOS in use, this does not affect the main stack size. The size of
* the stack where main runs is determined via the RTOS. */
__stack_size__ = 0x400;
__stack_size__ = MBED_BOOT_STACK_SIZE;
__heap_size__ = 0x6000;

6
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_IAR/MK82FN256xxx15.icf
View File

@ -49,8 +49,10 @@
define symbol __ram_vector_table__ = 1;
/* Heap 1/4 of ram and stack 1/8 */
define symbol __stack_size__=0x8000;
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __stack_size__=MBED_BOOT_STACK_SIZE;
define symbol __heap_size__=0x10000;
define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x000003C0 : 0;

8
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_ARM_STD/MKL27Z64xxx4.sct
View File

@ -71,11 +71,15 @@
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00004000 - m_interrupts_ram_size)
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#define Stack_Size MBED_BOOT_STACK_SIZE
#endif
#if (defined(__heap_size__))
@ -108,5 +112,7 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; lo
}
RW_IRAM1 +0 { ; Heap region growing up
}
ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
}
}

6
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_GCC_ARM/MKL27Z64xxx4.ld
View File

@ -53,9 +53,13 @@ ENTRY(Reset_Handler)
__ram_vector_table__ = 1;
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* With the RTOS in use, this does not affect the main stack size. The size of
* the stack where main runs is determined via the RTOS. */
__stack_size__ = 0x400;
__stack_size__ = MBED_BOOT_STACK_SIZE;
/* With the RTOS in use, this does not affect the main heap size. */
__heap_size__ = 0x0;

7
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_IAR/MKL27Z64xxx4.icf
View File

@ -49,8 +49,11 @@
*/
define symbol __ram_vector_table__ = 1;
/* Heap 1/4 of ram and stack 1/8 */
define symbol __stack_size__=0x800;
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __stack_size__=MBED_BOOT_STACK_SIZE;
define symbol __heap_size__=0x1000;
define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x00000200 : 0;

9
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_ARM_STD/MKL43Z256xxx4.sct
View File

@ -68,11 +68,16 @@
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00008000 - m_interrupts_ram_size)
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#define Stack_Size MBED_BOOT_STACK_SIZE
#endif
#if (defined(__heap_size__))
@ -105,5 +110,7 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load
}
RW_IRAM1 +0 { ; Heap region growing up
}
ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
}
}

6
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_GCC_ARM/MKL43Z256xxx4.ld
View File

@ -50,9 +50,13 @@ ENTRY(Reset_Handler)
__ram_vector_table__ = 1;
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* With the RTOS in use, this does not affect the main stack size. The size of
* the stack where main runs is determined via the RTOS. */
__stack_size__ = 0x400;
__stack_size__ = MBED_BOOT_STACK_SIZE;
__heap_size__ = 0x2800;

7
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_IAR/MKL43Z256xxx4.icf
View File

@ -46,8 +46,11 @@
*/
define symbol __ram_vector_table__ = 1;
/* Heap 1/4 of ram and stack 1/8 */
define symbol __stack_size__=0x1000;
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __stack_size__=MBED_BOOT_STACK_SIZE;
define symbol __heap_size__=0x2800;
define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x00000200 : 0;

8
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_ARM_STD/MKL82Z128xxx7.sct
View File

@ -79,13 +79,17 @@
#define m_usb_sram_size 0x00000800
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* USB BDT size */
#define usb_bdt_size 0x200
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#define Stack_Size MBED_BOOT_STACK_SIZE
#endif
#if (defined(__heap_size__))
@ -121,6 +125,8 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load
}
RW_IRAM1 +0 { ; Heap region growing up
}
ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
}
}
#if (defined(__usb_use_usbram__))

6
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_GCC_ARM/MKL82Z128xxx7.ld
View File

@ -53,9 +53,13 @@ ENTRY(Reset_Handler)
__ram_vector_table__ = 1;
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* With the RTOS in use, this does not affect the main stack size. The size of
* the stack where main runs is determined via the RTOS. */
__stack_size__ = 0x400;
__stack_size__ = MBED_BOOT_STACK_SIZE;
__heap_size__ = 0x6000;

6
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_IAR/MKL82Z128xxx7.icf
View File

@ -49,8 +49,10 @@
*/
define symbol __ram_vector_table__ = 1;
/* Heap 1/4 of ram and stack 1/8 */
define symbol __stack_size__=0x3000;
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __stack_size__=MBED_BOOT_STACK_SIZE;
define symbol __heap_size__=0x6000;
define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x00000140 : 0;

8
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_ARM_STD/MKW24D512xxx5.sct
View File

@ -59,6 +59,10 @@
#define MBED_APP_SIZE 0x80000
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define m_interrupts_start MBED_APP_START
#define m_interrupts_size 0x00000400
@ -81,7 +85,7 @@
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#define Stack_Size MBED_BOOT_STACK_SIZE
#endif
#if (defined(__heap_size__))
@ -117,5 +121,7 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load
}
RW_IRAM1 ImageLimit(RW_m_data_2) { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}

6
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_GCC_ARM/MKW24D512xxx5.ld
View File

@ -48,9 +48,13 @@ ENTRY(Reset_Handler)
__ram_vector_table__ = 1;
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* With the RTOS in use, this does not affect the main stack size. The size of
* the stack where main runs is determined via the RTOS. */
__stack_size__ = 0x400;
__stack_size__ = MBED_BOOT_STACK_SIZE;
__heap_size__ = 0x4000;

7
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_IAR/MKW24D512xxx5.icf
View File

@ -44,8 +44,11 @@
*/
define symbol __ram_vector_table__ = 1;
/* Heap 1/4 of ram and stack 1/8 */
define symbol __stack_size__=0x2000;
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __stack_size__=MBED_BOOT_STACK_SIZE;
define symbol __heap_size__=0x4000;
if (!isdefinedsymbol(MBED_APP_START)) {

2
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_ARM_STD/MKW41Z512xxx4.sct
View File

@ -115,5 +115,7 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load
}
RW_IRAM1 +0 { ; Heap region growing up
}
ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
}
}

8
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_ARM_STD/MK22FN512xxx12.sct
View File

@ -51,6 +51,10 @@
*/
#define __ram_vector_table__ 1
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#if (defined(__ram_vector_table__))
#define __ram_vector_table_size__ 0x00000400
#else
@ -79,7 +83,7 @@
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size 0x0400
#define Stack_Size MBED_BOOT_STACK_SIZE
#endif
#if (defined(__heap_size__))
@ -115,5 +119,7 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; lo
}
RW_IRAM1 ImageLimit(RW_m_data_2) { ; Heap region growing up
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}

9
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_GCC_ARM/MK22FN512xxx12.ld
View File

@ -48,13 +48,18 @@
** ###################################################################
*/
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
/* Entry Point */
ENTRY(Reset_Handler)
__ram_vector_table__ = 1;
/* Heap 1/4 of ram and stack 1/8 */
__stack_size__ = 0x4000;
__stack_size__ = MBED_BOOT_STACK_SIZE;
__heap_size__ = 0x8000;
HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400;

6
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_IAR/MK22F51212.icf
View File

@ -49,8 +49,10 @@
*/
define symbol __ram_vector_table__ = 1;
/* Heap 1/4 of ram and stack 1/8 */
define symbol __stack_size__=0x4000;
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __stack_size__=MBED_BOOT_STACK_SIZE;
define symbol __heap_size__=0x8000;
define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x00000400 : 0;

15
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_ARM_STD/MK24FN1M0xxx12.sct
View File

@ -63,6 +63,17 @@
#define MBED_APP_SIZE 0x100000
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size MBED_BOOT_STACK_SIZE
#endif
#define m_interrupts_start MBED_APP_START
#define m_interrupts_size 0x00000400
@ -96,9 +107,11 @@ LR_IROM1 m_interrupts_start m_text_size+m_interrupts_size+m_flash_config_size {
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}
RW_IRAM1 m_data_2_start m_data_2_size { ; RW data
RW_IRAM1 m_data_2_start m_data_2_size-Stack_Size { ; RW data
.ANY (+RW +ZI)
}
VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size {
}
ARM_LIB_STACK m_data_2_start+m_data_2_size EMPTY -Stack_Size { ; Stack region growing down
}
}

7
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_GCC_ARM/MK24FN1M0xxx12.ld
View File

@ -47,13 +47,16 @@
** ###################################################################
*/
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
/* Entry Point */
ENTRY(Reset_Handler)
__ram_vector_table__ = 1;
/* Heap 1/4 of ram and stack 1/8 */
__stack_size__ = 0x8000;
__stack_size__ = MBED_BOOT_STACK_SIZE;
__heap_size__ = 0x10000;
#if !defined(MBED_APP_START)

6
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_IAR/MK24FN1M0xxx12.icf
View File

@ -48,8 +48,10 @@
*/
define symbol __ram_vector_table__ = 1;
/* Heap 1/4 of ram and stack 1/8 */
define symbol __stack_size__=0x8000;
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __stack_size__=MBED_BOOT_STACK_SIZE;
define symbol __heap_size__=0x10000;
if (!isdefinedsymbol(MBED_APP_START)) {

11
targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_STD/gd32f307vg.sct
View File

@ -11,6 +11,12 @@
#define MBED_APP_SIZE 0x100000
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region (1024K)
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
@ -20,8 +26,11 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region (1024K)
}
; 84 vectors (16 core + 68 peripheral) * 4 bytes = 336 bytes to reserve (0x150)
RW_IRAM1 (0x20000000+0x150) (0x18000-0x150) { ; RW data
RW_IRAM1 (0x20000000+0x150) (0x18000-0x150-Stack_Size) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK (0x20000000+0x18000) EMPTY -Stack_Size { ; stack
}
}

8
targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_GCC_ARM/GD32F307xG.ld
View File

@ -1,3 +1,9 @@
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
/* specify memory regions */
MEMORY
{
@ -115,7 +121,7 @@ SECTIONS
/* initializes stack on the end of block */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
_estack = __StackTop;
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
__StackLimit = __StackTop - STACK_SIZE;
PROVIDE(__stack = __StackTop);
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")

7
targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_IAR/gd32f307vg.icf
View File

@ -6,6 +6,9 @@ if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x0800000
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; }
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START;
define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
@ -13,9 +16,9 @@ define symbol __ICFEDIT_region_NVIC_start__ = 0x20000000;
define symbol __ICFEDIT_region_NVIC_end__ = 0x2000014F;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000150;
define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
/*-Sizes-*/
/*Heap 1/4 of ram and stack 1/8*/
define symbol __ICFEDIT_size_cstack__ = 0x3000;
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0x6000;
/**** End of ICF editor section. ###ICF###*/

13
targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_ARM_STD/MAX32600.sct
View File

@ -1,4 +1,4 @@
#! armcc -E
; MAX32600
; 256KB FLASH (0x40000) @ 0x000000000
; 2KB RAM (0x8000) @ 0x20000000
@ -6,6 +6,12 @@
; MAX32600: 256KB FLASH (0x40000) + 32KB RAM (0x8000)
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x800
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x40000 { ; load region size_region
ER_IROM1 0x00000000 0x40000 { ; load address = execution address
*.o (RESET, +First)
@ -14,8 +20,9 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region
}
; [RAM] Vector table dynamic copy: 79 vectors * 4 bytes = (0x140) - alignment
RW_IRAM1 (0x20000000+0x140) (0x8000-0x140) { ; RW data
RW_IRAM1 (0x20000000+0x140) (0x8000-0x140-Stack_Size) { ; RW data
.ANY (+RW +ZI)
}
ARM_LIB_STACK (0x20000000+0x8000) EMPTY -Stack_Size { ; stack
}
}

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