STM32L476 / STM32L486 alignment

2019-01-16 15:11:15 +01:00 · 2019-01-16 15:11:15 +01:00 · 7876a653c6
parent 5ae13f9c7b
commit 7876a653c6
7 changed files with 55 additions and 12 deletions
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM_STD/stm32l476xx.sct
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM_STD/stm32l476xx.sct
@ -60,11 +60,11 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE  {    ; load region size_region

  RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
  }
-  
+
  RW_IRAM1 MBED_RAM0_START MBED_RAM0_SIZE-Stack_Size  { ; RW data 96k L4-SRAM1
   .ANY (+RW +ZI)
  }
-  
+
 ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
  RW_IRAM2 (0x10000000+0x188) (0x08000-0x188)  {  ; RW data 32k L4-ECC-SRAM2 retained in standby
   .ANY (+RW +ZI)
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_GCC_ARM/STM32L476XX.ld
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_GCC_ARM/STM32L476XX.ld
@ -16,7 +16,7 @@ STACK_SIZE = MBED_BOOT_STACK_SIZE;

 /* Linker script to configure memory regions. */
 MEMORY
-{ 
+{
  FLASH (rx)   : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
  SRAM2 (rwx)  : ORIGIN = 0x10000188, LENGTH = 32k - 0x188
  SRAM1 (rwx)  : ORIGIN = 0x20000000, LENGTH = 96k
@ -26,7 +26,7 @@ MEMORY
 * with other linker script that defines memory regions FLASH and RAM.
 * It references following symbols, which must be defined in code:
 *   Reset_Handler : Entry of reset handler
- * 
+ *
 * It defines following symbols, which code can use without definition:
 *   __exidx_start
 *   __exidx_end
@ -93,7 +93,7 @@ SECTIONS

    __etext = .;
    _sidata = .;
-    
+
    .crash_data_ram :
    {
        . = ALIGN(8);
@ -104,7 +104,7 @@ SECTIONS
        . += M_CRASH_DATA_RAM_SIZE;
        . = ALIGN(8);
        __CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
-    } > SRAM1    
+    } > SRAM1

    .data : AT (__etext)
    {
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/system_clock.c
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/system_clock.c
@ -97,7 +97,7 @@ void SystemInit(void)
 #ifdef VECT_TAB_SRAM
    SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
 #else
-    SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+    SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS; /* Vector Table Relocation in Internal FLASH */
 #endif

 }
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM_STD/stm32l486xx.sct
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM_STD/stm32l486xx.sct
@ -36,6 +36,13 @@
  #define MBED_APP_SIZE 0x100000
 #endif

+#define MBED_RAM_START              0x20000000
+#define MBED_RAM_SIZE               0x00018000
+#define MBED_CRASH_REPORT_RAM_START (MBED_RAM_START)
+#define MBED_CRASH_REPORT_RAM_SIZE  0x100
+#define MBED_RAM0_START             (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
+#define MBED_RAM0_SIZE              (MBED_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
+
 #if !defined(MBED_BOOT_STACK_SIZE)
  #define MBED_BOOT_STACK_SIZE 0x400
 #endif
@ -51,15 +58,20 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE  {    ; load region size_region
   .ANY (+RO)
  }

-  RW_IRAM1 0x20000000 0x00018000-Stack_Size  { ; RW data 96k L4-SRAM1
+  RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
+  }
+
+  RW_IRAM1 MBED_RAM0_START MBED_RAM0_SIZE-Stack_Size  { ; RW data 96k L4-SRAM1
   .ANY (+RW +ZI)
  }
+
 ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
  RW_IRAM2 (0x10000000+0x188) (0x08000-0x188)  {  ; RW data 32k L4-ECC-SRAM2 retained in standby
   .ANY (+RW +ZI)
  }

-  ARM_LIB_STACK (0x20000000+0x00018000) EMPTY -Stack_Size { ; stack
+  ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack
  }
+
 }

--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_GCC_ARM/STM32L486XX.ld
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_GCC_ARM/STM32L486XX.ld
@ -6,6 +6,8 @@
  #define MBED_APP_SIZE 1024k
 #endif

+M_CRASH_DATA_RAM_SIZE = 0x100;
+
 #if !defined(MBED_BOOT_STACK_SIZE)
    #define MBED_BOOT_STACK_SIZE 0x400
 #endif
@ -15,7 +17,7 @@ STACK_SIZE = MBED_BOOT_STACK_SIZE;
 /* Linker script to configure memory regions. */
 MEMORY
 {
-  FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
+  FLASH (rx)   : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
  SRAM2 (rwx)  : ORIGIN = 0x10000188, LENGTH = 32k - 0x188
  SRAM1 (rwx)  : ORIGIN = 0x20000000, LENGTH = 96k
 }
@ -92,6 +94,18 @@ SECTIONS
    __etext = .;
    _sidata = .;

+    .crash_data_ram :
+    {
+        . = ALIGN(8);
+        __CRASH_DATA_RAM__ = .;
+        __CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
+        KEEP(*(.keep.crash_data_ram))
+        *(.m_crash_data_ram)     /* This is a user defined section */
+        . += M_CRASH_DATA_RAM_SIZE;
+        . = ALIGN(8);
+        __CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
+    } > SRAM1
+
    .data : AT (__etext)
    {
        __data_start__ = .;
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_IAR/stm32l486xx.icf
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_IAR/stm32l486xx.icf
@ -1,5 +1,5 @@
 if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
-if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x80000; }
+if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; }

 /* [ROM = 1024kb = 0x100000] */
 define symbol __intvec_start__     = MBED_APP_START;
@ -12,15 +12,22 @@ define symbol __NVIC_start__          = 0x10000000;
 define symbol __NVIC_end__            = 0x10000187;
 define symbol __region_SRAM2_start__  = 0x10000188;
 define symbol __region_SRAM2_end__    = 0x10007FFF;
-define symbol __region_SRAM1_start__  = 0x20000000;
+define symbol __region_CRASH_DATA_RAM_start__  = 0x20000000;
+define symbol __region_CRASH_DATA_RAM_end__  = 0x200000FF;
+define symbol __region_SRAM1_start__  = 0x20000100;
 define symbol __region_SRAM1_end__    = 0x20017FFF;

 /* Memory regions */
 define memory mem with size = 4G;
 define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
 define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__];
+define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__];
 define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];

+/* Define Crash Data Symbols */
+define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__;
+define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;
+
 if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
    define symbol MBED_BOOT_STACK_SIZE = 0x400;
 }
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/objects.h
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/objects.h
@ -58,6 +58,16 @@ struct trng_s {
    RNG_HandleTypeDef handle;
 };

+struct qspi_s {
+    QSPI_HandleTypeDef handle;
+    PinName io0;
+    PinName io1;
+    PinName io2;
+    PinName io3;
+    PinName sclk;
+    PinName ssel;
+};
+
 #include "common_objects.h"

 #ifdef __cplusplus