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Linker script modifications for crash data region

pull/8702/head
Senthil Ramakrishnan 2018-11-12 22:14:26 -06:00
parent 6181394e37
commit ef8c1c3cb6
44 changed files with 496 additions and 43 deletions
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9
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct
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@ -72,8 +72,11 @@
#define m_interrupts_ram_start 0x1FFF0000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00010000 - m_interrupts_ram_size)
#define m_crash_report_ram_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_crash_report_ram_size (0x100)
#define m_data_start (m_crash_report_ram_start + m_crash_report_ram_size)
#define m_data_size (0x00010000 - (m_interrupts_ram_size+m_crash_report_ram_size))
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
@ -110,6 +113,8 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; lo
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
RW_m_crash_data m_crash_report_ram_start EMPTY m_crash_report_ram_size { ; RW data
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}

13
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_GCC_ARM/MK66FN2M0xxx18.ld
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@ -66,6 +66,7 @@ __heap_size__ = 0x6000;
HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400;
STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0400 : 0x0;
M_CRASH_DATA_RAM_SIZE = 0x100;
/* Specify the memory areas */
MEMORY
@ -195,6 +196,18 @@ SECTIONS
. = ALIGN(8);
__interrupts_ram_end__ = .; /* Define a global symbol at data end */
} > m_data
.crash_data_ram :
{
. = ALIGN(8);
__CRASH_DATA_RAM__ = .;
__CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
KEEP(*(.keep.crash_data_ram))
*(.m_crash_data_ram) /* This is a user defined section */
. += M_CRASH_DATA_RAM_SIZE;
. = ALIGN(8);
__CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
} > m_data
__VECTOR_RAM = DEFINED(__ram_vector_table__) ? __VECTOR_RAM__ : ORIGIN(m_interrupts);
__RAM_VECTOR_TABLE_SIZE_BYTES = DEFINED(__ram_vector_table__) ? (__interrupts_ram_end__ - __interrupts_ram_start__) : 0x0;

7
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_IAR/MK66FN2M0xxx18.icf
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@ -72,7 +72,10 @@ define symbol m_text_end = MBED_APP_START + MBED_APP_SIZE - 1;
define symbol m_interrupts_ram_start = 0x1FFF0000;
define symbol m_interrupts_ram_end = 0x1FFF0000 + __ram_vector_table_offset__;
define symbol m_data_start = m_interrupts_ram_start + __ram_vector_table_size__;
define symbol m_crash_data_start = m_interrupts_ram_start + __ram_vector_table_size__;
define symbol m_crash_data_size = 0x100;
define symbol m_data_start = m_interrupts_ram_start + __ram_vector_table_size__ + m_crash_data_size;
define symbol m_data_end = 0x1FFFFFFF;
define symbol m_data_2_start = 0x20000000;
@ -94,6 +97,8 @@ if (isdefinedsymbol(__heap_size__)) {
define exported symbol __VECTOR_TABLE = m_interrupts_start;
define exported symbol __VECTOR_RAM = isdefinedsymbol(__ram_vector_table__) ? m_interrupts_ram_start : m_interrupts_start;
define exported symbol __RAM_VECTOR_TABLE_SIZE = __ram_vector_table_size__;
define exported symbol __CRASH_DATA_RAM_START__ = m_crash_data_start;
define exported symbol __CRASH_DATA_RAM_END__ = m_crash_data_start + m_crash_data_size;
define memory mem with size = 4G;
define region m_flash_config_region = mem:[from m_flash_config_start to m_flash_config_end];

9
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_ARM_STD/MK64FN1M0xxx12.sct
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@ -80,8 +80,11 @@
#define m_interrupts_ram_start 0x1FFF0000
#define m_interrupts_ram_size __ram_vector_table_size__
#define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_data_size (0x00010000 - m_interrupts_ram_size)
#define m_crash_report_ram_start (m_interrupts_ram_start + m_interrupts_ram_size)
#define m_crash_report_ram_size (0x100)
#define m_data_start (m_crash_report_ram_start + m_crash_report_ram_size)
#define m_data_size (0x00010000 - (m_interrupts_ram_size+m_crash_report_ram_size))
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
@ -118,6 +121,8 @@ LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; lo
VECTOR_RAM m_interrupts_start EMPTY 0 {
}
#endif
RW_m_crash_data m_crash_report_ram_start EMPTY m_crash_report_ram_size { ; RW data
}
RW_m_data m_data_start m_data_size { ; RW data
.ANY (+RW +ZI)
}

13
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_GCC_ARM/MK64FN1M0xxx12.ld
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@ -74,6 +74,7 @@ __heap_size__ = 0x6000;
HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400;
STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0400 : 0x0;
M_CRASH_DATA_RAM_SIZE = 0x100;
/* Specify the memory areas */
MEMORY
@ -200,6 +201,18 @@ SECTIONS
. = ALIGN(8);
__interrupts_ram_end__ = .; /* Define a global symbol at data end */
} > m_data
.crash_data_ram :
{
. = ALIGN(8);
__CRASH_DATA_RAM__ = .;
__CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
KEEP(*(.keep.crash_data_ram))
*(.m_crash_data_ram) /* This is a user defined section */
. += M_CRASH_DATA_RAM_SIZE;
. = ALIGN(8);
__CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
} > m_data
__VECTOR_RAM = DEFINED(__ram_vector_table__) ? __VECTOR_RAM__ : ORIGIN(m_interrupts);

7
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_IAR/MK64FN1M0xxx12.icf
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@ -79,7 +79,10 @@ define symbol m_text_end = MBED_APP_START + MBED_APP_SIZE - 1;
define symbol m_interrupts_ram_start = 0x1FFF0000;
define symbol m_interrupts_ram_end = 0x1FFF0000 + __ram_vector_table_offset__;
define symbol m_data_start = m_interrupts_ram_start + __ram_vector_table_size__;
define symbol m_crash_data_start = m_interrupts_ram_start + __ram_vector_table_size__;
define symbol m_crash_data_size = 0x100;
define symbol m_data_start = m_interrupts_ram_start + __ram_vector_table_size__ + m_crash_data_size;
define symbol m_data_end = 0x1FFFFFFF;
define symbol m_data_2_start = 0x20000000;
@ -101,6 +104,8 @@ if (isdefinedsymbol(__heap_size__)) {
define exported symbol __VECTOR_TABLE = m_interrupts_start;
define exported symbol __VECTOR_RAM = isdefinedsymbol(__ram_vector_table__) ? m_interrupts_ram_start : m_interrupts_start;
define exported symbol __RAM_VECTOR_TABLE_SIZE = __ram_vector_table_size__;
define exported symbol __CRASH_DATA_RAM_START__ = m_crash_data_start;
define exported symbol __CRASH_DATA_RAM_END__ = m_crash_data_start + m_crash_data_size;
define memory mem with size = 4G;
define region m_flash_config_region = mem:[from m_flash_config_start to m_flash_config_end];

10
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52840.sct
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@ -22,8 +22,12 @@
#define MBED_RAM0_START MBED_RAM_START
#define MBED_RAM0_SIZE 0x100
#define MBED_RAM1_START (MBED_RAM_START + MBED_RAM0_SIZE)
#define MBED_RAM1_SIZE (MBED_RAM_SIZE - MBED_RAM0_SIZE)
#define MBED_CRASH_REPORT_RAM_START (MBED_RAM0_START + MBED_RAM0_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_RAM1_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_RAM1_SIZE (MBED_RAM_SIZE - (MBED_RAM0_SIZE + MBED_CRASH_REPORT_RAM_SIZE))
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
@ -34,6 +38,8 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE {
RW_IRAM0 MBED_RAM0_START UNINIT MBED_RAM0_SIZE { ;no init section
*(*nvictable)
}
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE {
.ANY (+RW +ZI)
}

21
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld
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@ -38,13 +38,18 @@
#define MBED_RAM0_START MBED_RAM_START
#define MBED_RAM0_SIZE 0x100
#define MBED_RAM1_START (MBED_RAM_START + MBED_RAM0_SIZE)
#define MBED_RAM1_SIZE (MBED_RAM_SIZE - MBED_RAM0_SIZE)
#define MBED_CRASH_REPORT_RAM_START (MBED_RAM0_START + MBED_RAM0_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_RAM1_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_RAM1_SIZE (MBED_RAM_SIZE - (MBED_RAM0_SIZE + MBED_CRASH_REPORT_RAM_SIZE))
MEMORY
{
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
RAM_NVIC (rwx) : ORIGIN = MBED_RAM0_START, LENGTH = MBED_RAM0_SIZE
RAM_CRASH_DATA (rwx) : ORIGIN = MBED_CRASH_REPORT_RAM_START, LENGTH = MBED_CRASH_REPORT_RAM_SIZE
RAM (rwx) : ORIGIN = MBED_RAM1_START, LENGTH = MBED_RAM1_SIZE
}
@ -206,6 +211,18 @@ SECTIONS
KEEP(*(.nvictable))
PROVIDE(__stop_nvictable = .);
} > RAM_NVIC
.crash_data_ram :
{
. = ALIGN(8);
__CRASH_DATA_RAM__ = .;
__CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
KEEP(*(.keep.crash_data_ram))
*(.m_crash_data_ram) /* This is a user defined section */
. += MBED_CRASH_REPORT_RAM_SIZE;
. = ALIGN(8);
__CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
} > RAM_CRASH_DATA
.noinit (NOLOAD) :
{

8
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_IAR/nRF52840.icf
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@ -24,8 +24,12 @@ if (!isdefinedsymbol(MBED_RAM_START)) {
define symbol MBED_RAM0_START = MBED_RAM_START;
define symbol MBED_RAM0_SIZE = 0x100;
define symbol MBED_RAM1_START = (MBED_RAM_START + MBED_RAM0_SIZE);
define symbol MBED_RAM1_SIZE = (MBED_RAM_SIZE - MBED_RAM0_SIZE);
define symbol MBED_CRASH_REPORT_RAM_START = (MBED_RAM_START + MBED_RAM0_SIZE);
define symbol MBED_CRASH_REPORT_RAM_SIZE = 0x100;
define symbol MBED_RAM1_START = (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE);
define symbol MBED_RAM1_SIZE = (MBED_RAM_SIZE - (MBED_RAM0_SIZE + MBED_CRASH_REPORT_RAM_SIZE));
define exported symbol __CRASH_DATA_RAM_START__ = MBED_CRASH_REPORT_RAM_START;
define exported symbol __CRASH_DATA_RAM_END__ = MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE;
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;

16
targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_MICRO/M487.sct
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@ -11,6 +11,15 @@
#define SPIM_CCM_START 0x20020000
#define SPIM_CCM_END 0x20028000
#define MBED_RAM_START 0x20000000
#define MBED_RAM_SIZE 0x20000
#define MBED_STACK_RAM_START (MBED_RAM_START)
#define MBED_STACK_RAM_SIZE 0x800
#define MBED_VECTTABLE_RAM_START (MBED_STACK_RAM_START + MBED_STACK_RAM_SIZE)
#define MBED_VECTTABLE_RAM_SIZE (4*(16 + 96))
#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
LR_IROM1 MBED_APP_START {
ER_IROM1 MBED_APP_START { ; load address = execution address
*(RESET, +First)
@ -19,10 +28,13 @@ LR_IROM1 MBED_APP_START {
}
ARM_LIB_STACK 0x20000000 EMPTY 0x800 {
ARM_LIB_STACK MBED_STACK_RAM_START EMPTY MBED_STACK_RAM_SIZE {
}
ER_IRAMVEC 0x20000800 EMPTY (4*(16 + 96)) { ; Reserve for vectors
ER_IRAMVEC MBED_VECTTABLE_RAM_START EMPTY MBED_VECTTABLE_RAM_SIZE { ; Reserve for vectors
}
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; Reserve for crash data storage
}
RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned

16
targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_STD/M487.sct
View File

@ -11,6 +11,15 @@
#define SPIM_CCM_START 0x20020000
#define SPIM_CCM_END 0x20028000
#define MBED_RAM_START 0x20000000
#define MBED_RAM_SIZE 0x20000
#define MBED_STACK_RAM_START (MBED_RAM_START)
#define MBED_STACK_RAM_SIZE 0x800
#define MBED_VECTTABLE_RAM_START (MBED_STACK_RAM_START + MBED_STACK_RAM_SIZE)
#define MBED_VECTTABLE_RAM_SIZE (4*(16 + 96))
#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
LR_IROM1 MBED_APP_START {
ER_IROM1 MBED_APP_START { ; load address = execution address
*(RESET, +First)
@ -19,10 +28,13 @@ LR_IROM1 MBED_APP_START {
}
ARM_LIB_STACK 0x20000000 EMPTY 0x800 {
ARM_LIB_STACK MBED_STACK_RAM_START EMPTY MBED_STACK_RAM_SIZE {
}
ER_IRAMVEC 0x20000800 EMPTY (4*(16 + 96)) { ; Reserve for vectors
ER_IRAMVEC MBED_VECTTABLE_RAM_START EMPTY MBED_VECTTABLE_RAM_SIZE { ; Reserve for vectors
}
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; Reserve for crash data storage
}
RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned

13
targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_GCC_ARM/M487.ld
View File

@ -10,6 +10,7 @@
#define MBED_APP_SIZE 0x00080000
#endif
M_CRASH_DATA_RAM_SIZE = 0x100;
StackSize = 0x800;
SPIM_CCM_START = 0x20020000;
SPIM_CCM_END = 0x20028000;
@ -130,6 +131,18 @@ SECTIONS
PROVIDE(__end_vector_table__ = .);
} > RAM_INTERN
.crash_data_ram :
{
. = ALIGN(8);
__CRASH_DATA_RAM__ = .;
__CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
KEEP(*(.keep.crash_data_ram))
*(.m_crash_data_ram) /* This is a user defined section */
. += M_CRASH_DATA_RAM_SIZE;
. = ALIGN(8);
__CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
} > RAM_INTERN
.data :
{
PROVIDE( __etext = LOADADDR(.data) );

9
targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_IAR/M487.icf
View File

@ -12,6 +12,8 @@ define symbol __ICFEDIT_region_IRAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_IRAM_end__ = 0x20028000 - 1;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x800;
define symbol __ICFEDIT_size_crash_data__ = 0x100;
define symbol __ICFEDIT_size_intvec__ = (4 * (16 + 96))
define symbol __ICFEDIT_size_heap__ = 0x10000;
/**** End of ICF editor section. ###ICF###*/
@ -23,8 +25,12 @@ define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFED
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
/* NOTE: Vector table base requires to be aligned to the power of vector table size. Give a safe value here. */
define block IRAMVEC with alignment = 1024, size = 4 * (16 + 96) { };
define block IRAMVEC with alignment = 1024, size = __ICFEDIT_size_intvec__ { };
define block CRASH_DATA_RAM with alignment = 8, size = __ICFEDIT_size_crash_data__ { };
/* Define Crash Data Symbols */
define exported symbol __CRASH_DATA_RAM_START__ = __ICFEDIT_region_IRAM_start__ + __ICFEDIT_size_cstack__ + __ICFEDIT_size_intvec__;
define exported symbol __CRASH_DATA_RAM_END__ = __ICFEDIT_region_IRAM_start__ + __ICFEDIT_size_cstack__ + __ICFEDIT_size_intvec__ + __ICFEDIT_size_crash_data__;
initialize by copy { readwrite };
do not initialize { section .noinit };
@ -34,5 +40,6 @@ place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place at start of IRAM_region { block CSTACK };
place in IRAM_region { block IRAMVEC };
place in IRAM_region { block CRASH_DATA_RAM };
place in IRAM_region { readwrite };
place in IRAM_region { block HEAP };

14
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_ARM_MICRO/stm32f411re.sct
View File

@ -27,6 +27,15 @@
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
#define MBED_RAM_START 0x20000000
#define MBED_RAM_SIZE 0x20000
#define MBED_VECTTABLE_RAM_START (MBED_RAM_START)
#define MBED_VECTTABLE_RAM_SIZE 0x198
#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
; STM32F411RE: 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000)
LR_IROM1 0x08000000 0x80000 { ; load region size_region
@ -35,9 +44,12 @@ LR_IROM1 0x08000000 0x80000 { ; load region size_region
*(InRoot$$Sections)
.ANY (+RO)
}
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM
RW_IRAM1 (0x20000000+0x198) (0x20000-0x198) { ; RW data
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data
.ANY (+RW +ZI)
}

14
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_ARM_STD/stm32f411re.sct
View File

@ -36,6 +36,15 @@
#define MBED_APP_SIZE 0x80000
#endif
#define MBED_RAM_START 0x20000000
#define MBED_RAM_SIZE 0x20000
#define MBED_VECTTABLE_RAM_START (MBED_RAM_START)
#define MBED_VECTTABLE_RAM_SIZE 0x198
#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
; STM32F411RE: 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -44,9 +53,12 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
*(InRoot$$Sections)
.ANY (+RO)
}
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM
RW_IRAM1 (0x20000000+0x198) (0x20000-0x198) { ; RW data
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data
.ANY (+RW +ZI)
}

14
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_GCC_ARM/STM32F411XE.ld
View File

@ -6,6 +6,8 @@
#define MBED_APP_SIZE 512K
#endif
M_CRASH_DATA_RAM_SIZE = 0x100;
/* Linker script to configure memory regions. */
MEMORY
{
@ -84,6 +86,18 @@ SECTIONS
__etext = .;
_sidata = .;
.crash_data_ram :
{
. = ALIGN(8);
__CRASH_DATA_RAM__ = .;
__CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
KEEP(*(.keep.crash_data_ram))
*(.m_crash_data_ram) /* This is a user defined section */
. += M_CRASH_DATA_RAM_SIZE;
. = ALIGN(8);
__CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
} > RAM
.data : AT (__etext)
{

9
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_IAR/stm32f411xe.icf
View File

@ -9,14 +9,21 @@ define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
/* [RAM = 128kb = 0x20000] Vector table dynamic copy: 102 vectors = 408 bytes (0x198) to be reserved in RAM */
define symbol __NVIC_start__ = 0x20000000;
define symbol __NVIC_end__ = 0x20000197; /* Aligned on 8 bytes */
define symbol __region_RAM_start__ = 0x20000198;
define symbol __region_CRASH_DATA_RAM_start__ = 0x20000198;
define symbol __region_CRASH_DATA_RAM_end__ = 0x20000297;
define symbol __region_RAM_start__ = 0x20000298;
define symbol __region_RAM_end__ = 0x2001FFFF;
/* Memory regions */
define memory mem with size = 4G;
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__];
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
/* Define Crash Data Symbols */
define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__;
define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;
/* Stack and Heap */
/*Heap 84kB and stack 1kB */
define symbol __size_cstack__ = 0x400;

16
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_ARM_MICRO/stm32f429xx.sct
View File

@ -36,6 +36,15 @@
#define MBED_APP_SIZE 0x200000
#endif
#define MBED_RAM_START 0x20000000
#define MBED_RAM_SIZE 0x20000
#define MBED_VECTTABLE_RAM_START (MBED_RAM_START)
#define MBED_VECTTABLE_RAM_SIZE 0x1B0
#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
; 2 MB FLASH (0x200000) + 256 KB SRAM (0x40000)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -44,9 +53,12 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
*(InRoot$$Sections)
.ANY (+RO)
}
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
; Total: 107 vectors = 428 bytes (0x1AC) 8-byte aligned = 0x1B0 (0x1AC + 0x4) to be reserved in RAM
RW_IRAM1 (0x20000000+0x1B0) (0x20000-0x1B0) { ; RW data
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data
.ANY (+RW +ZI)
}

11
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_ARM_STD/stm32f429xx.sct
View File

@ -36,6 +36,15 @@
#define MBED_APP_SIZE 0x200000
#endif
#define MBED_RAM_START 0x20000000
#define MBED_RAM_SIZE 0x30000
#define MBED_VECTTABLE_RAM_START (MBED_RAM_START)
#define MBED_VECTTABLE_RAM_SIZE 0x1B0
#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
; 2 MB FLASH (0x200000) + 192 KB SRAM (0x30000)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -46,7 +55,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
}
; Total: 107 vectors = 428 bytes (0x1AC) 8-byte aligned = 0x1B0 (0x1AC + 0x4) to be reserved in RAM
RW_IRAM1 (0x20000000+0x1B0) (0x30000-0x1B0) { ; RW data
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data
.ANY (+RW +ZI)
}

15
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_GCC_ARM/STM32F429xI.ld
View File

@ -14,6 +14,8 @@ HEAP_SIZE = 0x6000;
#define MBED_APP_SIZE 2048k
#endif
M_CRASH_DATA_RAM_SIZE = 0x100;
/* Specify the memory areas */
MEMORY
{
@ -114,7 +116,18 @@ SECTIONS
. = ALIGN(8);
__interrupts_ram_end__ = .; /* Define a global symbol at data end */
} > RAM
.crash_data_ram :
{
. = ALIGN(8);
__CRASH_DATA_RAM__ = .;
__CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
KEEP(*(.keep.crash_data_ram))
*(.m_crash_data_ram) /* This is a user defined section */
. += M_CRASH_DATA_RAM_SIZE;
. = ALIGN(8);
__CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
} > RAM
.data :
{

9
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_IAR/stm32f429xx_flash.icf
View File

@ -10,7 +10,9 @@ define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START;
define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
define symbol __ICFEDIT_region_NVIC_start__ = 0x20000000;
define symbol __ICFEDIT_region_NVIC_end__ = 0x200001AF;
define symbol __ICFEDIT_region_RAM_start__ = 0x200001B0;
define symbol __region_CRASH_DATA_RAM_start__ = 0x200001B0;
define symbol __region_CRASH_DATA_RAM_end__ = 0x200002AF;
define symbol __ICFEDIT_region_RAM_start__ = 0x200002B0;
define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF;
define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000;
define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF;
@ -24,8 +26,13 @@ define symbol __ICFEDIT_size_heap__ = 0x10000;
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__];
define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__];
/* Define Crash Data Symbols */
define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__;
define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };

14
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_ARM_STD/stm32f437xx.sct
View File

@ -38,6 +38,15 @@
#define MBED_APP_SIZE 0x100000
#endif
#define MBED_RAM_START 0x20000000
#define MBED_RAM_SIZE 0x30000
#define MBED_VECTTABLE_RAM_START (MBED_RAM_START)
#define MBED_VECTTABLE_RAM_SIZE 0x1B0
#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
@ -47,7 +56,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
}
; Total: 107 vectors = 428 bytes (0x1AC) 8-byte aligned = 0x1B0 (0x1AC + 0x4) to be reserved in RAM
RW_IRAM1 (0x20000000+0x1B0) (0x30000-0x1B0) { ; RW data
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data
.ANY (+RW +ZI)
}
@ -55,6 +64,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
.ANY (CCMRAM)
}
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
RW_IRAM3 0x40024000 4096 { ; 4 kbytes of Backup SRAM
.ANY (BKPSRAM)
}

14
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_GCC_ARM/STM32F437xx.ld
View File

@ -6,6 +6,8 @@
#define MBED_APP_SIZE 1024k
#endif
M_CRASH_DATA_RAM_SIZE = 0x100;
/* Linker script to configure memory regions. */
/* 0x1AC resevered for vectors; 8-byte aligned = 0x1B0 (0x1AC + 0x4)*/
MEMORY
@ -87,6 +89,18 @@ SECTIONS
__etext = .;
_sidata = .;
.crash_data_ram :
{
. = ALIGN(8);
__CRASH_DATA_RAM__ = .;
__CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
KEEP(*(.keep.crash_data_ram))
*(.m_crash_data_ram) /* This is a user defined section */
. += M_CRASH_DATA_RAM_SIZE;
. = ALIGN(8);
__CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
} > RAM
.data : AT (__etext)
{

9
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_IAR/stm32f437xx.icf
View File

@ -10,7 +10,9 @@ define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START;
define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
define symbol __ICFEDIT_region_NVIC_start__ = 0x20000000;
define symbol __ICFEDIT_region_NVIC_end__ = 0x200001AF;
define symbol __ICFEDIT_region_RAM_start__ = 0x200001B0;
define symbol __region_CRASH_DATA_RAM_start__ = 0x200001B0;
define symbol __region_CRASH_DATA_RAM_end__ = 0x200002AF;
define symbol __ICFEDIT_region_RAM_start__ = 0x200002B0;
define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF;
define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000;
define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF;
@ -25,10 +27,15 @@ define symbol __ICFEDIT_size_heap__ = 0x18000;
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__];
define region BKPSRAM_region = mem:[from __ICFEDIT_region_BKPSRAM_start__ to __ICFEDIT_region_BKPSRAM_end__];
/* Define Crash Data Symbols */
define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__;
define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };

14
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_MICRO/stm32f439xx.sct
View File

@ -36,6 +36,15 @@
#define MBED_APP_SIZE 0x200000
#endif
#define MBED_RAM_START 0x20000000
#define MBED_RAM_SIZE 0x30000
#define MBED_VECTTABLE_RAM_START (MBED_RAM_START)
#define MBED_VECTTABLE_RAM_SIZE 0x1B0
#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
; STM32F439xI: 2048 KB FLASH (0x200000) + 256 KB SRAM (0x30000 + 0x10000)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -44,10 +53,13 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
*(InRoot$$Sections)
.ANY (+RO)
}
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
; Total: 107 vectors = 428 bytes (0x1AC) 8-byte aligned = 0x1B0 (0x1AC + 0x4) to be used
; should match ER_IROM1::RESET/4 and cmsis_nvic.h::NVIC_NUM_VECTORS
RW_IRAM1 (0x20000000 + 0x1B0) (0x30000 - 0x1B0) { ; RW data
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data
.ANY (+RW +ZI)
}
RW_IRAM2 (0x10000000) 0x10000 {

14
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_STD/stm32f439xx.sct
View File

@ -36,6 +36,15 @@
#define MBED_APP_SIZE 0x200000
#endif
#define MBED_RAM_START 0x20000000
#define MBED_RAM_SIZE 0x30000
#define MBED_VECTTABLE_RAM_START (MBED_RAM_START)
#define MBED_VECTTABLE_RAM_SIZE 0x1B0
#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
; 2 MB FLASH (0x200000) + 256 KB SRAM (0x30000 + 0x10000)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -44,9 +53,12 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
*(InRoot$$Sections)
.ANY (+RO)
}
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
; Total: 107 vectors = 428 bytes(0x1AC) 8-byte aligned = 0x1B0 (0x1AC + 0x4) to be reserved in RAM
RW_IRAM1 (0x20000000+0x1B0) (0x30000-0x1B0) { ; RW data
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data
.ANY (+RW +ZI)
}

14
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_GCC_ARM/STM32F439ZI.ld
View File

@ -6,6 +6,8 @@
#define MBED_APP_SIZE 2048k
#endif
M_CRASH_DATA_RAM_SIZE = 0x100;
/* Linker script to configure memory regions. */
/* 0x1AC resevered for vectors; 8-byte aligned = 0x1B0 (0x1AC + 0x4)*/
MEMORY
@ -86,6 +88,18 @@ SECTIONS
__etext = .;
_sidata = .;
.crash_data_ram :
{
. = ALIGN(8);
__CRASH_DATA_RAM__ = .;
__CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
KEEP(*(.keep.crash_data_ram))
*(.m_crash_data_ram) /* This is a user defined section */
. += M_CRASH_DATA_RAM_SIZE;
. = ALIGN(8);
__CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
} > RAM
.data : AT (__etext)
{

9
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_IAR/stm32f439xx_flash.icf
View File

@ -10,7 +10,9 @@ define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START;
define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
define symbol __ICFEDIT_region_NVIC_start__ = 0x20000000;
define symbol __ICFEDIT_region_NVIC_end__ = 0x200001AF;
define symbol __ICFEDIT_region_RAM_start__ = 0x200001B0;
define symbol __region_CRASH_DATA_RAM_start__ = 0x200001B0;
define symbol __region_CRASH_DATA_RAM_end__ = 0x200002AF;
define symbol __ICFEDIT_region_RAM_start__ = 0x200002B0;
define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF;
define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000;
define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF;
@ -23,9 +25,14 @@ define symbol __ICFEDIT_size_heap__ = 0x15C00;
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__];
/* Define Crash Data Symbols */
define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__;
define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };

14
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_ARM_MICRO/stm32f746xg.sct
View File

@ -36,6 +36,15 @@
#define MBED_APP_SIZE 0x100000
#endif
#define MBED_RAM_START 0x20000000
#define MBED_RAM_SIZE 0x50000
#define MBED_VECTTABLE_RAM_START (MBED_RAM_START)
#define MBED_VECTTABLE_RAM_SIZE 0x1C8
#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
; STM32F746NG: 1024 KB FLASH (0x100000) + 320 KB SRAM (0x50000)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -44,9 +53,12 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
*(InRoot$$Sections)
.ANY (+RO)
}
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
; Total: 114 vectors = 456 bytes (0x1C8) to be reserved in RAM
RW_IRAM1 (0x20000000+0x1C8) (0x50000-0x1C8) { ; RW data
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data
.ANY (+RW +ZI)
}

14
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_ARM_STD/stm32f746xg.sct
View File

@ -36,6 +36,15 @@
#define MBED_APP_SIZE 0x100000
#endif
#define MBED_RAM_START 0x20000000
#define MBED_RAM_SIZE 0x50000
#define MBED_VECTTABLE_RAM_START (MBED_RAM_START)
#define MBED_VECTTABLE_RAM_SIZE 0x1C8
#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
; STM32F746NG: 1024 KB FLASH (0x100000) + 320 KB SRAM (0x50000)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -44,9 +53,12 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
*(InRoot$$Sections)
.ANY (+RO)
}
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
; Total: 114 vectors = 456 bytes (0x1C8) to be reserved in RAM
RW_IRAM1 (0x20000000+0x1C8) (0x50000-0x1C8) { ; RW data
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data
.ANY (+RW +ZI)
}

14
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_GCC_ARM/STM32F746xG.ld
View File

@ -8,6 +8,8 @@
#define MBED_APP_SIZE 1024K
#endif
M_CRASH_DATA_RAM_SIZE = 0x100;
MEMORY
{
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
@ -85,6 +87,18 @@ SECTIONS
__etext = .;
_sidata = .;
.crash_data_ram :
{
. = ALIGN(8);
__CRASH_DATA_RAM__ = .;
__CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
KEEP(*(.keep.crash_data_ram))
*(.m_crash_data_ram) /* This is a user defined section */
. += M_CRASH_DATA_RAM_SIZE;
. = ALIGN(8);
__CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
} > RAM
.data : AT (__etext)
{

9
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_IAR/stm32f746xg.icf
View File

@ -9,7 +9,9 @@ define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
/* [RAM = 320kb = 0x50000] Vector table dynamic copy: 114 vectors = 456 bytes (0x1C8) to be reserved in RAM */
define symbol __NVIC_start__ = 0x20000000;
define symbol __NVIC_end__ = 0x200001C7; /* Aligned on 8 bytes */
define symbol __region_RAM_start__ = 0x200001C8;
define symbol __region_CRASH_DATA_RAM_start__ = 0x200001C8;
define symbol __region_CRASH_DATA_RAM_end__ = 0x200002C7;
define symbol __region_RAM_start__ = 0x200002C8;
define symbol __region_RAM_end__ = 0x2004FFFF;
define symbol __region_ITCMRAM_start__ = 0x00000000;
@ -19,8 +21,13 @@ define symbol __region_ITCMRAM_end__ = 0x00003FFF;
define memory mem with size = 4G;
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__];
define region ITCMRAM_region = mem:[from __region_ITCMRAM_start__ to __region_ITCMRAM_end__];
/* Define Crash Data Symbols */
define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__;
define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;
/* Stack and Heap */
/*Heap 1/4 of ram and stack 1/12 */
define symbol __size_cstack__ = 0x4000;

14
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_ARM_MICRO/stm32f767xi.sct
View File

@ -36,6 +36,15 @@
#define MBED_APP_SIZE 0x200000
#endif
#define MBED_RAM_START 0x20000000
#define MBED_RAM_SIZE 0x80000
#define MBED_VECTTABLE_RAM_START (MBED_RAM_START)
#define MBED_VECTTABLE_RAM_SIZE 0x1F8
#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
; STM32F767ZI: 2048 KB FLASH (0x200000) + 512 KB SRAM (0x80000)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -44,9 +53,12 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
*(InRoot$$Sections)
.ANY (+RO)
}
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
; Total: 126 vectors = 504 bytes (0x1F8) to be reserved in RAM
RW_IRAM1 (0x20000000+0x1F8) (0x80000-0x1F8) { ; RW data
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data
.ANY (+RW +ZI)
}

14
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_ARM_STD/stm32f767xi.sct
View File

@ -36,6 +36,15 @@
#define MBED_APP_SIZE 0x200000
#endif
#define MBED_RAM_START 0x20000000
#define MBED_RAM_SIZE 0x80000
#define MBED_VECTTABLE_RAM_START (MBED_RAM_START)
#define MBED_VECTTABLE_RAM_SIZE 0x1F8
#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
; STM32F767ZI: 2048 KB FLASH (0x200000) + 512 KB SRAM (0x80000)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -44,9 +53,12 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
*(InRoot$$Sections)
.ANY (+RO)
}
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
; Total: 126 vectors = 504 bytes (0x1F8) to be reserved in RAM
RW_IRAM1 (0x20000000+0x1F8) (0x80000-0x1F8) { ; RW data
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data
.ANY (+RW +ZI)
}

14
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_GCC_ARM/STM32F767xI.ld
View File

@ -8,6 +8,8 @@
#define MBED_APP_SIZE 2048K
#endif
M_CRASH_DATA_RAM_SIZE = 0x100;
MEMORY
{
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
@ -85,6 +87,18 @@ SECTIONS
__etext = .;
_sidata = .;
.crash_data_ram :
{
. = ALIGN(8);
__CRASH_DATA_RAM__ = .;
__CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
KEEP(*(.keep.crash_data_ram))
*(.m_crash_data_ram) /* This is a user defined section */
. += M_CRASH_DATA_RAM_SIZE;
. = ALIGN(8);
__CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
} > RAM
.data : AT (__etext)
{

9
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_IAR/stm32f767xi.icf
View File

@ -9,7 +9,9 @@ define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
/* [RAM = 512kb = 0x80000] Vector table dynamic copy: 126 vectors = 504 bytes (0x1F8) to be reserved in RAM */
define symbol __NVIC_start__ = 0x20000000;
define symbol __NVIC_end__ = 0x200001F7; /* Aligned on 8 bytes */
define symbol __region_RAM_start__ = 0x200001F8;
define symbol __region_CRASH_DATA_RAM_start__ = 0x200001F8;
define symbol __region_CRASH_DATA_RAM_end__ = 0x200002F7;
define symbol __region_RAM_start__ = 0x200002F8;
define symbol __region_RAM_end__ = 0x2007FFFF;
define symbol __region_ITCMRAM_start__ = 0x00000000;
@ -18,9 +20,14 @@ define symbol __region_ITCMRAM_end__ = 0x00003FFF;
/* Memory regions */
define memory mem with size = 4G;
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__];
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
define region ITCMRAM_region = mem:[from __region_ITCMRAM_start__ to __region_ITCMRAM_end__];
/* Define Crash Data Symbols */
define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__;
define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;
/* Stack and Heap */
define symbol __size_cstack__ = 0x8000;
define symbol __size_heap__ = 0x10000;

11
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM_MICRO/stm32l475xx.sct
View File

@ -36,6 +36,13 @@
#define MBED_APP_SIZE 0x100000
#endif
#define MBED_RAM_START 0x20000000
#define MBED_RAM_SIZE 0x00018000
#define MBED_CRASH_REPORT_RAM_START (MBED_RAM_START)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_RAM0_START (MBED_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
; 1MB FLASH (0x100000) + 128KB SRAM (0x20000)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -45,7 +52,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
.ANY (+RO)
}
RW_IRAM1 0x20000000 0x00018000 { ; RW data 96k L4-SRAM1
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
RW_IRAM1 MBED_RAM0_START MBED_RAM0_SIZE { ; RW data 96k L4-SRAM1
.ANY (+RW +ZI)
}
; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM

13
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM_STD/stm32l475xx.sct
View File

@ -36,6 +36,14 @@
#define MBED_APP_SIZE 0x100000
#endif
#define MBED_RAM_START 0x20000000
#define MBED_RAM_SIZE 0x00018000
#define MBED_CRASH_REPORT_RAM_START (MBED_RAM_START)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_RAM0_START (MBED_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
; 1MB FLASH (0x100000) + 128KB SRAM (0x20000)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -44,8 +52,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM1 0x20000000 0x00018000 { ; RW data 96k L4-SRAM1
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
RW_IRAM1 MBED_RAM0_START MBED_RAM0_SIZE { ; RW data 96k L4-SRAM1
.ANY (+RW +ZI)
}
; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM

14
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_GCC_ARM/STM32L475XX.ld
View File

@ -6,6 +6,8 @@
#define MBED_APP_SIZE 1024k
#endif
M_CRASH_DATA_RAM_SIZE = 0x100;
/* Linker script to configure memory regions. */
MEMORY
{
@ -85,6 +87,18 @@ SECTIONS
__etext = .;
_sidata = .;
.crash_data_ram :
{
. = ALIGN(8);
__CRASH_DATA_RAM__ = .;
__CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
KEEP(*(.keep.crash_data_ram))
*(.m_crash_data_ram) /* This is a user defined section */
. += M_CRASH_DATA_RAM_SIZE;
. = ALIGN(8);
__CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
} > SRAM1
.data : AT (__etext)
{

9
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_IAR/stm32l475xx.icf
View File

@ -12,15 +12,22 @@ define symbol __NVIC_start__ = 0x10000000;
define symbol __NVIC_end__ = 0x10000187;
define symbol __region_SRAM2_start__ = 0x10000188;
define symbol __region_SRAM2_end__ = 0x10007FFF;
define symbol __region_SRAM1_start__ = 0x20000000;
define symbol __region_CRASH_DATA_RAM_start__ = 0x20000000;
define symbol __region_CRASH_DATA_RAM_end__ = 0x200000FF;
define symbol __region_SRAM1_start__ = 0x20000100;
define symbol __region_SRAM1_end__ = 0x20017FFF;
/* Memory regions */
define memory mem with size = 4G;
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__];
define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__];
define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
/* Define Crash Data Symbols */
define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__;
define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;
/* Stack complete SRAM2 and Heap 2/3 of SRAM1 */
define symbol __size_cstack__ = 0x7e00;
define symbol __size_heap__ = 0x10000;

13
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM_MICRO/stm32l476xx.sct
View File

@ -36,6 +36,13 @@
#define MBED_APP_SIZE 0x100000
#endif
#define MBED_RAM_START 0x20000000
#define MBED_RAM_SIZE 0x00018000
#define MBED_CRASH_REPORT_RAM_START (MBED_RAM_START)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
; 1MB FLASH (0x100000) + 128KB SRAM (0x20000)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -45,9 +52,13 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
.ANY (+RO)
}
RW_IRAM1 0x20000000 0x00018000 { ; RW data 96k L4-SRAM1
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
RW_IRAM1 MBED_RAM0_START MBED_RAM0_SIZE { ; RW data 96k L4-SRAM1
.ANY (+RW +ZI)
}
; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
RW_IRAM2 (0x10000000+0x188) (0x08000-0x188) { ; RW data 32k L4-ECC-SRAM2 retained in standby
.ANY (+RW +ZI)

13
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM_STD/stm32l476xx.sct
View File

@ -36,6 +36,13 @@
#define MBED_APP_SIZE 0x100000
#endif
#define MBED_RAM_START 0x20000000
#define MBED_RAM_SIZE 0x00018000
#define MBED_CRASH_REPORT_RAM_START (MBED_RAM_START)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
; 1MB FLASH (0x100000) + 128KB SRAM (0x20000)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -45,9 +52,13 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
.ANY (+RO)
}
RW_IRAM1 0x20000000 0x00018000 { ; RW data 96k L4-SRAM1
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
RW_IRAM1 MBED_RAM0_START MBED_RAM0_SIZE { ; RW data 96k L4-SRAM1
.ANY (+RW +ZI)
}
; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
RW_IRAM2 (0x10000000+0x188) (0x08000-0x188) { ; RW data 32k L4-ECC-SRAM2 retained in standby
.ANY (+RW +ZI)

14
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_GCC_ARM/STM32L476XX.ld
View File

@ -6,6 +6,8 @@
#define MBED_APP_SIZE 1024k
#endif
M_CRASH_DATA_RAM_SIZE = 0x100;
/* Linker script to configure memory regions. */
MEMORY
{
@ -85,6 +87,18 @@ SECTIONS
__etext = .;
_sidata = .;
.crash_data_ram :
{
. = ALIGN(8);
__CRASH_DATA_RAM__ = .;
__CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
KEEP(*(.keep.crash_data_ram))
*(.m_crash_data_ram) /* This is a user defined section */
. += M_CRASH_DATA_RAM_SIZE;
. = ALIGN(8);
__CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
} > SRAM1
.data : AT (__etext)
{

9
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_IAR/stm32l476xx.icf
View File

@ -12,15 +12,22 @@ define symbol __NVIC_start__ = 0x10000000;
define symbol __NVIC_end__ = 0x10000187;
define symbol __region_SRAM2_start__ = 0x10000188;
define symbol __region_SRAM2_end__ = 0x10007FFF;
define symbol __region_SRAM1_start__ = 0x20000000;
define symbol __region_CRASH_DATA_RAM_start__ = 0x20000000;
define symbol __region_CRASH_DATA_RAM_end__ = 0x200000FF;
define symbol __region_SRAM1_start__ = 0x20000100;
define symbol __region_SRAM1_end__ = 0x20017FFF;
/* Memory regions */
define memory mem with size = 4G;
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__];
define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__];
define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
/* Define Crash Data Symbols */
define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__;
define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;
/* Stack complete SRAM2 and Heap 2/3 of SRAM1 */
define symbol __size_cstack__ = 0x7e00;
define symbol __size_heap__ = 0x10000;