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2368 Commits (aa09e7d409e00b8b51dc272b403c945d0193c31d)

Author SHA1 Message Date
Przemyslaw Stekiel c6a6984ab8 Allow NC for MISO or MOSI while initializing SPI 
Static pinmap extension required to use pin_function() and pin_mode() functions instead of pinmap_pinout(). Unfortunatelly pin_function() does not allow passing NC pin.
Call pin_function() and pin_mode() only if MISO/MOSI pin is not NC.
 2020-02-18 13:38:43 +01:00
jeromecoutant 065a79e48a STM32H7: add README file for dual core use 2020-02-17 16:21:20 +01:00
jeromecoutant d66b39de18 STM32L5 : Add DISCO-L562E support 2020-02-14 17:49:40 +01:00
jeromecoutant f0969022b8 STM32L5 : add QSPI support 2020-02-14 17:49:33 +01:00
Martin Kojtal 7658681a9e
Merge pull request #12409 from LMESTM/Fix_lpuart_deep_sleep 
FIX: LPUART clock source selection should be left to serial driver
 2020-02-13 09:45:41 +00:00
Laurent Meunier 3fd071404e FIX: LPUART clock source selection should be left to serial driver 
The clock source selection of LPUART depends on System clocks but also on
the serial baudrate. There is a specific computation done in serial driver
targets/target_STM/serial_api.c

At first start-up the LPUART1 clock selected in SetSysClock was anyway
overridden by the serial driver, so this was of no effect. But in case
of deep sleep SetSysClock is called again, while the driver isn't, so
SetSyClock was corrupting the serial clock configuration.

So let's remove these few lines of code which are causing trouble.
 2020-02-11 17:14:45 +01:00
Martin Kojtal c1eaf2c358
Merge pull request #12380 from mprse/DISCO_L475VG_IOT01A_add_gpio_pinmap 
DISCO_L475VG_IOT01A: Add a list of restricted GPIO pins for testing
 2020-02-11 11:58:53 +00:00
Martin Kojtal 7fd5119b89
Merge pull request #12341 from fkjagodzinski/fix-stm-hal_fpga 
STM32L4: Fix the UART RX & TX data reg bitmasks
 2020-02-10 13:21:31 +00:00
jeromecoutant 2368a07244 STM32: Fix the UART RX & TX data reg bitmasks 2020-02-07 16:23:50 +00:00
Przemyslaw Stekiel 3a71f86235 DISCO_L475VG_IOT01A: Add a list of restricted GPIO pins for testing 2020-02-07 11:41:32 +01:00
Filip Jagodzinski ae635d5cd4 STM32L4: Fix the UART RX & TX data reg bitmasks 
The existing logic was insufficient to properly handle odd and even
parity setting, e.g. serial_getc() returned 9-bit data for 8O1
transmission format.
 2020-02-06 14:07:51 +01:00
Martin Kojtal 32675cc6ac
Merge pull request #11874 from fkjagodzinski/armc6_build-enable_lto_for_release 
ARMC6: Add a build profile extension with the link-time optimizer enabled
 2020-02-05 14:42:16 +00:00
Martin Kojtal e3ad1cae55
Merge pull request #12334 from AriParkkila/cell-c030-r412m 
Update cellular drivers/tests for UBLOX_C030_R412M
 2020-02-05 12:50:11 +00:00
Martin Kojtal 841b846b46
Merge pull request #12362 from ABOSTM/L0_CUBE_HAL_REWORK_NO_MORE_OVERRUN 
TARGET_STM: L0 CUBE SPI async mode send next byte after previous one is read
 2020-02-05 10:17:13 +00:00
Martin Kojtal cee2a352a7
Merge pull request #12357 from ABOSTM/F103_ADC3_NOT_SUPPORTING_COMMON_SETTINGS 
TARGET_STM32F1: don't set ADC common register when ADC doesn't support it
 2020-02-04 15:24:51 +00:00
Alexandre Bourdiol 315220832f TARGET_STM: L0 CUBE SPI async mode send next byte after previous one read 
In STM32 Cube HAL, in interrupt mode (async),
2 bytes can be prepared in hardware registers without any read
(1 in regular register, the other in shift register),
but Only 1 RX byte can stored in hardware register, specially when there is no hardware FIFO.
If interrupt handling is fast enough, each read is made in parralele of the write.
But if interrupt handling is too long or is interrupted for too long,
it can happen that one read byte is lost (overrun).
For STM32F4, Tickless has been deactivated to avoid such issue.
For STM32L0, we don't want to deactivate tickless,
because those chips are specially design for lowpower.

So instead of removing SPI async mode,
we propose to change the HAL behavior specially for L0:
each byte is send only when previous read is performed.
Thus only 1 RX byte at a time which is saved in hardware register.
This prevent overrun, but it introduceS some latency between each byte send,
this is why it is not applied to all STM32 families.
 2020-02-04 13:26:49 +01:00
Maciej Bocianski 8db3b40a7b STM: change rtc irq handler name 
Fix for the error caused by lto on armc6 compiler:

L6137E: Symbol RTC_IRQHandler was not preserved by the LTO codegen but is needed by the image.

lto optimization cause that local symbol RTC_IRQHandler(from rtc_api.c)
somehow interferes with global symbol RTC_IRQHandler (from startup_stm32f070xb.S)

Changing local RTC_IRQHandler to _RTC_IRQHandler fixes problem
 2020-02-04 12:29:52 +01:00
Martin Kojtal 250e58134f
Merge pull request #12286 from pea-pod/target-nucleo_l452re-p 
Add new target: NUCLEO_L452RE-P
 2020-02-03 16:34:36 +00:00
Alexandre Bourdiol 03b03feb8d TARGET_STM32F1: don't set ADC common register when ADC doesn't support it 
STM32F103ZE: ADC3 doesn't support common settings.
__LL_ADC_COMMON_INSTANCE(ADC3) returns 0
 2020-02-03 15:56:49 +01:00
Martin Kojtal 0f4a9867be
Merge pull request #12332 from jamesbeyond/analogIn_fix 
FIX: Disable Analogin D13(PA_5) on some NUCLEO targets
 2020-02-03 12:44:07 +00:00
Qinghao Shi f7d9850fe7 Disable Analogin D13(PA_5) on some NUCLEO targets 
- pins are connected to the LED, can't be used as analogin
 2020-02-03 11:39:31 +00:00
Martin Kojtal 02c5e0806f
Merge pull request #12350 from maciejbocianski/fix_fpga_i2c_test 
implements i2c_free for STM
 2020-02-03 09:56:59 +00:00
Maciej Bocianski 0b634e54b4 implement i2c_free for STM family 2020-01-31 14:51:54 +01:00
Maciej Bocianski 95996fb924 disable PA_8 i2c pin on NUCLEO_F411RE 
pin PA_8 by default is connected to MCO
 2020-01-31 14:48:00 +01:00
Kevin Bracey ba5dd4d8c1
Merge pull request #12153 from mprse/spi_fpga_test_extend 
Hackathon: Increase coverage of the SPI master FPGA test
 2020-01-31 15:00:02 +02:00
Kevin Bracey 91464b2729
Merge pull request #12306 from jeromecoutant/PR_STM32L5_NUCLEO 
STM32L5: NUCLEO-L552ZE-Q new target
 2020-01-29 16:07:44 +02:00
Ari Parkkila d6f8fece69 Cellular: Enable IP over PPP on UBLOX_C030_R41XM 2020-01-29 03:03:35 -08:00
pea-pod f7c4693747 Add new target: NUCLEO_L452RE-P 2020-01-27 18:41:18 -06:00
Anna Bridge ceaf562a11
Merge pull request #12283 from jeromecoutant/PR_STM32WB 
STM32WB - Update CubeDriver from v1.0.0 to v1.4.0
 2020-01-25 11:54:29 +00:00
jeromecoutant e4d0629d18 STM32L5 : Introduce NUCLEO_L552ZE_Q board 2020-01-23 17:55:07 +01:00
jeromecoutant c1386cf52d STM32L5 : update generic STM files for L5 2020-01-23 17:54:55 +01:00
jeromecoutant bee5d44a1f STM32L5: add API L5 family files 2020-01-23 17:54:52 +01:00
jeromecoutant 5d59c99b99 STM32L5: TOOLCHAIN automatic updates 2020-01-23 17:54:41 +01:00
jeromecoutant 77e5bb45b9 STM32L5: STM32Cube_FW_L5_V1.0.0 files 2020-01-23 13:30:31 +01:00
jeromecoutant 25da13bc18 STM32WB remove extra file 2020-01-23 10:53:09 +01:00
jeromecoutant 9f42a58d5a STM32H7 correct PWMOUT 2020-01-21 16:03:17 +01:00
jeromecoutant 3657f902d3 STM32Cube_FW_WB_V1.4.0 - STM32WB55xx part 2020-01-20 17:24:46 +01:00
jeromecoutant 7a5da6109f STM32Cube_FW_WB_V1.4.0 - STM32WB50xx part 2020-01-20 17:24:46 +01:00
jeromecoutant c39a13d10c STM32Cube_FW_WB_V1.4.0 - template part 2020-01-20 17:24:45 +01:00
jeromecoutant b4f3b0799d STM32Cube_FW_WB_V1.4.0 - STM32_WPAN part 2020-01-20 17:24:45 +01:00
jeromecoutant 08184d7ac9 STM32Cube_FW_WB_V1.4.0 - HAL_DRIVER part 2020-01-20 17:24:44 +01:00
jeromecoutant d6e4b15c1a STM32Cube_FW_WB_V1.4.0 - CMSIS part 2020-01-20 17:24:43 +01:00
jeromecoutant 339846a1bb STM32WB cleanup 
- BLE feature is mandatory
- remove clock source selection
- license alignment
- startup file from Cube delivery
- linker script alignement
 2020-01-20 17:24:28 +01:00
jeromecoutant 8f6171f8b0 STM32WB - BLE restructure 2020-01-20 16:10:55 +01:00
jeromecoutant 8c76a43d3c STM32WB - New directory structure 2020-01-20 16:10:55 +01:00
Martin Kojtal d6e69ef57b
Merge pull request #12208 from hugueskamba/hk-replace-uartserial-st 
ST targets: Replace UARTSerial references with BufferedSerial
 2020-01-17 08:19:09 +00:00
Martin Kojtal 88f48d240e
Merge pull request #12237 from mprse/stm_serial_free_fix 
STM serial free: Set pin function only if pin is defined (not NC)
 2020-01-15 13:02:20 +01:00
Martin Kojtal 978a9665f0
Merge pull request #12201 from jeromecoutant/PR_G0REFACTOR 
TARGET_STM: FW driver files refactor proposition
 2020-01-15 12:59:49 +01:00
Przemyslaw Stekiel 8a938ea777 STM serial free: Set pin function only if pin is defined (not NC) 2020-01-10 14:59:28 +01:00
Martin Kojtal 759ce271c2
Merge pull request #12200 from MultiTechSystems/fix_PeripheralPins 
Minor fixes for peripheral pins on Dragonfly Nano
 2020-01-09 13:17:01 +01:00
Martin Kojtal dbb0695311
Merge pull request #12202 from LMESTM/Increase_MSI_Freq_out_of_deep_sleep 
Increase MSI clock frequency when exiting deep sleep
 2020-01-09 10:49:20 +01:00
Hugues Kamba 03cff0a02c ST targets: Replace UARTSerial references with BufferedSerial 
BufferedSerial is UARTSerial renamed to convey the original purpose of
the class. It is the recommended buffered I/O serial class.
 2020-01-08 08:34:20 +00:00
Laurent Meunier 022c0eb7dc Increase MSI clock frequency when exiting deep sleep 
This will optimize down the time it takes to restore the clock
settings when getting out of deep sleep.

If 48MHz is available let's use it, otherwise at least 4MHz should be
available for any MCU with MSI.
 2020-01-07 17:59:33 +01:00
jeromecoutant 9448ded044 STM32G0: Update G071xx toolchain files with default files 2020-01-07 17:00:30 +01:00
jeromecoutant cf2dfcbc60 STM32G0: introduction of G030/G031/G041/G070/G081 sub-families 2020-01-07 16:07:18 +01:00
jeromecoutant 57f144ec66 STM32G0: remove MBED patch 
Goal is to remove all mis-aligment with official ST CUBE delivery
 2020-01-07 16:05:34 +01:00
jeromecoutant 631ed0c0b3 STM32G0: move us_ticker_data.h file to family level 2020-01-07 16:02:08 +01:00
jeromecoutant 6d780d8773 STM32G0: move cmsis_nvic.h file to Sub-family level 2020-01-07 16:01:45 +01:00
jeromecoutant 7dd31d0319 STM32G0: move TOOLCHAIN files to Sub-family level 2020-01-07 16:00:40 +01:00
jeromecoutant fd52eb46d1 STM32G0: move files to TARGET_STM32G0/STM32Cube_FW 2020-01-07 16:00:16 +01:00
jeromecoutant 6875d0318e STM32G0: move files to TARGET_STM32G0/STM32Cube_FW/CMSIS 2020-01-07 15:57:04 +01:00
jeromecoutant f322d87d43 STM32G0: move files to TARGET_STM32G0/STM32Cube_FW/STM32G0xx_HAL_Driver 2020-01-07 15:56:19 +01:00
Leon Lindenfelser 94ead7adb2 Minor fixes for peripheral pins on Dragonfly Nano 
1. PG8 should be labeled I2C3 not I2C1.
2. PC0 is dedicated to measuring system voltage.
 2020-01-07 08:52:34 -06:00
Martin Kojtal 5d71e69f6a
Merge pull request #12186 from mprse/fix_for_issue_12172_stm_serial 
STM serial init: Set pin function only if pin is defined (not NC)
 2020-01-07 11:38:00 +01:00
Przemyslaw Stekiel 79d16ae8f7 STM serial init: Set pin function only if pin is defined (not NC) 2020-01-03 14:14:26 +01:00
Martin Kojtal fc2a71064d
Merge pull request #12068 from rajkan01/feature_bare_metal 
Enabling small C library option and deprecating uARM toolchain
 2020-01-03 11:35:48 +00:00
Antti Kauppila e29cb193ca Added missing define for Quectel UG96 2019-12-27 16:04:10 +01:00
Antti Kauppila ca7848d854 Refactored away onboard_modem_api because it is not needed at all 
All targets must implement soft_- and hard_power_on/off() functions which are practically same what onboard_modem_api offered.
These were seen as a duplicate features and therefore we removed this.
All targets involved have been updated to reflect the changes
 2019-12-27 16:04:10 +01:00
jeromecoutant 5cedd3320c STM32F0: clean main-thread-stack-size setting 2019-12-23 12:29:40 +01:00
jeromecoutant c27c03c784 STM32 remove unused INITIAL_SP macro 2019-12-23 12:29:40 +01:00
Przemyslaw Stekiel 7202b77834 STM SPI capabilities: rx/tx buffers can have different sizes 2019-12-20 12:56:11 +01:00
Martin Kojtal 7609eb4741
Merge pull request #12113 from mprse/can_init_fix 
Fix for issue #12104 (STM32 can_init_freq() ignores frequency)
 2019-12-20 11:24:05 +01:00
Rajkumar Kanagaraj 957dca2082 Enabling small C library option and deprecating uARM toolchain 
- By default, Mbed OS build tools use standard C library for all supported toolchains.
   It is possible to use smaller C libraries by overriding the "target.default_lib" option
   with "small". This option is only currently supported for the GCC_ARM toolchain.
   This override config option is now extended in the build tool for ARM toolchain.
 - Add configuration option to specify libraries supported for each toolchain per targets.
 - Move __aeabi_assert function from rtos to retarget code so it’s available for bare metal.
 - Use 2 memory region model for ARM toolchain scatter file for the following targets:
   NUCLEO_F207ZG, STM32F411xE, STM32F429xI, NUCLEO_L073RZ, STM32F303xE
 - Add a warning message in the build tools to deprecate uARM toolchain.
 - NewLib-Nano C library is not supporting floating-point and printf with %hhd,%hhu,%hhX,%lld,%llu,%llX
   format specifier so skipping those green tea test cases.
 2019-12-19 10:05:11 -08:00
Anna Bridge bef36f5f3e
Merge pull request #12093 from ABOSTM/SUPPORT_NUCLEO_G071RB 
TARGET_STM: add support of board NUCLEO_G071RB
 2019-12-19 15:26:08 +00:00
Przemyslaw Stekiel fffc30ffda STM CAN: remove CAN_INIT_DIRECT macro 2019-12-18 10:43:55 +01:00
Anna Bridge b1b0673622
Merge pull request #12086 from ABOSTM/FLASH_API_64B_ALIGNMENT 
TARGET_STM: fix flash api 64bit address alignment on L4 and WB
 2019-12-17 16:46:21 +00:00
Anna Bridge 8b0a5c2e4b
Merge pull request #12099 from J91Olivier/stm32f4_baud_rate_calculation_fix 
Implemented recommended fix from https://github.com/STMicroelectronic…
 2019-12-17 16:27:19 +00:00
Anna Bridge 378f8c2b26
Merge pull request #12067 from jeromecoutant/PR_IRQ_CRITICAL 
STM32 GPIO IRQ : add a critical section in gpio_irq_init
 2019-12-17 16:23:44 +00:00
Przemyslaw Stekiel e0e280aeaf optimize can_init(): call can_init_freq() with default freq 2019-12-16 14:09:54 +01:00
Przemyslaw Stekiel 6a3e343ec6 Fix for issue #12104 (STM32 can_init_freq() ignores frequency) 2019-12-16 13:16:51 +01:00
jaco.olivier ef5da02a68 Implemented recommended fix from https://github.com/STMicroelectronics/STM32CubeF4/issues/5 2019-12-13 10:48:38 +02:00
Alexandre Bourdiol 7c52aa59ec TARGET_STM: add support of board NUCLEO_G071RB 2019-12-12 14:00:04 +01:00
Alexandre Bourdiol 9e3ad13d5e TARGET_STM: fix flash api 64bit address alignment on L4 and WB 2019-12-11 18:32:42 +01:00
Martin Kojtal 06da49984f
Merge pull request #12069 from jeromecoutant/PR_ASTYLE 
STM32: astyle update
 2019-12-11 08:01:19 +01:00
jeromecoutant 9317bea756 STM32 GPIO INIT in critical section 
critical section added in gpio_irq init and free functions
to protect shared code structures

Note that other functions are protected in API level in InterruptIn
 2019-12-10 15:59:56 +01:00
Martin Kojtal 22ab94a1c9 TARGET_STM32F74: fix IAR SIZE check in linker scripts 2019-12-10 14:09:38 +00:00
Martin Kojtal e27f456a29 STM32F756xG: fix IAR RAM size check 2019-12-10 14:09:37 +00:00
jeromecoutant bea83d02c2 STM32 TARGET_STM astyle corrections 2019-12-10 14:39:47 +01:00
Martin Kojtal e9cb9cb014
Merge pull request #12018 from jeromecoutant/PR_OLIMEX_EMAC 
STM32_EMAC cleanup
 2019-12-05 14:03:46 +01:00
Martin Kojtal a4dbf63dc3
Merge pull request #12029 from jeromecoutant/PR_F091 
STM32F0: create STM32F091xC target
 2019-12-05 08:22:32 +01:00
jeromecoutant 1a3673ee52 STM32F0: create STM32F091xC target 2019-12-04 15:03:46 +01:00
Martin Kojtal bbf68d7272
Merge pull request #11983 from u-blox/ublox_odin_driver_os_5_v3.7.1_rc3 
Ublox Odin Driver OS 5 v3.7.1 rc3: Network-WiFi Test Crash Fixes
 2019-12-04 10:12:11 +01:00
jeromecoutant bdbec57447 STM32F407 configuration cleanup 2019-12-03 14:48:48 +01:00
hamza-ubx 506e2ef8c7 Fixed Alignment 2019-12-02 19:44:16 +05:00
Kevin Bracey fe22bc023e Update HAL CRC API 
* Change "is supported" check to be a macro, so it can be done at
  compile-time.
* Eliminate weird shift on 7-bit CRCs.
* Add support for 32-bit CRCs and reversals to TMPM3HQ.
 2019-12-02 14:45:37 +02:00
Martin Kojtal 48f544f9e4
Merge pull request #11980 from jeromecoutant/PR_L4R9I 
DISCO_L4R9I: update clock configuration for all clock sources
 2019-12-02 11:23:51 +01:00
Hamza Rizwan c15320d48e Fixes for Network WiFi Test Crashes 2019-11-29 14:52:25 +05:00
Martin Kojtal 7177d8fefe
Merge pull request #11950 from ABOSTM/DISCO_H747I_TICKLESS 
DISCO_H747I: add support of MBED_TICKLESS
 2019-11-29 09:48:09 +01:00
Martin Kojtal a656f51d07
Merge pull request #11963 from jeromecoutant/PR_USB_L4 
STM32 USB : Add __HAL_RCC_PWR_CLK_ENABLE
 2019-11-29 09:45:44 +01:00
jeromecoutant 354913a45e DISCO_L4R9I: correct clock tree for all clock sources 2019-11-28 16:29:11 +01:00
Przemyslaw Stekiel 2e793842d8 STM QSPI driver: return init status, fix pin function setting 2019-11-28 12:41:40 +01:00
Przemyslaw Stekiel b2dad08387 Change explicit pinmap to static pinmap 2019-11-28 08:32:12 +01:00
Przemyslaw Stekiel e3a34a57e1 Move GPIO_AF_NONE from PeripheralPins.h to PinNamesTypes.h 2019-11-28 08:32:10 +01:00
Przemyslaw Stekiel b35579ba39 NUCLEO_F429ZI add CAN pinmaps 2019-11-28 08:32:07 +01:00
Przemyslaw Stekiel 6489bb7c99 STM: Add support for internal ADC pins 2019-11-28 08:32:06 +01:00
Przemyslaw Stekiel 42b2eeede9 NUCLEO_F303RE: Add explicit pinmap support 2019-11-28 08:32:06 +01:00
Przemyslaw Stekiel a2320f2e5c NUCLEO_L073RZ: Add explicit pinmap support 2019-11-28 08:32:05 +01:00
Przemyslaw Stekiel 2855e801cb NUCLEO_F411RE: Add explicit pinmap support 2019-11-28 08:32:05 +01:00
Przemyslaw Stekiel dc26390d08 DISCO_L475VG_IOT01A: Add explicit pinmap support 2019-11-28 08:32:04 +01:00
Przemyslaw Stekiel 31f99416ae STM QSPI driver: Add explicit pinmap support 2019-11-28 08:32:04 +01:00
Przemyslaw Stekiel c8a80bbcd3 STM CAN driver: Add explicit pinmap support 2019-11-28 08:32:04 +01:00
Przemyslaw Stekiel ba12228556 Explicit pinmap: Fix build failures reported by CI 2019-11-28 08:32:03 +01:00
Przemyslaw Stekiel d75cc97d80 Explicit pinmap - fix style 2019-11-28 08:32:02 +01:00
Przemyslaw Stekiel 17c1b9a860 Fix spelling error 2019-11-28 08:32:02 +01:00
Przemyslaw Stekiel 7b0ceb0140 NUCLEO_F429ZI: Add constexpr pinmap tables 2019-11-28 08:32:01 +01:00
Przemyslaw Stekiel 3d719f7e35 K64F, NUCLEO_F429ZI: Use explicit pinmap for console 2019-11-28 08:32:00 +01:00
Przemyslaw Stekiel 3d2bebde0c STM32 serial driver: Add explicit pinmap support 2019-11-28 08:32:00 +01:00
Przemyslaw Stekiel 2185e80e08 STM32F4 I2C driver: Add explicit pinmap support 2019-11-28 08:31:59 +01:00
Przemyslaw Stekiel eab08d7047 STM32F4 Analogout driver: Add explicit pinmap support 2019-11-28 08:31:58 +01:00
Przemyslaw Stekiel b22cc4a032 STM32F4 Analogin driver: Add explicit pinmap support 2019-11-28 08:31:57 +01:00
Przemyslaw Stekiel ce4a943350 STM PWM driver: Add explicit pinmap support 2019-11-28 08:31:56 +01:00
Przemyslaw Stekiel ca80cd22f7 STM SPI driver: Add explicit pinmap support 2019-11-28 08:31:55 +01:00
Martin Kojtal a1cddbae5f
Merge pull request #11938 from LMESTM/stm32_serial_clear_rxne 
STM32: Update and align serial_clear implementations
 2019-11-27 16:30:11 +01:00
jeromecoutant c5ffd40aa6 STM3 USB : Add __HAL_RCC_PWR_CLK_ENABLE 2019-11-27 16:25:10 +01:00
Alexandre Bourdiol f36982cc97 TARGET_STM: STM32H7 HAL_RCC_OscConfig update in PLL configuration 
port fix #5896 on STM32H7 Cube HAL
ST internal ticket 42806 not yet released for STM32H7
 2019-11-27 14:26:02 +01:00
Alexandre Bourdiol df7431df81 TARGET_STM: Improve H747 dual core Deepsleep robustness 2019-11-27 14:25:53 +01:00
Alexandre Bourdiol affe7113ef TARGET_STM: Remove timeout on HSEM. 
With tickless mechanism hsem can be used for quite a long time
(time to set up PLL clock).
Also, if hsem is held to long, then this is not the current core which is faulty,
but probably the other (the one which hold the HSEM)
 2019-11-27 14:25:43 +01:00
Alexandre Bourdiol 41b038a028 TARGET_STM: rework hal_sleep management to be compatible with all STM32 families 2019-11-27 14:25:30 +01:00
Alexandre Bourdiol e83a8abdcb targets: DISCO_H747I add support of MBED_TICKLESS 2019-11-27 14:16:15 +01:00
Martin Kojtal 5f7ecea00b
Revert "MbedCRC and CRC HAL revisions" 2019-11-26 13:45:37 +00:00
Laurent Meunier f20529f9e6 STM32: Update and align serial_clear implementations 
Clear RXNE flag by reading the RX register and align this implementation
on all families.
 2019-11-25 14:55:32 +01:00
Martin Kojtal 1a2ecebc62
Merge pull request #11881 from hugueskamba/hk-UBLOX_EVK_ODIN_W2-enable-baremetal 
UBLOX_EVK_ODIN_W2: Fix baremetal build and greentea tests
 2019-11-25 08:40:33 +01:00
Martin Kojtal cc120f3cd0
Merge pull request #11870 from jeromecoutant/PR_F7_LINKER 
STM32F7: linker scripts updates
 2019-11-22 13:50:16 +01:00
Hugues Kamba 157d126769 UBLOX_EVK_ODIN_W2: Fix baremetal build and greentea tests 
Remove lwIP reliant networking and BLE tests for baremetal

Mbed OS 5 ported lwIP in its OS mode and uses threads. Networking
that rely on lwIP needs to be removed so it can be compiled with the
baremetal profile.

The BLE cordio Greentea tests are also disabled given that the feature
is not supported without an RTOS.
 2019-11-22 10:55:39 +00:00
jeromecoutant 82a962864c STM32F7: linker scripts updates 
- license header
- DTCM RAM use
- alignment within the STM32F7 family
 2019-11-19 17:46:44 +01:00
Martin Kojtal fd22997b60
Merge pull request #11559 from kjbracey-arm/crc 
MbedCRC and CRC HAL revisions
 2019-11-13 18:24:04 +01:00
Kevin Bracey 1f94428a56 Update HAL CRC API 
* Change "is supported" check to be a macro, so it can be done at
  compile-time.
* Eliminate weird shift on 7-bit CRCs.
* Add support for 32-bit CRCs and reversals to TMPM3HQ.
 2019-11-13 14:31:49 +02:00
Adam Mitchell 6064979303
Correct PB_6/PB_7 Serial AF mapping 2019-11-12 14:16:21 +00:00
Martin Kojtal 4f6ca1512a
Merge pull request #11827 from ABOSTM/DISCO_H747I_ETHERNET_READY 
DISCO STM32H747I ETHERNET support, but disabled.
 2019-11-11 16:56:36 +01:00
jeromecoutant 7fcedd20e1 DISCO STM32H747I ETHERNET support, but disabled. 
Ethernet is disabled by default,
because some hardware modifications are required on the board DISCO_H747I.
see https://os.mbed.com/teams/ST/wiki/DISCO_H747I-modifications-for-Ethernet
 2019-11-08 16:05:00 +01:00
Martin Kojtal 33e392e9d9
Merge pull request #11682 from mprse/fpga_tests_CI_targets 
Make FPGA tests to pass on CI targets (SPI, analogIn, PWM)
 2019-11-07 11:46:40 +01:00
Martin Kojtal 383cf1984d
Merge pull request #11711 from jeromecoutant/PULL_REQUEST_CUBE_UPDATE_F7_V1.15.0 
STM32F7 update drivers version to CUBE V1.15.0
 2019-11-07 11:33:38 +01:00
Martino Facchin 8daa2d72ba [USB][STM32] Don't wrap direct function calls in MBED_ASSERT 
dab09f3138 added checks on some functions in the form of MBED_ASSERT on the result.
Compiling with -NDEBUG elides the call, thus breaking the functionality

This patch restores it, while leaving the return check if compiled with standard profile.
 2019-11-06 15:01:48 +01:00
jeromecoutant 7847ad79fb STM32F7 HAL CRYPT patch to add missing UNLOCK 2019-11-05 11:46:13 +01:00
jeromecoutant c6fdd4efb6 STM32H7 FLASH API issue with M4 core 2019-11-05 10:25:43 +01:00
Martin Kojtal a927ab8f7c
Merge pull request #11789 from jeromecoutant/PR_STM32H7 
STM32H7: code and feature alignment for both NUCLEO and DISCO targets
 2019-11-04 09:48:09 +01:00
jeromecoutant 356de44aed STM32F7 ARM SCT file update to define correct RAM_SIZE 2019-10-31 17:46:11 +01:00
jeromecoutant 4f788adeb9 STM32F7 refactor common files 2019-10-31 17:46:10 +01:00
jeromecoutant 52bfd0c99a STM32F7 updates for new driver version 2019-10-31 17:45:58 +01:00
jeromecoutant 8ac918975f F7 ST CUBE V1.10.0 => V1.15.0 
https://www.st.com/en/embedded-software/stm32cubef7.html
 2019-10-31 17:43:18 +01:00