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2368 Commits (aa09e7d409e00b8b51dc272b403c945d0193c31d)

Author SHA1 Message Date
Martin Kojtal dbb0695311
Merge pull request #12202 from LMESTM/Increase_MSI_Freq_out_of_deep_sleep 
Increase MSI clock frequency when exiting deep sleep
 2020-01-09 10:49:20 +01:00
Hugues Kamba 03cff0a02c ST targets: Replace UARTSerial references with BufferedSerial 
BufferedSerial is UARTSerial renamed to convey the original purpose of
the class. It is the recommended buffered I/O serial class.
 2020-01-08 08:34:20 +00:00
Laurent Meunier 022c0eb7dc Increase MSI clock frequency when exiting deep sleep 
This will optimize down the time it takes to restore the clock
settings when getting out of deep sleep.

If 48MHz is available let's use it, otherwise at least 4MHz should be
available for any MCU with MSI.
 2020-01-07 17:59:33 +01:00
jeromecoutant 9448ded044 STM32G0: Update G071xx toolchain files with default files 2020-01-07 17:00:30 +01:00
jeromecoutant cf2dfcbc60 STM32G0: introduction of G030/G031/G041/G070/G081 sub-families 2020-01-07 16:07:18 +01:00
jeromecoutant 57f144ec66 STM32G0: remove MBED patch 
Goal is to remove all mis-aligment with official ST CUBE delivery
 2020-01-07 16:05:34 +01:00
jeromecoutant 631ed0c0b3 STM32G0: move us_ticker_data.h file to family level 2020-01-07 16:02:08 +01:00
jeromecoutant 6d780d8773 STM32G0: move cmsis_nvic.h file to Sub-family level 2020-01-07 16:01:45 +01:00
jeromecoutant 7dd31d0319 STM32G0: move TOOLCHAIN files to Sub-family level 2020-01-07 16:00:40 +01:00
jeromecoutant fd52eb46d1 STM32G0: move files to TARGET_STM32G0/STM32Cube_FW 2020-01-07 16:00:16 +01:00
jeromecoutant 6875d0318e STM32G0: move files to TARGET_STM32G0/STM32Cube_FW/CMSIS 2020-01-07 15:57:04 +01:00
jeromecoutant f322d87d43 STM32G0: move files to TARGET_STM32G0/STM32Cube_FW/STM32G0xx_HAL_Driver 2020-01-07 15:56:19 +01:00
Leon Lindenfelser 94ead7adb2 Minor fixes for peripheral pins on Dragonfly Nano 
1. PG8 should be labeled I2C3 not I2C1.
2. PC0 is dedicated to measuring system voltage.
 2020-01-07 08:52:34 -06:00
Martin Kojtal 5d71e69f6a
Merge pull request #12186 from mprse/fix_for_issue_12172_stm_serial 
STM serial init: Set pin function only if pin is defined (not NC)
 2020-01-07 11:38:00 +01:00
Przemyslaw Stekiel 79d16ae8f7 STM serial init: Set pin function only if pin is defined (not NC) 2020-01-03 14:14:26 +01:00
Martin Kojtal fc2a71064d
Merge pull request #12068 from rajkan01/feature_bare_metal 
Enabling small C library option and deprecating uARM toolchain
 2020-01-03 11:35:48 +00:00
Antti Kauppila e29cb193ca Added missing define for Quectel UG96 2019-12-27 16:04:10 +01:00
Antti Kauppila ca7848d854 Refactored away onboard_modem_api because it is not needed at all 
All targets must implement soft_- and hard_power_on/off() functions which are practically same what onboard_modem_api offered.
These were seen as a duplicate features and therefore we removed this.
All targets involved have been updated to reflect the changes
 2019-12-27 16:04:10 +01:00
jeromecoutant 5cedd3320c STM32F0: clean main-thread-stack-size setting 2019-12-23 12:29:40 +01:00
jeromecoutant c27c03c784 STM32 remove unused INITIAL_SP macro 2019-12-23 12:29:40 +01:00
Przemyslaw Stekiel 7202b77834 STM SPI capabilities: rx/tx buffers can have different sizes 2019-12-20 12:56:11 +01:00
Martin Kojtal 7609eb4741
Merge pull request #12113 from mprse/can_init_fix 
Fix for issue #12104 (STM32 can_init_freq() ignores frequency)
 2019-12-20 11:24:05 +01:00
Rajkumar Kanagaraj 957dca2082 Enabling small C library option and deprecating uARM toolchain 
- By default, Mbed OS build tools use standard C library for all supported toolchains.
   It is possible to use smaller C libraries by overriding the "target.default_lib" option
   with "small". This option is only currently supported for the GCC_ARM toolchain.
   This override config option is now extended in the build tool for ARM toolchain.
 - Add configuration option to specify libraries supported for each toolchain per targets.
 - Move __aeabi_assert function from rtos to retarget code so it’s available for bare metal.
 - Use 2 memory region model for ARM toolchain scatter file for the following targets:
   NUCLEO_F207ZG, STM32F411xE, STM32F429xI, NUCLEO_L073RZ, STM32F303xE
 - Add a warning message in the build tools to deprecate uARM toolchain.
 - NewLib-Nano C library is not supporting floating-point and printf with %hhd,%hhu,%hhX,%lld,%llu,%llX
   format specifier so skipping those green tea test cases.
 2019-12-19 10:05:11 -08:00
Anna Bridge bef36f5f3e
Merge pull request #12093 from ABOSTM/SUPPORT_NUCLEO_G071RB 
TARGET_STM: add support of board NUCLEO_G071RB
 2019-12-19 15:26:08 +00:00
Przemyslaw Stekiel fffc30ffda STM CAN: remove CAN_INIT_DIRECT macro 2019-12-18 10:43:55 +01:00
Anna Bridge b1b0673622
Merge pull request #12086 from ABOSTM/FLASH_API_64B_ALIGNMENT 
TARGET_STM: fix flash api 64bit address alignment on L4 and WB
 2019-12-17 16:46:21 +00:00
Anna Bridge 8b0a5c2e4b
Merge pull request #12099 from J91Olivier/stm32f4_baud_rate_calculation_fix 
Implemented recommended fix from https://github.com/STMicroelectronic…
 2019-12-17 16:27:19 +00:00
Anna Bridge 378f8c2b26
Merge pull request #12067 from jeromecoutant/PR_IRQ_CRITICAL 
STM32 GPIO IRQ : add a critical section in gpio_irq_init
 2019-12-17 16:23:44 +00:00
Przemyslaw Stekiel e0e280aeaf optimize can_init(): call can_init_freq() with default freq 2019-12-16 14:09:54 +01:00
Przemyslaw Stekiel 6a3e343ec6 Fix for issue #12104 (STM32 can_init_freq() ignores frequency) 2019-12-16 13:16:51 +01:00
jaco.olivier ef5da02a68 Implemented recommended fix from https://github.com/STMicroelectronics/STM32CubeF4/issues/5 2019-12-13 10:48:38 +02:00
Alexandre Bourdiol 7c52aa59ec TARGET_STM: add support of board NUCLEO_G071RB 2019-12-12 14:00:04 +01:00
Alexandre Bourdiol 9e3ad13d5e TARGET_STM: fix flash api 64bit address alignment on L4 and WB 2019-12-11 18:32:42 +01:00
Martin Kojtal 06da49984f
Merge pull request #12069 from jeromecoutant/PR_ASTYLE 
STM32: astyle update
 2019-12-11 08:01:19 +01:00
jeromecoutant 9317bea756 STM32 GPIO INIT in critical section 
critical section added in gpio_irq init and free functions
to protect shared code structures

Note that other functions are protected in API level in InterruptIn
 2019-12-10 15:59:56 +01:00
Martin Kojtal 22ab94a1c9 TARGET_STM32F74: fix IAR SIZE check in linker scripts 2019-12-10 14:09:38 +00:00
Martin Kojtal e27f456a29 STM32F756xG: fix IAR RAM size check 2019-12-10 14:09:37 +00:00
jeromecoutant bea83d02c2 STM32 TARGET_STM astyle corrections 2019-12-10 14:39:47 +01:00
Martin Kojtal e9cb9cb014
Merge pull request #12018 from jeromecoutant/PR_OLIMEX_EMAC 
STM32_EMAC cleanup
 2019-12-05 14:03:46 +01:00
Martin Kojtal a4dbf63dc3
Merge pull request #12029 from jeromecoutant/PR_F091 
STM32F0: create STM32F091xC target
 2019-12-05 08:22:32 +01:00
jeromecoutant 1a3673ee52 STM32F0: create STM32F091xC target 2019-12-04 15:03:46 +01:00
Martin Kojtal bbf68d7272
Merge pull request #11983 from u-blox/ublox_odin_driver_os_5_v3.7.1_rc3 
Ublox Odin Driver OS 5 v3.7.1 rc3: Network-WiFi Test Crash Fixes
 2019-12-04 10:12:11 +01:00
jeromecoutant bdbec57447 STM32F407 configuration cleanup 2019-12-03 14:48:48 +01:00
hamza-ubx 506e2ef8c7 Fixed Alignment 2019-12-02 19:44:16 +05:00
Kevin Bracey fe22bc023e Update HAL CRC API 
* Change "is supported" check to be a macro, so it can be done at
  compile-time.
* Eliminate weird shift on 7-bit CRCs.
* Add support for 32-bit CRCs and reversals to TMPM3HQ.
 2019-12-02 14:45:37 +02:00
Martin Kojtal 48f544f9e4
Merge pull request #11980 from jeromecoutant/PR_L4R9I 
DISCO_L4R9I: update clock configuration for all clock sources
 2019-12-02 11:23:51 +01:00
Hamza Rizwan c15320d48e Fixes for Network WiFi Test Crashes 2019-11-29 14:52:25 +05:00
Martin Kojtal 7177d8fefe
Merge pull request #11950 from ABOSTM/DISCO_H747I_TICKLESS 
DISCO_H747I: add support of MBED_TICKLESS
 2019-11-29 09:48:09 +01:00
Martin Kojtal a656f51d07
Merge pull request #11963 from jeromecoutant/PR_USB_L4 
STM32 USB : Add __HAL_RCC_PWR_CLK_ENABLE
 2019-11-29 09:45:44 +01:00
jeromecoutant 354913a45e DISCO_L4R9I: correct clock tree for all clock sources 2019-11-28 16:29:11 +01:00
Przemyslaw Stekiel 2e793842d8 STM QSPI driver: return init status, fix pin function setting 2019-11-28 12:41:40 +01:00
Przemyslaw Stekiel b2dad08387 Change explicit pinmap to static pinmap 2019-11-28 08:32:12 +01:00
Przemyslaw Stekiel e3a34a57e1 Move GPIO_AF_NONE from PeripheralPins.h to PinNamesTypes.h 2019-11-28 08:32:10 +01:00
Przemyslaw Stekiel b35579ba39 NUCLEO_F429ZI add CAN pinmaps 2019-11-28 08:32:07 +01:00
Przemyslaw Stekiel 6489bb7c99 STM: Add support for internal ADC pins 2019-11-28 08:32:06 +01:00
Przemyslaw Stekiel 42b2eeede9 NUCLEO_F303RE: Add explicit pinmap support 2019-11-28 08:32:06 +01:00
Przemyslaw Stekiel a2320f2e5c NUCLEO_L073RZ: Add explicit pinmap support 2019-11-28 08:32:05 +01:00
Przemyslaw Stekiel 2855e801cb NUCLEO_F411RE: Add explicit pinmap support 2019-11-28 08:32:05 +01:00
Przemyslaw Stekiel dc26390d08 DISCO_L475VG_IOT01A: Add explicit pinmap support 2019-11-28 08:32:04 +01:00
Przemyslaw Stekiel 31f99416ae STM QSPI driver: Add explicit pinmap support 2019-11-28 08:32:04 +01:00
Przemyslaw Stekiel c8a80bbcd3 STM CAN driver: Add explicit pinmap support 2019-11-28 08:32:04 +01:00
Przemyslaw Stekiel ba12228556 Explicit pinmap: Fix build failures reported by CI 2019-11-28 08:32:03 +01:00
Przemyslaw Stekiel d75cc97d80 Explicit pinmap - fix style 2019-11-28 08:32:02 +01:00
Przemyslaw Stekiel 17c1b9a860 Fix spelling error 2019-11-28 08:32:02 +01:00
Przemyslaw Stekiel 7b0ceb0140 NUCLEO_F429ZI: Add constexpr pinmap tables 2019-11-28 08:32:01 +01:00
Przemyslaw Stekiel 3d719f7e35 K64F, NUCLEO_F429ZI: Use explicit pinmap for console 2019-11-28 08:32:00 +01:00
Przemyslaw Stekiel 3d2bebde0c STM32 serial driver: Add explicit pinmap support 2019-11-28 08:32:00 +01:00
Przemyslaw Stekiel 2185e80e08 STM32F4 I2C driver: Add explicit pinmap support 2019-11-28 08:31:59 +01:00
Przemyslaw Stekiel eab08d7047 STM32F4 Analogout driver: Add explicit pinmap support 2019-11-28 08:31:58 +01:00
Przemyslaw Stekiel b22cc4a032 STM32F4 Analogin driver: Add explicit pinmap support 2019-11-28 08:31:57 +01:00
Przemyslaw Stekiel ce4a943350 STM PWM driver: Add explicit pinmap support 2019-11-28 08:31:56 +01:00
Przemyslaw Stekiel ca80cd22f7 STM SPI driver: Add explicit pinmap support 2019-11-28 08:31:55 +01:00
Martin Kojtal a1cddbae5f
Merge pull request #11938 from LMESTM/stm32_serial_clear_rxne 
STM32: Update and align serial_clear implementations
 2019-11-27 16:30:11 +01:00
jeromecoutant c5ffd40aa6 STM3 USB : Add __HAL_RCC_PWR_CLK_ENABLE 2019-11-27 16:25:10 +01:00
Alexandre Bourdiol f36982cc97 TARGET_STM: STM32H7 HAL_RCC_OscConfig update in PLL configuration 
port fix #5896 on STM32H7 Cube HAL
ST internal ticket 42806 not yet released for STM32H7
 2019-11-27 14:26:02 +01:00
Alexandre Bourdiol df7431df81 TARGET_STM: Improve H747 dual core Deepsleep robustness 2019-11-27 14:25:53 +01:00
Alexandre Bourdiol affe7113ef TARGET_STM: Remove timeout on HSEM. 
With tickless mechanism hsem can be used for quite a long time
(time to set up PLL clock).
Also, if hsem is held to long, then this is not the current core which is faulty,
but probably the other (the one which hold the HSEM)
 2019-11-27 14:25:43 +01:00
Alexandre Bourdiol 41b038a028 TARGET_STM: rework hal_sleep management to be compatible with all STM32 families 2019-11-27 14:25:30 +01:00
Alexandre Bourdiol e83a8abdcb targets: DISCO_H747I add support of MBED_TICKLESS 2019-11-27 14:16:15 +01:00
Martin Kojtal 5f7ecea00b
Revert "MbedCRC and CRC HAL revisions" 2019-11-26 13:45:37 +00:00
Laurent Meunier f20529f9e6 STM32: Update and align serial_clear implementations 
Clear RXNE flag by reading the RX register and align this implementation
on all families.
 2019-11-25 14:55:32 +01:00
Martin Kojtal 1a2ecebc62
Merge pull request #11881 from hugueskamba/hk-UBLOX_EVK_ODIN_W2-enable-baremetal 
UBLOX_EVK_ODIN_W2: Fix baremetal build and greentea tests
 2019-11-25 08:40:33 +01:00
Martin Kojtal cc120f3cd0
Merge pull request #11870 from jeromecoutant/PR_F7_LINKER 
STM32F7: linker scripts updates
 2019-11-22 13:50:16 +01:00
Hugues Kamba 157d126769 UBLOX_EVK_ODIN_W2: Fix baremetal build and greentea tests 
Remove lwIP reliant networking and BLE tests for baremetal

Mbed OS 5 ported lwIP in its OS mode and uses threads. Networking
that rely on lwIP needs to be removed so it can be compiled with the
baremetal profile.

The BLE cordio Greentea tests are also disabled given that the feature
is not supported without an RTOS.
 2019-11-22 10:55:39 +00:00
jeromecoutant 82a962864c STM32F7: linker scripts updates 
- license header
- DTCM RAM use
- alignment within the STM32F7 family
 2019-11-19 17:46:44 +01:00
Martin Kojtal fd22997b60
Merge pull request #11559 from kjbracey-arm/crc 
MbedCRC and CRC HAL revisions
 2019-11-13 18:24:04 +01:00
Kevin Bracey 1f94428a56 Update HAL CRC API 
* Change "is supported" check to be a macro, so it can be done at
  compile-time.
* Eliminate weird shift on 7-bit CRCs.
* Add support for 32-bit CRCs and reversals to TMPM3HQ.
 2019-11-13 14:31:49 +02:00
Adam Mitchell 6064979303
Correct PB_6/PB_7 Serial AF mapping 2019-11-12 14:16:21 +00:00
Martin Kojtal 4f6ca1512a
Merge pull request #11827 from ABOSTM/DISCO_H747I_ETHERNET_READY 
DISCO STM32H747I ETHERNET support, but disabled.
 2019-11-11 16:56:36 +01:00
jeromecoutant 7fcedd20e1 DISCO STM32H747I ETHERNET support, but disabled. 
Ethernet is disabled by default,
because some hardware modifications are required on the board DISCO_H747I.
see https://os.mbed.com/teams/ST/wiki/DISCO_H747I-modifications-for-Ethernet
 2019-11-08 16:05:00 +01:00
Martin Kojtal 33e392e9d9
Merge pull request #11682 from mprse/fpga_tests_CI_targets 
Make FPGA tests to pass on CI targets (SPI, analogIn, PWM)
 2019-11-07 11:46:40 +01:00
Martin Kojtal 383cf1984d
Merge pull request #11711 from jeromecoutant/PULL_REQUEST_CUBE_UPDATE_F7_V1.15.0 
STM32F7 update drivers version to CUBE V1.15.0
 2019-11-07 11:33:38 +01:00
Martino Facchin 8daa2d72ba [USB][STM32] Don't wrap direct function calls in MBED_ASSERT 
dab09f3138 added checks on some functions in the form of MBED_ASSERT on the result.
Compiling with -NDEBUG elides the call, thus breaking the functionality

This patch restores it, while leaving the return check if compiled with standard profile.
 2019-11-06 15:01:48 +01:00
jeromecoutant 7847ad79fb STM32F7 HAL CRYPT patch to add missing UNLOCK 2019-11-05 11:46:13 +01:00
jeromecoutant c6fdd4efb6 STM32H7 FLASH API issue with M4 core 2019-11-05 10:25:43 +01:00
Martin Kojtal a927ab8f7c
Merge pull request #11789 from jeromecoutant/PR_STM32H7 
STM32H7: code and feature alignment for both NUCLEO and DISCO targets
 2019-11-04 09:48:09 +01:00
jeromecoutant 356de44aed STM32F7 ARM SCT file update to define correct RAM_SIZE 2019-10-31 17:46:11 +01:00
jeromecoutant 4f788adeb9 STM32F7 refactor common files 2019-10-31 17:46:10 +01:00
jeromecoutant 52bfd0c99a STM32F7 updates for new driver version 2019-10-31 17:45:58 +01:00
jeromecoutant 8ac918975f F7 ST CUBE V1.10.0 => V1.15.0 
https://www.st.com/en/embedded-software/stm32cubef7.html
 2019-10-31 17:43:18 +01:00
jeromecoutant c7ca6f731c STM32H7 linker script files alignment 2019-10-31 14:59:18 +01:00
jeromecoutant 21ff11c3d3 STM32H7 alignment within family 
- license header update
- STMOD+ connector pin addition
- update pin comment for Ethernet connector issue (DISCO_H747I)
- align files for each target
 2019-10-31 14:38:37 +01:00
Martin Kojtal eea83007be
Merge pull request #11203 from Tharazi97/Watchdog_lower_limit_timeout_test 
Add watchdog lower limit timeout test
 2019-10-31 14:25:52 +01:00
jeromecoutant 0c740e7095 STM32H7: update PeripheralPin generation script and pin files accordingly 2019-10-31 14:11:00 +01:00
jeromecoutant d7d0d0b8cb STM32H7 FLASH and DEVICE_KEY 
- Enable FLASHIAP for all H7 boards
- Use "TDB_INTERNAL" for all H7 boards
- Define specific internal_base_address only for DISCO_H747I_CM7
  (default address is the end of FLASH which is correct for other H7 boards)
- Correct GetSectorBase function with Dual Bank information
 2019-10-31 13:04:49 +01:00
Martin Kojtal 73b4f717be
Merge pull request #11759 from LMESTM/stm_qspi_address 
STM32 QSPI: Use defines for setting address size
 2019-10-31 10:38:58 +01:00
Przemyslaw Stekiel ee519e6a5c NUCLEO_F411RE, NUCLEO_L073RZ, NUCLEO_F303RE: Disable Analogin D13(PA_5) pin. 
Analogin test fails on D13(PA_5) pin. When logic one (3.3V) is provided on this pin ADC reads 0.86 value. On other pins we got 0.98.
This is caused because this pin is connected to led2.
 2019-10-30 14:34:57 +01:00
Janne Kiiskila a48500183e Fix for the H747 flash driver / cache cleaning 
This copies the approach of the STM32F7 flash driver submitted via
PR https://github.com/ARMmbed/mbed-os/pull/10248

With this change the board finally passes all of the device key
tests 10/10 times correctly.
 2019-10-30 15:25:20 +02:00
Martin Kojtal a07286676b
Merge pull request #11756 from JammuKekkonen/add_ccmram_section_for_f303re 
Add option to use CCMRAM on F303xE.
 2019-10-30 09:10:42 +01:00
Jammu Kekkonen 4dc4bfff9a Add option to use CCMRAM on F303xE. 2019-10-29 12:54:27 +02:00
Laurent Meunier 28c908fdef STM32 QSPI: Use defines for setting address size 2019-10-28 15:38:53 +01:00
Martin Kojtal df79609cc5
Merge pull request #11675 from jeromecoutant/PR_USB_STEP1 
STM32 USB update step 1
 2019-10-28 14:06:15 +01:00
Martin Kojtal 8637069b36
Merge pull request #11698 from kjbracey-arm/armstack 
Clean up ARM toolchain heap+stack setup in targets
 2019-10-24 11:37:11 +02:00
Kevin Bracey fb6aa3ef4f Clean up ARM toolchain heap+stack setup in targets 
ARM Compiler 6.13 testing revealed linker errors pointing out
conflicting use of `__user_setup_stackheap` and
`__user_initial_stackheap` in some targets. Remove the unwanted
`__user_initial_stackheap` from the targets - the setup is
centralised in the common platform code.

Looking into this, a number of other issues were highlighted

* Almost all targets had `__initial_sp` hardcoded in assembler,
  rather than getting it from the scatter file. This was behind
  issue #11313. Fix this generally.
* A few targets' `__initial_sp` values did not match the scatter
  file layout, in some cases meaning they were overlapping heap
  space. They now all use the area reserved in the scatter file.
  If any problems are seen, then there is an error in the
  scatter file.
* A number of targets were reserving unneeded space for heap and
  stack in their startup assembler, on top of the space reserved in
  the scatter file, so wasting a few K. A couple were using that
  space for the stack, rather than the space in the scatter file.

To clarify expected behaviour:

* Each scatter file contains empty regions `ARM_LIB_HEAP` and
  `ARM_LIB_STACK` to reserve space. `ARM_LIB_STACK` is sized
  by the macro `MBED_BOOT_STACK_SIZE`, which is set by the tools.
  `ARM_LIB_HEAP` is generally the space left over after static
  RAM and stack.
* The address of the end of `ARM_LIB_STACK` is written into the
  vector table and on reset the CPU sets MSP to that address.
* The common platform code in Mbed OS provides `__user_setup_stackheap`
  for the ARM library. The ARM library calls this during startup, and
  it calls `__mbed_user_setup_stackheap`.
* The default weak definition of `__mbed_user_setup_stackheap` does not
  modify SP, so we remain on the boot stack, and the heap is set to
  the region described by `ARM_LIB_HEAP`. If `ARM_LIB_HEAP` doesn't
  exist, then the heap is the space from the end of the used data in
  `RW_IRAM1` to the start of `ARM_LIB_STACK`.
* Targets can override `__mbed_user_setup_stackheap` if they want.
  Currently only Renesas (ARMv7-A class) devices do.
* If microlib is in use, then it doesn't call `__user_setup_stackheap`.
  Instead it just finds and uses `ARM_LIB_STACK` and `ARM_LIB_HEAP`
  itself.
 2019-10-23 14:53:49 +03:00
Martin Kojtal 9db54bc1ee
Merge pull request #11672 from ABOSTM/I2C_FASTMODEPLUS 
STM32F767ZI - I2C FastModePlus not properly enabled
 2019-10-22 09:46:16 +02:00
jeromecoutant dab09f3138 STM32 USB redesign step 1 
No more need to explicitly configure each targets.
Pins are now defined in the PeripheralPin.c file which is build by a script.
 2019-10-21 17:12:03 +02:00
jeromecoutant 01e798fd6a STM32 clock configuration depending on USB 2019-10-21 17:11:59 +02:00
jeromecoutant 0e1a04b64a STM32WB USB pins addition 2019-10-21 17:11:57 +02:00
jeromecoutant 03dd8d3e22 STM32L4 USB pins addition 2019-10-21 17:11:55 +02:00
jeromecoutant 2c03f3a61e STM32L1 USB pins addition 2019-10-21 17:11:53 +02:00
jeromecoutant a54fdf7585 STM32L0 USB pins addition 2019-10-21 17:11:52 +02:00
jeromecoutant 40739d3b8f STM32H7 USB pins addition 2019-10-21 17:11:50 +02:00
jeromecoutant 905f81851a STM32F7 USB pins addition 2019-10-21 17:11:49 +02:00
jeromecoutant 6f0932033b STM32F4 USB pins addition 2019-10-21 17:11:27 +02:00
jeromecoutant 6986daac61 STM32F3 USB pins addition 2019-10-21 14:49:19 +02:00
jeromecoutant 9b3cdd0972 STM32F2 USB pins addition 2019-10-21 14:49:19 +02:00
jeromecoutant 6e3dc7b173 STM32F1 USB pins addition 2019-10-21 14:49:18 +02:00
jeromecoutant 66dea7b5da STM32F0 USB pins addition 2019-10-21 14:49:18 +02:00
jeromecoutant 5afd9ebb60 STM32 PeripheralPins.h update with USB 2019-10-21 14:49:18 +02:00
Martin Kojtal cd415cfb41
Merge pull request #11708 from ABOSTM/FIX_SPI_COMPILATION_WARNING 
TARGET_STM: remove warning and fix typo on SPI
 2019-10-21 09:40:23 +02:00
Martin Kojtal 42cb19b6d8
Merge pull request #11679 from jeromecoutant/PR_L4_TRNG 
STM32L4 TRNG clock configuration
 2019-10-21 09:39:24 +02:00
Martin Kojtal 4af05bb370
Merge pull request #11648 from rohfle/target-olimex-stm32e407 
OLIMEX_STM32E407_F407ZG: Added new target platform
 2019-10-18 16:05:05 +02:00
Martin Kojtal d851a63e46
Merge pull request #11602 from kyle-cypress/pr/qspi-arbitrary-alt-size 
Allow for arbitrary QSPI alt sizes
 2019-10-18 15:48:16 +02:00
Martin Kojtal 8ff5cf9216
Merge pull request #11700 from toyowata/arch_max_bootloader 
Add bootloader support for Seeed Arch-MAX
 2019-10-18 10:32:00 +02:00
Alexandre Bourdiol bca9d9500e TARGET_STM: remove warning and fix typo on SPI 2019-10-18 09:48:30 +02:00
Rohan Fletcher 4b971fbb8f OLIMEX_STM32E407_F407ZG: Added definitions for missing LEDs 2019-10-18 06:37:09 +13:00
Martin Kojtal dba8e77b8c
Merge pull request #11688 from LMESTM/Clearing_UART_TC_Flag_prevents_deepsleep 
Clearing UART TC Flag prevents deep sleep, so do not clear it
 2019-10-17 14:17:15 +02:00
jeromecoutant 7db11e0b20 STM32 TRNG clock configuration 2019-10-17 13:51:33 +02:00
toyowata 5389536953 Add bootloader support for Seeed Arch-MAX 2019-10-17 10:05:03 +09:00
Kyle Kearney 8e9877c212 Update STM driver changes for clarity 
- Use a switch statement rather than shifting and masking to compute
  the AlternateBytes value.
- Rename rounded_size to alt_bytes to clarify its purpose.
 2019-10-16 09:37:27 -07:00
Martin Kojtal 16568da47f
Merge pull request #11605 from ABOSTM/DISCO_H747I_DUALCORE_SUPPORT 
DISCO_H747I dualcore support
 2019-10-16 17:35:25 +08:00
Laurent Meunier e862438fad Clearing UART TC Flag prevents deep sleep, so do not clear it 
The TC flag is used in function serial_is_tx_ongoing to check if there is
an ongoing serial transmission. So this Flag must not be cleared at the
end of the transmission, otherwise, serial_is_tx_ongoing will notify that
TX is ongoing.

The impact is that it may prevent deep sleep to be entered.

Also there is no need to clear this flag at the end of the transaction
because it will be cleared automatically by HW when a new transmission
starts.
 2019-10-15 15:59:51 +02:00
Alexandre Bourdiol 728a1c4383 STM32F767ZI - I2C FastModePlus not properly enabled 2/2 
Warning: sometimes I2C_FASTMODEPLUS_I2Cx is defined,
even if not supported by some chip within the family
 2019-10-15 13:46:29 +02:00
Janne Kiiskila 02c139f27a stm32f4xx_hal_pcd.c@346,22: unused variable 'ep' 
Compiler warning fix, trivial. One function has an unused
variable, delete that line.
 2019-10-15 09:49:09 +03:00
Alexandre Bourdiol 6397a1d555 Mbed patch of STM32cube for bootloader: use NVIC_FLASH_VECTOR_ADDRESS 2019-10-14 18:03:47 +02:00
Alexandre Bourdiol 02cdac5fe3 Update HAL/LL EXTI to have default API applied on current core and nott CPU1 2019-10-14 18:03:28 +02:00
Alexandre Bourdiol 48aba33204 SystemCoreClock should correspond to current core clock and not D1 clock. 2019-10-14 18:03:06 +02:00
Alexandre Bourdiol adcf0e2fa5 DISCO_H747I Dualcore support 
Add 2 targets for DISCO_H747I dualcore:
* DISCO_H747I      -> for CM7 core
* DISCO_H747I_CM4  -> for CM4 core

Current restrictions:
* TICKLESS deactivated
* DeepSleep not supported (DeepSleep wrapped to sleep)

Warning: use of the same IP (example I2C1) by both core at the same time is not prevented,
but is strongly not recommended.
Some Hardware Semaphore are use for common IP, to manage concurrent access by both cores: Flash, GPIO, RCC.

Warning: Drag and drop of binary to DISCO_H747I will flash CM7.
         In order to flash CM4, one can use STM32 CubeProgrammer tool.
 2019-10-14 18:02:57 +02:00
Martin Kojtal 8ff444ff80
Merge pull request #11621 from jeromecoutant/PR_L1_VREFINT_CAL_ADDR 
STM32L151: update calibration memory address
 2019-10-14 09:23:16 +02:00
Martin Kojtal 379787a127
Merge pull request #11626 from jeromecoutant/PR_DISCO_L4R_STMOD 
DISCO_L4R9I: update default STMOD+ pin
 2019-10-14 09:22:35 +02:00
Anna Bridge 489c30f569
Merge pull request #11297 from kyle-cypress/pr/qspi-dummy-cycles 
Differentiate alt and dummy cycles in QSPIF
 2019-10-11 14:34:17 +01:00
Alexandre Bourdiol 66765332e0 STM32F767ZI - I2C FastModePlus not properly enabled 
Fixes #11659
 2019-10-10 10:26:59 +02:00
Rohan Fletcher 02df759c37 OLIMEX_STM32E407_F407ZG: Added new target platform 
Added Olimex STM32-E407 (STM32F407ZG) evaluation board.
USB, UART, External HS XTAL and Ethernet are all working correctly.
 2019-10-10 09:20:28 +13:00
Anna Bridge f1295b9aa7
Merge pull request #11573 from felser/add_413_dragonfly 
Add 413 dragonfly
 2019-10-07 16:48:07 +01:00
jeromecoutant fc5b91a36f DISCO_L4R9I: update default STMOD+ pin 2019-10-07 16:01:16 +02:00
jeromecoutant 1673e8aa1b STM32L151: update calibration memory address 2019-10-03 14:17:04 +02:00
Kyle Kearney 9b32c0f316 Fix possible negative QSPI alt count on STM 
Remove an extraneous decrement operation in cases where the alt
bits size is a multiple of 8.
 2019-09-30 16:00:24 -07:00
Matthew Macovsky baf375f8cb Allow for arbitrary QSPI alt sizes 
The QSPI spec allows alt to be any size that is a multiple of the
number of data lines. For example, Micron's N25Q128A uses only a
single alt cycle for all read modes (1, 2, or 4 bits depending on
how many data lines are in use).
 2019-09-30 14:45:08 -07:00
Ben Cooke dd778c4126 Add MTS_DRAGONFLY_F413RH platform to mbed-os 2019-09-30 13:50:40 -05:00
int_szyk f892ae7f1e Add watchdog clock accuracy to STM targets. 2019-09-30 08:10:24 +02:00
jeromecoutant fff88617b7 STM32H7 ST CUBE V1.5.0 update 2019-09-27 11:39:06 +02:00
Martin Kojtal fff888b118
Merge pull request #11562 from VVESTM/vve_h7_memmap 
STM32H7: memory relocation
 2019-09-26 14:01:23 +02:00
jeromecoutant 8c1f94f7cb STM32WB : LSI clock selection when LSE is not available 2019-09-19 13:07:54 +02:00
jeromecoutant 5cfee65881 STM32H7: LSI clock selection when LSE is not available 2019-09-19 13:07:54 +02:00
Martin Kojtal 83fca603f0
Merge pull request #11454 from Tharazi97/LSI_VALUE_STM 
ST: Change the LSI_VALUE according to documentation
 2019-09-18 13:49:38 +02:00
Vincent Veron 82e89add61 STM32H7 : use RAM instead of DTCMRAM (GCC_ARM toolchain) 2019-09-18 10:57:21 +02:00
Vincent Veron ac30a70092 STM32H7 : use RAM instead of DTCMRAM (ARM toolchain) 2019-09-18 10:57:20 +02:00
Vincent Veron d241eef5d4 STM32H7 : use RAM instead of DTCMRAM (IAR toolchain) 
Keep vector table and crash data ram in 0x20000000 for
tests-mbed_platform-crash_reporting test.
Move the rest in RAM (0x24000000). This is needed for ethernet and allows
user to use more RAM (512k).

Signed-off-by: Vincent Veron <vincent.veron@st.com>
 2019-09-18 10:57:19 +02:00
int_szyk 48040cf687 Change the LSI_VALUE according to documentation 2019-09-17 12:01:32 +02:00
mahanthgouda 1780a08d54 Add OKDO platform (#11407) 
Add OKDO platform
 2019-09-16 16:58:54 +02:00
Martin Kojtal f51bbe01c8
Merge pull request #11471 from jeromecoutant/PR_WB_ADC 
STM32WB ADC : consecutive VBAT reading
 2019-09-16 13:19:09 +02:00
jeromecoutant ee8489f4e9 STM32WB ADC : Consecutive VBAT values reading was not possible 
Add Stop after read
 2019-09-12 12:55:41 +02:00
Martin Kojtal c897e041c8
Merge pull request #11384 from jeromecoutant/PR_H747_CM7 
ST DISCO-H747I introduction
 2019-09-10 19:43:57 +02:00
jeromecoutant db7efabfd5 STM license file update 
Some code have been copied from ST Cube deliveries.
ST copyright is then needed.
 2019-09-10 14:24:48 +02:00
jeromecoutant 535dbe87af STM32H747 license update 2019-09-10 11:46:52 +02:00
jeromecoutant c28d5f17e5 DISCO_H747I single core M7 introduction 2019-09-10 11:46:50 +02:00
jeromecoutant 73a00e953d STM32H747xI introduction 2019-09-10 11:46:47 +02:00
jeromecoutant 117ddbadee STM32H743 files move 2019-09-10 11:46:35 +02:00
Martin Kojtal b8ebee5719
Merge pull request #11385 from Tharazi97/lp_ticker_wrapper_change 
Fix problem with low level lp_ticker STM wrapper
 2019-09-05 11:09:50 +02:00
Martin Kojtal 7b06ce552f
Merge pull request #11368 from ua1arn/master 
Add pin speed controlling interface
 2019-09-04 13:55:26 +02:00
Martin Kojtal 5a6bf446d2
Merge pull request #11383 from Tharazi97/f303_watchdog_reset 
Change LSI_VALUE in STM implementation.
 2019-09-04 11:55:27 +02:00
jeromecoutant 55d60f3c25 Add USB support for DISCO_L4R9I 2019-09-03 16:43:05 +02:00
jeromecoutant 425d63856c STM32L4 USB: remove EndpointAbort support 2019-09-03 14:23:05 +02:00
dolphin\gena afc79cf9b7 formatting 2019-09-03 12:03:04 +03:00
dolphin\gena 2a13490e6d bad formatting correction 2019-09-03 11:47:52 +03:00
dolphin\gena a684f43b7f indents correction 2019-09-03 11:45:35 +03:00
dolphin\gena 1379009f5e rename macro 2019-09-02 14:02:29 +03:00
Martin Kojtal 940d3fdf60
Merge pull request #11291 from LMESTM/STM32_OSPI_QSPI_fallback_support 
Stm32 ospi qspi fallback support
 2019-09-02 12:26:55 +02:00
Martin Kojtal 8add87aeba
ST pinmap: remove endif mistype 2019-09-02 10:33:20 +01:00
Martin Kojtal b44fbfe714
ST pinmap: Fix the style 2019-09-02 10:32:32 +01:00
dolphin\gena 58ca13006d formatting 2019-09-02 12:08:07 +03:00
int_szyk a95450bdc0 AStyle 2019-09-02 10:48:41 +02:00
int_szyk 16c5121705 Fix problem with low level lp_ticker STM wrapper 2019-09-02 10:48:40 +02:00
dolphin\gena 9043330af4 fix mistypes 2019-09-02 10:21:38 +03:00
dolphin\gena 05fc0f5263 formatting issue 2019-09-02 10:17:54 +03:00
dolphin\gena 75c17cea90 mistype fix 2019-09-02 10:08:36 +03:00
int_szyk 3fa878f8a8 Change LSI_VALUE in STM implementation. 
Wrong LSI value might be causing problems witch watchdogs.
 2019-08-30 13:54:39 +02:00
Martin Kojtal a65ed8c3d8
Merge pull request #11303 from jeromecoutant/PR_H743ZI2_480 
NUCLEO_H743ZI2 : increase system clock from 400 MHz to 480 MHz
 2019-08-29 17:10:06 +02:00
jeromecoutant bb1388be8e NUCLEO_L4R5ZI: add QSPI_x definition 2019-08-29 14:17:33 +02:00
Martin Kojtal 8ef742a49c
Merge pull request #11370 from u-blox/ublox_odin_driver_os_5_v3.7.1_rc1 
Driver Updates + ARMC6 driver support + WIFI fixes
 2019-08-29 13:35:06 +02:00