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832 Commits (369d65fd0df72350822ef4ea32e16a27807a6d6e)

Author SHA1 Message Date
Martin Kojtal bdcda386d5 Merge pull request #3618 from LMESTM/dev_stm32_PinNamesTypes 
STM32: Move types definitions to a common file
 2017-01-26 10:35:59 +02:00
Martin Kojtal 7831da1e0e Merge pull request #3617 from Patater/efm32gg-linkerscript-fix 
EFM32GG: Fix GCC_ARM linker script
 2017-01-26 10:35:34 +02:00
Martin Kojtal a8f4b455fa Merge pull request #3614 from LMESTM/dev_stm32_PortNames 
STM32: make PortNames.h a common file
 2017-01-26 10:35:16 +02:00
Martin Kojtal b4ffd9a937 Merge pull request #3605 from TsungtaWu/master 
Add DELTA_DFCM_NNN50 platform
 2017-01-26 10:32:02 +02:00
Mahesh Mahadevan 595b9cf137 K22F: Enable TRNG (#3599) 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-01-26 10:29:25 +02:00
Martin Kojtal 25ba021c63 Merge pull request #3578 from theotherjimmy/inherit-target-labels 
Target system - Inherit names from target parents
 2017-01-26 10:24:45 +02:00
mbedNoobNinja be52c64cd4 missing IRQ pin fix 2017-01-25 12:05:41 +02:00
Jesse Marroquin dddcf76b3e [MAX32630FTHR] Adding new platform 2017-01-24 15:48:19 -06:00
bcostm c1f712872d Fix bug in i2c_byte_read function 2017-01-24 16:50:55 +01:00
Laurent MEUNIER 42f6622f8e STM32: Move types definitions to a common file 
Only one point of attention:
STM_MODE_ANALOG_ADC_CONTROL is a specific mode that is only supported on L4.
So STM_MODE_ANALOG_ADC_CONTROL was moved to index 13 (last entry)
of gpio_mode table so that all the other modes are common and only the last
one is specific.
 2017-01-24 10:58:36 +01:00
Laurent MEUNIER 32d04ead8a STM32: L0 LL layer 
Introduce the L0 LL Layer from STM32 cube.
 2017-01-23 18:01:30 +01:00
Laurent MEUNIER 1b94e234e3 STM32: I2C: remove warning 
Remove unused variables to avoid warnings.
 2017-01-23 17:07:52 +01:00
Laurent MEUNIER c6a898d71b STM32: remove F3 spi_api.c warning 
Solve below warning:

"...\targets\TARGET_STM\TARGET_STM32F3\spi_api.c", line 73:
Warning:  #111-D: statement is unreachable
 2017-01-23 17:07:46 +01:00
Laurent MEUNIER 9640936714 F3 CUBE update V1.7.0 
CMSIS v2.3.0 => v2.3.1
    HAL   v1.3.0 => v1.4.0
    LL    v1.4.0
 2017-01-23 16:44:21 +01:00
JojoS 9b8ac9b4e5 Fix for #2884, LPC824: export to LPCXpresso, target running with wrong clock speed 
SystemInit() was called condititionally, but necessary defines were not
set in mbed. Calling SystemInit() unconditional now.
Removed also conditiional calls to legacy CodeRed lib.
 2017-01-20 17:04:27 +01:00
Jimmy Brisson 290d7de835 Correct definition of LPC4088* to use a common ancestry 2017-01-19 12:16:51 -06:00
Jaeden Amero 95e5fec8d0 EFM32GG: Fix GCC_ARM linker script 
A copy paste error snuck into the uVisor related updates to the EFM32GG
linker script. Fix the error by replacing "m_data" with "RAM".

Fixes: 89641bc7e0 "uVisor: Update K64F and EFM32GG linker scripts"
 2017-01-19 17:13:40 +00:00
Laurent MEUNIER 5d04b97b80 STM32: make PortNames.h a common file 
the same file can be used for all targets
 2017-01-19 15:27:19 +01:00
Bartek Szatkowski f2c00c7cb5 NRF51822: Remove MBED_WEAK from hal_sleep functions 2017-01-19 11:56:13 +00:00
Bartek Szatkowski 6a045a49a9 Platform: Add sleep/deepsleep user facing functions 
Add sleep/deepsleep functions to platform layer which are replacing HAL
functions with the same name, rename existing symbols in HAL layer
to hal_sleep/hal_deepsleep. This way sleep functions
are always available, even if target doesn't implement them, which makes
the code using sleep clearer. It also enables us to make decision on in
which builds (debug/release) the sleep will be enabled.
 2017-01-19 09:39:29 +00:00
TsungtaWu c6e0b9c20e Revise to improve readability 
Delete the blank line.
Use Marcos rather than magic numbers
Put brace at end of the while line
 2017-01-19 17:20:46 +08:00
TsungtaWu ef26a4c0e7 Add DELTA_DFCM_NNN50 platform 
greentea tests are all passing
mbedgt: test case results: 175 OK
Please kindly review this PR
 2017-01-18 11:01:48 +08:00
Martin Kojtal e592c8a8b2 Merge pull request #3571 from jeromecoutant/PR_DISCO_F769NI 
DISCO_F769NI introduction
 2017-01-16 16:38:20 +00:00
Martin Kojtal e184511079 Merge pull request #3583 from jeromecoutant/PR_F7_CUBE_151 
STM32F7 Cube FW new release v1.5.1
 2017-01-16 16:34:35 +00:00
Martin Kojtal 3933ccf76e Merge pull request #3584 from LMESTM/dev_stm32_common_peripheralpins 
STM32: make PeripheralPins.h a common file
 2017-01-16 16:29:28 +00:00
Martin Kojtal cc8a132f10 Merge pull request #3575 from LMESTM/dev_stm_factorize_gpio 
Dev stm factorize gpio
 2017-01-16 16:28:27 +00:00
Martin Kojtal c635c5d795 Merge pull request #3573 from MultiTechSystems/dragonfly-rtc-fix 
fix failing RTC initialization for MTS_DRAGONFLY_F411RE
 2017-01-16 16:25:44 +00:00
Martin Kojtal c14d7154e6 Merge pull request #3397 from AlessandroA/stm32f4_support 
Add uVisor support for the DISCO_F429ZI
 2017-01-16 16:24:33 +00:00
ccli8 0a0b326da6 [NUC472/M453] Change sbrk() allocation to be 32-byte aligned 2017-01-16 09:48:27 +08:00
ccli8 453f60e9c1 [NUC472/M453] Remove power-down support from us_ticker 2017-01-16 09:48:21 +08:00
Anna Bridge 469b54700b Merge pull request #3577 from bridadan/fix_debug_build_stm 
Fixes linking errors when building with debug profile
 2017-01-13 14:15:37 +00:00
jeromecoutant f5b62208f4 STM32Cube_FW_F7_V1.5.1 
CMSIS v1.1.0 => v1.1.2
    STM32F7 HAL v1.1.0 => v1.1.2
 2017-01-13 13:29:45 +01:00
Laurent MEUNIER 1a4394a4a2 STM32: make PeripheralPins.h a common file 
Simple effort to avoid duplicate code.
 2017-01-13 13:25:33 +01:00
Anna Bridge 74f192add5 Merge pull request #3567 from LMESTM/dev_stm32_hal_F0_V1.7.0 
Dev stm32 F0 v1.7.0
 2017-01-13 10:52:49 +00:00
Anna Bridge 74619ceaa0 Merge pull request #3563 from c1728p9/fix_lpc_checksum 
LPC4088 - Fix vector checksum
 2017-01-13 10:51:48 +00:00
Anna Bridge 6cf0c8673b Merge pull request #3558 from NXPmicro/UART_Asynch_Fix 
K64F UART Asynch API: Fix synchronization issue
 2017-01-13 10:45:40 +00:00
Brian Daniels 24a9a4824f Fixes linking errors when building with debug profile 
When building with the debug profile, certain ST plaforms error with
'get_i2c_timing' not being defined. This is because the function is not
defined as 'static inline', but just 'inline'.
 2017-01-12 15:09:28 -06:00
Laurent MEUNIER 57e0225248 STM32: gpio: factorize gpio_api.c and gpio_object.h 
Let's make the code more common for gpios.

The only difference between STM32 families is that BRR register may
not be available. In case BRR is not available, we use the 16 left bits
of BSRR instead. We could always use BSRR, but BRR saves one left-shift
operation, so let's use it when available.

By default we will consider using BRR, except for platforms that define
GPIO_IP_WITHOUT_BRR.
 2017-01-12 19:24:32 +01:00
Laurent MEUNIER 7a36614e74 STM32: remove useless include 
gpio_object.h is included from common_objects.h,
so no need to have it here.
 2017-01-12 19:11:36 +01:00
Mike Fiore ca24745e28 [MTS_DRAGONFLY_F411RE] use LSI for RTC since LSE is no longer populated by default 2017-01-12 10:25:46 -06:00
Anna Bridge 9ce040e745 Merge pull request #3551 from TomoYamanaka/master 
Fix I2C driver for RZ/A1H
 2017-01-12 16:06:07 +00:00
Anna Bridge 236258bf05 Merge pull request #3546 from bcostm/dev_can_nucleo-f412zg 
NUCLEO-F412ZG - Add CAN peripheral
 2017-01-12 16:04:40 +00:00
Anna Bridge 63601df8dd Merge pull request #3544 from jeromecoutant/PR_DEEPSLEEP_L4 
STM32L4 deepsleep improvement
 2017-01-12 16:02:40 +00:00
jeromecoutant 2ea49e0bc1 DISCO_F769NI: targets update 
- correct clock for USB
- add ARM micro support
- add OS5 release support
- add TRNG support
- add ARDUINO form factor support
 2017-01-12 15:36:30 +01:00
Russ Butler 18618ef43e LPC4088 - Fix vector checksum 
Turn on the vector checksum on all LPC4088 variants. This checksum is
required for an application to boot.
 2017-01-10 14:53:24 -06:00
Mahadevan Mahesh 89f8fe49a2 MCUXpresso: Fix ENET driver to enable interrupts after interrupt handlers are set 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-01-10 13:04:27 -06:00
Mahadevan Mahesh 8c71fbc07f K64F UART Asynch API: Fix synchronization issue 
The UART state should be set to busy before starting the transfer

Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-01-10 10:45:28 -06:00
Laurent MEUNIER b15fc6a6b5 STM32: TIM: Initialize new TIM parameter 2017-01-10 16:53:20 +01:00
Laurent MEUNIER cdcaf2a473 STM32: Serial: Use up to date MACROs 
Following STM32 HAL update, it is needed to use up-to-date MACROs.
Otherwise, build would fail.
 2017-01-10 16:53:17 +01:00
Laurent MEUNIER 0ca04ffb3e STM32: HAL update, use I2C function instead of MACRO 
Following HAL update, this is needed to use the I2C API function
rather than previously used MACRO.

An assert would fail at compilation time otherwise.
 2017-01-10 16:53:15 +01:00
Laurent MEUNIER af6cdabc28 STM32Cube_FW_F0_V1.7.0 
CMSIS v2.3.0 => v2.3.1
    STM32F0 HAL v1.4.0 => v1.5.0
    LL Layer introduction for STM32F0
 2017-01-10 16:50:35 +01:00
Alessandro Angelino 89641bc7e0 uVisor: Update K64F and EFM32GG linker scripts 
This commit improves consistency between different platforms' linker
scripts. In particular, we use "__UVISOR_SRAM_START" instead of
"__UVISOR_BSS_START" as the uVisor BSS sections might be outside of the
SRAM (for example, when using a tightly-coupled memory).
 2017-01-10 13:15:54 +00:00
adustm 3a53a5adc8 DISCO_F429ZI: Add support for uVisor 2017-01-10 13:15:54 +00:00
bcostm ead72934ef Add CAN feature and activate CAN tests for this platform 2017-01-10 11:22:51 +01:00
bcostm 31e6e5c182 Add CAN object structure 2017-01-10 11:15:38 +01:00
TomoYamanaka 0236d95fed Fix I2C driver for RZ/A1H 
Previously, when "length = 0" as failsafe, "return 0" is executed.
But we changed so that only START bit and STOP bit are executed same as other devices.
 2017-01-10 12:44:12 +09:00
Sam Grove be28fd85a9 Merge pull request #3438 from NXPmicro/SERIAL_ASYNC_API 
K64F: Add support for SERIAL ASYNCH API
 2017-01-09 10:46:46 -06:00
Sam Grove 4f9e9f635f Merge pull request #3540 from LMESTM/fix_spi_rx_init 
STM: SPI: Initialize Rx in spi_master_write
 2017-01-09 10:37:05 -06:00
Sam Grove 5fd8a5e43a Merge pull request #3539 from bcostm/dev_trng_nucleo-f412zg 
NUCLEO_F412ZG - Add support of TRNG peripheral
 2017-01-09 10:34:18 -06:00
Sam Grove 10b6dbf839 Merge pull request #3504 from CalSol/canfixes 
[LPC15xx] CAN implementation improvements
 2017-01-09 10:18:43 -06:00
Sam Grove c305000f2b Merge pull request #3503 from CalSol/pwmfix 
[LPC15xx] Ensure that PWM=1 is resolved correctly
 2017-01-09 10:18:01 -06:00
Sam Grove cefae22703 Merge pull request #3492 from Nodraak/fix/3463/can_read_return_value 
Fix #3463 CAN read() return value
 2017-01-09 10:17:27 -06:00
Sam Grove ddcd3ad711 Merge pull request #3488 from LMESTM/dev_stm_i2c_v2_unitary_functions 
Dev stm i2c v2 unitary functions
 2017-01-09 10:15:55 -06:00
jeromecoutant 633240b93b STM32L4 deepsleep improvement 2017-01-09 12:21:24 +01:00
Laurent MEUNIER fd3a3f9de8 STM: SPI: Initialize Rx in spi_master_write 
In case Rx is not initiliased its content might be random from stack.
This is causing problem in case of 8 bits read only as the left-side 8 bits
of the returned int value may contain this random byte data. This was for
instance detected when using SDFileSystem Lib.
 2017-01-06 13:20:55 +01:00
bcostm 30ac4aae75 Add support of TRNG peripheral 2017-01-06 10:36:29 +01:00
Laurent MEUNIER 4297e3fd36 STM32: I2C: i2c_byte_read return value in case of error 
To make clear that an error is being reported, we shall report -1,
2 being the timeout error for i2c_byte_write only.
 2017-01-03 18:06:19 +01:00
Adrien Chardon 885b018f77
Set bit without reseting the whole register 2017-01-03 11:46:27 +01:00
Adrien Chardon 7e0b4fe3c9
Fix can_read() return value for STM32 boards 2017-01-03 11:46:25 +01:00
Laurent MEUNIER 455c2ecbea STM32: I2C: remove debug code 
Few debug lines were to be removed / updated.
Move the printf to DEBUG_PRINTF and return the error when needed.
 2017-01-03 10:18:56 +01:00
Richard Lin 14d579ad50 Fix && -> & typo 2017-01-02 01:47:43 -08:00
Michel Jaouen 25c0d9034f USBHOST STM : add more board 
NUCLEO : F411RE, L476VG, F746ZG
DISCO : L476VG
 2017-01-02 09:51:48 +01:00
Michel Jaouen 14153dcbc3 USBHOST STM support : 
NUCLEO : F429ZI, F446ZE, F207ZG, F767ZI, F401RE,
DISCO : F429ZI
 2017-01-02 09:48:16 +01:00
Michel Jaouen 8af69dcbd6 STM32 HAL HCD : USBHOST changes for f4,f2,l4,f7 
- reset toggle_out , toggle_in at init
-  in/out toggle in on ctrl endpoint
- remove call back when transmission restarted
 2017-01-02 09:48:15 +01:00
Martin Kojtal e7361ebc44 Merge pull request #3365 from OpenNuvoton/nuvoton_usb 
[NUC472/M453] Support USB device
 2016-12-30 12:43:53 +01:00
Martin Kojtal 518b07263c Merge pull request #3502 from NXPmicro/I2C_Zerobyte_Write 
MCUXpresso I2C: Handle 0 byte write
 2016-12-30 12:36:36 +01:00
Martin Kojtal 6598e32785 Merge pull request #3405 from samos2011/stm32f1_can_bug 
Repair the transmit mailbox (0,1,2) empty interrupt flag not clear BUG
 2016-12-30 12:31:18 +01:00
Mahadevan Mahesh 1280dfcca5 MCUXpresso I2C: Handle 0 byte write 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-12-28 08:03:49 -06:00
Richard Lin 9a8cd059f8 Ensure that PWM=1 is resolved correctly 2016-12-24 23:20:56 -08:00
Richard Lin fd24700c50 Add TX, EW, EP, BO interrupts; allow reset to clear a bus-off condition 2016-12-24 01:51:55 -08:00
Martin Kojtal 6e7ee0e51e Merge pull request #3489 from bcostm/fix_issue_3474 
NUCLEO_F103RB - Correct CAN and PWM alternate-functions
 2016-12-23 13:15:37 +00:00
Martin Kojtal d652d391e6 Merge pull request #3454 from 0xc0170/jeromecoutant-PR_LPT 
STM32: Refactor lp_ticker.c + rtc_api.c + sleep.c + rtc_api_hal.h files
 2016-12-23 13:06:02 +00:00
Martin Kojtal 9b8efb2659 Merge pull request #3391 from jeromecoutant/PR_ST_F4_ASSERT 
STM32F4 : map ST HAL assert into MBED assert
 2016-12-23 13:05:35 +00:00
Mahadevan Mahesh ece7b6f05b K64F: Add support for SERIAL ASYNCH API 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-12-21 11:35:27 -06:00
jeromecoutant 2b4d83ef1e Run astyle 2016-12-21 16:54:19 +00:00
jeromecoutant ab28a5e5cb STM32: Refactor lp_ticker.c + rtc_api.c + sleep.c + rtc_api_hal.h files 2016-12-21 16:54:18 +00:00
Martin Kojtal 3d620f9726 Merge pull request #3459 from 0xc0170/u-blox-Adding-UBLOX_EVK_NINA_B1-target 
Target: Add new target UBLOX_EVK_NINA_B1
 2016-12-21 15:09:09 +00:00
Martin Kojtal 920db8e4a3 Merge pull request #3451 from NXPmicro/Rename_KSDK2_MCUXpresso 
Rename KSDK2 to MCUXpresso. This is the new name of this package
 2016-12-21 15:08:28 +00:00
bcostm 30dddf115a Correct wrong alternate-function number for CAN PB_8/PB_9 pins and PWM PC_7 pin 2016-12-21 10:27:50 +01:00
Laurent MEUNIER 20c9af8bec STM32: I2C unitary functions for IP V2 
STM32 supported targets have 2 possible versions of I2C.
This patch makes the start / stop / read and write byte work ok for IP V2.
This was not working before and does not seem to be widely used.
 2016-12-21 09:27:52 +01:00
Michael Ammann b1a9e7b1c8 Target: Add new target UBLOX_EVK_NINA_B1 
Based on nrf51 MCU.
 2016-12-20 10:31:14 +00:00
tomoyuki yamanaka 623f8acdc4 [RZ/A1H]Fix TTB setting of RO_DATA area 
I modified the TTB setting of RO_DATA area.
The current setting of this area is "not executable".
Therefore, when trying to execute a program placed in this area, a prefetch abort will occur.
So I changed from "Sect_Normal_RO" to "Sect_Normal_Cod".
 2016-12-20 16:44:52 +09:00
Mahadevan Mahesh e5ba1d2b37 Rename KSDK2 to MCUXpresso. This is the new name of this package from NXP 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-12-19 14:20:25 -06:00
Anna Bridge 20eb127f80 Merge pull request #3460 from NXPmicro/I2C_UpdateReturnValue 
KSDK I2C: Update the return value to match the API documentation change
 2016-12-19 17:56:50 +00:00
Anna Bridge f2ce7ebb99 Merge pull request #3442 from LMESTM/dev_stm_i2c_f1 
Dev stm i2c f1
 2016-12-19 17:51:58 +00:00
Anna Bridge 9e03765d04 Merge pull request #3422 from szechyjs/disco_f303vc_can 
Enable CAN on DISCO_F303VC
 2016-12-19 17:37:48 +00:00
Anna Bridge d1aa6eea52 Merge pull request #3410 from jeromecoutant/PR_ST_L4_ASSERT 
STM32L4 : map ST HAL assert into MBED assert
 2016-12-19 17:33:13 +00:00
Anna Bridge a915fa86e4 Merge pull request #3390 from jeromecoutant/PR_ST_F3_ASSERT 
STM32F3 : map ST HAL assert into MBED assert
 2016-12-19 17:24:26 +00:00
Anna Bridge 42389c1420 Merge pull request #3389 from jeromecoutant/PR_ST_F2_ASSERT 
STM32F2 : map ST HAL assert into MBED assert
 2016-12-19 17:23:37 +00:00
Anna Bridge 89190fd794 Merge pull request #3381 from jeromecoutant/PR_ST_F1_ASSERT 
STM32F1 : map ST HAL assert into MBED assert
 2016-12-19 17:22:54 +00:00
Mahadevan Mahesh 8ec93ca4a4 KSDK I2C: Update the return value to match the API documentation change 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-12-16 13:16:03 -06:00
Laurent MEUNIER 580d96431e STM32 I2C manage STOP specific case 
In case the user applicaiton makes a mixed usage of unitary function
(start, stop, byte write & read) with SYNC operation (write and read of
data buffers with start and stop management), we need to reset the
STM32 HAL state as it is by-passed by a direct call to STOP
 2016-12-16 08:54:39 +01:00
Laurent MEUNIER 8406a99dc8 STM32 I2C: avoid timeout to be 0 
In continuation of previous IsDeviceReady case, let's
add 1 in case length is 0 (even though not recommended)
 2016-12-16 08:54:39 +01:00
Laurent MEUNIER 37c94a03f0 STM I2C: manage Is Device Ready case 
Some device drivers use a data lenght of 0 to check if device is ready.
STM32 HAL provides a dedicated service for that, so let's use it.
 2016-12-16 08:54:39 +01:00
Laurent MEUNIER c0ca0a7e2c STM I2C - move i2c_read in SYNC part 
just change the place of code to have i2c_read and i2c_write together
 2016-12-16 08:54:39 +01:00
Sam Grove 6b64dbc5fe Merge pull request #3434 from OpenNuvoton/nuvoton 
[NUC472/M453] Fix stuck in lp_ticker_init and other updates
 2016-12-15 10:38:35 -06:00
Sam Grove 19acef97ee Merge pull request #3429 from LMESTM/fix_stm_i2c_fix_init 
Fix stm i2c fix init
 2016-12-15 10:35:13 -06:00
Sam Grove 45fa92dcb3 Merge pull request #3427 from LMESTM/fix_stm_i2c_slave 
Fix stm i2c slave
 2016-12-15 10:33:06 -06:00
Sam Grove cf75543cfa Merge pull request #3424 from bcostm/fix_dma_f4 
STM32F4 - FIX to add the update of hdma->State variable
 2016-12-15 10:32:22 -06:00
Sam Grove 4524c5f917 Merge pull request #3411 from jeromecoutant/PR_ST_L0_ASSERT 
STM32L0 : map ST HAL assert into MBED assert
 2016-12-15 10:30:03 -06:00
Sam Grove 4c2b84a865 Merge pull request #3408 from jeromecoutant/PR_ST_F7_ASSERT 
STM32F7 : map ST HAL assert into MBED assert
 2016-12-15 10:29:34 -06:00
Sam Grove ea555e68a1 Merge pull request #3393 from andreaslarssonublox/ublox_fix_isr_reg_reeval 
ISR register never re-evaluated in HAL_DMA_PollForTransfer for STM32F4
 2016-12-15 10:28:30 -06:00
Sam Grove 0a40444b76 Merge pull request #3379 from jeromecoutant/PR_ST_F0_ASSERT 
STM32F0 : map ST HAL assert into MBED assert
 2016-12-15 10:25:09 -06:00
Sam Grove 38411e917f Merge pull request #3366 from bcostm/dev_nucleo_f412zg 
NUCLEO_F412ZG - Add new platform
 2016-12-15 10:19:51 -06:00
Sam Grove c60f134c0c Merge pull request #3348 from TomoYamanaka/master 
Fix frequency function of CAN driver.
 2016-12-15 10:18:23 -06:00
ccli8 fff8357c1e [NUC472] Fix compile error with Travis CI 
Use MBED_CONF_RTOS_PRESENT to filter out mbedtls alternative for mbed OS 2.
 2016-12-15 11:43:43 +08:00
jeromecoutant e1f4d69109 STM32L0 : correct ST HAL API call 
- RCC init: unused clock was enabled without any init parameters
- ADC: a parameter setting was missing
- GPIO: mode was not allowed by ST HAL API
- tick: init value was too high for 16b
 2016-12-14 11:10:03 +01:00
jeromecoutant 2c5249b196 STM32L0 : refactor stm32l0xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-14 11:09:32 +01:00
jeromecoutant dd88e97e0b STM32F4 : correct ST HAL API call 
- RCC init: one PLL parameter was missing
- GPIO: mode was not allowed by ST HAL API
 2016-12-14 10:03:02 +01:00
Laurent MEUNIER 57eb4a0d1d STM32 F1: move F1 to I2C common code 
Now that F1 HAL has been updated to support required APIs,
the F1 family can also be moved to common code.
 2016-12-14 08:36:30 +01:00
Laurent MEUNIER e7cab5c8dc [STM32] HAL F1: I2C fix btf / rxne cases 
Applying the same fix as in L1 and F4.
This is an alignement to F4 HAL as the same IP is used.
 2016-12-14 08:35:32 +01:00
Laurent MEUNIER f88803b7fe STM32 F1 HAL V1.0.5 
This is a partial update of HAL drivers, especially for I2C driver update
 2016-12-14 08:35:12 +01:00
Sam Lin d4c18b0058 Use __HAL_CAN_CLEAR_FLAG macro clear TSR . 
Redress stm32f1xx_hal_can.h header file comment
 2016-12-14 08:42:55 +08:00
Jared Szechy f941960d1c
Add alternative CAN pins to DISCO_F303VC 2016-12-13 11:20:22 -05:00
Laurent MEUNIER 77e202f064 STM32 I2C: use higher IRQ priority for slave vs. master 2016-12-13 11:59:12 +01:00
cyliangtw e4a5401b9b [NUC472/M453] Fix GCC warnings 2016-12-13 15:41:41 +08:00
ccli8 64e27b2e3d [NUC472/M453] Fix stuck in lp_ticker_init() 2016-12-13 11:10:51 +08:00
cyliangtw ec945db013 [NUC472] Resolve TRNG GCC warning 2016-12-13 11:10:51 +08:00
ccli8 3ff2df1875 [NUC472] Fix compile error for SHA-256 alternative on some condition 
Also include non-issue refinement for SHA-1/SHA-256 alternatives.
 2016-12-13 11:10:51 +08:00
ccli8 6af60f9b32 [NUC472/M453] Fix PWM clock error in BSP driver 2016-12-13 11:10:51 +08:00
ccli8 f796eb5d2d [NUC472/M453] Change UART RTS/CTS to low level active 2016-12-13 11:10:51 +08:00
ccli8 59e38666ae [NUC472/M453] Fix serial async transfer failed as data with is 16/32 2016-12-13 11:10:51 +08:00
Laurent MEUNIER 36a0365d2d STM32 I2C: differentiate HW reset and driver reset 
Make a distinct i2c_reset function as defined in MBED HAL api,
from the i2C_hw_reset which simply drives the HW reset signals
 2016-12-12 17:33:14 +01:00
Laurent MEUNIER 6cdac88a1c SMT32 I2C: initialize clock before configuring PINs 
This is needed especially for F1 family but can apply to all.
 2016-12-12 14:52:11 +01:00
Laurent MEUNIER ee9c8acbe4 STM32 I2C: Initialize hz parameter before reset 
The hz value is used to compute timeouts,
and timeout are used in reset function, so the parameter needs to be
initialized to its default value before being used.
 2016-12-12 14:48:43 +01:00
Laurent MEUNIER 9895bcf130 STM32 I2C: restore slave address in case of reset 2016-12-12 14:44:37 +01:00
bcostm fe73b43a0a FIX to add the update of hdma->State variable 2016-12-12 10:43:25 +01:00
Jared Szechy f5f3dc8143 Enable CAN on DISCO_F303VC 2016-12-11 22:03:29 -05:00
Brian Daniels 6085905658 Renames i2c_api.c for STM32F1 targets to fix IAR exporter. 
The IAR build system does not allow two files to have the same name.
This renames the i2c_api.c file for the STM32F1 family to
i2c_api_stm32f1.c to avoid this issue. The common i2c_api.c file shared
among all ST targets is not actually used for STM32F1 targets as it
protected with an #ifdef guard.
 2016-12-09 12:47:17 -06:00
Martin Kojtal ce9d2526f8 Merge pull request #3409 from jeromecoutant/PR_ST_L1_ASSERT 
STM32L1 : map ST HAL assert into MBED assert
 2016-12-09 15:38:21 +01:00
Martin Kojtal e01366ce8f Merge pull request #3399 from bcostm/fix_issue_3266 
NUCLEO_F103RB - Add SERIAL_FC feature
 2016-12-09 15:37:57 +01:00
Martin Kojtal e00850dbc9 Merge pull request #3382 from kgills/max32620_serial_readable 
[MAX32620] Fixing serial readable function.
 2016-12-09 15:37:25 +01:00
Martin Kojtal 00696e623f Merge pull request #3378 from NXPmicro/K66_ENET 
K66F: Enable LWIP feature
 2016-12-09 15:36:58 +01:00
Martin Kojtal b13954c6b5 Merge pull request #3377 from LMESTM/fix_L152RE_Rcc_Config 
STM32 NUCLEO-L152RE Update system core clock to 32MHz
 2016-12-09 15:36:07 +01:00
Martin Kojtal a3e41f246e Merge pull request #3369 from adustm/disco_f469_newpins 
Add CAN2 missing pins for connector CN12
 2016-12-09 15:35:07 +01:00
Martin Kojtal 04f940de2d Merge pull request #3324 from LMESTM/dev_i2c_common_code 
Dev i2c common code
 2016-12-09 15:30:00 +01:00
Martin Kojtal 163667165e Merge pull request #3312 from NXPmicro/SPI_ASYNCH_API 
K64F: SPI Asynch API implementation
 2016-12-09 15:15:54 +01:00
jeromecoutant 4ea65df99d STM32F3 : correct ST HAL API call 
- CAN: compilation issue with assert enabled
- GPIO: mode was not allowed by ST HAL API
 2016-12-09 14:56:52 +01:00
jeromecoutant 008a12327c STM32F2 : correct ST HAL API call 
- GPIO: mode was not allowed by ST HAL API
 2016-12-09 14:52:51 +01:00
jeromecoutant 0e404c2b48 STM32F1 : correct ST HAL API call 
- GPIO: mode was not allowed by ST HAL API
- PIN map: assert has highlighted an issue for pullup/pulldown setting
- RTC: year after 2000 was not taken into account
 2016-12-09 14:48:26 +01:00
jeromecoutant 3734269326 STM32L4 : correct ST HAL API call 
- ll_utils: compilation issue
- GPIO: mode was not allowed by ST HAL API
 2016-12-09 13:58:22 +01:00
jeromecoutant 3ab5dce41d STM32L1 : correct ST HAL API call 
- RCC init: unused clock was enabled without any init parameters
- RCC init: one PLL parameter was missing
- ADC: a parameter setting was missing to init clock
- GPIO: mode was not allowed by ST HAL API
- ll_utils: compilation issue
 2016-12-09 11:32:08 +01:00
jeromecoutant db9dcb8b40 STM32F7 : correct ST HAL API call 
- RCC init: unused clock was enabled without any init parameters
- RCC init: one PLL parameter was missing
- GPIO: mode was not allowed by ST HAL API
 2016-12-09 09:58:54 +01:00
jeromecoutant 6aef5333bd STM32F0 : correct ST HAL API call 
- CAN: compilation issue with assert enabled
- ADC: init parameter was not allowed by ST HAL API
- GPIO: mode was not allowed by ST HAL API
 2016-12-09 09:44:54 +01:00
ccli8 8c0948d605 [NUC472/M453] Integrate with Travis CI 
1. Add targets into build_travis.py and tests.py.
2. Add target SPI pins into SPI SD test samples.
3. Rename target TOOLCHAIN_GCC_ARM/retarget.c to avoid name collision of compiled retarget.o with platform/retargets.cpp.
 2016-12-09 13:46:38 +08:00
Sam Lin b2f8de8294 Repair the Transmit mailbox (0,1,2) empty interrupt Flag not clear BUG 2016-12-09 10:44:28 +08:00
jeromecoutant 12d2795871 STM32L1 : refactor stm32l1xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-08 17:03:25 +01:00
bcostm 810a980cb7 Add SERIAL_FC in targets.json/device_has field for NUCLEO_F103RB 2016-12-08 16:45:30 +01:00
bcostm 88988b688b Add external declaration of PinMap_UART_RTS/CTS[] const tables 2016-12-08 16:43:26 +01:00
jeromecoutant 64e92a54de STM32L4 : refactor stm32l4xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-08 16:15:47 +01:00
bcostm db8f966a2c Correct A3, A4, A5 pins definitions 2016-12-08 15:57:05 +01:00
bcostm 6787c14d97 Add platform in other python and json files 2016-12-08 15:57:05 +01:00
bcostm 9ce9d1a9e7 Correct SDIO_UART pins configuration 2016-12-08 15:57:05 +01:00
bcostm 49755981dd Add this platform in mbed_rtx.h file 2016-12-08 15:57:05 +01:00
bcostm 5b2946ded9 Correct system clock configuration 2016-12-08 15:57:05 +01:00
bcostm 1796e8cd9a Update hal_tick files 2016-12-08 15:57:05 +01:00
bcostm 19828d8dd5 Add startup and linker files for ARM_STD, ARM_MICRO, IAR 2016-12-08 15:57:05 +01:00
bcostm 2ccbd27baf Add GCC_ARM files and fix errors during GCC build 2016-12-08 15:57:05 +01:00
bcostm f1c6b0f842 Add cmsis, hal_tick, system files 2016-12-08 15:57:05 +01:00
bcostm 3b1fb796c3 Add first pin, port and objects files 2016-12-08 15:57:05 +01:00
jeromecoutant 9dc5cd1266 STM32F7 : refactor stm32f7xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-08 15:54:38 +01:00
Kevin Gillespie a0243cd852 [MAX32620] Fixing serial readable function. 2016-12-07 10:23:26 -06:00
jeromecoutant fa8529dea3 STM32F4 : refactor stm32f4xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-07 15:31:41 +01:00
jeromecoutant d30c34c5d1 STM32F3 : map ST HAL assert into MBED assert 2016-12-07 15:09:55 +01:00
jeromecoutant 06ffb4cf8a STM32F2 : map ST HAL assert into MBED assert 2016-12-07 14:52:24 +01:00
jeromecoutant f0156306ac STM32F0 : map ST HAL assert into MBED assert 2016-12-07 14:13:19 +01:00
jeromecoutant b606267641 STM32F1 : map ST HAL assert into MBED assert 2016-12-07 14:08:06 +01:00
andreas.larsson b5b3bede31 Added tmpisr = regs->ISR; at the end of the while loop to re-evaluate the ISR value 2016-12-07 12:22:31 +01:00
Mahadevan Mahesh 428e8b23c1 K66F: Enable LWIP feature 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-12-06 12:37:02 -06:00
Laurent MEUNIER 8e11541a74 STM32 NUCLEO-L152RE Update system core clock to 32MHz 
Even when HSE is used, it is possible to get a 32MHz system clock
8MHz x PLLMUL=12 % PLLDIV=2 = 32MHz

And we still get 48MHz USB clock:
8MHz x PLLMUL=12 % 2 = 48MHz

This allows to take full benefit of the CPU capability.
 2016-12-06 11:45:19 +01:00
adustm 3fdbe85b00 Add CAN2 missing pins for connector CN12 2016-12-05 18:24:30 +01:00
Martin Kojtal 507956d658 Merge pull request #3317 from jeromecoutant/PR_F429 
NUCLEO_F429ZI has integrated LSE
 2016-12-05 16:53:09 +00:00
TsungtaWu 7d4befa01b DELTA_DFBM_NQ620 default configuration (#3298) 
* Change default SRC setting and add mbed_sdk_init() for DELTA_DFBM_NQ620

Change SRC setting to RC as default to match with hardware config.
mbed_sdk_init() is added for internal debug purpose (experimental)

* remove the redundant #define

Those #define never used.
 2016-12-05 16:43:07 +00:00
Mahadevan Mahesh d5fca6dab0 K64F DSPI Driver: Fix errors where DSPI state is incorrectly kept busy 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-12-05 10:06:14 -06:00
Mahadevan Mahesh 5eb92ea1db K64F SPI Update: Implement Asynch API's for SPI 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-12-05 10:06:08 -06:00
ccli8 7f4881fbb2 [NUC472/M453] Support USB device 2016-12-05 15:12:15 +08:00
Martin Kojtal 7338280f71 Merge pull request #3318 from radhika-raghavendran/master 
Register map changes for RevG
 2016-12-02 15:49:12 +01:00
Martin Kojtal bd499daae8 Merge pull request #3304 from jeromecoutant/PR_L476 
STM32L476: no HSE is present in NUCLEO and DISCO boards
 2016-12-02 15:48:38 +01:00
Martin Kojtal 1c2c121741 Merge pull request #3303 from adustm/stm_fix_interrupt_in 
Fix #2956 #2939 #2957 #2959 #2960: Add HAL_DeInit function in gpio_irq destructor
 2016-12-02 15:47:50 +01:00
Martin Kojtal ab2e869a24 Merge pull request #3157 from SiliconLabs/SiliconLabs-EFR32 
[Silicon Labs] Adding support for EFR32MG1 wireless SoC
 2016-12-02 15:46:35 +01:00
Martin Kojtal 4f314beeee Merge pull request #3309 from OpenNuvoton/nuvoton 
[NUC472/M453] Fix CI failed tests
 2016-12-02 15:33:52 +01:00
Martin Kojtal a2963668f7 Merge pull request #3345 from bcostm/fix_suspend_tick 
STM32 - Remove TIM_IT_UPDATE flag in HAL_Suspend/ResumeTick functions
 2016-12-02 15:28:12 +01:00
Laurent MEUNIER 29b32b84b3 STM32 I2C - 1MHZ frequency is allowed 
So make the assert to cover all possible values
Also assert applies only for I2C_IP_VERSION_V2.
Also in case of I2C_IP_VERSION_V1, the HAL makes the proper
checks and can dynamically scale the frequency in case of
intermediate value.
 2016-12-01 15:20:11 +01:00
Martin Kojtal c8c01f0c5c Merge pull request #3322 from jeromecoutant/PR_DISCO_L0 
DISCO_L053C8 doesn't support LSE
 2016-12-01 13:52:16 +00:00
0xc0170 bcdb86675a ublox eva nina - fix line endings 
Fixes #3346
 2016-12-01 11:19:42 +00:00
tomoyuki yamanaka cea27724d7 Fix frequency function of CAN driver. 
Until now, when the frequency function of CAN driver was executed, signal no output, and the frequency could not be changed.
Since there was an error in the frequency changing procedure I modified it.
 2016-12-01 11:41:20 +09:00
jeromecoutant 7adb7a54de NUCLEO_F429ZI has integrated LSE 2016-11-30 14:43:01 +01:00
bcostm 18dc6f4f81 Remove TIM_IT_UPDATE flag in HAL_Suspend/ResumeTick functions to make LPT tests pass. 2016-11-30 11:31:25 +01:00
jeromecoutant 29771cb891 DISCO_L053C8 doesn't support LSE 2016-11-30 09:02:06 +01:00
jeromecoutant 448f501d4a STM32L476: comments update 2016-11-30 08:52:49 +01:00
jeromecoutant 757944ee24 STM32L476: no HSE is present in NUCLEO and DISCO boards 2016-11-30 08:51:18 +01:00
Laurent MEUNIER 0505a5274d [STM32] enable I2C ASYNCH 
the I2C_ASYNCH feature is  added to all STM32 except
F1 family for now. Will be added when HAL update is done.
 2016-11-30 08:25:44 +01:00
Laurent MEUNIER 3fad50287c [STM32] Make most of the I2C code into a common file 
Since most of the code in i2c_api.c is now relying on STM32 HAL, there
is now a possibility to make a common usage of this code accross families.

The IP version definition is introduced per family, to allow a switch of
functionnalities, especially the frequency management which differs.
BTw, we fix the F0 frequency settings at the same time.

F1 is managed for now as an exception as the HAL API for sequential transmit
/receive is not yet available (coming soon)
 2016-11-30 08:23:13 +01:00
Laurent MEUNIER 23926a2418 [STM32] HAL I2C (V2) sequential transmit / receive 
In case of sequential transmit / receive, there is a need to:
- not use the reload option
- generate a new START on each new transaction

This applies to all HAL supporting the IP version V2.
 2016-11-30 08:23:13 +01:00
Laurent MEUNIER a0722b1086 [STM32] HAL F2: I2C fix btf / rxne cases 
Applying the same fix as in L1 and F4
 2016-11-30 08:23:13 +01:00
Laurent MEUNIER 85a2f7ac49 [STM32] HAL L1: I2C fix btf / rxne cases 
This is an alignement to F4 HAL as the same IP is used.
Next official HAL delivery update hall will include the same alignement.
 2016-11-30 08:23:13 +01:00
Laurent MEUNIER 77364f9fe2 [STM32] HAL L0: I2C / DMA updates 
This is prelim update before official V1.8.0 HAL to the needed HAL API
available as in F0 HAL which is using the same IP.
 2016-11-30 08:23:13 +01:00
Martin Kojtal c57427f77f Merge pull request #3321 from jeromecoutant/PR_L432KC 
no HSE available by default for NUCLEO_L432KC
 2016-11-29 18:25:17 +01:00
Martin Kojtal 519b500d4c Merge pull request #3320 from bcostm/fix_vref_label 
STM32 - Add ADC_VREF label
 2016-11-29 18:24:52 +01:00
Martin Kojtal bd994b3f41 Merge pull request #3302 from bcostm/fix_issue_1685 
STM32F4 AnalogIn - Clear VBATE and TSVREFE bits before configuring ADC channels
 2016-11-29 18:21:14 +01:00
Martin Kojtal d4e23e1048 Merge pull request #3291 from mazgch/patch-1 
Adding mbed enabled Maker board with NINA-B1 and EVA-M8Q
 2016-11-29 18:19:41 +01:00
Martin Kojtal f89bf84beb Merge pull request #3289 from TomoYamanaka/master 
Bug fix of initial value of interrupt edge in "gpio_irq_init" function.
 2016-11-29 18:18:17 +01:00
Martin Kojtal a8ebfaa058 Merge pull request #3288 from LMESTM/dev_spi_asynch_l0l1 
Dev spi asynch l0l1
 2016-11-29 18:17:06 +01:00
Martin Kojtal 42f4843b97 Merge pull request #3241 from NXPmicro/Add_KW41_Support 
Add support for FRDM-KW41
 2016-11-29 18:11:59 +01:00
Martin Kojtal bb2d03f34b Merge pull request #3213 from bcostm/factorize_ticker 
STM32: Refactor us_ticker.c + hal_tick.c files
 2016-11-29 18:10:45 +01:00
Martin Kojtal 93c08f340a Merge pull request #3062 from jamike/TARGET_STM_USBDEVICE_FS 
TARGET_STM :USB device FS
 2016-11-29 18:07:11 +01:00
Radhika 3d23ec0904 Formatting changes as per guidelines 2016-11-29 16:58:33 +05:30
ccli8 e1995dbe79 [NUC472/M453] Fix spi_master_transfer failed as bit width is 32 2016-11-25 15:32:25 +08:00
jeromecoutant a933032a58 no HSE available by default for NUCLEO_L432KC 2016-11-24 11:33:43 +01:00
bcostm 92d39e2390 Add ADC_VREF label 2016-11-24 10:30:23 +01:00
andreas.larsson 9abb7c3777 Updated ARM binary 2016-11-23 17:39:28 +01:00
andreas.larsson 4648ec606b Added updated drivers for GCC, IAR 2016-11-23 15:18:17 +01:00
andreas.larsson c2d09bd6a2 Fixed wrong start params to cbMAIN_startWlan 2016-11-23 11:38:35 +01:00
ccli8 137053343e [M453] Fix button naming error 2016-11-23 14:35:09 +08:00
Martin Kojtal d60f424a7e Merge pull request #3256 from NXPmicro/Include_stddef 
Kinetis SDK: Include stddef.h to fix build errors seen when including…
 2016-11-22 22:20:29 +00:00
Martin Kojtal 905a173a7a Merge pull request #3268 from NXPmicro/Coding_Convention_Changes 
Coding convention changes
 2016-11-22 22:18:41 +00:00
bcostm a3baf2d7bf Add more comment on the modified line 2016-11-22 11:03:44 +01:00
ccli8 d24c71fad9 [NUC472/M453] Correct return of i2c_byte_write() on NAK 2016-11-22 13:45:01 +08:00
ccli8 57a22cd4ab [NUC472/M453] Fix CI I2C EEPROM failed 2016-11-22 09:56:54 +08:00
ccli8 f4890f68f1 [NUC472] Remove SPI MOSI1 and MISO1 pins from pinmap 
These pins are for SPI 2-bit mode (not dual mode) and cannot be for SPI standard use.
 2016-11-22 09:56:54 +08:00
ccli8 6c1fca60a5 [M453] Remove SPI MOSI1 and MISO1 pins from pinmap 
These pins are for SPI 2-bit mode (not dual mode) and cannot be for SPI standard use.
 2016-11-22 09:56:54 +08:00
ccli8 e1acb06d05 [NUC472] Rename variable name in analog-in 2016-11-22 09:56:53 +08:00
ccli8 bb1617c5f8 [M453] Fix EADC module is initialized multiple times 
Also fix EADC module name EADC is hardcoded.
 2016-11-22 09:56:53 +08:00
ccli8 35b2ad5a2c [NUC472] Fix CI tests-api-analogin failed 
1. Fix UNO pins A5-A7 don't support analog-in by replacing ADC with EADC to implement analog-in HAL.
2. Update CLK driver to fix EADC clock divider setting error. Also fix CLK_Idle() together.
 2016-11-22 09:56:53 +08:00
ccli8 fe883d42ab [M453] Fix CI tests-api-analogin failed 
1. Fix ADC convert finish check error.
2. Set ADC Vref to internal by default.
 2016-11-22 09:56:53 +08:00
ccli8 e0f97e5c80 [NUC472/M453] Support separate enable of GPIO IRQ de-bounce 2016-11-22 09:56:53 +08:00
ccli8 657d90db2c [NUC472/M453] Fix I2C issues 
1. Fix error on return of i2c_byte_write().
2. Fix error in zero-length transfer corner case.
 2016-11-22 09:56:53 +08:00
Martin Kojtal 7f44dee6d1 Merge pull request #3278 from bcostm/nucleo-f103rb_ctsrts_pins 
NUCLEO_F103RB - Add RTS/CTS pins for Serial Flow Control
 2016-11-21 23:22:41 +00:00
Martin Kojtal a987cc0bee Merge pull request #3271 from ARMmbed/odin_wifi_default_on 
WiFi: Make WiFi default networking interface on Odin board
 2016-11-21 23:19:02 +00:00
adustm 0219b64af4 fix #2956. Add HAL_DeInit function if gpio_irq destructor 
This allows ci-test-shield tests-api-interruptin to pass
 2016-11-21 15:55:15 +01:00
bcostm 2ae748910b STM32F4 - Clear VBATE and TSVREFE bits before configuring ADC channels 2016-11-21 13:07:26 +01:00
Michael Ammann 76cfccb716 Update PinNames.h 2016-11-21 08:07:58 +01:00
Michael Ammann 5cf34fac8e Add files via upload 2016-11-18 17:17:28 +01:00
Michael Ammann 83379979a2 Create device.h 2016-11-18 17:17:15 +01:00
Michael Ammann 1b59ec0376 Update targets.json 2016-11-18 17:15:08 +01:00
tomoyuki yamanaka b7c901c8e7 Bug fix of initial value of interrupt edge in "gpio_irq_init" function. 
Renesas modified the  initial value of interrupt edge in "gpio_irq_init" function.
The value was "both egde(rise and fall)".So we modified it to "low revel".
 2016-11-18 21:03:00 +09:00
Steven Cooreman 245e2e2e2d Revert "[EFR32] Adding hardware acceleration for mbed TLS" 
This reverts commit c0301b15d2.
 2016-11-18 11:05:36 +01:00
Steven Cooreman ef690f734f Fix broken file 2016-11-18 11:03:38 +01:00
Steven Cooreman ed905b7cc8 Revert "[EFR32] Move the mbedTLS hardware acceleration code to EFR32 family" 
This reverts commit a0f62b1e4f.
 2016-11-18 11:00:57 +01:00
Steven Cooreman ad773716ff [EFR32] Move Nanostack driver to Nanostack folder 
mbed compile doesn't support two different FEATURE_X folders being merged, so we'll have to move our nanostack driver into the Nanostack folder for the time being.
 2016-11-18 10:58:36 +01:00