mirror of https://github.com/ARMmbed/mbed-os.git
K64F: Add support for SERIAL ASYNCH API
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>pull/3438/head
Mahadevan Mahesh
parent
eb3dc2d2c8
commit
ece7b6f05b
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@ -45,4 +45,18 @@
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kDmaRequestMux0SPI0Rx, kDmaRequestMux0SPI1, kDmaRequestMux0SPI2 \
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}
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/* Array for UART DMA TX requests */
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#define UART_DMA_TX_REQUEST_NUMBERS \
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{ \
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kDmaRequestMux0UART0Tx, kDmaRequestMux0UART1Tx, kDmaRequestMux0UART2Tx, \
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kDmaRequestMux0UART3Tx, kDmaRequestMux0UART4, kDmaRequestMux0UART5 \
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}
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/* Array for UART DMA RX requests */
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#define UART_DMA_RX_REQUEST_NUMBERS \
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{ \
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kDmaRequestMux0UART0Rx, kDmaRequestMux0UART1Rx, kDmaRequestMux0UART2Rx, \
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kDmaRequestMux0UART3Rx, kDmaRequestMux0UART4, kDmaRequestMux0UART5 \
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}
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#endif /* _FSL_DMA_REQS_H_ */
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@ -28,6 +28,7 @@
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#include "fsl_uart.h"
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#include "peripheral_clock_defines.h"
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#include "PeripheralPins.h"
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#include "dma_reqs.h"
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#include "fsl_clock_config.h"
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static uint32_t serial_irq_ids[FSL_FEATURE_SOC_UART_COUNT] = {0};
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@ -37,6 +38,11 @@ static UART_Type *const uart_addrs[] = UART_BASE_PTRS;
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/* Array of UART bus clock frequencies */
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static clock_name_t const uart_clocks[] = UART_CLOCK_FREQS;
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/* UART transfer states */
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#define kUART_TxIdle 0
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#define kUART_TxBusy 1
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#define kUART_RxIdle 2
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#define kUART_RxBusy 3
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int stdio_uart_inited = 0;
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serial_t stdio_uart;
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@ -45,8 +51,8 @@ void serial_init(serial_t *obj, PinName tx, PinName rx)
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{
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uint32_t uart_tx = pinmap_peripheral(tx, PinMap_UART_TX);
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uint32_t uart_rx = pinmap_peripheral(rx, PinMap_UART_RX);
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obj->index = pinmap_merge(uart_tx, uart_rx);
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MBED_ASSERT((int)obj->index != NC);
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obj->serial.index = pinmap_merge(uart_tx, uart_rx);
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MBED_ASSERT((int)obj->serial.index != NC);
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uart_config_t config;
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@ -55,40 +61,47 @@ void serial_init(serial_t *obj, PinName tx, PinName rx)
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config.enableTx = false;
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config.enableRx = false;
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UART_Init(uart_addrs[obj->index], &config, CLOCK_GetFreq(uart_clocks[obj->index]));
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UART_Init(uart_addrs[obj->serial.index], &config, CLOCK_GetFreq(uart_clocks[obj->serial.index]));
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pinmap_pinout(tx, PinMap_UART_TX);
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pinmap_pinout(rx, PinMap_UART_RX);
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if (tx != NC) {
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UART_EnableTx(uart_addrs[obj->index], true);
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UART_EnableTx(uart_addrs[obj->serial.index], true);
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pin_mode(tx, PullUp);
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}
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if (rx != NC) {
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UART_EnableRx(uart_addrs[obj->index], true);
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UART_EnableRx(uart_addrs[obj->serial.index], true);
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pin_mode(rx, PullUp);
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}
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if (obj->index == STDIO_UART) {
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if (obj->serial.index == STDIO_UART) {
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stdio_uart_inited = 1;
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memcpy(&stdio_uart, obj, sizeof(serial_t));
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}
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obj->serial.uartDmaRx.dmaUsageState = DMA_USAGE_OPPORTUNISTIC;;
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obj->serial.txstate = kUART_TxIdle;
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obj->serial.rxstate = kUART_RxIdle;
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/* Zero the handle. */
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memset(&(obj->serial.uart_transfer_handle), 0, sizeof(obj->serial.uart_transfer_handle));
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}
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void serial_free(serial_t *obj)
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{
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UART_Deinit(uart_addrs[obj->index]);
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serial_irq_ids[obj->index] = 0;
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UART_Deinit(uart_addrs[obj->serial.index]);
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serial_irq_ids[obj->serial.index] = 0;
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}
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void serial_baud(serial_t *obj, int baudrate)
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{
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UART_SetBaudRate(uart_addrs[obj->index], (uint32_t)baudrate, CLOCK_GetFreq(uart_clocks[obj->index]));
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UART_SetBaudRate(uart_addrs[obj->serial.index], (uint32_t)baudrate, CLOCK_GetFreq(uart_clocks[obj->serial.index]));
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}
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void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
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{
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UART_Type *base = uart_addrs[obj->index];
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UART_Type *base = uart_addrs[obj->serial.index];
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uint8_t temp;
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/* Set bit count and parity mode. */
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temp = base->C1 & ~(UART_C1_PE_MASK | UART_C1_PT_MASK | UART_C1_M_MASK);
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@ -174,7 +187,7 @@ void uart5_irq()
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void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
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{
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irq_handler = handler;
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serial_irq_ids[obj->index] = id;
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serial_irq_ids[obj->serial.index] = id;
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}
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void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
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@ -182,7 +195,7 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
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IRQn_Type uart_irqs[] = UART_RX_TX_IRQS;
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uint32_t vector = 0;
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switch (obj->index) {
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switch (obj->serial.index) {
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case 0:
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vector = (uint32_t)&uart0_irq;
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break;
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@ -208,42 +221,42 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
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if (enable) {
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switch (irq) {
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case RxIrq:
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UART_EnableInterrupts(uart_addrs[obj->index], kUART_RxDataRegFullInterruptEnable);
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UART_EnableInterrupts(uart_addrs[obj->serial.index], kUART_RxDataRegFullInterruptEnable);
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break;
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case TxIrq:
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UART_EnableInterrupts(uart_addrs[obj->index], kUART_TxDataRegEmptyInterruptEnable);
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UART_EnableInterrupts(uart_addrs[obj->serial.index], kUART_TxDataRegEmptyInterruptEnable);
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break;
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default:
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break;
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}
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NVIC_SetVector(uart_irqs[obj->index], vector);
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NVIC_EnableIRQ(uart_irqs[obj->index]);
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NVIC_SetVector(uart_irqs[obj->serial.index], vector);
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NVIC_EnableIRQ(uart_irqs[obj->serial.index]);
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} else { // disable
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int all_disabled = 0;
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SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
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switch (irq) {
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case RxIrq:
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UART_DisableInterrupts(uart_addrs[obj->index], kUART_RxDataRegFullInterruptEnable);
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UART_DisableInterrupts(uart_addrs[obj->serial.index], kUART_RxDataRegFullInterruptEnable);
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break;
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case TxIrq:
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UART_DisableInterrupts(uart_addrs[obj->index], kUART_TxDataRegEmptyInterruptEnable);
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UART_DisableInterrupts(uart_addrs[obj->serial.index], kUART_TxDataRegEmptyInterruptEnable);
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break;
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default:
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break;
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}
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switch (other_irq) {
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case RxIrq:
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all_disabled = ((UART_GetEnabledInterrupts(uart_addrs[obj->index]) & kUART_RxDataRegFullInterruptEnable) == 0);
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all_disabled = ((UART_GetEnabledInterrupts(uart_addrs[obj->serial.index]) & kUART_RxDataRegFullInterruptEnable) == 0);
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break;
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case TxIrq:
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all_disabled = ((UART_GetEnabledInterrupts(uart_addrs[obj->index]) & kUART_TxDataRegEmptyInterruptEnable) == 0);
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all_disabled = ((UART_GetEnabledInterrupts(uart_addrs[obj->serial.index]) & kUART_TxDataRegEmptyInterruptEnable) == 0);
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break;
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default:
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break;
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}
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if (all_disabled)
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NVIC_DisableIRQ(uart_irqs[obj->index]);
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NVIC_DisableIRQ(uart_irqs[obj->serial.index]);
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}
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}
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@ -251,7 +264,7 @@ int serial_getc(serial_t *obj)
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{
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while (!serial_readable(obj));
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uint8_t data;
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data = UART_ReadByte(uart_addrs[obj->index]);
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data = UART_ReadByte(uart_addrs[obj->serial.index]);
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return data;
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}
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@ -259,22 +272,22 @@ int serial_getc(serial_t *obj)
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void serial_putc(serial_t *obj, int c)
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{
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while (!serial_writable(obj));
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UART_WriteByte(uart_addrs[obj->index], (uint8_t)c);
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UART_WriteByte(uart_addrs[obj->serial.index], (uint8_t)c);
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}
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int serial_readable(serial_t *obj)
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{
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uint32_t status_flags = UART_GetStatusFlags(uart_addrs[obj->index]);
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uint32_t status_flags = UART_GetStatusFlags(uart_addrs[obj->serial.index]);
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if (status_flags & kUART_RxOverrunFlag)
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UART_ClearStatusFlags(uart_addrs[obj->index], kUART_RxOverrunFlag);
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UART_ClearStatusFlags(uart_addrs[obj->serial.index], kUART_RxOverrunFlag);
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return (status_flags & kUART_RxDataRegFullFlag);
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}
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int serial_writable(serial_t *obj)
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{
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uint32_t status_flags = UART_GetStatusFlags(uart_addrs[obj->index]);
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uint32_t status_flags = UART_GetStatusFlags(uart_addrs[obj->serial.index]);
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if (status_flags & kUART_RxOverrunFlag)
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UART_ClearStatusFlags(uart_addrs[obj->index], kUART_RxOverrunFlag);
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UART_ClearStatusFlags(uart_addrs[obj->serial.index], kUART_RxOverrunFlag);
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return (status_flags & kUART_TxDataRegEmptyFlag);
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}
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@ -289,12 +302,12 @@ void serial_pinout_tx(PinName tx)
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void serial_break_set(serial_t *obj)
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{
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uart_addrs[obj->index]->C2 |= UART_C2_SBK_MASK;
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uart_addrs[obj->serial.index]->C2 |= UART_C2_SBK_MASK;
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}
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void serial_break_clear(serial_t *obj)
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{
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uart_addrs[obj->index]->C2 &= ~UART_C2_SBK_MASK;
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uart_addrs[obj->serial.index]->C2 &= ~UART_C2_SBK_MASK;
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}
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#if DEVICE_SERIAL_FC
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@ -307,24 +320,24 @@ void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, Pi
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switch(type) {
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case FlowControlRTS:
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pinmap_pinout(rxflow, PinMap_UART_RTS);
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uart_addrs[obj->index]->MODEM &= ~UART_MODEM_TXCTSE_MASK;
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uart_addrs[obj->index]->MODEM |= UART_MODEM_RXRTSE_MASK;
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uart_addrs[obj->serial.index]->MODEM &= ~UART_MODEM_TXCTSE_MASK;
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uart_addrs[obj->serial.index]->MODEM |= UART_MODEM_RXRTSE_MASK;
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break;
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case FlowControlCTS:
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pinmap_pinout(txflow, PinMap_UART_CTS);
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uart_addrs[obj->index]->MODEM &= ~UART_MODEM_RXRTSE_MASK;
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uart_addrs[obj->index]->MODEM |= UART_MODEM_TXCTSE_MASK;
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uart_addrs[obj->serial.index]->MODEM &= ~UART_MODEM_RXRTSE_MASK;
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uart_addrs[obj->serial.index]->MODEM |= UART_MODEM_TXCTSE_MASK;
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break;
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case FlowControlRTSCTS:
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pinmap_pinout(rxflow, PinMap_UART_RTS);
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pinmap_pinout(txflow, PinMap_UART_CTS);
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uart_addrs[obj->index]->MODEM |= UART_MODEM_TXCTSE_MASK | UART_MODEM_RXRTSE_MASK;
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uart_addrs[obj->serial.index]->MODEM |= UART_MODEM_TXCTSE_MASK | UART_MODEM_RXRTSE_MASK;
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break;
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case FlowControlNone:
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uart_addrs[obj->index]->MODEM &= ~(UART_MODEM_TXCTSE_MASK | UART_MODEM_RXRTSE_MASK);
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uart_addrs[obj->serial.index]->MODEM &= ~(UART_MODEM_TXCTSE_MASK | UART_MODEM_RXRTSE_MASK);
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break;
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default:
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@ -334,4 +347,366 @@ void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, Pi
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#endif
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static void serial_send_asynch(serial_t *obj)
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{
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uart_transfer_t sendXfer;
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/*Setup send transfer*/
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sendXfer.data = obj->tx_buff.buffer;
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sendXfer.dataSize = obj->tx_buff.length;
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if (obj->serial.uartDmaRx.dmaUsageState == DMA_USAGE_ALLOCATED ||
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obj->serial.uartDmaRx.dmaUsageState == DMA_USAGE_TEMPORARY_ALLOCATED) {
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UART_SendEDMA(uart_addrs[obj->serial.index], &obj->serial.uart_dma_handle, &sendXfer);
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} else {
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UART_TransferSendNonBlocking(uart_addrs[obj->serial.index], &obj->serial.uart_transfer_handle, &sendXfer);
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}
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}
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static void serial_receive_asynch(serial_t *obj)
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{
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uart_transfer_t receiveXfer;
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/*Setup send transfer*/
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receiveXfer.data = obj->rx_buff.buffer;
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receiveXfer.dataSize = obj->rx_buff.length;
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if (obj->serial.uartDmaRx.dmaUsageState == DMA_USAGE_ALLOCATED ||
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obj->serial.uartDmaRx.dmaUsageState == DMA_USAGE_TEMPORARY_ALLOCATED) {
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UART_ReceiveEDMA(uart_addrs[obj->serial.index], &obj->serial.uart_dma_handle, &receiveXfer);
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} else {
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UART_TransferReceiveNonBlocking(uart_addrs[obj->serial.index], &obj->serial.uart_transfer_handle, &receiveXfer, NULL);
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}
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}
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static bool serial_allocate_dma(serial_t *obj, uint32_t handler)
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{
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dma_request_source_t dma_rx_requests[] = UART_DMA_RX_REQUEST_NUMBERS;
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dma_request_source_t dma_tx_requests[] = UART_DMA_TX_REQUEST_NUMBERS;
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edma_config_t userConfig;
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/* Allocate the UART RX DMA channel */
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obj->serial.uartDmaRx.dmaChannel = dma_channel_allocate(dma_rx_requests[obj->serial.index]);
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if (obj->serial.uartDmaRx.dmaChannel == DMA_ERROR_OUT_OF_CHANNELS) {
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return false;
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}
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/* Allocate the UART TX DMA channel */
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obj->serial.uartDmaTx.dmaChannel = dma_channel_allocate(dma_tx_requests[obj->serial.index]);
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if (obj->serial.uartDmaTx.dmaChannel == DMA_ERROR_OUT_OF_CHANNELS) {
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dma_channel_free(obj->serial.uartDmaRx.dmaChannel);
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return false;
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}
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/* EDMA init*/
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/*
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* userConfig.enableRoundRobinArbitration = false;
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* userConfig.enableHaltOnError = true;
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* userConfig.enableContinuousLinkMode = false;
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* userConfig.enableDebugMode = false;
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*/
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EDMA_GetDefaultConfig(&userConfig);
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EDMA_Init(DMA0, &userConfig);
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memset(&(obj->serial.uartDmaTx.handle), 0, sizeof(obj->serial.uartDmaTx.handle));
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memset(&(obj->serial.uartDmaRx.handle), 0, sizeof(obj->serial.uartDmaRx.handle));
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EDMA_CreateHandle(&(obj->serial.uartDmaRx.handle), DMA0, obj->serial.uartDmaRx.dmaChannel);
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EDMA_CreateHandle(&(obj->serial.uartDmaTx.handle), DMA0, obj->serial.uartDmaTx.dmaChannel);
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UART_TransferCreateHandleEDMA(uart_addrs[obj->serial.index], &obj->serial.uart_dma_handle, (uart_edma_transfer_callback_t)handler,
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NULL, &obj->serial.uartDmaTx.handle, &obj->serial.uartDmaRx.handle);
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return true;
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}
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void serial_enable_dma(serial_t *obj, uint32_t handler, DMAUsage state)
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{
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dma_init();
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if (state == DMA_USAGE_ALWAYS && obj->serial.uartDmaRx.dmaUsageState != DMA_USAGE_ALLOCATED) {
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/* Try to allocate channels */
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if (serial_allocate_dma(obj, handler)) {
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obj->serial.uartDmaRx.dmaUsageState = DMA_USAGE_ALLOCATED;
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} else {
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obj->serial.uartDmaRx.dmaUsageState = state;
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}
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} else if (state == DMA_USAGE_OPPORTUNISTIC) {
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if (obj->serial.uartDmaRx.dmaUsageState == DMA_USAGE_ALLOCATED) {
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/* Channels have already been allocated previously by an ALWAYS state, so after this transfer, we will release them */
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obj->serial.uartDmaRx.dmaUsageState = DMA_USAGE_TEMPORARY_ALLOCATED;
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} else {
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/* Try to allocate channels */
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if (serial_allocate_dma(obj, handler)) {
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obj->serial.uartDmaRx.dmaUsageState = DMA_USAGE_TEMPORARY_ALLOCATED;
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} else {
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obj->serial.uartDmaRx.dmaUsageState = state;
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}
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}
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} else if (state == DMA_USAGE_NEVER) {
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/* If channels are allocated, get rid of them */
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if (obj->serial.uartDmaRx.dmaUsageState == DMA_USAGE_ALLOCATED) {
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dma_channel_free(obj->serial.uartDmaRx.dmaChannel);
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dma_channel_free(obj->serial.uartDmaRx.dmaChannel);
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}
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obj->serial.uartDmaRx.dmaUsageState = DMA_USAGE_NEVER;
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}
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}
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void serial_enable_event(serial_t *obj, int event, uint8_t enable)
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{
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// Keep track of the requested events.
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if (enable) {
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obj->serial.events |= event;
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} else {
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obj->serial.events &= ~event;
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}
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}
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static void serial_tx_buffer_set(serial_t *obj, void *tx, int tx_length, uint8_t width) {
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(void)width;
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// Exit if a transmit is already on-going
|
||||
if (serial_tx_active(obj)) {
|
||||
return;
|
||||
}
|
||||
|
||||
obj->tx_buff.buffer = tx;
|
||||
obj->tx_buff.length = tx_length;
|
||||
obj->tx_buff.pos = 0;
|
||||
}
|
||||
|
||||
int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint)
|
||||
{
|
||||
// Check that a buffer has indeed been set up
|
||||
MBED_ASSERT(tx != (void*)0);
|
||||
|
||||
if (tx_length == 0) return 0;
|
||||
|
||||
if (serial_tx_active(obj)) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
// Set up buffer
|
||||
serial_tx_buffer_set(obj, (void *)tx, tx_length, tx_width);
|
||||
|
||||
// Set up events
|
||||
serial_enable_event(obj, SERIAL_EVENT_TX_ALL, false);
|
||||
serial_enable_event(obj, event, true);
|
||||
|
||||
/* If using DMA, allocate channels only if they have not already been allocated */
|
||||
if (hint != DMA_USAGE_NEVER) {
|
||||
/* User requested to transfer using DMA */
|
||||
serial_enable_dma(obj, handler, hint);
|
||||
|
||||
/* Check if DMA setup was successful */
|
||||
if (obj->serial.uartDmaRx.dmaUsageState != DMA_USAGE_ALLOCATED && obj->serial.uartDmaRx.dmaUsageState != DMA_USAGE_TEMPORARY_ALLOCATED) {
|
||||
/* Set up an interrupt transfer as DMA is unavailable */
|
||||
if (obj->serial.uart_transfer_handle.callback == 0) {
|
||||
UART_TransferCreateHandle(uart_addrs[obj->serial.index], &obj->serial.uart_transfer_handle, (uart_transfer_callback_t)handler, NULL);
|
||||
}
|
||||
}
|
||||
} else {
|
||||
/* User requested to transfer using interrupts */
|
||||
/* Disable the DMA */
|
||||
serial_enable_dma(obj, handler, hint);
|
||||
|
||||
/* Set up the interrupt transfer */
|
||||
if (obj->serial.uart_transfer_handle.callback == 0) {
|
||||
UART_TransferCreateHandle(uart_addrs[obj->serial.index], &obj->serial.uart_transfer_handle, (uart_transfer_callback_t)handler, NULL);
|
||||
}
|
||||
}
|
||||
|
||||
/* Start the transfer */
|
||||
serial_send_asynch(obj);
|
||||
obj->serial.txstate = kUART_TxBusy;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void serial_rx_buffer_set(serial_t *obj, void *rx, int rx_length, uint8_t width)
|
||||
{
|
||||
// We only support byte buffers for now
|
||||
MBED_ASSERT(width == 8);
|
||||
|
||||
if (serial_rx_active(obj)) return;
|
||||
|
||||
obj->rx_buff.buffer = rx;
|
||||
obj->rx_buff.length = rx_length;
|
||||
obj->rx_buff.pos = 0;
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/* Character match is currently not supported */
|
||||
void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint)
|
||||
{
|
||||
// Check that a buffer has indeed been set up
|
||||
MBED_ASSERT(rx != (void*)0);
|
||||
if (rx_length == 0) return;
|
||||
|
||||
if (serial_rx_active(obj)) {
|
||||
return;
|
||||
}
|
||||
|
||||
// Set up buffer
|
||||
serial_rx_buffer_set(obj,(void*) rx, rx_length, rx_width);
|
||||
|
||||
// Set up events
|
||||
serial_enable_event(obj, SERIAL_EVENT_RX_ALL, false);
|
||||
serial_enable_event(obj, event, true);
|
||||
|
||||
//obj->char_match = char_match;
|
||||
|
||||
/* If using DMA, allocate channels only if they have not already been allocated */
|
||||
if (hint != DMA_USAGE_NEVER) {
|
||||
/* User requested to transfer using DMA */
|
||||
serial_enable_dma(obj, handler, hint);
|
||||
|
||||
/* Check if DMA setup was successful */
|
||||
if (obj->serial.uartDmaRx.dmaUsageState != DMA_USAGE_ALLOCATED && obj->serial.uartDmaRx.dmaUsageState != DMA_USAGE_TEMPORARY_ALLOCATED) {
|
||||
/* Set up an interrupt transfer as DMA is unavailable */
|
||||
if (obj->serial.uart_transfer_handle.callback == 0) {
|
||||
UART_TransferCreateHandle(uart_addrs[obj->serial.index], &obj->serial.uart_transfer_handle, (uart_transfer_callback_t)handler, NULL);
|
||||
}
|
||||
}
|
||||
|
||||
} else {
|
||||
/* User requested to transfer using interrupts */
|
||||
/* Disable the DMA */
|
||||
serial_enable_dma(obj, handler, hint);
|
||||
|
||||
/* Set up the interrupt transfer */
|
||||
if (obj->serial.uart_transfer_handle.callback == 0) {
|
||||
UART_TransferCreateHandle(uart_addrs[obj->serial.index], &obj->serial.uart_transfer_handle, (uart_transfer_callback_t)handler, NULL);
|
||||
}
|
||||
}
|
||||
|
||||
/* Start the transfer */
|
||||
serial_receive_asynch(obj);
|
||||
obj->serial.rxstate = kUART_RxBusy;
|
||||
}
|
||||
|
||||
uint8_t serial_tx_active(serial_t *obj)
|
||||
{
|
||||
if (obj->serial.txstate == kUART_TxIdle) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
uint8_t serial_rx_active(serial_t *obj)
|
||||
{
|
||||
if (obj->serial.rxstate == kUART_RxIdle) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
int serial_irq_handler_asynch(serial_t *obj)
|
||||
{
|
||||
int status = 0;
|
||||
//uint8_t *buf = (uint8_t*)obj->rx_buff.buffer;
|
||||
uint32_t status_flags = UART_GetStatusFlags(uart_addrs[obj->serial.index]);
|
||||
|
||||
/* Determine whether the current scenario is DMA or IRQ, and act accordingly */
|
||||
if (obj->serial.uartDmaRx.dmaUsageState == DMA_USAGE_ALLOCATED || obj->serial.uartDmaRx.dmaUsageState == DMA_USAGE_TEMPORARY_ALLOCATED) {
|
||||
/* DMA implementation */
|
||||
if ((obj->serial.txstate != kUART_TxIdle) && (obj->serial.uart_dma_handle.txState == kUART_TxIdle)) {
|
||||
obj->serial.txstate = kUART_TxIdle;
|
||||
status |= SERIAL_EVENT_TX_COMPLETE;
|
||||
}
|
||||
|
||||
if ((obj->serial.rxstate != kUART_RxIdle) && (obj->serial.uart_dma_handle.rxState == kUART_RxIdle)) {
|
||||
obj->serial.rxstate = kUART_RxIdle;
|
||||
status |= SERIAL_EVENT_RX_COMPLETE;
|
||||
}
|
||||
|
||||
/* Release the dma channels if they were opportunistically allocated */
|
||||
if (obj->serial.uartDmaRx.dmaUsageState == DMA_USAGE_TEMPORARY_ALLOCATED) {
|
||||
/* Ensure both TX and RX channels are idle before freeing them */
|
||||
if ((obj->serial.uart_dma_handle.txState == kUART_TxIdle) && (obj->serial.uart_dma_handle.rxState == kUART_RxIdle)) {
|
||||
dma_channel_free(obj->serial.uartDmaRx.dmaChannel);
|
||||
dma_channel_free(obj->serial.uartDmaTx.dmaChannel);
|
||||
obj->serial.uartDmaRx.dmaUsageState = DMA_USAGE_OPPORTUNISTIC;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
/* Interrupt implementation */
|
||||
if ((obj->serial.txstate != kUART_TxIdle) && (obj->serial.uart_transfer_handle.txState == kUART_TxIdle)) {
|
||||
obj->serial.txstate = kUART_TxIdle;
|
||||
status |= SERIAL_EVENT_TX_COMPLETE;
|
||||
}
|
||||
|
||||
if ((obj->serial.rxstate != kUART_RxIdle) && (obj->serial.uart_transfer_handle.rxState == kUART_RxIdle)) {
|
||||
obj->serial.rxstate = kUART_RxIdle;
|
||||
status |= SERIAL_EVENT_RX_COMPLETE;
|
||||
}
|
||||
}
|
||||
#if 0
|
||||
if (obj->char_match != SERIAL_RESERVED_CHAR_MATCH){
|
||||
/* Check for character match event */
|
||||
if (buf[obj->rx_buff.length - 1] == obj->char_match) {
|
||||
status |= SERIAL_EVENT_RX_CHARACTER_MATCH;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
if (status_flags & kUART_RxOverrunFlag) {
|
||||
UART_ClearStatusFlags(uart_addrs[obj->serial.index], kUART_RxOverrunFlag);
|
||||
status |= SERIAL_EVENT_RX_OVERRUN_ERROR;
|
||||
}
|
||||
|
||||
if (status_flags & kUART_FramingErrorFlag) {
|
||||
UART_ClearStatusFlags(uart_addrs[obj->serial.index], kUART_FramingErrorFlag);
|
||||
status |= SERIAL_EVENT_RX_FRAMING_ERROR;
|
||||
}
|
||||
|
||||
if (status_flags & kUART_ParityErrorFlag) {
|
||||
UART_ClearStatusFlags(uart_addrs[obj->serial.index], kUART_ParityErrorFlag);
|
||||
status |= SERIAL_EVENT_RX_PARITY_ERROR;
|
||||
}
|
||||
|
||||
return status & obj->serial.events;
|
||||
}
|
||||
|
||||
void serial_tx_abort_asynch(serial_t *obj)
|
||||
{
|
||||
if (obj->serial.uartDmaRx.dmaUsageState == DMA_USAGE_ALLOCATED || obj->serial.uartDmaRx.dmaUsageState == DMA_USAGE_TEMPORARY_ALLOCATED) {
|
||||
UART_TransferAbortSendEDMA(uart_addrs[obj->serial.index], &obj->serial.uart_dma_handle);
|
||||
/* Release the dma channels if they were opportunistically allocated */
|
||||
if (obj->serial.uartDmaRx.dmaUsageState == DMA_USAGE_TEMPORARY_ALLOCATED) {
|
||||
/* Ensure both TX and RX channels are idle before freeing them */
|
||||
if ((obj->serial.uart_dma_handle.txState == kUART_TxIdle) && (obj->serial.uart_dma_handle.rxState == kUART_RxIdle)) {
|
||||
dma_channel_free(obj->serial.uartDmaRx.dmaChannel);
|
||||
dma_channel_free(obj->serial.uartDmaTx.dmaChannel);
|
||||
obj->serial.uartDmaRx.dmaUsageState = DMA_USAGE_OPPORTUNISTIC;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
UART_TransferAbortSend(uart_addrs[obj->serial.index], &obj->serial.uart_transfer_handle);
|
||||
}
|
||||
}
|
||||
|
||||
void serial_rx_abort_asynch(serial_t *obj)
|
||||
{
|
||||
if (obj->serial.uartDmaRx.dmaUsageState == DMA_USAGE_ALLOCATED || obj->serial.uartDmaRx.dmaUsageState == DMA_USAGE_TEMPORARY_ALLOCATED) {
|
||||
UART_TransferAbortReceiveEDMA(uart_addrs[obj->serial.index], &obj->serial.uart_dma_handle);
|
||||
/* Release the dma channels if they were opportunistically allocated */
|
||||
if (obj->serial.uartDmaRx.dmaUsageState == DMA_USAGE_TEMPORARY_ALLOCATED) {
|
||||
/* Ensure both TX and RX channels are idle before freeing them */
|
||||
if ((obj->serial.uart_dma_handle.txState == kUART_TxIdle) && (obj->serial.uart_dma_handle.rxState == kUART_RxIdle)) {
|
||||
dma_channel_free(obj->serial.uartDmaRx.dmaChannel);
|
||||
dma_channel_free(obj->serial.uartDmaTx.dmaChannel);
|
||||
obj->serial.uartDmaRx.dmaUsageState = DMA_USAGE_OPPORTUNISTIC;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
UART_TransferAbortReceive(uart_addrs[obj->serial.index], &obj->serial.uart_transfer_handle);
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -23,6 +23,9 @@
|
|||
#if DEVICE_SPI_ASYNCH
|
||||
#include "fsl_dspi_edma.h"
|
||||
#endif
|
||||
#if DEVICE_SERIAL_ASYNCH
|
||||
#include "fsl_uart_edma.h"
|
||||
#endif
|
||||
#include "dma_api_hal.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
|
@ -46,6 +49,15 @@ struct pwmout_s {
|
|||
|
||||
struct serial_s {
|
||||
int index;
|
||||
#if DEVICE_SERIAL_ASYNCH
|
||||
uint8_t txstate;
|
||||
uint8_t rxstate;
|
||||
uint32_t events;
|
||||
uart_handle_t uart_transfer_handle;
|
||||
uart_edma_handle_t uart_dma_handle;
|
||||
dma_options_t uartDmaTx;
|
||||
dma_options_t uartDmaRx;
|
||||
#endif
|
||||
};
|
||||
|
||||
struct analogin_s {
|
||||
|
|
|
|||
|
|
@ -576,7 +576,7 @@
|
|||
"macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED"],
|
||||
"inherits": ["Target"],
|
||||
"detect_code": ["0240"],
|
||||
"device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "STORAGE", "TRNG"],
|
||||
"device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "STORAGE", "TRNG"],
|
||||
"features": ["LWIP", "STORAGE"],
|
||||
"release_versions": ["2", "5"],
|
||||
"device_name": "MK64FN1M0xxx12"
|
||||
|
|
@ -588,7 +588,7 @@
|
|||
"extra_labels": ["Freescale", "MCUXpresso_MCUS", "KSDK2_MCUS", "KPSDK_MCUS", "KPSDK_CODE", "MCU_K64F"],
|
||||
"is_disk_virtual": true,
|
||||
"macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "TARGET_K64F"],
|
||||
"device_has": ["I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "RTC", "SERIAL", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES"],
|
||||
"device_has": ["I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES"],
|
||||
"device_name": "MK64FN1M0xxx12"
|
||||
},
|
||||
"HEXIWEAR": {
|
||||
|
|
@ -600,7 +600,7 @@
|
|||
"is_disk_virtual": true,
|
||||
"default_toolchain": "ARM",
|
||||
"detect_code": ["0214"],
|
||||
"device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
|
||||
"device_has": ["ANALOGIN", "ANALOGOUT", "ERROR_RED", "I2C", "I2CSLAVE", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE", "STDIO_MESSAGES", "TRNG"],
|
||||
"default_lib": "std",
|
||||
"release_versions": ["2", "5"],
|
||||
"device_name": "MK64FN1M0xxx12"
|
||||
|
|
|
|||
Loading…
Reference in New Issue