mirror of https://github.com/ARMmbed/mbed-os.git
Merge pull request #3268 from NXPmicro/Coding_Convention_Changes
Coding convention changespull/3321/head
commit
905a173a7a
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@ -14,7 +14,8 @@ extern "C" {
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extern char Image$$RW_IRAM1$$ZI$$Limit[];
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extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
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extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3)
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{
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uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
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uint32_t sp_limit = __current_sp();
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@ -32,11 +32,13 @@
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extern void InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler);
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void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
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void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
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{
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InstallIRQHandler(IRQn, vector);
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}
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uint32_t NVIC_GetVector(IRQn_Type IRQn) {
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uint32_t NVIC_GetVector(IRQn_Type IRQn)
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{
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uint32_t *vectors = (uint32_t*)SCB->VTOR;
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return vectors[IRQn + 16];
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}
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@ -27,7 +27,8 @@ static float pwm_clock_mhz;
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/* Array of FTM peripheral base address. */
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static FTM_Type *const ftm_addrs[] = FTM_BASE_PTRS;
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void pwmout_init(pwmout_t* obj, PinName pin) {
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void pwmout_init(pwmout_t* obj, PinName pin)
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{
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PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
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MBED_ASSERT(pwm != (PWMName)NC);
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@ -72,11 +73,13 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
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pinmap_pinout(pin, PinMap_PWM);
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}
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void pwmout_free(pwmout_t* obj) {
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void pwmout_free(pwmout_t* obj)
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{
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FTM_Deinit(ftm_addrs[obj->pwm_name >> TPM_SHIFT]);
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}
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void pwmout_write(pwmout_t* obj, float value) {
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void pwmout_write(pwmout_t* obj, float value)
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{
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if (value < 0.0f) {
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value = 0.0f;
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} else if (value > 1.0f) {
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@ -93,7 +96,8 @@ void pwmout_write(pwmout_t* obj, float value) {
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FTM_SetSoftwareTrigger(base, true);
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}
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float pwmout_read(pwmout_t* obj) {
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float pwmout_read(pwmout_t* obj)
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{
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FTM_Type *base = ftm_addrs[obj->pwm_name >> TPM_SHIFT];
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uint16_t count = (base->CONTROLS[obj->pwm_name & 0xF].CnV) & FTM_CnV_VAL_MASK;
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uint16_t mod = base->MOD & FTM_MOD_MOD_MASK;
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@ -104,16 +108,19 @@ float pwmout_read(pwmout_t* obj) {
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return (v > 1.0f) ? (1.0f) : (v);
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}
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void pwmout_period(pwmout_t* obj, float seconds) {
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void pwmout_period(pwmout_t* obj, float seconds)
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{
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pwmout_period_us(obj, seconds * 1000000.0f);
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}
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void pwmout_period_ms(pwmout_t* obj, int ms) {
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void pwmout_period_ms(pwmout_t* obj, int ms)
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{
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pwmout_period_us(obj, ms * 1000);
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}
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// Set the PWM period, keeping the duty cycle the same.
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void pwmout_period_us(pwmout_t* obj, int us) {
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void pwmout_period_us(pwmout_t* obj, int us)
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{
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FTM_Type *base = ftm_addrs[obj->pwm_name >> TPM_SHIFT];
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float dc = pwmout_read(obj);
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@ -122,15 +129,18 @@ void pwmout_period_us(pwmout_t* obj, int us) {
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pwmout_write(obj, dc);
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}
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void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
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void pwmout_pulsewidth(pwmout_t* obj, float seconds)
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{
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pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
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}
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void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
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void pwmout_pulsewidth_ms(pwmout_t* obj, int ms)
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{
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pwmout_pulsewidth_us(obj, ms * 1000);
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}
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void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
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void pwmout_pulsewidth_us(pwmout_t* obj, int us)
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{
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FTM_Type *base = ftm_addrs[obj->pwm_name >> TPM_SHIFT];
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uint32_t value = (uint32_t)(pwm_clock_mhz * (float)us);
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@ -41,7 +41,8 @@ static clock_name_t const uart_clocks[] = UART_CLOCK_FREQS;
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int stdio_uart_inited = 0;
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serial_t stdio_uart;
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void serial_init(serial_t *obj, PinName tx, PinName rx) {
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void serial_init(serial_t *obj, PinName tx, PinName rx)
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{
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uint32_t uart_tx = pinmap_peripheral(tx, PinMap_UART_TX);
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uint32_t uart_rx = pinmap_peripheral(rx, PinMap_UART_RX);
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obj->index = pinmap_merge(uart_tx, uart_rx);
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@ -74,16 +75,19 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
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}
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}
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void serial_free(serial_t *obj) {
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void serial_free(serial_t *obj)
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{
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UART_Deinit(uart_addrs[obj->index]);
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serial_irq_ids[obj->index] = 0;
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}
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void serial_baud(serial_t *obj, int baudrate) {
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void serial_baud(serial_t *obj, int baudrate)
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{
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UART_SetBaudRate(uart_addrs[obj->index], (uint32_t)baudrate, CLOCK_GetFreq(uart_clocks[obj->index]));
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}
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void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
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void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
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{
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UART_Type *base = uart_addrs[obj->index];
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uint8_t temp;
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/* Set bit count and parity mode. */
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@ -111,7 +115,8 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
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/******************************************************************************
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* INTERRUPTS HANDLING
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******************************************************************************/
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static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint32_t index) {
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static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint32_t index)
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{
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UART_Type *base = uart_addrs[index];
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/* If RX overrun. */
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@ -130,36 +135,43 @@ static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint
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}
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}
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void uart0_irq() {
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void uart0_irq()
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{
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uint32_t status_flags = UART0->S1;
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uart_irq((status_flags & kUART_TxDataRegEmptyFlag), (status_flags & kUART_RxDataRegFullFlag), 0);
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}
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void uart1_irq() {
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void uart1_irq()
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{
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uint32_t status_flags = UART1->S1;
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uart_irq((status_flags & UART_S1_TDRE_MASK), (status_flags & UART_S1_RDRF_MASK), 1);
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}
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void uart2_irq() {
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void uart2_irq()
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{
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uint32_t status_flags = UART2->S1;
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uart_irq((status_flags & UART_S1_TDRE_MASK), (status_flags & UART_S1_RDRF_MASK), 2);
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}
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void uart3_irq() {
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void uart3_irq()
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{
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uint32_t status_flags = UART3->S1;
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uart_irq((status_flags & UART_S1_TDRE_MASK), (status_flags & UART_S1_RDRF_MASK), 3);
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}
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void uart4_irq() {
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void uart4_irq()
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{
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uint32_t status_flags = UART4->S1;
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uart_irq((status_flags & UART_S1_TDRE_MASK), (status_flags & UART_S1_RDRF_MASK), 4);
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}
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void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
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void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
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{
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irq_handler = handler;
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serial_irq_ids[obj->index] = id;
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}
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void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
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void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
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{
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IRQn_Type uart_irqs[] = UART_RX_TX_IRQS;
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uint32_t vector = 0;
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@ -225,7 +237,8 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
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}
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}
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int serial_getc(serial_t *obj) {
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int serial_getc(serial_t *obj)
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{
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while (!serial_readable(obj));
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uint8_t data;
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data = UART_ReadByte(uart_addrs[obj->index]);
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@ -233,37 +246,44 @@ int serial_getc(serial_t *obj) {
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return data;
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}
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void serial_putc(serial_t *obj, int c) {
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void serial_putc(serial_t *obj, int c)
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{
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while (!serial_writable(obj));
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UART_WriteByte(uart_addrs[obj->index], (uint8_t)c);
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}
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int serial_readable(serial_t *obj) {
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int serial_readable(serial_t *obj)
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{
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uint32_t status_flags = UART_GetStatusFlags(uart_addrs[obj->index]);
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if (status_flags & kUART_RxOverrunFlag)
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UART_ClearStatusFlags(uart_addrs[obj->index], kUART_RxOverrunFlag);
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return (status_flags & kUART_RxDataRegFullFlag);
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}
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int serial_writable(serial_t *obj) {
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int serial_writable(serial_t *obj)
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{
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uint32_t status_flags = UART_GetStatusFlags(uart_addrs[obj->index]);
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if (status_flags & kUART_RxOverrunFlag)
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UART_ClearStatusFlags(uart_addrs[obj->index], kUART_RxOverrunFlag);
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return (status_flags & kUART_TxDataRegEmptyFlag);
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}
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void serial_clear(serial_t *obj) {
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void serial_clear(serial_t *obj)
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{
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}
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void serial_pinout_tx(PinName tx) {
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void serial_pinout_tx(PinName tx)
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{
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pinmap_pinout(tx, PinMap_UART_TX);
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}
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void serial_break_set(serial_t *obj) {
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void serial_break_set(serial_t *obj)
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{
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uart_addrs[obj->index]->C2 |= UART_C2_SBK_MASK;
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}
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void serial_break_clear(serial_t *obj) {
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void serial_break_clear(serial_t *obj)
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{
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uart_addrs[obj->index]->C2 &= ~UART_C2_SBK_MASK;
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}
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@ -32,7 +32,8 @@ static SPI_Type *const spi_address[] = SPI_BASE_PTRS;
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/* Array of SPI bus clock frequencies */
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static clock_name_t const spi_clocks[] = SPI_CLOCK_FREQS;
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void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
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void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
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{
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// determine the SPI to use
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uint32_t spi_mosi = pinmap_peripheral(mosi, PinMap_SPI_MOSI);
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uint32_t spi_miso = pinmap_peripheral(miso, PinMap_SPI_MISO);
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@ -53,11 +54,13 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
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}
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}
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void spi_free(spi_t *obj) {
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void spi_free(spi_t *obj)
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{
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DSPI_Deinit(spi_address[obj->instance]);
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}
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void spi_format(spi_t *obj, int bits, int mode, int slave) {
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void spi_format(spi_t *obj, int bits, int mode, int slave)
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{
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dspi_master_config_t master_config;
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dspi_slave_config_t slave_config;
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@ -84,18 +87,21 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
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}
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}
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void spi_frequency(spi_t *obj, int hz) {
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void spi_frequency(spi_t *obj, int hz)
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{
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uint32_t busClock = CLOCK_GetFreq(spi_clocks[obj->instance]);
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DSPI_MasterSetBaudRate(spi_address[obj->instance], kDSPI_Ctar0, (uint32_t)hz, busClock);
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//Half clock period delay after SPI transfer
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DSPI_MasterSetDelayTimes(spi_address[obj->instance], kDSPI_Ctar0, kDSPI_LastSckToPcs, busClock, 500000000 / hz);
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}
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static inline int spi_readable(spi_t * obj) {
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static inline int spi_readable(spi_t * obj)
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{
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return (DSPI_GetStatusFlags(spi_address[obj->instance]) & kDSPI_RxFifoDrainRequestFlag);
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}
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int spi_master_write(spi_t *obj, int value) {
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int spi_master_write(spi_t *obj, int value)
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{
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dspi_command_data_config_t command;
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uint32_t rx_data;
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DSPI_GetDefaultDataCommandConfig(&command);
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@ -112,11 +118,13 @@ int spi_master_write(spi_t *obj, int value) {
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return rx_data & 0xffff;
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}
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int spi_slave_receive(spi_t *obj) {
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int spi_slave_receive(spi_t *obj)
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{
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return spi_readable(obj);
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}
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int spi_slave_read(spi_t *obj) {
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int spi_slave_read(spi_t *obj)
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{
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uint32_t rx_data;
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while (!spi_readable(obj));
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@ -125,7 +133,8 @@ int spi_slave_read(spi_t *obj) {
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return rx_data & 0xffff;
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}
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void spi_slave_write(spi_t *obj, int value) {
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void spi_slave_write(spi_t *obj, int value)
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{
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DSPI_SlaveWriteDataBlocking(spi_address[obj->instance], (uint32_t)value);
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}
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@ -21,7 +21,8 @@
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static int us_ticker_inited = 0;
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void us_ticker_init(void) {
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void us_ticker_init(void)
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{
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if (us_ticker_inited) {
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return;
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}
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@ -51,7 +52,8 @@ void us_ticker_init(void) {
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}
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uint32_t us_ticker_read() {
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uint32_t us_ticker_read()
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{
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if (!us_ticker_inited) {
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us_ticker_init();
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}
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@ -59,15 +61,18 @@ uint32_t us_ticker_read() {
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return ~(PIT_GetCurrentTimerCount(PIT, kPIT_Chnl_1));
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}
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void us_ticker_disable_interrupt(void) {
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void us_ticker_disable_interrupt(void)
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{
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PIT_DisableInterrupts(PIT, kPIT_Chnl_3, kPIT_TimerInterruptEnable);
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}
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void us_ticker_clear_interrupt(void) {
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void us_ticker_clear_interrupt(void)
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{
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PIT_ClearStatusFlags(PIT, kPIT_Chnl_3, PIT_TFLG_TIF_MASK);
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}
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void us_ticker_set_interrupt(timestamp_t timestamp) {
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void us_ticker_set_interrupt(timestamp_t timestamp)
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{
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int delta = (int)(timestamp - us_ticker_read());
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if (delta <= 0) {
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// This event was in the past.
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|
|
@ -14,7 +14,8 @@ extern "C" {
|
|||
|
||||
extern char Image$$RW_IRAM1$$ZI$$Limit[];
|
||||
|
||||
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
|
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extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3)
|
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{
|
||||
uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
|
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uint32_t sp_limit = __current_sp();
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|
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|
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@ -32,11 +32,13 @@
|
|||
|
||||
extern void InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler);
|
||||
|
||||
void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
|
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void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
|
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{
|
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InstallIRQHandler(IRQn, vector);
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}
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|
||||
uint32_t __NVIC_GetVector(IRQn_Type IRQn) {
|
||||
uint32_t __NVIC_GetVector(IRQn_Type IRQn)
|
||||
{
|
||||
uint32_t *vectors = (uint32_t*)SCB->VTOR;
|
||||
return vectors[IRQn + 16];
|
||||
}
|
||||
|
|
|
|||
|
|
@ -27,7 +27,8 @@ static float pwm_clock_mhz;
|
|||
/* Array of FTM peripheral base address. */
|
||||
static FTM_Type *const ftm_addrs[] = FTM_BASE_PTRS;
|
||||
|
||||
void pwmout_init(pwmout_t* obj, PinName pin) {
|
||||
void pwmout_init(pwmout_t* obj, PinName pin)
|
||||
{
|
||||
PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
|
||||
MBED_ASSERT(pwm != (PWMName)NC);
|
||||
|
||||
|
|
@ -72,11 +73,13 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
|
|||
pinmap_pinout(pin, PinMap_PWM);
|
||||
}
|
||||
|
||||
void pwmout_free(pwmout_t* obj) {
|
||||
void pwmout_free(pwmout_t* obj)
|
||||
{
|
||||
FTM_Deinit(ftm_addrs[obj->pwm_name >> TPM_SHIFT]);
|
||||
}
|
||||
|
||||
void pwmout_write(pwmout_t* obj, float value) {
|
||||
void pwmout_write(pwmout_t* obj, float value)
|
||||
{
|
||||
if (value < 0.0f) {
|
||||
value = 0.0f;
|
||||
} else if (value > 1.0f) {
|
||||
|
|
@ -93,7 +96,8 @@ void pwmout_write(pwmout_t* obj, float value) {
|
|||
FTM_SetSoftwareTrigger(base, true);
|
||||
}
|
||||
|
||||
float pwmout_read(pwmout_t* obj) {
|
||||
float pwmout_read(pwmout_t* obj)
|
||||
{
|
||||
FTM_Type *base = ftm_addrs[obj->pwm_name >> TPM_SHIFT];
|
||||
uint16_t count = (base->CONTROLS[obj->pwm_name & 0xF].CnV) & FTM_CnV_VAL_MASK;
|
||||
uint16_t mod = base->MOD & FTM_MOD_MOD_MASK;
|
||||
|
|
@ -104,16 +108,19 @@ float pwmout_read(pwmout_t* obj) {
|
|||
return (v > 1.0f) ? (1.0f) : (v);
|
||||
}
|
||||
|
||||
void pwmout_period(pwmout_t* obj, float seconds) {
|
||||
void pwmout_period(pwmout_t* obj, float seconds)
|
||||
{
|
||||
pwmout_period_us(obj, seconds * 1000000.0f);
|
||||
}
|
||||
|
||||
void pwmout_period_ms(pwmout_t* obj, int ms) {
|
||||
void pwmout_period_ms(pwmout_t* obj, int ms)
|
||||
{
|
||||
pwmout_period_us(obj, ms * 1000);
|
||||
}
|
||||
|
||||
// Set the PWM period, keeping the duty cycle the same.
|
||||
void pwmout_period_us(pwmout_t* obj, int us) {
|
||||
void pwmout_period_us(pwmout_t* obj, int us)
|
||||
{
|
||||
FTM_Type *base = ftm_addrs[obj->pwm_name >> TPM_SHIFT];
|
||||
float dc = pwmout_read(obj);
|
||||
|
||||
|
|
@ -122,15 +129,18 @@ void pwmout_period_us(pwmout_t* obj, int us) {
|
|||
pwmout_write(obj, dc);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
|
||||
void pwmout_pulsewidth(pwmout_t* obj, float seconds)
|
||||
{
|
||||
pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
|
||||
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms)
|
||||
{
|
||||
pwmout_pulsewidth_us(obj, ms * 1000);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
|
||||
void pwmout_pulsewidth_us(pwmout_t* obj, int us)
|
||||
{
|
||||
FTM_Type *base = ftm_addrs[obj->pwm_name >> TPM_SHIFT];
|
||||
uint32_t value = (uint32_t)(pwm_clock_mhz * (float)us);
|
||||
|
||||
|
|
|
|||
|
|
@ -40,7 +40,8 @@ static clock_name_t const uart_clocks[] = LPUART_CLOCK_FREQS;
|
|||
int stdio_uart_inited = 0;
|
||||
serial_t stdio_uart;
|
||||
|
||||
void serial_init(serial_t *obj, PinName tx, PinName rx) {
|
||||
void serial_init(serial_t *obj, PinName tx, PinName rx)
|
||||
{
|
||||
uint32_t uart_tx = pinmap_peripheral(tx, PinMap_UART_TX);
|
||||
uint32_t uart_rx = pinmap_peripheral(rx, PinMap_UART_RX);
|
||||
obj->index = pinmap_merge(uart_tx, uart_rx);
|
||||
|
|
@ -75,16 +76,19 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
|
|||
}
|
||||
}
|
||||
|
||||
void serial_free(serial_t *obj) {
|
||||
void serial_free(serial_t *obj)
|
||||
{
|
||||
LPUART_Deinit(uart_addrs[obj->index]);
|
||||
serial_irq_ids[obj->index] = 0;
|
||||
}
|
||||
|
||||
void serial_baud(serial_t *obj, int baudrate) {
|
||||
void serial_baud(serial_t *obj, int baudrate)
|
||||
{
|
||||
LPUART_SetBaudRate(uart_addrs[obj->index], (uint32_t)baudrate, CLOCK_GetFreq(uart_clocks[obj->index]));
|
||||
}
|
||||
|
||||
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
|
||||
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
|
||||
{
|
||||
LPUART_Type *base = uart_addrs[obj->index];
|
||||
uint8_t temp;
|
||||
/* Set bit count and parity mode. */
|
||||
|
|
@ -114,7 +118,8 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
|
|||
/******************************************************************************
|
||||
* INTERRUPTS HANDLING
|
||||
******************************************************************************/
|
||||
static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint32_t index) {
|
||||
static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint32_t index)
|
||||
{
|
||||
LPUART_Type *base = uart_addrs[index];
|
||||
|
||||
/* If RX overrun. */
|
||||
|
|
@ -134,37 +139,44 @@ static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint
|
|||
}
|
||||
}
|
||||
|
||||
void uart0_irq() {
|
||||
void uart0_irq()
|
||||
{
|
||||
uint32_t status_flags = LPUART0->STAT;
|
||||
uart_irq((status_flags & kLPUART_TxDataRegEmptyFlag), (status_flags & kLPUART_RxDataRegFullFlag), 0);
|
||||
}
|
||||
|
||||
void uart1_irq() {
|
||||
void uart1_irq()
|
||||
{
|
||||
uint32_t status_flags = LPUART1->STAT;
|
||||
uart_irq((status_flags & kLPUART_TxDataRegEmptyFlag), (status_flags & kLPUART_RxDataRegFullFlag), 1);
|
||||
}
|
||||
|
||||
void uart2_irq() {
|
||||
void uart2_irq()
|
||||
{
|
||||
uint32_t status_flags = LPUART2->STAT;
|
||||
uart_irq((status_flags & kLPUART_TxDataRegEmptyFlag), (status_flags & kLPUART_RxDataRegFullFlag), 2);
|
||||
}
|
||||
|
||||
void uart3_irq() {
|
||||
void uart3_irq()
|
||||
{
|
||||
uint32_t status_flags = LPUART3->STAT;
|
||||
uart_irq((status_flags & kLPUART_TxDataRegEmptyFlag), (status_flags & kLPUART_RxDataRegFullFlag), 3);
|
||||
}
|
||||
|
||||
void uart4_irq() {
|
||||
void uart4_irq()
|
||||
{
|
||||
uint32_t status_flags = LPUART4->STAT;
|
||||
uart_irq((status_flags & kLPUART_TxDataRegEmptyFlag), (status_flags & kLPUART_RxDataRegFullFlag), 4);
|
||||
}
|
||||
|
||||
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
|
||||
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
|
||||
{
|
||||
irq_handler = handler;
|
||||
serial_irq_ids[obj->index] = id;
|
||||
}
|
||||
|
||||
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
|
||||
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
|
||||
{
|
||||
IRQn_Type uart_irqs[] = LPUART_RX_TX_IRQS;
|
||||
uint32_t vector = 0;
|
||||
|
||||
|
|
@ -230,44 +242,52 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
|
|||
}
|
||||
}
|
||||
|
||||
int serial_getc(serial_t *obj) {
|
||||
int serial_getc(serial_t *obj)
|
||||
{
|
||||
uint8_t data;
|
||||
|
||||
LPUART_ReadBlocking(uart_addrs[obj->index], &data, 1);
|
||||
return data;
|
||||
}
|
||||
|
||||
void serial_putc(serial_t *obj, int c) {
|
||||
void serial_putc(serial_t *obj, int c)
|
||||
{
|
||||
while (!serial_writable(obj));
|
||||
LPUART_WriteByte(uart_addrs[obj->index], (uint8_t)c);
|
||||
}
|
||||
|
||||
int serial_readable(serial_t *obj) {
|
||||
int serial_readable(serial_t *obj)
|
||||
{
|
||||
uint32_t status_flags = LPUART_GetStatusFlags(uart_addrs[obj->index]);
|
||||
if (status_flags & kLPUART_RxOverrunFlag)
|
||||
LPUART_ClearStatusFlags(uart_addrs[obj->index], kLPUART_RxOverrunFlag);
|
||||
return (status_flags & kLPUART_RxDataRegFullFlag);
|
||||
}
|
||||
|
||||
int serial_writable(serial_t *obj) {
|
||||
int serial_writable(serial_t *obj)
|
||||
{
|
||||
uint32_t status_flags = LPUART_GetStatusFlags(uart_addrs[obj->index]);
|
||||
if (status_flags & kLPUART_RxOverrunFlag)
|
||||
LPUART_ClearStatusFlags(uart_addrs[obj->index], kLPUART_RxOverrunFlag);
|
||||
return (status_flags & kLPUART_TxDataRegEmptyFlag);
|
||||
}
|
||||
|
||||
void serial_clear(serial_t *obj) {
|
||||
void serial_clear(serial_t *obj)
|
||||
{
|
||||
}
|
||||
|
||||
void serial_pinout_tx(PinName tx) {
|
||||
void serial_pinout_tx(PinName tx)
|
||||
{
|
||||
pinmap_pinout(tx, PinMap_UART_TX);
|
||||
}
|
||||
|
||||
void serial_break_set(serial_t *obj) {
|
||||
void serial_break_set(serial_t *obj)
|
||||
{
|
||||
uart_addrs[obj->index]->CTRL |= LPUART_CTRL_SBK_MASK;
|
||||
}
|
||||
|
||||
void serial_break_clear(serial_t *obj) {
|
||||
void serial_break_clear(serial_t *obj)
|
||||
{
|
||||
uart_addrs[obj->index]->CTRL &= ~LPUART_CTRL_SBK_MASK;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -32,7 +32,8 @@ static SPI_Type *const spi_address[] = SPI_BASE_PTRS;
|
|||
/* Array of SPI bus clock frequencies */
|
||||
static clock_name_t const spi_clocks[] = SPI_CLOCK_FREQS;
|
||||
|
||||
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
|
||||
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
|
||||
{
|
||||
// determine the SPI to use
|
||||
uint32_t spi_mosi = pinmap_peripheral(mosi, PinMap_SPI_MOSI);
|
||||
uint32_t spi_miso = pinmap_peripheral(miso, PinMap_SPI_MISO);
|
||||
|
|
@ -53,11 +54,13 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
|
|||
}
|
||||
}
|
||||
|
||||
void spi_free(spi_t *obj) {
|
||||
void spi_free(spi_t *obj)
|
||||
{
|
||||
DSPI_Deinit(spi_address[obj->instance]);
|
||||
}
|
||||
|
||||
void spi_format(spi_t *obj, int bits, int mode, int slave) {
|
||||
void spi_format(spi_t *obj, int bits, int mode, int slave)
|
||||
{
|
||||
|
||||
dspi_master_config_t master_config;
|
||||
dspi_slave_config_t slave_config;
|
||||
|
|
@ -84,18 +87,21 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
|
|||
}
|
||||
}
|
||||
|
||||
void spi_frequency(spi_t *obj, int hz) {
|
||||
void spi_frequency(spi_t *obj, int hz)
|
||||
{
|
||||
uint32_t busClock = CLOCK_GetFreq(spi_clocks[obj->instance]);
|
||||
DSPI_MasterSetBaudRate(spi_address[obj->instance], kDSPI_Ctar0, (uint32_t)hz, busClock);
|
||||
//Half clock period delay after SPI transfer
|
||||
DSPI_MasterSetDelayTimes(spi_address[obj->instance], kDSPI_Ctar0, kDSPI_LastSckToPcs, busClock, 500000000 / hz);
|
||||
}
|
||||
|
||||
static inline int spi_readable(spi_t * obj) {
|
||||
static inline int spi_readable(spi_t * obj)
|
||||
{
|
||||
return (DSPI_GetStatusFlags(spi_address[obj->instance]) & kDSPI_RxFifoDrainRequestFlag);
|
||||
}
|
||||
|
||||
int spi_master_write(spi_t *obj, int value) {
|
||||
int spi_master_write(spi_t *obj, int value)
|
||||
{
|
||||
dspi_command_data_config_t command;
|
||||
uint32_t rx_data;
|
||||
DSPI_GetDefaultDataCommandConfig(&command);
|
||||
|
|
@ -112,11 +118,13 @@ int spi_master_write(spi_t *obj, int value) {
|
|||
return rx_data & 0xffff;
|
||||
}
|
||||
|
||||
int spi_slave_receive(spi_t *obj) {
|
||||
int spi_slave_receive(spi_t *obj)
|
||||
{
|
||||
return spi_readable(obj);
|
||||
}
|
||||
|
||||
int spi_slave_read(spi_t *obj) {
|
||||
int spi_slave_read(spi_t *obj)
|
||||
{
|
||||
uint32_t rx_data;
|
||||
|
||||
while (!spi_readable(obj));
|
||||
|
|
@ -125,7 +133,8 @@ int spi_slave_read(spi_t *obj) {
|
|||
return rx_data & 0xffff;
|
||||
}
|
||||
|
||||
void spi_slave_write(spi_t *obj, int value) {
|
||||
void spi_slave_write(spi_t *obj, int value)
|
||||
{
|
||||
DSPI_SlaveWriteDataBlocking(spi_address[obj->instance], (uint32_t)value);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -21,7 +21,8 @@
|
|||
|
||||
static int us_ticker_inited = 0;
|
||||
|
||||
void us_ticker_init(void) {
|
||||
void us_ticker_init(void)
|
||||
{
|
||||
if (us_ticker_inited) {
|
||||
return;
|
||||
}
|
||||
|
|
@ -51,7 +52,8 @@ void us_ticker_init(void) {
|
|||
}
|
||||
|
||||
|
||||
uint32_t us_ticker_read() {
|
||||
uint32_t us_ticker_read()
|
||||
{
|
||||
if (!us_ticker_inited) {
|
||||
us_ticker_init();
|
||||
}
|
||||
|
|
@ -59,15 +61,18 @@ uint32_t us_ticker_read() {
|
|||
return ~(PIT_GetCurrentTimerCount(PIT, kPIT_Chnl_1));
|
||||
}
|
||||
|
||||
void us_ticker_disable_interrupt(void) {
|
||||
void us_ticker_disable_interrupt(void)
|
||||
{
|
||||
PIT_DisableInterrupts(PIT, kPIT_Chnl_3, kPIT_TimerInterruptEnable);
|
||||
}
|
||||
|
||||
void us_ticker_clear_interrupt(void) {
|
||||
void us_ticker_clear_interrupt(void)
|
||||
{
|
||||
PIT_ClearStatusFlags(PIT, kPIT_Chnl_3, PIT_TFLG_TIF_MASK);
|
||||
}
|
||||
|
||||
void us_ticker_set_interrupt(timestamp_t timestamp) {
|
||||
void us_ticker_set_interrupt(timestamp_t timestamp)
|
||||
{
|
||||
int delta = (int)(timestamp - us_ticker_read());
|
||||
if (delta <= 0) {
|
||||
// This event was in the past.
|
||||
|
|
|
|||
|
|
@ -14,7 +14,8 @@ extern "C" {
|
|||
|
||||
extern char Image$$RW_IRAM1$$ZI$$Limit[];
|
||||
|
||||
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
|
||||
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3)
|
||||
{
|
||||
uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
|
||||
uint32_t sp_limit = __current_sp();
|
||||
|
||||
|
|
|
|||
|
|
@ -32,11 +32,13 @@
|
|||
|
||||
extern void InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler);
|
||||
|
||||
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
|
||||
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
|
||||
{
|
||||
InstallIRQHandler(IRQn, vector);
|
||||
}
|
||||
|
||||
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
|
||||
uint32_t NVIC_GetVector(IRQn_Type IRQn)
|
||||
{
|
||||
uint32_t *vectors = (uint32_t*)SCB->VTOR;
|
||||
return vectors[IRQn + 16];
|
||||
}
|
||||
|
|
|
|||
|
|
@ -27,7 +27,8 @@ static float pwm_clock_mhz;
|
|||
/* Array of TPM peripheral base address. */
|
||||
static TPM_Type *const tpm_addrs[] = TPM_BASE_PTRS;
|
||||
|
||||
void pwmout_init(pwmout_t* obj, PinName pin) {
|
||||
void pwmout_init(pwmout_t* obj, PinName pin)
|
||||
{
|
||||
PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
|
||||
MBED_ASSERT(pwm != (PWMName)NC);
|
||||
|
||||
|
|
@ -72,11 +73,13 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
|
|||
pinmap_pinout(pin, PinMap_PWM);
|
||||
}
|
||||
|
||||
void pwmout_free(pwmout_t* obj) {
|
||||
void pwmout_free(pwmout_t* obj)
|
||||
{
|
||||
TPM_Deinit(tpm_addrs[obj->pwm_name >> TPM_SHIFT]);
|
||||
}
|
||||
|
||||
void pwmout_write(pwmout_t* obj, float value) {
|
||||
void pwmout_write(pwmout_t* obj, float value)
|
||||
{
|
||||
if (value < 0.0f) {
|
||||
value = 0.0f;
|
||||
} else if (value > 1.0f) {
|
||||
|
|
@ -91,7 +94,8 @@ void pwmout_write(pwmout_t* obj, float value) {
|
|||
base->CNT = 0;
|
||||
}
|
||||
|
||||
float pwmout_read(pwmout_t* obj) {
|
||||
float pwmout_read(pwmout_t* obj)
|
||||
{
|
||||
TPM_Type *base = tpm_addrs[obj->pwm_name >> TPM_SHIFT];
|
||||
uint16_t count = (base->CONTROLS[obj->pwm_name & 0xF].CnV) & TPM_CnV_VAL_MASK;
|
||||
uint16_t mod = base->MOD & TPM_MOD_MOD_MASK;
|
||||
|
|
@ -102,16 +106,19 @@ float pwmout_read(pwmout_t* obj) {
|
|||
return (v > 1.0f) ? (1.0f) : (v);
|
||||
}
|
||||
|
||||
void pwmout_period(pwmout_t* obj, float seconds) {
|
||||
void pwmout_period(pwmout_t* obj, float seconds)
|
||||
{
|
||||
pwmout_period_us(obj, seconds * 1000000.0f);
|
||||
}
|
||||
|
||||
void pwmout_period_ms(pwmout_t* obj, int ms) {
|
||||
void pwmout_period_ms(pwmout_t* obj, int ms)
|
||||
{
|
||||
pwmout_period_us(obj, ms * 1000);
|
||||
}
|
||||
|
||||
// Set the PWM period, keeping the duty cycle the same.
|
||||
void pwmout_period_us(pwmout_t* obj, int us) {
|
||||
void pwmout_period_us(pwmout_t* obj, int us)
|
||||
{
|
||||
TPM_Type *base = tpm_addrs[obj->pwm_name >> TPM_SHIFT];
|
||||
float dc = pwmout_read(obj);
|
||||
|
||||
|
|
@ -120,15 +127,18 @@ void pwmout_period_us(pwmout_t* obj, int us) {
|
|||
pwmout_write(obj, dc);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
|
||||
void pwmout_pulsewidth(pwmout_t* obj, float seconds)
|
||||
{
|
||||
pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
|
||||
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms)
|
||||
{
|
||||
pwmout_pulsewidth_us(obj, ms * 1000);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
|
||||
void pwmout_pulsewidth_us(pwmout_t* obj, int us)
|
||||
{
|
||||
TPM_Type *base = tpm_addrs[obj->pwm_name >> TPM_SHIFT];
|
||||
uint32_t value = (uint32_t)(pwm_clock_mhz * (float)us);
|
||||
|
||||
|
|
|
|||
|
|
@ -40,7 +40,8 @@ static clock_name_t const uart_clocks[] = LPUART_CLOCK_FREQS;
|
|||
int stdio_uart_inited = 0;
|
||||
serial_t stdio_uart;
|
||||
|
||||
void serial_init(serial_t *obj, PinName tx, PinName rx) {
|
||||
void serial_init(serial_t *obj, PinName tx, PinName rx)
|
||||
{
|
||||
uint32_t uart_tx = pinmap_peripheral(tx, PinMap_UART_TX);
|
||||
uint32_t uart_rx = pinmap_peripheral(rx, PinMap_UART_RX);
|
||||
obj->index = pinmap_merge(uart_tx, uart_rx);
|
||||
|
|
@ -79,16 +80,19 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
|
|||
}
|
||||
}
|
||||
|
||||
void serial_free(serial_t *obj) {
|
||||
void serial_free(serial_t *obj)
|
||||
{
|
||||
LPUART_Deinit(uart_addrs[obj->index]);
|
||||
serial_irq_ids[obj->index] = 0;
|
||||
}
|
||||
|
||||
void serial_baud(serial_t *obj, int baudrate) {
|
||||
void serial_baud(serial_t *obj, int baudrate)
|
||||
{
|
||||
LPUART_SetBaudRate(uart_addrs[obj->index], (uint32_t)baudrate, CLOCK_GetFreq(uart_clocks[obj->index]));
|
||||
}
|
||||
|
||||
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
|
||||
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
|
||||
{
|
||||
LPUART_Type *base = uart_addrs[obj->index];
|
||||
uint8_t temp;
|
||||
/* Set bit count and parity mode. */
|
||||
|
|
@ -118,7 +122,8 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
|
|||
/******************************************************************************
|
||||
* INTERRUPTS HANDLING
|
||||
******************************************************************************/
|
||||
static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint32_t index) {
|
||||
static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint32_t index)
|
||||
{
|
||||
LPUART_Type *base = uart_addrs[index];
|
||||
|
||||
/* If RX overrun. */
|
||||
|
|
@ -138,22 +143,26 @@ static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint
|
|||
}
|
||||
}
|
||||
|
||||
void uart0_irq() {
|
||||
void uart0_irq()
|
||||
{
|
||||
uint32_t status_flags = LPUART0->STAT;
|
||||
uart_irq((status_flags & kLPUART_TxDataRegEmptyFlag), (status_flags & kLPUART_RxDataRegFullFlag), 0);
|
||||
}
|
||||
|
||||
void uart1_irq() {
|
||||
void uart1_irq()
|
||||
{
|
||||
uint32_t status_flags = LPUART1->STAT;
|
||||
uart_irq((status_flags & kLPUART_TxDataRegEmptyFlag), (status_flags & kLPUART_RxDataRegFullFlag), 1);
|
||||
}
|
||||
|
||||
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
|
||||
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
|
||||
{
|
||||
irq_handler = handler;
|
||||
serial_irq_ids[obj->index] = id;
|
||||
}
|
||||
|
||||
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
|
||||
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
|
||||
{
|
||||
IRQn_Type uart_irqs[] = LPUART_RX_TX_IRQS;
|
||||
uint32_t vector = 0;
|
||||
|
||||
|
|
@ -210,44 +219,52 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
|
|||
}
|
||||
}
|
||||
|
||||
int serial_getc(serial_t *obj) {
|
||||
int serial_getc(serial_t *obj)
|
||||
{
|
||||
uint8_t data;
|
||||
|
||||
LPUART_ReadBlocking(uart_addrs[obj->index], &data, 1);
|
||||
return data;
|
||||
}
|
||||
|
||||
void serial_putc(serial_t *obj, int c) {
|
||||
void serial_putc(serial_t *obj, int c)
|
||||
{
|
||||
while (!serial_writable(obj));
|
||||
LPUART_WriteByte(uart_addrs[obj->index], (uint8_t)c);
|
||||
}
|
||||
|
||||
int serial_readable(serial_t *obj) {
|
||||
int serial_readable(serial_t *obj)
|
||||
{
|
||||
uint32_t status_flags = LPUART_GetStatusFlags(uart_addrs[obj->index]);
|
||||
if (status_flags & kLPUART_RxOverrunFlag)
|
||||
LPUART_ClearStatusFlags(uart_addrs[obj->index], kLPUART_RxOverrunFlag);
|
||||
return (status_flags & kLPUART_RxDataRegFullFlag);
|
||||
}
|
||||
|
||||
int serial_writable(serial_t *obj) {
|
||||
int serial_writable(serial_t *obj)
|
||||
{
|
||||
uint32_t status_flags = LPUART_GetStatusFlags(uart_addrs[obj->index]);
|
||||
if (status_flags & kLPUART_RxOverrunFlag)
|
||||
LPUART_ClearStatusFlags(uart_addrs[obj->index], kLPUART_RxOverrunFlag);
|
||||
return (status_flags & kLPUART_TxDataRegEmptyFlag);
|
||||
}
|
||||
|
||||
void serial_clear(serial_t *obj) {
|
||||
void serial_clear(serial_t *obj)
|
||||
{
|
||||
}
|
||||
|
||||
void serial_pinout_tx(PinName tx) {
|
||||
void serial_pinout_tx(PinName tx)
|
||||
{
|
||||
pinmap_pinout(tx, PinMap_UART_TX);
|
||||
}
|
||||
|
||||
void serial_break_set(serial_t *obj) {
|
||||
void serial_break_set(serial_t *obj)
|
||||
{
|
||||
uart_addrs[obj->index]->CTRL |= LPUART_CTRL_SBK_MASK;
|
||||
}
|
||||
|
||||
void serial_break_clear(serial_t *obj) {
|
||||
void serial_break_clear(serial_t *obj)
|
||||
{
|
||||
uart_addrs[obj->index]->CTRL &= ~LPUART_CTRL_SBK_MASK;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -32,7 +32,8 @@ static SPI_Type *const spi_address[] = SPI_BASE_PTRS;
|
|||
/* Array of SPI bus clock frequencies */
|
||||
static clock_name_t const spi_clocks[] = SPI_CLOCK_FREQS;
|
||||
|
||||
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
|
||||
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
|
||||
{
|
||||
// determine the SPI to use
|
||||
uint32_t spi_mosi = pinmap_peripheral(mosi, PinMap_SPI_MOSI);
|
||||
uint32_t spi_miso = pinmap_peripheral(miso, PinMap_SPI_MISO);
|
||||
|
|
@ -53,11 +54,13 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
|
|||
}
|
||||
}
|
||||
|
||||
void spi_free(spi_t *obj) {
|
||||
void spi_free(spi_t *obj)
|
||||
{
|
||||
SPI_Deinit(spi_address[obj->instance]);
|
||||
}
|
||||
|
||||
void spi_format(spi_t *obj, int bits, int mode, int slave) {
|
||||
void spi_format(spi_t *obj, int bits, int mode, int slave)
|
||||
{
|
||||
|
||||
spi_master_config_t master_config;
|
||||
spi_slave_config_t slave_config;
|
||||
|
|
@ -87,15 +90,18 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
|
|||
}
|
||||
}
|
||||
|
||||
void spi_frequency(spi_t *obj, int hz) {
|
||||
void spi_frequency(spi_t *obj, int hz)
|
||||
{
|
||||
SPI_MasterSetBaudRate(spi_address[obj->instance], (uint32_t)hz, CLOCK_GetFreq(spi_clocks[obj->instance]));
|
||||
}
|
||||
|
||||
static inline int spi_readable(spi_t * obj) {
|
||||
static inline int spi_readable(spi_t * obj)
|
||||
{
|
||||
return (SPI_GetStatusFlags(spi_address[obj->instance]) & kSPI_RxBufferFullFlag);
|
||||
}
|
||||
|
||||
int spi_master_write(spi_t *obj, int value) {
|
||||
int spi_master_write(spi_t *obj, int value)
|
||||
{
|
||||
spi_transfer_t xfer = {0};
|
||||
uint32_t rx_data;
|
||||
SPI_Type *base = spi_address[obj->instance];
|
||||
|
|
@ -109,11 +115,13 @@ int spi_master_write(spi_t *obj, int value) {
|
|||
return rx_data & 0xffff;
|
||||
}
|
||||
|
||||
int spi_slave_receive(spi_t *obj) {
|
||||
int spi_slave_receive(spi_t *obj)
|
||||
{
|
||||
return spi_readable(obj);
|
||||
}
|
||||
|
||||
int spi_slave_read(spi_t *obj) {
|
||||
int spi_slave_read(spi_t *obj)
|
||||
{
|
||||
uint32_t rx_data;
|
||||
|
||||
while (!spi_readable(obj));
|
||||
|
|
@ -122,7 +130,8 @@ int spi_slave_read(spi_t *obj) {
|
|||
return rx_data & 0xffff;
|
||||
}
|
||||
|
||||
void spi_slave_write(spi_t *obj, int value) {
|
||||
void spi_slave_write(spi_t *obj, int value)
|
||||
{
|
||||
SPI_Type *base = spi_address[obj->instance];
|
||||
size_t size = ((base->C2 & SPI_C2_SPIMODE_MASK) >> SPI_C2_SPIMODE_SHIFT) + 1U;
|
||||
SPI_WriteBlocking(spi_address[obj->instance], (uint8_t *)&value, size);
|
||||
|
|
|
|||
|
|
@ -22,7 +22,8 @@
|
|||
|
||||
static int us_ticker_inited = 0;
|
||||
|
||||
void us_ticker_init(void) {
|
||||
void us_ticker_init(void)
|
||||
{
|
||||
if (us_ticker_inited) {
|
||||
return;
|
||||
}
|
||||
|
|
@ -60,7 +61,8 @@ void us_ticker_init(void) {
|
|||
}
|
||||
|
||||
|
||||
uint32_t us_ticker_read() {
|
||||
uint32_t us_ticker_read()
|
||||
{
|
||||
if (!us_ticker_inited) {
|
||||
us_ticker_init();
|
||||
}
|
||||
|
|
@ -68,15 +70,18 @@ uint32_t us_ticker_read() {
|
|||
return ~(PIT_GetCurrentTimerCount(PIT, kPIT_Chnl_1));
|
||||
}
|
||||
|
||||
void us_ticker_disable_interrupt(void) {
|
||||
void us_ticker_disable_interrupt(void)
|
||||
{
|
||||
LPTMR_DisableInterrupts(LPTMR0, kLPTMR_TimerInterruptEnable);
|
||||
}
|
||||
|
||||
void us_ticker_clear_interrupt(void) {
|
||||
void us_ticker_clear_interrupt(void)
|
||||
{
|
||||
LPTMR_ClearStatusFlags(LPTMR0, kLPTMR_TimerCompareFlag);
|
||||
}
|
||||
|
||||
void us_ticker_set_interrupt(timestamp_t timestamp) {
|
||||
void us_ticker_set_interrupt(timestamp_t timestamp)
|
||||
{
|
||||
int delta = (int)(timestamp - us_ticker_read());
|
||||
if (delta <= 0) {
|
||||
// This event was in the past.
|
||||
|
|
|
|||
|
|
@ -14,7 +14,8 @@ extern "C" {
|
|||
|
||||
extern char Image$$RW_IRAM1$$ZI$$Limit[];
|
||||
|
||||
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
|
||||
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3)
|
||||
{
|
||||
uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
|
||||
uint32_t sp_limit = __current_sp();
|
||||
|
||||
|
|
|
|||
|
|
@ -32,11 +32,13 @@
|
|||
|
||||
extern void InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler);
|
||||
|
||||
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
|
||||
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
|
||||
{
|
||||
InstallIRQHandler(IRQn, vector);
|
||||
}
|
||||
|
||||
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
|
||||
uint32_t NVIC_GetVector(IRQn_Type IRQn)
|
||||
{
|
||||
uint32_t *vectors = (uint32_t*)SCB->VTOR;
|
||||
return vectors[IRQn + 16];
|
||||
}
|
||||
|
|
|
|||
|
|
@ -27,7 +27,8 @@ static float pwm_clock_mhz;
|
|||
/* Array of TPM peripheral base address. */
|
||||
static TPM_Type *const tpm_addrs[] = TPM_BASE_PTRS;
|
||||
|
||||
void pwmout_init(pwmout_t* obj, PinName pin) {
|
||||
void pwmout_init(pwmout_t* obj, PinName pin)
|
||||
{
|
||||
PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
|
||||
MBED_ASSERT(pwm != (PWMName)NC);
|
||||
|
||||
|
|
@ -72,11 +73,13 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
|
|||
pinmap_pinout(pin, PinMap_PWM);
|
||||
}
|
||||
|
||||
void pwmout_free(pwmout_t* obj) {
|
||||
void pwmout_free(pwmout_t* obj)
|
||||
{
|
||||
TPM_Deinit(tpm_addrs[obj->pwm_name >> TPM_SHIFT]);
|
||||
}
|
||||
|
||||
void pwmout_write(pwmout_t* obj, float value) {
|
||||
void pwmout_write(pwmout_t* obj, float value)
|
||||
{
|
||||
if (value < 0.0f) {
|
||||
value = 0.0f;
|
||||
} else if (value > 1.0f) {
|
||||
|
|
@ -91,7 +94,8 @@ void pwmout_write(pwmout_t* obj, float value) {
|
|||
base->CNT = 0;
|
||||
}
|
||||
|
||||
float pwmout_read(pwmout_t* obj) {
|
||||
float pwmout_read(pwmout_t* obj)
|
||||
{
|
||||
TPM_Type *base = tpm_addrs[obj->pwm_name >> TPM_SHIFT];
|
||||
uint16_t count = (base->CONTROLS[obj->pwm_name & 0xF].CnV) & TPM_CnV_VAL_MASK;
|
||||
uint16_t mod = base->MOD & TPM_MOD_MOD_MASK;
|
||||
|
|
@ -102,16 +106,19 @@ float pwmout_read(pwmout_t* obj) {
|
|||
return (v > 1.0f) ? (1.0f) : (v);
|
||||
}
|
||||
|
||||
void pwmout_period(pwmout_t* obj, float seconds) {
|
||||
void pwmout_period(pwmout_t* obj, float seconds)
|
||||
{
|
||||
pwmout_period_us(obj, seconds * 1000000.0f);
|
||||
}
|
||||
|
||||
void pwmout_period_ms(pwmout_t* obj, int ms) {
|
||||
void pwmout_period_ms(pwmout_t* obj, int ms)
|
||||
{
|
||||
pwmout_period_us(obj, ms * 1000);
|
||||
}
|
||||
|
||||
// Set the PWM period, keeping the duty cycle the same.
|
||||
void pwmout_period_us(pwmout_t* obj, int us) {
|
||||
void pwmout_period_us(pwmout_t* obj, int us)
|
||||
{
|
||||
TPM_Type *base = tpm_addrs[obj->pwm_name >> TPM_SHIFT];
|
||||
float dc = pwmout_read(obj);
|
||||
|
||||
|
|
@ -120,15 +127,18 @@ void pwmout_period_us(pwmout_t* obj, int us) {
|
|||
pwmout_write(obj, dc);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
|
||||
void pwmout_pulsewidth(pwmout_t* obj, float seconds)
|
||||
{
|
||||
pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
|
||||
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms)
|
||||
{
|
||||
pwmout_pulsewidth_us(obj, ms * 1000);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
|
||||
void pwmout_pulsewidth_us(pwmout_t* obj, int us)
|
||||
{
|
||||
TPM_Type *base = tpm_addrs[obj->pwm_name >> TPM_SHIFT];
|
||||
uint32_t value = (uint32_t)(pwm_clock_mhz * (float)us);
|
||||
|
||||
|
|
|
|||
|
|
@ -40,7 +40,8 @@ static clock_name_t const uart_clocks[] = LPUART_CLOCK_FREQS;
|
|||
int stdio_uart_inited = 0;
|
||||
serial_t stdio_uart;
|
||||
|
||||
void serial_init(serial_t *obj, PinName tx, PinName rx) {
|
||||
void serial_init(serial_t *obj, PinName tx, PinName rx)
|
||||
{
|
||||
uint32_t uart_tx = pinmap_peripheral(tx, PinMap_UART_TX);
|
||||
uint32_t uart_rx = pinmap_peripheral(rx, PinMap_UART_RX);
|
||||
obj->index = pinmap_merge(uart_tx, uart_rx);
|
||||
|
|
@ -79,16 +80,19 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
|
|||
}
|
||||
}
|
||||
|
||||
void serial_free(serial_t *obj) {
|
||||
void serial_free(serial_t *obj)
|
||||
{
|
||||
LPUART_Deinit(uart_addrs[obj->index]);
|
||||
serial_irq_ids[obj->index] = 0;
|
||||
}
|
||||
|
||||
void serial_baud(serial_t *obj, int baudrate) {
|
||||
void serial_baud(serial_t *obj, int baudrate)
|
||||
{
|
||||
LPUART_SetBaudRate(uart_addrs[obj->index], (uint32_t)baudrate, CLOCK_GetFreq(uart_clocks[obj->index]));
|
||||
}
|
||||
|
||||
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
|
||||
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
|
||||
{
|
||||
LPUART_Type *base = uart_addrs[obj->index];
|
||||
uint8_t temp;
|
||||
/* Set bit count and parity mode. */
|
||||
|
|
@ -118,7 +122,8 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
|
|||
/******************************************************************************
|
||||
* INTERRUPTS HANDLING
|
||||
******************************************************************************/
|
||||
static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint32_t index) {
|
||||
static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint32_t index)
|
||||
{
|
||||
LPUART_Type *base = uart_addrs[index];
|
||||
|
||||
/* If RX overrun. */
|
||||
|
|
@ -138,22 +143,26 @@ static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint
|
|||
}
|
||||
}
|
||||
|
||||
void uart0_irq() {
|
||||
void uart0_irq()
|
||||
{
|
||||
uint32_t status_flags = LPUART0->STAT;
|
||||
uart_irq((status_flags & kLPUART_TxDataRegEmptyFlag), (status_flags & kLPUART_RxDataRegFullFlag), 0);
|
||||
}
|
||||
|
||||
void uart1_irq() {
|
||||
void uart1_irq()
|
||||
{
|
||||
uint32_t status_flags = LPUART1->STAT;
|
||||
uart_irq((status_flags & kLPUART_TxDataRegEmptyFlag), (status_flags & kLPUART_RxDataRegFullFlag), 1);
|
||||
}
|
||||
|
||||
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
|
||||
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
|
||||
{
|
||||
irq_handler = handler;
|
||||
serial_irq_ids[obj->index] = id;
|
||||
}
|
||||
|
||||
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
|
||||
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
|
||||
{
|
||||
IRQn_Type uart_irqs[] = LPUART_RX_TX_IRQS;
|
||||
uint32_t vector = 0;
|
||||
|
||||
|
|
@ -210,44 +219,52 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
|
|||
}
|
||||
}
|
||||
|
||||
int serial_getc(serial_t *obj) {
|
||||
int serial_getc(serial_t *obj)
|
||||
{
|
||||
uint8_t data;
|
||||
|
||||
LPUART_ReadBlocking(uart_addrs[obj->index], &data, 1);
|
||||
return data;
|
||||
}
|
||||
|
||||
void serial_putc(serial_t *obj, int c) {
|
||||
void serial_putc(serial_t *obj, int c)
|
||||
{
|
||||
while (!serial_writable(obj));
|
||||
LPUART_WriteByte(uart_addrs[obj->index], (uint8_t)c);
|
||||
}
|
||||
|
||||
int serial_readable(serial_t *obj) {
|
||||
int serial_readable(serial_t *obj)
|
||||
{
|
||||
uint32_t status_flags = LPUART_GetStatusFlags(uart_addrs[obj->index]);
|
||||
if (status_flags & kLPUART_RxOverrunFlag)
|
||||
LPUART_ClearStatusFlags(uart_addrs[obj->index], kLPUART_RxOverrunFlag);
|
||||
return (status_flags & kLPUART_RxDataRegFullFlag);
|
||||
}
|
||||
|
||||
int serial_writable(serial_t *obj) {
|
||||
int serial_writable(serial_t *obj)
|
||||
{
|
||||
uint32_t status_flags = LPUART_GetStatusFlags(uart_addrs[obj->index]);
|
||||
if (status_flags & kLPUART_RxOverrunFlag)
|
||||
LPUART_ClearStatusFlags(uart_addrs[obj->index], kLPUART_RxOverrunFlag);
|
||||
return (status_flags & kLPUART_TxDataRegEmptyFlag);
|
||||
}
|
||||
|
||||
void serial_clear(serial_t *obj) {
|
||||
void serial_clear(serial_t *obj)
|
||||
{
|
||||
}
|
||||
|
||||
void serial_pinout_tx(PinName tx) {
|
||||
void serial_pinout_tx(PinName tx)
|
||||
{
|
||||
pinmap_pinout(tx, PinMap_UART_TX);
|
||||
}
|
||||
|
||||
void serial_break_set(serial_t *obj) {
|
||||
void serial_break_set(serial_t *obj)
|
||||
{
|
||||
uart_addrs[obj->index]->CTRL |= LPUART_CTRL_SBK_MASK;
|
||||
}
|
||||
|
||||
void serial_break_clear(serial_t *obj) {
|
||||
void serial_break_clear(serial_t *obj)
|
||||
{
|
||||
uart_addrs[obj->index]->CTRL &= ~LPUART_CTRL_SBK_MASK;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -32,7 +32,8 @@ static SPI_Type *const spi_address[] = SPI_BASE_PTRS;
|
|||
/* Array of SPI bus clock frequencies */
|
||||
static clock_name_t const spi_clocks[] = SPI_CLOCK_FREQS;
|
||||
|
||||
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
|
||||
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
|
||||
{
|
||||
// determine the SPI to use
|
||||
uint32_t spi_mosi = pinmap_peripheral(mosi, PinMap_SPI_MOSI);
|
||||
uint32_t spi_miso = pinmap_peripheral(miso, PinMap_SPI_MISO);
|
||||
|
|
@ -53,11 +54,13 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
|
|||
}
|
||||
}
|
||||
|
||||
void spi_free(spi_t *obj) {
|
||||
void spi_free(spi_t *obj)
|
||||
{
|
||||
SPI_Deinit(spi_address[obj->instance]);
|
||||
}
|
||||
|
||||
void spi_format(spi_t *obj, int bits, int mode, int slave) {
|
||||
void spi_format(spi_t *obj, int bits, int mode, int slave)
|
||||
{
|
||||
|
||||
spi_master_config_t master_config;
|
||||
spi_slave_config_t slave_config;
|
||||
|
|
@ -87,15 +90,18 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
|
|||
}
|
||||
}
|
||||
|
||||
void spi_frequency(spi_t *obj, int hz) {
|
||||
void spi_frequency(spi_t *obj, int hz)
|
||||
{
|
||||
SPI_MasterSetBaudRate(spi_address[obj->instance], (uint32_t)hz, CLOCK_GetFreq(spi_clocks[obj->instance]));
|
||||
}
|
||||
|
||||
static inline int spi_readable(spi_t * obj) {
|
||||
static inline int spi_readable(spi_t * obj)
|
||||
{
|
||||
return (SPI_GetStatusFlags(spi_address[obj->instance]) & kSPI_RxBufferFullFlag);
|
||||
}
|
||||
|
||||
int spi_master_write(spi_t *obj, int value) {
|
||||
int spi_master_write(spi_t *obj, int value)
|
||||
{
|
||||
spi_transfer_t xfer = {0};
|
||||
uint32_t rx_data;
|
||||
SPI_Type *base = spi_address[obj->instance];
|
||||
|
|
@ -109,11 +115,13 @@ int spi_master_write(spi_t *obj, int value) {
|
|||
return rx_data & 0xffff;
|
||||
}
|
||||
|
||||
int spi_slave_receive(spi_t *obj) {
|
||||
int spi_slave_receive(spi_t *obj)
|
||||
{
|
||||
return spi_readable(obj);
|
||||
}
|
||||
|
||||
int spi_slave_read(spi_t *obj) {
|
||||
int spi_slave_read(spi_t *obj)
|
||||
{
|
||||
uint32_t rx_data;
|
||||
|
||||
while (!spi_readable(obj));
|
||||
|
|
@ -122,7 +130,8 @@ int spi_slave_read(spi_t *obj) {
|
|||
return rx_data & 0xffff;
|
||||
}
|
||||
|
||||
void spi_slave_write(spi_t *obj, int value) {
|
||||
void spi_slave_write(spi_t *obj, int value)
|
||||
{
|
||||
SPI_Type *base = spi_address[obj->instance];
|
||||
size_t size = ((base->C2 & SPI_C2_SPIMODE_MASK) >> SPI_C2_SPIMODE_SHIFT) + 1U;
|
||||
SPI_WriteBlocking(spi_address[obj->instance], (uint8_t *)&value, size);
|
||||
|
|
|
|||
|
|
@ -22,7 +22,8 @@
|
|||
|
||||
static int us_ticker_inited = 0;
|
||||
|
||||
void us_ticker_init(void) {
|
||||
void us_ticker_init(void)
|
||||
{
|
||||
if (us_ticker_inited) {
|
||||
return;
|
||||
}
|
||||
|
|
@ -60,7 +61,8 @@ void us_ticker_init(void) {
|
|||
}
|
||||
|
||||
|
||||
uint32_t us_ticker_read() {
|
||||
uint32_t us_ticker_read()
|
||||
{
|
||||
if (!us_ticker_inited) {
|
||||
us_ticker_init();
|
||||
}
|
||||
|
|
@ -68,15 +70,18 @@ uint32_t us_ticker_read() {
|
|||
return ~(PIT_GetCurrentTimerCount(PIT, kPIT_Chnl_1));
|
||||
}
|
||||
|
||||
void us_ticker_disable_interrupt(void) {
|
||||
void us_ticker_disable_interrupt(void)
|
||||
{
|
||||
LPTMR_DisableInterrupts(LPTMR0, kLPTMR_TimerInterruptEnable);
|
||||
}
|
||||
|
||||
void us_ticker_clear_interrupt(void) {
|
||||
void us_ticker_clear_interrupt(void)
|
||||
{
|
||||
LPTMR_ClearStatusFlags(LPTMR0, kLPTMR_TimerCompareFlag);
|
||||
}
|
||||
|
||||
void us_ticker_set_interrupt(timestamp_t timestamp) {
|
||||
void us_ticker_set_interrupt(timestamp_t timestamp)
|
||||
{
|
||||
int delta = (int)(timestamp - us_ticker_read());
|
||||
if (delta <= 0) {
|
||||
// This event was in the past.
|
||||
|
|
|
|||
|
|
@ -14,7 +14,8 @@ extern "C" {
|
|||
|
||||
extern char Image$$RW_IRAM1$$ZI$$Limit[];
|
||||
|
||||
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
|
||||
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3)
|
||||
{
|
||||
uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
|
||||
uint32_t sp_limit = __current_sp();
|
||||
|
||||
|
|
|
|||
|
|
@ -32,11 +32,13 @@
|
|||
|
||||
extern void InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler);
|
||||
|
||||
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
|
||||
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
|
||||
{
|
||||
InstallIRQHandler(IRQn, vector);
|
||||
}
|
||||
|
||||
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
|
||||
uint32_t NVIC_GetVector(IRQn_Type IRQn)
|
||||
{
|
||||
uint32_t *vectors = (uint32_t*)SCB->VTOR;
|
||||
return vectors[IRQn + 16];
|
||||
}
|
||||
|
|
|
|||
|
|
@ -27,7 +27,8 @@ static float pwm_clock_mhz;
|
|||
/* Array of TPM peripheral base address. */
|
||||
static TPM_Type *const tpm_addrs[] = TPM_BASE_PTRS;
|
||||
|
||||
void pwmout_init(pwmout_t* obj, PinName pin) {
|
||||
void pwmout_init(pwmout_t* obj, PinName pin)
|
||||
{
|
||||
PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
|
||||
MBED_ASSERT(pwm != (PWMName)NC);
|
||||
|
||||
|
|
@ -72,11 +73,13 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
|
|||
pinmap_pinout(pin, PinMap_PWM);
|
||||
}
|
||||
|
||||
void pwmout_free(pwmout_t* obj) {
|
||||
void pwmout_free(pwmout_t* obj)
|
||||
{
|
||||
TPM_Deinit(tpm_addrs[obj->pwm_name >> TPM_SHIFT]);
|
||||
}
|
||||
|
||||
void pwmout_write(pwmout_t* obj, float value) {
|
||||
void pwmout_write(pwmout_t* obj, float value)
|
||||
{
|
||||
if (value < 0.0f) {
|
||||
value = 0.0f;
|
||||
} else if (value > 1.0f) {
|
||||
|
|
@ -91,7 +94,8 @@ void pwmout_write(pwmout_t* obj, float value) {
|
|||
base->CNT = 0;
|
||||
}
|
||||
|
||||
float pwmout_read(pwmout_t* obj) {
|
||||
float pwmout_read(pwmout_t* obj)
|
||||
{
|
||||
TPM_Type *base = tpm_addrs[obj->pwm_name >> TPM_SHIFT];
|
||||
uint16_t count = (base->CONTROLS[obj->pwm_name & 0xF].CnV) & TPM_CnV_VAL_MASK;
|
||||
uint16_t mod = base->MOD & TPM_MOD_MOD_MASK;
|
||||
|
|
@ -102,16 +106,19 @@ float pwmout_read(pwmout_t* obj) {
|
|||
return (v > 1.0f) ? (1.0f) : (v);
|
||||
}
|
||||
|
||||
void pwmout_period(pwmout_t* obj, float seconds) {
|
||||
void pwmout_period(pwmout_t* obj, float seconds)
|
||||
{
|
||||
pwmout_period_us(obj, seconds * 1000000.0f);
|
||||
}
|
||||
|
||||
void pwmout_period_ms(pwmout_t* obj, int ms) {
|
||||
void pwmout_period_ms(pwmout_t* obj, int ms)
|
||||
{
|
||||
pwmout_period_us(obj, ms * 1000);
|
||||
}
|
||||
|
||||
// Set the PWM period, keeping the duty cycle the same.
|
||||
void pwmout_period_us(pwmout_t* obj, int us) {
|
||||
void pwmout_period_us(pwmout_t* obj, int us)
|
||||
{
|
||||
TPM_Type *base = tpm_addrs[obj->pwm_name >> TPM_SHIFT];
|
||||
float dc = pwmout_read(obj);
|
||||
|
||||
|
|
@ -120,15 +127,18 @@ void pwmout_period_us(pwmout_t* obj, int us) {
|
|||
pwmout_write(obj, dc);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
|
||||
void pwmout_pulsewidth(pwmout_t* obj, float seconds)
|
||||
{
|
||||
pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
|
||||
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms)
|
||||
{
|
||||
pwmout_pulsewidth_us(obj, ms * 1000);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
|
||||
void pwmout_pulsewidth_us(pwmout_t* obj, int us)
|
||||
{
|
||||
TPM_Type *base = tpm_addrs[obj->pwm_name >> TPM_SHIFT];
|
||||
uint32_t value = (uint32_t)(pwm_clock_mhz * (float)us);
|
||||
|
||||
|
|
|
|||
|
|
@ -40,7 +40,8 @@ static clock_name_t const uart_clocks[] = LPUART_CLOCK_FREQS;
|
|||
int stdio_uart_inited = 0;
|
||||
serial_t stdio_uart;
|
||||
|
||||
void serial_init(serial_t *obj, PinName tx, PinName rx) {
|
||||
void serial_init(serial_t *obj, PinName tx, PinName rx)
|
||||
{
|
||||
uint32_t uart_tx = pinmap_peripheral(tx, PinMap_UART_TX);
|
||||
uint32_t uart_rx = pinmap_peripheral(rx, PinMap_UART_RX);
|
||||
obj->index = pinmap_merge(uart_tx, uart_rx);
|
||||
|
|
@ -75,16 +76,19 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
|
|||
}
|
||||
}
|
||||
|
||||
void serial_free(serial_t *obj) {
|
||||
void serial_free(serial_t *obj)
|
||||
{
|
||||
LPUART_Deinit(uart_addrs[obj->index]);
|
||||
serial_irq_ids[obj->index] = 0;
|
||||
}
|
||||
|
||||
void serial_baud(serial_t *obj, int baudrate) {
|
||||
void serial_baud(serial_t *obj, int baudrate)
|
||||
{
|
||||
LPUART_SetBaudRate(uart_addrs[obj->index], (uint32_t)baudrate, CLOCK_GetFreq(uart_clocks[obj->index]));
|
||||
}
|
||||
|
||||
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
|
||||
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
|
||||
{
|
||||
LPUART_Type *base = uart_addrs[obj->index];
|
||||
uint8_t temp;
|
||||
/* Set bit count and parity mode. */
|
||||
|
|
@ -114,7 +118,8 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
|
|||
/******************************************************************************
|
||||
* INTERRUPTS HANDLING
|
||||
******************************************************************************/
|
||||
static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint32_t index) {
|
||||
static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint32_t index)
|
||||
{
|
||||
LPUART_Type *base = uart_addrs[index];
|
||||
|
||||
/* If RX overrun. */
|
||||
|
|
@ -134,27 +139,32 @@ static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint
|
|||
}
|
||||
}
|
||||
|
||||
void uart0_irq() {
|
||||
void uart0_irq()
|
||||
{
|
||||
uint32_t status_flags = LPUART0->STAT;
|
||||
uart_irq((status_flags & kLPUART_TxDataRegEmptyFlag), (status_flags & kLPUART_RxDataRegFullFlag), 0);
|
||||
}
|
||||
|
||||
void uart1_irq() {
|
||||
void uart1_irq()
|
||||
{
|
||||
uint32_t status_flags = LPUART1->STAT;
|
||||
uart_irq((status_flags & kLPUART_TxDataRegEmptyFlag), (status_flags & kLPUART_RxDataRegFullFlag), 1);
|
||||
}
|
||||
|
||||
void uart2_irq() {
|
||||
void uart2_irq()
|
||||
{
|
||||
uint32_t status_flags = LPUART2->STAT;
|
||||
uart_irq((status_flags & kLPUART_TxDataRegEmptyFlag), (status_flags & kLPUART_RxDataRegFullFlag), 2);
|
||||
}
|
||||
|
||||
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
|
||||
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
|
||||
{
|
||||
irq_handler = handler;
|
||||
serial_irq_ids[obj->index] = id;
|
||||
}
|
||||
|
||||
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
|
||||
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
|
||||
{
|
||||
IRQn_Type uart_irqs[] = LPUART_RX_TX_IRQS;
|
||||
uint32_t vector = 0;
|
||||
|
||||
|
|
@ -214,44 +224,52 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
|
|||
}
|
||||
}
|
||||
|
||||
int serial_getc(serial_t *obj) {
|
||||
int serial_getc(serial_t *obj)
|
||||
{
|
||||
uint8_t data;
|
||||
|
||||
LPUART_ReadBlocking(uart_addrs[obj->index], &data, 1);
|
||||
return data;
|
||||
}
|
||||
|
||||
void serial_putc(serial_t *obj, int c) {
|
||||
void serial_putc(serial_t *obj, int c)
|
||||
{
|
||||
while (!serial_writable(obj));
|
||||
LPUART_WriteByte(uart_addrs[obj->index], (uint8_t)c);
|
||||
}
|
||||
|
||||
int serial_readable(serial_t *obj) {
|
||||
int serial_readable(serial_t *obj)
|
||||
{
|
||||
uint32_t status_flags = LPUART_GetStatusFlags(uart_addrs[obj->index]);
|
||||
if (status_flags & kLPUART_RxOverrunFlag)
|
||||
LPUART_ClearStatusFlags(uart_addrs[obj->index], kLPUART_RxOverrunFlag);
|
||||
return (status_flags & kLPUART_RxDataRegFullFlag);
|
||||
}
|
||||
|
||||
int serial_writable(serial_t *obj) {
|
||||
int serial_writable(serial_t *obj)
|
||||
{
|
||||
uint32_t status_flags = LPUART_GetStatusFlags(uart_addrs[obj->index]);
|
||||
if (status_flags & kLPUART_RxOverrunFlag)
|
||||
LPUART_ClearStatusFlags(uart_addrs[obj->index], kLPUART_RxOverrunFlag);
|
||||
return (status_flags & kLPUART_TxDataRegEmptyFlag);
|
||||
}
|
||||
|
||||
void serial_clear(serial_t *obj) {
|
||||
void serial_clear(serial_t *obj)
|
||||
{
|
||||
}
|
||||
|
||||
void serial_pinout_tx(PinName tx) {
|
||||
void serial_pinout_tx(PinName tx)
|
||||
{
|
||||
pinmap_pinout(tx, PinMap_UART_TX);
|
||||
}
|
||||
|
||||
void serial_break_set(serial_t *obj) {
|
||||
void serial_break_set(serial_t *obj)
|
||||
{
|
||||
uart_addrs[obj->index]->CTRL |= LPUART_CTRL_SBK_MASK;
|
||||
}
|
||||
|
||||
void serial_break_clear(serial_t *obj) {
|
||||
void serial_break_clear(serial_t *obj)
|
||||
{
|
||||
uart_addrs[obj->index]->CTRL &= ~LPUART_CTRL_SBK_MASK;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -32,7 +32,8 @@ static SPI_Type *const spi_address[] = SPI_BASE_PTRS;
|
|||
/* Array of SPI bus clock frequencies */
|
||||
static clock_name_t const spi_clocks[] = SPI_CLOCK_FREQS;
|
||||
|
||||
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
|
||||
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
|
||||
{
|
||||
// determine the SPI to use
|
||||
uint32_t spi_mosi = pinmap_peripheral(mosi, PinMap_SPI_MOSI);
|
||||
uint32_t spi_miso = pinmap_peripheral(miso, PinMap_SPI_MISO);
|
||||
|
|
@ -53,12 +54,13 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
|
|||
}
|
||||
}
|
||||
|
||||
void spi_free(spi_t *obj) {
|
||||
void spi_free(spi_t *obj)
|
||||
{
|
||||
DSPI_Deinit(spi_address[obj->instance]);
|
||||
}
|
||||
|
||||
void spi_format(spi_t *obj, int bits, int mode, int slave) {
|
||||
|
||||
void spi_format(spi_t *obj, int bits, int mode, int slave)
|
||||
{
|
||||
dspi_master_config_t master_config;
|
||||
dspi_slave_config_t slave_config;
|
||||
|
||||
|
|
@ -84,18 +86,21 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
|
|||
}
|
||||
}
|
||||
|
||||
void spi_frequency(spi_t *obj, int hz) {
|
||||
void spi_frequency(spi_t *obj, int hz)
|
||||
{
|
||||
uint32_t busClock = CLOCK_GetFreq(spi_clocks[obj->instance]);
|
||||
DSPI_MasterSetBaudRate(spi_address[obj->instance], kDSPI_Ctar0, (uint32_t)hz, busClock);
|
||||
//Half clock period delay after SPI transfer
|
||||
DSPI_MasterSetDelayTimes(spi_address[obj->instance], kDSPI_Ctar0, kDSPI_LastSckToPcs, busClock, 500000000 / hz);
|
||||
}
|
||||
|
||||
static inline int spi_readable(spi_t * obj) {
|
||||
static inline int spi_readable(spi_t * obj)
|
||||
{
|
||||
return (DSPI_GetStatusFlags(spi_address[obj->instance]) & kDSPI_RxFifoDrainRequestFlag);
|
||||
}
|
||||
|
||||
int spi_master_write(spi_t *obj, int value) {
|
||||
int spi_master_write(spi_t *obj, int value)
|
||||
{
|
||||
dspi_command_data_config_t command;
|
||||
uint32_t rx_data;
|
||||
DSPI_GetDefaultDataCommandConfig(&command);
|
||||
|
|
@ -112,11 +117,13 @@ int spi_master_write(spi_t *obj, int value) {
|
|||
return rx_data & 0xffff;
|
||||
}
|
||||
|
||||
int spi_slave_receive(spi_t *obj) {
|
||||
int spi_slave_receive(spi_t *obj)
|
||||
{
|
||||
return spi_readable(obj);
|
||||
}
|
||||
|
||||
int spi_slave_read(spi_t *obj) {
|
||||
int spi_slave_read(spi_t *obj)
|
||||
{
|
||||
uint32_t rx_data;
|
||||
|
||||
while (!spi_readable(obj));
|
||||
|
|
@ -125,7 +132,8 @@ int spi_slave_read(spi_t *obj) {
|
|||
return rx_data & 0xffff;
|
||||
}
|
||||
|
||||
void spi_slave_write(spi_t *obj, int value) {
|
||||
void spi_slave_write(spi_t *obj, int value)
|
||||
{
|
||||
DSPI_SlaveWriteDataBlocking(spi_address[obj->instance], (uint32_t)value);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -21,7 +21,8 @@
|
|||
|
||||
static int us_ticker_inited = 0;
|
||||
|
||||
void us_ticker_init(void) {
|
||||
void us_ticker_init(void)
|
||||
{
|
||||
if (us_ticker_inited) {
|
||||
return;
|
||||
}
|
||||
|
|
@ -51,7 +52,8 @@ void us_ticker_init(void) {
|
|||
}
|
||||
|
||||
|
||||
uint32_t us_ticker_read() {
|
||||
uint32_t us_ticker_read()
|
||||
{
|
||||
if (!us_ticker_inited) {
|
||||
us_ticker_init();
|
||||
}
|
||||
|
|
@ -59,15 +61,18 @@ uint32_t us_ticker_read() {
|
|||
return ~(PIT_GetCurrentTimerCount(PIT, kPIT_Chnl_1));
|
||||
}
|
||||
|
||||
void us_ticker_disable_interrupt(void) {
|
||||
void us_ticker_disable_interrupt(void)
|
||||
{
|
||||
PIT_DisableInterrupts(PIT, kPIT_Chnl_3, kPIT_TimerInterruptEnable);
|
||||
}
|
||||
|
||||
void us_ticker_clear_interrupt(void) {
|
||||
void us_ticker_clear_interrupt(void)
|
||||
{
|
||||
PIT_ClearStatusFlags(PIT, kPIT_Chnl_3, PIT_TFLG_TIF_MASK);
|
||||
}
|
||||
|
||||
void us_ticker_set_interrupt(timestamp_t timestamp) {
|
||||
void us_ticker_set_interrupt(timestamp_t timestamp)
|
||||
{
|
||||
int delta = (int)(timestamp - us_ticker_read());
|
||||
if (delta <= 0) {
|
||||
// This event was in the past.
|
||||
|
|
|
|||
|
|
@ -14,7 +14,8 @@ extern "C" {
|
|||
|
||||
extern char Image$$RW_IRAM1$$ZI$$Limit[];
|
||||
|
||||
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
|
||||
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3)
|
||||
{
|
||||
uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
|
||||
uint32_t sp_limit = __current_sp();
|
||||
|
||||
|
|
|
|||
|
|
@ -32,11 +32,13 @@
|
|||
|
||||
extern void InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler);
|
||||
|
||||
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
|
||||
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
|
||||
{
|
||||
InstallIRQHandler(IRQn, vector);
|
||||
}
|
||||
|
||||
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
|
||||
uint32_t NVIC_GetVector(IRQn_Type IRQn)
|
||||
{
|
||||
uint32_t *vectors = (uint32_t*)SCB->VTOR;
|
||||
return vectors[IRQn + 16];
|
||||
}
|
||||
|
|
|
|||
|
|
@ -27,7 +27,8 @@ static float pwm_clock_mhz;
|
|||
/* Array of FTM peripheral base address. */
|
||||
static FTM_Type *const ftm_addrs[] = FTM_BASE_PTRS;
|
||||
|
||||
void pwmout_init(pwmout_t* obj, PinName pin) {
|
||||
void pwmout_init(pwmout_t* obj, PinName pin)
|
||||
{
|
||||
PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
|
||||
MBED_ASSERT(pwm != (PWMName)NC);
|
||||
|
||||
|
|
@ -72,11 +73,13 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
|
|||
pinmap_pinout(pin, PinMap_PWM);
|
||||
}
|
||||
|
||||
void pwmout_free(pwmout_t* obj) {
|
||||
void pwmout_free(pwmout_t* obj)
|
||||
{
|
||||
FTM_Deinit(ftm_addrs[obj->pwm_name >> TPM_SHIFT]);
|
||||
}
|
||||
|
||||
void pwmout_write(pwmout_t* obj, float value) {
|
||||
void pwmout_write(pwmout_t* obj, float value)
|
||||
{
|
||||
if (value < 0.0f) {
|
||||
value = 0.0f;
|
||||
} else if (value > 1.0f) {
|
||||
|
|
@ -93,7 +96,8 @@ void pwmout_write(pwmout_t* obj, float value) {
|
|||
FTM_SetSoftwareTrigger(base, true);
|
||||
}
|
||||
|
||||
float pwmout_read(pwmout_t* obj) {
|
||||
float pwmout_read(pwmout_t* obj)
|
||||
{
|
||||
FTM_Type *base = ftm_addrs[obj->pwm_name >> TPM_SHIFT];
|
||||
uint16_t count = (base->CONTROLS[obj->pwm_name & 0xF].CnV) & FTM_CnV_VAL_MASK;
|
||||
uint16_t mod = base->MOD & FTM_MOD_MOD_MASK;
|
||||
|
|
@ -104,16 +108,19 @@ float pwmout_read(pwmout_t* obj) {
|
|||
return (v > 1.0f) ? (1.0f) : (v);
|
||||
}
|
||||
|
||||
void pwmout_period(pwmout_t* obj, float seconds) {
|
||||
void pwmout_period(pwmout_t* obj, float seconds)
|
||||
{
|
||||
pwmout_period_us(obj, seconds * 1000000.0f);
|
||||
}
|
||||
|
||||
void pwmout_period_ms(pwmout_t* obj, int ms) {
|
||||
void pwmout_period_ms(pwmout_t* obj, int ms)
|
||||
{
|
||||
pwmout_period_us(obj, ms * 1000);
|
||||
}
|
||||
|
||||
// Set the PWM period, keeping the duty cycle the same.
|
||||
void pwmout_period_us(pwmout_t* obj, int us) {
|
||||
void pwmout_period_us(pwmout_t* obj, int us)
|
||||
{
|
||||
FTM_Type *base = ftm_addrs[obj->pwm_name >> TPM_SHIFT];
|
||||
float dc = pwmout_read(obj);
|
||||
|
||||
|
|
@ -122,15 +129,18 @@ void pwmout_period_us(pwmout_t* obj, int us) {
|
|||
pwmout_write(obj, dc);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
|
||||
void pwmout_pulsewidth(pwmout_t* obj, float seconds)
|
||||
{
|
||||
pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
|
||||
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms)
|
||||
{
|
||||
pwmout_pulsewidth_us(obj, ms * 1000);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
|
||||
void pwmout_pulsewidth_us(pwmout_t* obj, int us)
|
||||
{
|
||||
FTM_Type *base = ftm_addrs[obj->pwm_name >> TPM_SHIFT];
|
||||
uint32_t value = (uint32_t)(pwm_clock_mhz * (float)us);
|
||||
|
||||
|
|
|
|||
|
|
@ -41,7 +41,8 @@ static clock_name_t const uart_clocks[] = UART_CLOCK_FREQS;
|
|||
int stdio_uart_inited = 0;
|
||||
serial_t stdio_uart;
|
||||
|
||||
void serial_init(serial_t *obj, PinName tx, PinName rx) {
|
||||
void serial_init(serial_t *obj, PinName tx, PinName rx)
|
||||
{
|
||||
uint32_t uart_tx = pinmap_peripheral(tx, PinMap_UART_TX);
|
||||
uint32_t uart_rx = pinmap_peripheral(rx, PinMap_UART_RX);
|
||||
obj->index = pinmap_merge(uart_tx, uart_rx);
|
||||
|
|
@ -74,16 +75,19 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
|
|||
}
|
||||
}
|
||||
|
||||
void serial_free(serial_t *obj) {
|
||||
void serial_free(serial_t *obj)
|
||||
{
|
||||
UART_Deinit(uart_addrs[obj->index]);
|
||||
serial_irq_ids[obj->index] = 0;
|
||||
}
|
||||
|
||||
void serial_baud(serial_t *obj, int baudrate) {
|
||||
void serial_baud(serial_t *obj, int baudrate)
|
||||
{
|
||||
UART_SetBaudRate(uart_addrs[obj->index], (uint32_t)baudrate, CLOCK_GetFreq(uart_clocks[obj->index]));
|
||||
}
|
||||
|
||||
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
|
||||
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
|
||||
{
|
||||
UART_Type *base = uart_addrs[obj->index];
|
||||
uint8_t temp;
|
||||
/* Set bit count and parity mode. */
|
||||
|
|
@ -111,7 +115,8 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
|
|||
/******************************************************************************
|
||||
* INTERRUPTS HANDLING
|
||||
******************************************************************************/
|
||||
static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint32_t index) {
|
||||
static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint32_t index)
|
||||
{
|
||||
UART_Type *base = uart_addrs[index];
|
||||
|
||||
/* If RX overrun. */
|
||||
|
|
@ -130,27 +135,32 @@ static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint
|
|||
}
|
||||
}
|
||||
|
||||
void uart0_irq() {
|
||||
void uart0_irq()
|
||||
{
|
||||
uint32_t status_flags = UART0->S1;
|
||||
uart_irq((status_flags & kUART_TxDataRegEmptyFlag), (status_flags & kUART_RxDataRegFullFlag), 0);
|
||||
}
|
||||
|
||||
void uart1_irq() {
|
||||
void uart1_irq()
|
||||
{
|
||||
uint32_t status_flags = UART1->S1;
|
||||
uart_irq((status_flags & UART_S1_TDRE_MASK), (status_flags & UART_S1_RDRF_MASK), 1);
|
||||
}
|
||||
|
||||
void uart2_irq() {
|
||||
void uart2_irq()
|
||||
{
|
||||
uint32_t status_flags = UART2->S1;
|
||||
uart_irq((status_flags & UART_S1_TDRE_MASK), (status_flags & UART_S1_RDRF_MASK), 2);
|
||||
}
|
||||
|
||||
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
|
||||
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
|
||||
{
|
||||
irq_handler = handler;
|
||||
serial_irq_ids[obj->index] = id;
|
||||
}
|
||||
|
||||
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
|
||||
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
|
||||
{
|
||||
IRQn_Type uart_irqs[] = UART_RX_TX_IRQS;
|
||||
uint32_t vector = 0;
|
||||
|
||||
|
|
@ -210,7 +220,8 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
|
|||
}
|
||||
}
|
||||
|
||||
int serial_getc(serial_t *obj) {
|
||||
int serial_getc(serial_t *obj)
|
||||
{
|
||||
while (!serial_readable(obj));
|
||||
uint8_t data;
|
||||
data = UART_ReadByte(uart_addrs[obj->index]);
|
||||
|
|
@ -218,37 +229,44 @@ int serial_getc(serial_t *obj) {
|
|||
return data;
|
||||
}
|
||||
|
||||
void serial_putc(serial_t *obj, int c) {
|
||||
void serial_putc(serial_t *obj, int c)
|
||||
{
|
||||
while (!serial_writable(obj));
|
||||
UART_WriteByte(uart_addrs[obj->index], (uint8_t)c);
|
||||
}
|
||||
|
||||
int serial_readable(serial_t *obj) {
|
||||
int serial_readable(serial_t *obj)
|
||||
{
|
||||
uint32_t status_flags = UART_GetStatusFlags(uart_addrs[obj->index]);
|
||||
if (status_flags & kUART_RxOverrunFlag)
|
||||
UART_ClearStatusFlags(uart_addrs[obj->index], kUART_RxOverrunFlag);
|
||||
return (status_flags & kUART_RxDataRegFullFlag);
|
||||
}
|
||||
|
||||
int serial_writable(serial_t *obj) {
|
||||
int serial_writable(serial_t *obj)
|
||||
{
|
||||
uint32_t status_flags = UART_GetStatusFlags(uart_addrs[obj->index]);
|
||||
if (status_flags & kUART_RxOverrunFlag)
|
||||
UART_ClearStatusFlags(uart_addrs[obj->index], kUART_RxOverrunFlag);
|
||||
return (status_flags & kUART_TxDataRegEmptyFlag);
|
||||
}
|
||||
|
||||
void serial_clear(serial_t *obj) {
|
||||
void serial_clear(serial_t *obj)
|
||||
{
|
||||
}
|
||||
|
||||
void serial_pinout_tx(PinName tx) {
|
||||
void serial_pinout_tx(PinName tx)
|
||||
{
|
||||
pinmap_pinout(tx, PinMap_UART_TX);
|
||||
}
|
||||
|
||||
void serial_break_set(serial_t *obj) {
|
||||
void serial_break_set(serial_t *obj)
|
||||
{
|
||||
uart_addrs[obj->index]->C2 |= UART_C2_SBK_MASK;
|
||||
}
|
||||
|
||||
void serial_break_clear(serial_t *obj) {
|
||||
void serial_break_clear(serial_t *obj)
|
||||
{
|
||||
uart_addrs[obj->index]->C2 &= ~UART_C2_SBK_MASK;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -32,7 +32,8 @@ static SPI_Type *const spi_address[] = SPI_BASE_PTRS;
|
|||
/* Array of SPI bus clock frequencies */
|
||||
static clock_name_t const spi_clocks[] = SPI_CLOCK_FREQS;
|
||||
|
||||
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
|
||||
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
|
||||
{
|
||||
// determine the SPI to use
|
||||
uint32_t spi_mosi = pinmap_peripheral(mosi, PinMap_SPI_MOSI);
|
||||
uint32_t spi_miso = pinmap_peripheral(miso, PinMap_SPI_MISO);
|
||||
|
|
@ -53,12 +54,13 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
|
|||
}
|
||||
}
|
||||
|
||||
void spi_free(spi_t *obj) {
|
||||
void spi_free(spi_t *obj)
|
||||
{
|
||||
DSPI_Deinit(spi_address[obj->instance]);
|
||||
}
|
||||
|
||||
void spi_format(spi_t *obj, int bits, int mode, int slave) {
|
||||
|
||||
void spi_format(spi_t *obj, int bits, int mode, int slave)
|
||||
{
|
||||
dspi_master_config_t master_config;
|
||||
dspi_slave_config_t slave_config;
|
||||
|
||||
|
|
@ -84,18 +86,21 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
|
|||
}
|
||||
}
|
||||
|
||||
void spi_frequency(spi_t *obj, int hz) {
|
||||
void spi_frequency(spi_t *obj, int hz)
|
||||
{
|
||||
uint32_t busClock = CLOCK_GetFreq(spi_clocks[obj->instance]);
|
||||
DSPI_MasterSetBaudRate(spi_address[obj->instance], kDSPI_Ctar0, (uint32_t)hz, busClock);
|
||||
//Half clock period delay after SPI transfer
|
||||
DSPI_MasterSetDelayTimes(spi_address[obj->instance], kDSPI_Ctar0, kDSPI_LastSckToPcs, busClock, 500000000 / hz);
|
||||
}
|
||||
|
||||
static inline int spi_readable(spi_t * obj) {
|
||||
static inline int spi_readable(spi_t * obj)
|
||||
{
|
||||
return (DSPI_GetStatusFlags(spi_address[obj->instance]) & kDSPI_RxFifoDrainRequestFlag);
|
||||
}
|
||||
|
||||
int spi_master_write(spi_t *obj, int value) {
|
||||
int spi_master_write(spi_t *obj, int value)
|
||||
{
|
||||
dspi_command_data_config_t command;
|
||||
uint32_t rx_data;
|
||||
DSPI_GetDefaultDataCommandConfig(&command);
|
||||
|
|
@ -112,11 +117,13 @@ int spi_master_write(spi_t *obj, int value) {
|
|||
return rx_data & 0xffff;
|
||||
}
|
||||
|
||||
int spi_slave_receive(spi_t *obj) {
|
||||
int spi_slave_receive(spi_t *obj)
|
||||
{
|
||||
return spi_readable(obj);
|
||||
}
|
||||
|
||||
int spi_slave_read(spi_t *obj) {
|
||||
int spi_slave_read(spi_t *obj)
|
||||
{
|
||||
uint32_t rx_data;
|
||||
|
||||
while (!spi_readable(obj));
|
||||
|
|
@ -125,7 +132,8 @@ int spi_slave_read(spi_t *obj) {
|
|||
return rx_data & 0xffff;
|
||||
}
|
||||
|
||||
void spi_slave_write(spi_t *obj, int value) {
|
||||
void spi_slave_write(spi_t *obj, int value)
|
||||
{
|
||||
DSPI_SlaveWriteDataBlocking(spi_address[obj->instance], (uint32_t)value);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -21,7 +21,8 @@
|
|||
|
||||
static int us_ticker_inited = 0;
|
||||
|
||||
void us_ticker_init(void) {
|
||||
void us_ticker_init(void)
|
||||
{
|
||||
if (us_ticker_inited) {
|
||||
return;
|
||||
}
|
||||
|
|
@ -51,7 +52,8 @@ void us_ticker_init(void) {
|
|||
}
|
||||
|
||||
|
||||
uint32_t us_ticker_read() {
|
||||
uint32_t us_ticker_read()
|
||||
{
|
||||
if (!us_ticker_inited) {
|
||||
us_ticker_init();
|
||||
}
|
||||
|
|
@ -59,15 +61,18 @@ uint32_t us_ticker_read() {
|
|||
return ~(PIT_GetCurrentTimerCount(PIT, kPIT_Chnl_1));
|
||||
}
|
||||
|
||||
void us_ticker_disable_interrupt(void) {
|
||||
void us_ticker_disable_interrupt(void)
|
||||
{
|
||||
PIT_DisableInterrupts(PIT, kPIT_Chnl_3, kPIT_TimerInterruptEnable);
|
||||
}
|
||||
|
||||
void us_ticker_clear_interrupt(void) {
|
||||
void us_ticker_clear_interrupt(void)
|
||||
{
|
||||
PIT_ClearStatusFlags(PIT, kPIT_Chnl_3, PIT_TFLG_TIF_MASK);
|
||||
}
|
||||
|
||||
void us_ticker_set_interrupt(timestamp_t timestamp) {
|
||||
void us_ticker_set_interrupt(timestamp_t timestamp)
|
||||
{
|
||||
int delta = (int)(timestamp - us_ticker_read());
|
||||
if (delta <= 0) {
|
||||
// This event was in the past.
|
||||
|
|
|
|||
|
|
@ -14,7 +14,8 @@ extern "C" {
|
|||
|
||||
extern char Image$$RW_IRAM1$$ZI$$Limit[];
|
||||
|
||||
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
|
||||
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3)
|
||||
{
|
||||
uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
|
||||
uint32_t sp_limit = __current_sp();
|
||||
|
||||
|
|
|
|||
|
|
@ -32,11 +32,13 @@
|
|||
|
||||
extern void InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler);
|
||||
|
||||
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
|
||||
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
|
||||
{
|
||||
InstallIRQHandler(IRQn, vector);
|
||||
}
|
||||
|
||||
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
|
||||
uint32_t NVIC_GetVector(IRQn_Type IRQn)
|
||||
{
|
||||
uint32_t *vectors = (uint32_t*)SCB->VTOR;
|
||||
return vectors[IRQn + 16];
|
||||
}
|
||||
|
|
|
|||
|
|
@ -27,7 +27,8 @@ static float pwm_clock_mhz;
|
|||
/* Array of FTM peripheral base address. */
|
||||
static FTM_Type *const ftm_addrs[] = FTM_BASE_PTRS;
|
||||
|
||||
void pwmout_init(pwmout_t* obj, PinName pin) {
|
||||
void pwmout_init(pwmout_t* obj, PinName pin)
|
||||
{
|
||||
PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
|
||||
MBED_ASSERT(pwm != (PWMName)NC);
|
||||
|
||||
|
|
@ -72,11 +73,13 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
|
|||
pinmap_pinout(pin, PinMap_PWM);
|
||||
}
|
||||
|
||||
void pwmout_free(pwmout_t* obj) {
|
||||
void pwmout_free(pwmout_t* obj)
|
||||
{
|
||||
FTM_Deinit(ftm_addrs[obj->pwm_name >> TPM_SHIFT]);
|
||||
}
|
||||
|
||||
void pwmout_write(pwmout_t* obj, float value) {
|
||||
void pwmout_write(pwmout_t* obj, float value)
|
||||
{
|
||||
if (value < 0.0f) {
|
||||
value = 0.0f;
|
||||
} else if (value > 1.0f) {
|
||||
|
|
@ -93,7 +96,8 @@ void pwmout_write(pwmout_t* obj, float value) {
|
|||
FTM_SetSoftwareTrigger(base, true);
|
||||
}
|
||||
|
||||
float pwmout_read(pwmout_t* obj) {
|
||||
float pwmout_read(pwmout_t* obj)
|
||||
{
|
||||
FTM_Type *base = ftm_addrs[obj->pwm_name >> TPM_SHIFT];
|
||||
uint16_t count = (base->CONTROLS[obj->pwm_name & 0xF].CnV) & FTM_CnV_VAL_MASK;
|
||||
uint16_t mod = base->MOD & FTM_MOD_MOD_MASK;
|
||||
|
|
@ -104,16 +108,19 @@ float pwmout_read(pwmout_t* obj) {
|
|||
return (v > 1.0f) ? (1.0f) : (v);
|
||||
}
|
||||
|
||||
void pwmout_period(pwmout_t* obj, float seconds) {
|
||||
void pwmout_period(pwmout_t* obj, float seconds)
|
||||
{
|
||||
pwmout_period_us(obj, seconds * 1000000.0f);
|
||||
}
|
||||
|
||||
void pwmout_period_ms(pwmout_t* obj, int ms) {
|
||||
void pwmout_period_ms(pwmout_t* obj, int ms)
|
||||
{
|
||||
pwmout_period_us(obj, ms * 1000);
|
||||
}
|
||||
|
||||
// Set the PWM period, keeping the duty cycle the same.
|
||||
void pwmout_period_us(pwmout_t* obj, int us) {
|
||||
void pwmout_period_us(pwmout_t* obj, int us)
|
||||
{
|
||||
FTM_Type *base = ftm_addrs[obj->pwm_name >> TPM_SHIFT];
|
||||
float dc = pwmout_read(obj);
|
||||
|
||||
|
|
@ -122,15 +129,18 @@ void pwmout_period_us(pwmout_t* obj, int us) {
|
|||
pwmout_write(obj, dc);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
|
||||
void pwmout_pulsewidth(pwmout_t* obj, float seconds)
|
||||
{
|
||||
pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
|
||||
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms)
|
||||
{
|
||||
pwmout_pulsewidth_us(obj, ms * 1000);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
|
||||
void pwmout_pulsewidth_us(pwmout_t* obj, int us)
|
||||
{
|
||||
FTM_Type *base = ftm_addrs[obj->pwm_name >> TPM_SHIFT];
|
||||
uint32_t value = (uint32_t)(pwm_clock_mhz * (float)us);
|
||||
|
||||
|
|
|
|||
|
|
@ -41,7 +41,8 @@ static clock_name_t const uart_clocks[] = UART_CLOCK_FREQS;
|
|||
int stdio_uart_inited = 0;
|
||||
serial_t stdio_uart;
|
||||
|
||||
void serial_init(serial_t *obj, PinName tx, PinName rx) {
|
||||
void serial_init(serial_t *obj, PinName tx, PinName rx)
|
||||
{
|
||||
uint32_t uart_tx = pinmap_peripheral(tx, PinMap_UART_TX);
|
||||
uint32_t uart_rx = pinmap_peripheral(rx, PinMap_UART_RX);
|
||||
obj->index = pinmap_merge(uart_tx, uart_rx);
|
||||
|
|
@ -74,16 +75,19 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
|
|||
}
|
||||
}
|
||||
|
||||
void serial_free(serial_t *obj) {
|
||||
void serial_free(serial_t *obj)
|
||||
{
|
||||
UART_Deinit(uart_addrs[obj->index]);
|
||||
serial_irq_ids[obj->index] = 0;
|
||||
}
|
||||
|
||||
void serial_baud(serial_t *obj, int baudrate) {
|
||||
void serial_baud(serial_t *obj, int baudrate)
|
||||
{
|
||||
UART_SetBaudRate(uart_addrs[obj->index], (uint32_t)baudrate, CLOCK_GetFreq(uart_clocks[obj->index]));
|
||||
}
|
||||
|
||||
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
|
||||
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
|
||||
{
|
||||
UART_Type *base = uart_addrs[obj->index];
|
||||
uint8_t temp;
|
||||
/* Set bit count and parity mode. */
|
||||
|
|
@ -111,7 +115,8 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
|
|||
/******************************************************************************
|
||||
* INTERRUPTS HANDLING
|
||||
******************************************************************************/
|
||||
static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint32_t index) {
|
||||
static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint32_t index)
|
||||
{
|
||||
UART_Type *base = uart_addrs[index];
|
||||
|
||||
/* If RX overrun. */
|
||||
|
|
@ -130,27 +135,32 @@ static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint
|
|||
}
|
||||
}
|
||||
|
||||
void uart0_irq() {
|
||||
void uart0_irq()
|
||||
{
|
||||
uint32_t status_flags = UART0->S1;
|
||||
uart_irq((status_flags & kUART_TxDataRegEmptyFlag), (status_flags & kUART_RxDataRegFullFlag), 0);
|
||||
}
|
||||
|
||||
void uart1_irq() {
|
||||
void uart1_irq()
|
||||
{
|
||||
uint32_t status_flags = UART1->S1;
|
||||
uart_irq((status_flags & UART_S1_TDRE_MASK), (status_flags & UART_S1_RDRF_MASK), 1);
|
||||
}
|
||||
|
||||
void uart2_irq() {
|
||||
void uart2_irq()
|
||||
{
|
||||
uint32_t status_flags = UART2->S1;
|
||||
uart_irq((status_flags & UART_S1_TDRE_MASK), (status_flags & UART_S1_RDRF_MASK), 2);
|
||||
}
|
||||
|
||||
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
|
||||
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
|
||||
{
|
||||
irq_handler = handler;
|
||||
serial_irq_ids[obj->index] = id;
|
||||
}
|
||||
|
||||
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
|
||||
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
|
||||
{
|
||||
IRQn_Type uart_irqs[] = UART_RX_TX_IRQS;
|
||||
uint32_t vector = 0;
|
||||
|
||||
|
|
@ -210,7 +220,8 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
|
|||
}
|
||||
}
|
||||
|
||||
int serial_getc(serial_t *obj) {
|
||||
int serial_getc(serial_t *obj)
|
||||
{
|
||||
while (!serial_readable(obj));
|
||||
uint8_t data;
|
||||
data = UART_ReadByte(uart_addrs[obj->index]);
|
||||
|
|
@ -218,37 +229,44 @@ int serial_getc(serial_t *obj) {
|
|||
return data;
|
||||
}
|
||||
|
||||
void serial_putc(serial_t *obj, int c) {
|
||||
void serial_putc(serial_t *obj, int c)
|
||||
{
|
||||
while (!serial_writable(obj));
|
||||
UART_WriteByte(uart_addrs[obj->index], (uint8_t)c);
|
||||
}
|
||||
|
||||
int serial_readable(serial_t *obj) {
|
||||
int serial_readable(serial_t *obj)
|
||||
{
|
||||
uint32_t status_flags = UART_GetStatusFlags(uart_addrs[obj->index]);
|
||||
if (status_flags & kUART_RxOverrunFlag)
|
||||
UART_ClearStatusFlags(uart_addrs[obj->index], kUART_RxOverrunFlag);
|
||||
return (status_flags & kUART_RxDataRegFullFlag);
|
||||
}
|
||||
|
||||
int serial_writable(serial_t *obj) {
|
||||
int serial_writable(serial_t *obj)
|
||||
{
|
||||
uint32_t status_flags = UART_GetStatusFlags(uart_addrs[obj->index]);
|
||||
if (status_flags & kUART_RxOverrunFlag)
|
||||
UART_ClearStatusFlags(uart_addrs[obj->index], kUART_RxOverrunFlag);
|
||||
return (status_flags & kUART_TxDataRegEmptyFlag);
|
||||
}
|
||||
|
||||
void serial_clear(serial_t *obj) {
|
||||
void serial_clear(serial_t *obj)
|
||||
{
|
||||
}
|
||||
|
||||
void serial_pinout_tx(PinName tx) {
|
||||
void serial_pinout_tx(PinName tx)
|
||||
{
|
||||
pinmap_pinout(tx, PinMap_UART_TX);
|
||||
}
|
||||
|
||||
void serial_break_set(serial_t *obj) {
|
||||
void serial_break_set(serial_t *obj)
|
||||
{
|
||||
uart_addrs[obj->index]->C2 |= UART_C2_SBK_MASK;
|
||||
}
|
||||
|
||||
void serial_break_clear(serial_t *obj) {
|
||||
void serial_break_clear(serial_t *obj)
|
||||
{
|
||||
uart_addrs[obj->index]->C2 &= ~UART_C2_SBK_MASK;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -32,7 +32,8 @@ static SPI_Type *const spi_address[] = SPI_BASE_PTRS;
|
|||
/* Array of SPI bus clock frequencies */
|
||||
static clock_name_t const spi_clocks[] = SPI_CLOCK_FREQS;
|
||||
|
||||
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
|
||||
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
|
||||
{
|
||||
// determine the SPI to use
|
||||
uint32_t spi_mosi = pinmap_peripheral(mosi, PinMap_SPI_MOSI);
|
||||
uint32_t spi_miso = pinmap_peripheral(miso, PinMap_SPI_MISO);
|
||||
|
|
@ -53,12 +54,13 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
|
|||
}
|
||||
}
|
||||
|
||||
void spi_free(spi_t *obj) {
|
||||
void spi_free(spi_t *obj)
|
||||
{
|
||||
DSPI_Deinit(spi_address[obj->instance]);
|
||||
}
|
||||
|
||||
void spi_format(spi_t *obj, int bits, int mode, int slave) {
|
||||
|
||||
void spi_format(spi_t *obj, int bits, int mode, int slave)
|
||||
{
|
||||
dspi_master_config_t master_config;
|
||||
dspi_slave_config_t slave_config;
|
||||
|
||||
|
|
@ -84,18 +86,21 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
|
|||
}
|
||||
}
|
||||
|
||||
void spi_frequency(spi_t *obj, int hz) {
|
||||
void spi_frequency(spi_t *obj, int hz)
|
||||
{
|
||||
uint32_t busClock = CLOCK_GetFreq(spi_clocks[obj->instance]);
|
||||
DSPI_MasterSetBaudRate(spi_address[obj->instance], kDSPI_Ctar0, (uint32_t)hz, busClock);
|
||||
//Half clock period delay after SPI transfer
|
||||
DSPI_MasterSetDelayTimes(spi_address[obj->instance], kDSPI_Ctar0, kDSPI_LastSckToPcs, busClock, 500000000 / hz);
|
||||
}
|
||||
|
||||
static inline int spi_readable(spi_t * obj) {
|
||||
static inline int spi_readable(spi_t * obj)
|
||||
{
|
||||
return (DSPI_GetStatusFlags(spi_address[obj->instance]) & kDSPI_RxFifoDrainRequestFlag);
|
||||
}
|
||||
|
||||
int spi_master_write(spi_t *obj, int value) {
|
||||
int spi_master_write(spi_t *obj, int value)
|
||||
{
|
||||
dspi_command_data_config_t command;
|
||||
uint32_t rx_data;
|
||||
DSPI_GetDefaultDataCommandConfig(&command);
|
||||
|
|
@ -112,11 +117,13 @@ int spi_master_write(spi_t *obj, int value) {
|
|||
return rx_data & 0xffff;
|
||||
}
|
||||
|
||||
int spi_slave_receive(spi_t *obj) {
|
||||
int spi_slave_receive(spi_t *obj)
|
||||
{
|
||||
return spi_readable(obj);
|
||||
}
|
||||
|
||||
int spi_slave_read(spi_t *obj) {
|
||||
int spi_slave_read(spi_t *obj)
|
||||
{
|
||||
uint32_t rx_data;
|
||||
|
||||
while (!spi_readable(obj));
|
||||
|
|
@ -125,7 +132,8 @@ int spi_slave_read(spi_t *obj) {
|
|||
return rx_data & 0xffff;
|
||||
}
|
||||
|
||||
void spi_slave_write(spi_t *obj, int value) {
|
||||
void spi_slave_write(spi_t *obj, int value)
|
||||
{
|
||||
DSPI_SlaveWriteDataBlocking(spi_address[obj->instance], (uint32_t)value);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -21,7 +21,8 @@
|
|||
|
||||
static int us_ticker_inited = 0;
|
||||
|
||||
void us_ticker_init(void) {
|
||||
void us_ticker_init(void)
|
||||
{
|
||||
if (us_ticker_inited) {
|
||||
return;
|
||||
}
|
||||
|
|
@ -51,7 +52,8 @@ void us_ticker_init(void) {
|
|||
}
|
||||
|
||||
|
||||
uint32_t us_ticker_read() {
|
||||
uint32_t us_ticker_read()
|
||||
{
|
||||
if (!us_ticker_inited) {
|
||||
us_ticker_init();
|
||||
}
|
||||
|
|
@ -59,15 +61,18 @@ uint32_t us_ticker_read() {
|
|||
return ~(PIT_GetCurrentTimerCount(PIT, kPIT_Chnl_1));
|
||||
}
|
||||
|
||||
void us_ticker_disable_interrupt(void) {
|
||||
void us_ticker_disable_interrupt(void)
|
||||
{
|
||||
PIT_DisableInterrupts(PIT, kPIT_Chnl_3, kPIT_TimerInterruptEnable);
|
||||
}
|
||||
|
||||
void us_ticker_clear_interrupt(void) {
|
||||
void us_ticker_clear_interrupt(void)
|
||||
{
|
||||
PIT_ClearStatusFlags(PIT, kPIT_Chnl_3, PIT_TFLG_TIF_MASK);
|
||||
}
|
||||
|
||||
void us_ticker_set_interrupt(timestamp_t timestamp) {
|
||||
void us_ticker_set_interrupt(timestamp_t timestamp)
|
||||
{
|
||||
int delta = (int)(timestamp - us_ticker_read());
|
||||
if (delta <= 0) {
|
||||
// This event was in the past.
|
||||
|
|
|
|||
|
|
@ -14,7 +14,8 @@ extern "C" {
|
|||
|
||||
extern char Image$$RW_IRAM1$$ZI$$Limit[];
|
||||
|
||||
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
|
||||
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3)
|
||||
{
|
||||
uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
|
||||
uint32_t sp_limit = __current_sp();
|
||||
|
||||
|
|
|
|||
|
|
@ -32,11 +32,13 @@
|
|||
|
||||
extern void InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler);
|
||||
|
||||
void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
|
||||
void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
|
||||
{
|
||||
InstallIRQHandler(IRQn, vector);
|
||||
}
|
||||
|
||||
uint32_t __NVIC_GetVector(IRQn_Type IRQn) {
|
||||
uint32_t __NVIC_GetVector(IRQn_Type IRQn)
|
||||
{
|
||||
uint32_t *vectors = (uint32_t*)SCB->VTOR;
|
||||
return vectors[IRQn + 16];
|
||||
}
|
||||
|
|
|
|||
|
|
@ -27,7 +27,8 @@ static float pwm_clock_mhz;
|
|||
/* Array of FTM peripheral base address. */
|
||||
static FTM_Type *const ftm_addrs[] = FTM_BASE_PTRS;
|
||||
|
||||
void pwmout_init(pwmout_t* obj, PinName pin) {
|
||||
void pwmout_init(pwmout_t* obj, PinName pin)
|
||||
{
|
||||
PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
|
||||
MBED_ASSERT(pwm != (PWMName)NC);
|
||||
|
||||
|
|
@ -72,11 +73,13 @@ void pwmout_init(pwmout_t* obj, PinName pin) {
|
|||
pinmap_pinout(pin, PinMap_PWM);
|
||||
}
|
||||
|
||||
void pwmout_free(pwmout_t* obj) {
|
||||
void pwmout_free(pwmout_t* obj)
|
||||
{
|
||||
FTM_Deinit(ftm_addrs[obj->pwm_name >> TPM_SHIFT]);
|
||||
}
|
||||
|
||||
void pwmout_write(pwmout_t* obj, float value) {
|
||||
void pwmout_write(pwmout_t* obj, float value)
|
||||
{
|
||||
if (value < 0.0f) {
|
||||
value = 0.0f;
|
||||
} else if (value > 1.0f) {
|
||||
|
|
@ -93,7 +96,8 @@ void pwmout_write(pwmout_t* obj, float value) {
|
|||
FTM_SetSoftwareTrigger(base, true);
|
||||
}
|
||||
|
||||
float pwmout_read(pwmout_t* obj) {
|
||||
float pwmout_read(pwmout_t* obj)
|
||||
{
|
||||
FTM_Type *base = ftm_addrs[obj->pwm_name >> TPM_SHIFT];
|
||||
uint16_t count = (base->CONTROLS[obj->pwm_name & 0xF].CnV) & FTM_CnV_VAL_MASK;
|
||||
uint16_t mod = base->MOD & FTM_MOD_MOD_MASK;
|
||||
|
|
@ -104,16 +108,19 @@ float pwmout_read(pwmout_t* obj) {
|
|||
return (v > 1.0f) ? (1.0f) : (v);
|
||||
}
|
||||
|
||||
void pwmout_period(pwmout_t* obj, float seconds) {
|
||||
void pwmout_period(pwmout_t* obj, float seconds)
|
||||
{
|
||||
pwmout_period_us(obj, seconds * 1000000.0f);
|
||||
}
|
||||
|
||||
void pwmout_period_ms(pwmout_t* obj, int ms) {
|
||||
void pwmout_period_ms(pwmout_t* obj, int ms)
|
||||
{
|
||||
pwmout_period_us(obj, ms * 1000);
|
||||
}
|
||||
|
||||
// Set the PWM period, keeping the duty cycle the same.
|
||||
void pwmout_period_us(pwmout_t* obj, int us) {
|
||||
void pwmout_period_us(pwmout_t* obj, int us)
|
||||
{
|
||||
FTM_Type *base = ftm_addrs[obj->pwm_name >> TPM_SHIFT];
|
||||
float dc = pwmout_read(obj);
|
||||
|
||||
|
|
@ -122,15 +129,18 @@ void pwmout_period_us(pwmout_t* obj, int us) {
|
|||
pwmout_write(obj, dc);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
|
||||
void pwmout_pulsewidth(pwmout_t* obj, float seconds)
|
||||
{
|
||||
pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
|
||||
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms)
|
||||
{
|
||||
pwmout_pulsewidth_us(obj, ms * 1000);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
|
||||
void pwmout_pulsewidth_us(pwmout_t* obj, int us)
|
||||
{
|
||||
FTM_Type *base = ftm_addrs[obj->pwm_name >> TPM_SHIFT];
|
||||
uint32_t value = (uint32_t)(pwm_clock_mhz * (float)us);
|
||||
|
||||
|
|
|
|||
|
|
@ -41,7 +41,8 @@ static clock_name_t const uart_clocks[] = UART_CLOCK_FREQS;
|
|||
int stdio_uart_inited = 0;
|
||||
serial_t stdio_uart;
|
||||
|
||||
void serial_init(serial_t *obj, PinName tx, PinName rx) {
|
||||
void serial_init(serial_t *obj, PinName tx, PinName rx)
|
||||
{
|
||||
uint32_t uart_tx = pinmap_peripheral(tx, PinMap_UART_TX);
|
||||
uint32_t uart_rx = pinmap_peripheral(rx, PinMap_UART_RX);
|
||||
obj->index = pinmap_merge(uart_tx, uart_rx);
|
||||
|
|
@ -74,16 +75,19 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
|
|||
}
|
||||
}
|
||||
|
||||
void serial_free(serial_t *obj) {
|
||||
void serial_free(serial_t *obj)
|
||||
{
|
||||
UART_Deinit(uart_addrs[obj->index]);
|
||||
serial_irq_ids[obj->index] = 0;
|
||||
}
|
||||
|
||||
void serial_baud(serial_t *obj, int baudrate) {
|
||||
void serial_baud(serial_t *obj, int baudrate)
|
||||
{
|
||||
UART_SetBaudRate(uart_addrs[obj->index], (uint32_t)baudrate, CLOCK_GetFreq(uart_clocks[obj->index]));
|
||||
}
|
||||
|
||||
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
|
||||
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
|
||||
{
|
||||
UART_Type *base = uart_addrs[obj->index];
|
||||
uint8_t temp;
|
||||
/* Set bit count and parity mode. */
|
||||
|
|
@ -111,7 +115,8 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
|
|||
/******************************************************************************
|
||||
* INTERRUPTS HANDLING
|
||||
******************************************************************************/
|
||||
static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint32_t index) {
|
||||
static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint32_t index)
|
||||
{
|
||||
UART_Type *base = uart_addrs[index];
|
||||
|
||||
/* If RX overrun. */
|
||||
|
|
@ -130,42 +135,50 @@ static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint
|
|||
}
|
||||
}
|
||||
|
||||
void uart0_irq() {
|
||||
void uart0_irq()
|
||||
{
|
||||
uint32_t status_flags = UART0->S1;
|
||||
uart_irq((status_flags & kUART_TxDataRegEmptyFlag), (status_flags & kUART_RxDataRegFullFlag), 0);
|
||||
}
|
||||
|
||||
void uart1_irq() {
|
||||
void uart1_irq()
|
||||
{
|
||||
uint32_t status_flags = UART1->S1;
|
||||
uart_irq((status_flags & UART_S1_TDRE_MASK), (status_flags & UART_S1_RDRF_MASK), 1);
|
||||
}
|
||||
|
||||
void uart2_irq() {
|
||||
void uart2_irq()
|
||||
{
|
||||
uint32_t status_flags = UART2->S1;
|
||||
uart_irq((status_flags & UART_S1_TDRE_MASK), (status_flags & UART_S1_RDRF_MASK), 2);
|
||||
}
|
||||
|
||||
void uart3_irq() {
|
||||
void uart3_irq()
|
||||
{
|
||||
uint32_t status_flags = UART3->S1;
|
||||
uart_irq((status_flags & UART_S1_TDRE_MASK), (status_flags & UART_S1_RDRF_MASK), 3);
|
||||
}
|
||||
|
||||
void uart4_irq() {
|
||||
void uart4_irq()
|
||||
{
|
||||
uint32_t status_flags = UART4->S1;
|
||||
uart_irq((status_flags & UART_S1_TDRE_MASK), (status_flags & UART_S1_RDRF_MASK), 4);
|
||||
}
|
||||
|
||||
void uart5_irq() {
|
||||
void uart5_irq()
|
||||
{
|
||||
uint32_t status_flags = UART5->S1;
|
||||
uart_irq((status_flags & UART_S1_TDRE_MASK), (status_flags & UART_S1_RDRF_MASK), 5);
|
||||
}
|
||||
|
||||
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
|
||||
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
|
||||
{
|
||||
irq_handler = handler;
|
||||
serial_irq_ids[obj->index] = id;
|
||||
}
|
||||
|
||||
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
|
||||
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
|
||||
{
|
||||
IRQn_Type uart_irqs[] = UART_RX_TX_IRQS;
|
||||
uint32_t vector = 0;
|
||||
|
||||
|
|
@ -234,7 +247,8 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
|
|||
}
|
||||
}
|
||||
|
||||
int serial_getc(serial_t *obj) {
|
||||
int serial_getc(serial_t *obj)
|
||||
{
|
||||
while (!serial_readable(obj));
|
||||
uint8_t data;
|
||||
data = UART_ReadByte(uart_addrs[obj->index]);
|
||||
|
|
@ -242,37 +256,44 @@ int serial_getc(serial_t *obj) {
|
|||
return data;
|
||||
}
|
||||
|
||||
void serial_putc(serial_t *obj, int c) {
|
||||
void serial_putc(serial_t *obj, int c)
|
||||
{
|
||||
while (!serial_writable(obj));
|
||||
UART_WriteByte(uart_addrs[obj->index], (uint8_t)c);
|
||||
}
|
||||
|
||||
int serial_readable(serial_t *obj) {
|
||||
int serial_readable(serial_t *obj)
|
||||
{
|
||||
uint32_t status_flags = UART_GetStatusFlags(uart_addrs[obj->index]);
|
||||
if (status_flags & kUART_RxOverrunFlag)
|
||||
UART_ClearStatusFlags(uart_addrs[obj->index], kUART_RxOverrunFlag);
|
||||
return (status_flags & kUART_RxDataRegFullFlag);
|
||||
}
|
||||
|
||||
int serial_writable(serial_t *obj) {
|
||||
int serial_writable(serial_t *obj)
|
||||
{
|
||||
uint32_t status_flags = UART_GetStatusFlags(uart_addrs[obj->index]);
|
||||
if (status_flags & kUART_RxOverrunFlag)
|
||||
UART_ClearStatusFlags(uart_addrs[obj->index], kUART_RxOverrunFlag);
|
||||
return (status_flags & kUART_TxDataRegEmptyFlag);
|
||||
}
|
||||
|
||||
void serial_clear(serial_t *obj) {
|
||||
void serial_clear(serial_t *obj)
|
||||
{
|
||||
}
|
||||
|
||||
void serial_pinout_tx(PinName tx) {
|
||||
void serial_pinout_tx(PinName tx)
|
||||
{
|
||||
pinmap_pinout(tx, PinMap_UART_TX);
|
||||
}
|
||||
|
||||
void serial_break_set(serial_t *obj) {
|
||||
void serial_break_set(serial_t *obj)
|
||||
{
|
||||
uart_addrs[obj->index]->C2 |= UART_C2_SBK_MASK;
|
||||
}
|
||||
|
||||
void serial_break_clear(serial_t *obj) {
|
||||
void serial_break_clear(serial_t *obj)
|
||||
{
|
||||
uart_addrs[obj->index]->C2 &= ~UART_C2_SBK_MASK;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -32,7 +32,8 @@ static SPI_Type *const spi_address[] = SPI_BASE_PTRS;
|
|||
/* Array of SPI bus clock frequencies */
|
||||
static clock_name_t const spi_clocks[] = SPI_CLOCK_FREQS;
|
||||
|
||||
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
|
||||
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
|
||||
{
|
||||
// determine the SPI to use
|
||||
uint32_t spi_mosi = pinmap_peripheral(mosi, PinMap_SPI_MOSI);
|
||||
uint32_t spi_miso = pinmap_peripheral(miso, PinMap_SPI_MISO);
|
||||
|
|
@ -53,12 +54,13 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
|
|||
}
|
||||
}
|
||||
|
||||
void spi_free(spi_t *obj) {
|
||||
void spi_free(spi_t *obj)
|
||||
{
|
||||
DSPI_Deinit(spi_address[obj->instance]);
|
||||
}
|
||||
|
||||
void spi_format(spi_t *obj, int bits, int mode, int slave) {
|
||||
|
||||
void spi_format(spi_t *obj, int bits, int mode, int slave)
|
||||
{
|
||||
dspi_master_config_t master_config;
|
||||
dspi_slave_config_t slave_config;
|
||||
|
||||
|
|
@ -84,18 +86,21 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
|
|||
}
|
||||
}
|
||||
|
||||
void spi_frequency(spi_t *obj, int hz) {
|
||||
void spi_frequency(spi_t *obj, int hz)
|
||||
{
|
||||
uint32_t busClock = CLOCK_GetFreq(spi_clocks[obj->instance]);
|
||||
DSPI_MasterSetBaudRate(spi_address[obj->instance], kDSPI_Ctar0, (uint32_t)hz, busClock);
|
||||
//Half clock period delay after SPI transfer
|
||||
DSPI_MasterSetDelayTimes(spi_address[obj->instance], kDSPI_Ctar0, kDSPI_LastSckToPcs, busClock, 500000000 / hz);
|
||||
}
|
||||
|
||||
static inline int spi_readable(spi_t * obj) {
|
||||
static inline int spi_readable(spi_t * obj)
|
||||
{
|
||||
return (DSPI_GetStatusFlags(spi_address[obj->instance]) & kDSPI_RxFifoDrainRequestFlag);
|
||||
}
|
||||
|
||||
int spi_master_write(spi_t *obj, int value) {
|
||||
int spi_master_write(spi_t *obj, int value)
|
||||
{
|
||||
dspi_command_data_config_t command;
|
||||
uint32_t rx_data;
|
||||
DSPI_GetDefaultDataCommandConfig(&command);
|
||||
|
|
@ -112,11 +117,13 @@ int spi_master_write(spi_t *obj, int value) {
|
|||
return rx_data & 0xffff;
|
||||
}
|
||||
|
||||
int spi_slave_receive(spi_t *obj) {
|
||||
int spi_slave_receive(spi_t *obj)
|
||||
{
|
||||
return spi_readable(obj);
|
||||
}
|
||||
|
||||
int spi_slave_read(spi_t *obj) {
|
||||
int spi_slave_read(spi_t *obj)
|
||||
{
|
||||
uint32_t rx_data;
|
||||
|
||||
while (!spi_readable(obj));
|
||||
|
|
@ -125,7 +132,8 @@ int spi_slave_read(spi_t *obj) {
|
|||
return rx_data & 0xffff;
|
||||
}
|
||||
|
||||
void spi_slave_write(spi_t *obj, int value) {
|
||||
void spi_slave_write(spi_t *obj, int value)
|
||||
{
|
||||
DSPI_SlaveWriteDataBlocking(spi_address[obj->instance], (uint32_t)value);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -902,7 +902,8 @@ static int32_t checkForEachBlockInRange(uint64_t startAddr, uint32_t size, int32
|
|||
return ARM_DRIVER_OK;
|
||||
}
|
||||
|
||||
static int32_t blockIsProgrammable(const ARM_STORAGE_BLOCK *blockP) {
|
||||
static int32_t blockIsProgrammable(const ARM_STORAGE_BLOCK *blockP)
|
||||
{
|
||||
if (!blockP->attributes.programmable) {
|
||||
return ARM_STORAGE_ERROR_NOT_PROGRAMMABLE;
|
||||
}
|
||||
|
|
@ -910,7 +911,8 @@ static int32_t blockIsProgrammable(const ARM_STORAGE_BLOCK *blockP) {
|
|||
return ARM_DRIVER_OK;
|
||||
}
|
||||
|
||||
static int32_t blockIsErasable(const ARM_STORAGE_BLOCK *blockP) {
|
||||
static int32_t blockIsErasable(const ARM_STORAGE_BLOCK *blockP)
|
||||
{
|
||||
if (!blockP->attributes.erasable) {
|
||||
return ARM_STORAGE_ERROR_NOT_ERASABLE;
|
||||
}
|
||||
|
|
@ -964,7 +966,8 @@ static int32_t initialize(ARM_Storage_Callback_t callback)
|
|||
return 1; /* synchronous completion. */
|
||||
}
|
||||
|
||||
static int32_t uninitialize(void) {
|
||||
static int32_t uninitialize(void)
|
||||
{
|
||||
tr_debug("called uninitialize");
|
||||
|
||||
struct mtd_k64f_data *context = &mtd_k64f_data;
|
||||
|
|
@ -1170,7 +1173,8 @@ static int32_t getInfo(ARM_STORAGE_INFO *infoP)
|
|||
return ARM_DRIVER_OK;
|
||||
}
|
||||
|
||||
static uint32_t resolveAddress(uint64_t addr) {
|
||||
static uint32_t resolveAddress(uint64_t addr)
|
||||
{
|
||||
return (uint32_t)addr;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -21,7 +21,8 @@
|
|||
|
||||
static int us_ticker_inited = 0;
|
||||
|
||||
void us_ticker_init(void) {
|
||||
void us_ticker_init(void)
|
||||
{
|
||||
if (us_ticker_inited) {
|
||||
return;
|
||||
}
|
||||
|
|
@ -51,7 +52,8 @@ void us_ticker_init(void) {
|
|||
}
|
||||
|
||||
|
||||
uint32_t us_ticker_read() {
|
||||
uint32_t us_ticker_read()
|
||||
{
|
||||
if (!us_ticker_inited) {
|
||||
us_ticker_init();
|
||||
}
|
||||
|
|
@ -59,15 +61,18 @@ uint32_t us_ticker_read() {
|
|||
return ~(PIT_GetCurrentTimerCount(PIT, kPIT_Chnl_1));
|
||||
}
|
||||
|
||||
void us_ticker_disable_interrupt(void) {
|
||||
void us_ticker_disable_interrupt(void)
|
||||
{
|
||||
PIT_DisableInterrupts(PIT, kPIT_Chnl_3, kPIT_TimerInterruptEnable);
|
||||
}
|
||||
|
||||
void us_ticker_clear_interrupt(void) {
|
||||
void us_ticker_clear_interrupt(void)
|
||||
{
|
||||
PIT_ClearStatusFlags(PIT, kPIT_Chnl_3, PIT_TFLG_TIF_MASK);
|
||||
}
|
||||
|
||||
void us_ticker_set_interrupt(timestamp_t timestamp) {
|
||||
void us_ticker_set_interrupt(timestamp_t timestamp)
|
||||
{
|
||||
int delta = (int)(timestamp - us_ticker_read());
|
||||
if (delta <= 0) {
|
||||
// This event was in the past.
|
||||
|
|
|
|||
|
|
@ -29,7 +29,8 @@ static ADC_Type *const adc_addrs[] = ADC_BASE_PTRS;
|
|||
|
||||
#define MAX_FADC 6000000
|
||||
|
||||
void analogin_init(analogin_t *obj, PinName pin) {
|
||||
void analogin_init(analogin_t *obj, PinName pin)
|
||||
{
|
||||
obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
|
||||
MBED_ASSERT(obj->adc != (ADCName)NC);
|
||||
|
||||
|
|
@ -57,7 +58,8 @@ void analogin_init(analogin_t *obj, PinName pin) {
|
|||
pinmap_pinout(pin, PinMap_ADC);
|
||||
}
|
||||
|
||||
uint16_t analogin_read_u16(analogin_t *obj) {
|
||||
uint16_t analogin_read_u16(analogin_t *obj)
|
||||
{
|
||||
uint32_t instance = obj->adc >> ADC_INSTANCE_SHIFT;
|
||||
adc16_channel_config_t adc16_channel_config;
|
||||
|
||||
|
|
@ -83,7 +85,8 @@ uint16_t analogin_read_u16(analogin_t *obj) {
|
|||
return ADC16_GetChannelConversionValue(adc_addrs[instance], 0);
|
||||
}
|
||||
|
||||
float analogin_read(analogin_t *obj) {
|
||||
float analogin_read(analogin_t *obj)
|
||||
{
|
||||
uint16_t value = analogin_read_u16(obj);
|
||||
return (float)value * (1.0f / (float)0xFFFF);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -28,7 +28,8 @@ static DAC_Type *const dac_bases[] = DAC_BASE_PTRS;
|
|||
|
||||
#define RANGE_12BIT 0xFFF
|
||||
|
||||
void analogout_init(dac_t *obj, PinName pin) {
|
||||
void analogout_init(dac_t *obj, PinName pin)
|
||||
{
|
||||
dac_config_t dac_config;
|
||||
obj->dac = (DACName)pinmap_peripheral(pin, PinMap_DAC);
|
||||
if (obj->dac == (DACName)NC) {
|
||||
|
|
@ -41,17 +42,22 @@ void analogout_init(dac_t *obj, PinName pin) {
|
|||
DAC_SetBufferValue(dac_bases[obj->dac], 0, 0);
|
||||
}
|
||||
|
||||
void analogout_free(dac_t *obj) {}
|
||||
void analogout_free(dac_t *obj)
|
||||
{
|
||||
}
|
||||
|
||||
static inline void dac_write(dac_t *obj, int value) {
|
||||
static inline void dac_write(dac_t *obj, int value)
|
||||
{
|
||||
DAC_SetBufferValue(dac_bases[obj->dac], 0, (uint16_t)value);
|
||||
}
|
||||
|
||||
static inline int dac_read(dac_t *obj) {
|
||||
static inline int dac_read(dac_t *obj)
|
||||
{
|
||||
return ((DAC0->DAT[obj->dac].DATH << 8) | DAC0->DAT[obj->dac].DATL);
|
||||
}
|
||||
|
||||
void analogout_write(dac_t *obj, float value) {
|
||||
void analogout_write(dac_t *obj, float value)
|
||||
{
|
||||
if (value < 0.0f) {
|
||||
dac_write(obj, 0);
|
||||
} else if (value > 1.0f) {
|
||||
|
|
@ -61,16 +67,19 @@ void analogout_write(dac_t *obj, float value) {
|
|||
}
|
||||
}
|
||||
|
||||
void analogout_write_u16(dac_t *obj, uint16_t value) {
|
||||
void analogout_write_u16(dac_t *obj, uint16_t value)
|
||||
{
|
||||
dac_write(obj, value >> 4); // 12-bit
|
||||
}
|
||||
|
||||
float analogout_read(dac_t *obj) {
|
||||
float analogout_read(dac_t *obj)
|
||||
{
|
||||
uint32_t value = dac_read(obj);
|
||||
return (float)value * (1.0f / (float)RANGE_12BIT);
|
||||
}
|
||||
|
||||
uint16_t analogout_read_u16(dac_t *obj) {
|
||||
uint16_t analogout_read_u16(dac_t *obj)
|
||||
{
|
||||
uint32_t value = dac_read(obj); // 12-bit
|
||||
return (value << 4) | ((value >> 8) & 0x003F);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -21,7 +21,8 @@
|
|||
|
||||
static GPIO_Type * const gpio_addrs[] = GPIO_BASE_PTRS;
|
||||
|
||||
uint32_t gpio_set(PinName pin) {
|
||||
uint32_t gpio_set(PinName pin)
|
||||
{
|
||||
MBED_ASSERT(pin != (PinName)NC);
|
||||
uint32_t pin_num = pin & 0xFF;
|
||||
|
||||
|
|
@ -29,7 +30,8 @@ uint32_t gpio_set(PinName pin) {
|
|||
return 1 << pin_num;
|
||||
}
|
||||
|
||||
void gpio_init(gpio_t *obj, PinName pin) {
|
||||
void gpio_init(gpio_t *obj, PinName pin)
|
||||
{
|
||||
obj->pin = pin;
|
||||
if (pin == (PinName)NC)
|
||||
return;
|
||||
|
|
@ -37,11 +39,13 @@ void gpio_init(gpio_t *obj, PinName pin) {
|
|||
pin_function(pin, (int)kPORT_MuxAsGpio);
|
||||
}
|
||||
|
||||
void gpio_mode(gpio_t *obj, PinMode mode) {
|
||||
void gpio_mode(gpio_t *obj, PinMode mode)
|
||||
{
|
||||
pin_mode(obj->pin, mode);
|
||||
}
|
||||
|
||||
void gpio_dir(gpio_t *obj, PinDirection direction) {
|
||||
void gpio_dir(gpio_t *obj, PinDirection direction)
|
||||
{
|
||||
MBED_ASSERT(obj->pin != (PinName)NC);
|
||||
uint32_t port = obj->pin >> GPIO_PORT_SHIFT;
|
||||
uint32_t pin_num = obj->pin & 0xFF;
|
||||
|
|
@ -57,7 +61,8 @@ void gpio_dir(gpio_t *obj, PinDirection direction) {
|
|||
}
|
||||
}
|
||||
|
||||
void gpio_write(gpio_t *obj, int value) {
|
||||
void gpio_write(gpio_t *obj, int value)
|
||||
{
|
||||
MBED_ASSERT(obj->pin != (PinName)NC);
|
||||
uint32_t port = obj->pin >> GPIO_PORT_SHIFT;
|
||||
uint32_t pin = obj->pin & 0xFF;
|
||||
|
|
@ -65,7 +70,8 @@ void gpio_write(gpio_t *obj, int value) {
|
|||
GPIO_WritePinOutput(gpio_addrs[port], pin, value);
|
||||
}
|
||||
|
||||
int gpio_read(gpio_t *obj) {
|
||||
int gpio_read(gpio_t *obj)
|
||||
{
|
||||
MBED_ASSERT(obj->pin != (PinName)NC);
|
||||
uint32_t port = obj->pin >> GPIO_PORT_SHIFT;
|
||||
uint32_t pin = obj->pin & 0xFF;
|
||||
|
|
|
|||
|
|
@ -40,7 +40,8 @@ static const IRQn_Type port_irqs[] = PORT_IRQS;
|
|||
#define IRQ_FALLING_EDGE (10)
|
||||
#define IRQ_EITHER_EDGE (11)
|
||||
|
||||
static void handle_interrupt_in(PortName port, int ch_base) {
|
||||
static void handle_interrupt_in(PortName port, int ch_base)
|
||||
{
|
||||
uint32_t i;
|
||||
uint32_t interrupt_flags;
|
||||
PORT_Type *port_base = port_addrs[port];
|
||||
|
|
@ -79,13 +80,33 @@ static void handle_interrupt_in(PortName port, int ch_base) {
|
|||
PORT_ClearPinsInterruptFlags(port_base, interrupt_flags);
|
||||
}
|
||||
|
||||
void gpio_irqA(void) {handle_interrupt_in(PortA, 0);}
|
||||
void gpio_irqB(void) {handle_interrupt_in(PortB, 32);}
|
||||
void gpio_irqC(void) {handle_interrupt_in(PortC, 64);}
|
||||
void gpio_irqD(void) {handle_interrupt_in(PortD, 96);}
|
||||
void gpio_irqE(void) {handle_interrupt_in(PortE, 128);}
|
||||
void gpio_irqA(void)
|
||||
{
|
||||
handle_interrupt_in(PortA, 0);
|
||||
}
|
||||
|
||||
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
|
||||
void gpio_irqB(void)
|
||||
{
|
||||
handle_interrupt_in(PortB, 32);
|
||||
}
|
||||
|
||||
void gpio_irqC(void)
|
||||
{
|
||||
handle_interrupt_in(PortC, 64);
|
||||
}
|
||||
|
||||
void gpio_irqD(void)
|
||||
{
|
||||
handle_interrupt_in(PortD, 96);
|
||||
}
|
||||
|
||||
void gpio_irqE(void)
|
||||
{
|
||||
handle_interrupt_in(PortE, 128);
|
||||
}
|
||||
|
||||
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
|
||||
{
|
||||
if (pin == NC) {
|
||||
return -1;
|
||||
}
|
||||
|
|
@ -131,11 +152,13 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
|
|||
return 0;
|
||||
}
|
||||
|
||||
void gpio_irq_free(gpio_irq_t *obj) {
|
||||
void gpio_irq_free(gpio_irq_t *obj)
|
||||
{
|
||||
channel_ids[obj->ch] = 0;
|
||||
}
|
||||
|
||||
void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
|
||||
void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
|
||||
{
|
||||
PORT_Type *base = port_addrs[obj->port];
|
||||
port_interrupt_t irq_settings = kPORT_InterruptOrDMADisabled;
|
||||
|
||||
|
|
@ -176,11 +199,13 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
|
|||
base->PCR[obj->pin] |= PORT_PCR_ISF_MASK;
|
||||
}
|
||||
|
||||
void gpio_irq_enable(gpio_irq_t *obj) {
|
||||
void gpio_irq_enable(gpio_irq_t *obj)
|
||||
{
|
||||
NVIC_EnableIRQ(port_irqs[obj->port]);
|
||||
}
|
||||
|
||||
void gpio_irq_disable(gpio_irq_t *obj) {
|
||||
void gpio_irq_disable(gpio_irq_t *obj)
|
||||
{
|
||||
NVIC_DisableIRQ(port_irqs[obj->port]);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -24,7 +24,8 @@ typedef struct {
|
|||
PinName pin;
|
||||
} gpio_t;
|
||||
|
||||
static inline int gpio_is_connected(const gpio_t *obj) {
|
||||
static inline int gpio_is_connected(const gpio_t *obj)
|
||||
{
|
||||
return obj->pin != (PinName)NC;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -32,7 +32,8 @@ static I2C_Type *const i2c_addrs[] = I2C_BASE_PTRS;
|
|||
/* Array of I2C bus clock frequencies */
|
||||
static clock_name_t const i2c_clocks[] = I2C_CLOCK_FREQS;
|
||||
|
||||
void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
|
||||
void i2c_init(i2c_t *obj, PinName sda, PinName scl)
|
||||
{
|
||||
uint32_t i2c_sda = pinmap_peripheral(sda, PinMap_I2C_SDA);
|
||||
uint32_t i2c_scl = pinmap_peripheral(scl, PinMap_I2C_SCL);
|
||||
obj->instance = pinmap_merge(i2c_sda, i2c_scl);
|
||||
|
|
@ -57,7 +58,8 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
|
|||
#endif
|
||||
}
|
||||
|
||||
int i2c_start(i2c_t *obj) {
|
||||
int i2c_start(i2c_t *obj)
|
||||
{
|
||||
I2C_Type *base = i2c_addrs[obj->instance];
|
||||
uint32_t statusFlags = I2C_MasterGetStatusFlags(base);
|
||||
|
||||
|
|
@ -77,7 +79,8 @@ int i2c_start(i2c_t *obj) {
|
|||
return 0;
|
||||
}
|
||||
|
||||
int i2c_stop(i2c_t *obj) {
|
||||
int i2c_stop(i2c_t *obj)
|
||||
{
|
||||
if (I2C_MasterStop(i2c_addrs[obj->instance]) != kStatus_Success) {
|
||||
obj->next_repeated_start = 0;
|
||||
return 1;
|
||||
|
|
@ -86,14 +89,16 @@ int i2c_stop(i2c_t *obj) {
|
|||
return 0;
|
||||
}
|
||||
|
||||
void i2c_frequency(i2c_t *obj, int hz) {
|
||||
void i2c_frequency(i2c_t *obj, int hz)
|
||||
{
|
||||
uint32_t busClock;
|
||||
|
||||
busClock = CLOCK_GetFreq(i2c_clocks[obj->instance]);
|
||||
I2C_MasterSetBaudRate(i2c_addrs[obj->instance], hz, busClock);
|
||||
}
|
||||
|
||||
int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
|
||||
int i2c_read(i2c_t *obj, int address, char *data, int length, int stop)
|
||||
{
|
||||
I2C_Type *base = i2c_addrs[obj->instance];
|
||||
i2c_master_transfer_t master_xfer;
|
||||
|
||||
|
|
@ -121,7 +126,8 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
|
|||
return length;
|
||||
}
|
||||
|
||||
int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
|
||||
int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop)
|
||||
{
|
||||
I2C_Type *base = i2c_addrs[obj->instance];
|
||||
i2c_master_transfer_t master_xfer;
|
||||
|
||||
|
|
@ -145,11 +151,13 @@ int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
|
|||
return length;
|
||||
}
|
||||
|
||||
void i2c_reset(i2c_t *obj) {
|
||||
void i2c_reset(i2c_t *obj)
|
||||
{
|
||||
i2c_stop(obj);
|
||||
}
|
||||
|
||||
int i2c_byte_read(i2c_t *obj, int last) {
|
||||
int i2c_byte_read(i2c_t *obj, int last)
|
||||
{
|
||||
uint8_t data;
|
||||
I2C_Type *base = i2c_addrs[obj->instance];
|
||||
i2c_master_transfer_t master_xfer;
|
||||
|
|
@ -169,7 +177,8 @@ int i2c_byte_read(i2c_t *obj, int last) {
|
|||
return data;
|
||||
}
|
||||
|
||||
int i2c_byte_write(i2c_t *obj, int data) {
|
||||
int i2c_byte_write(i2c_t *obj, int data)
|
||||
{
|
||||
#if FSL_I2C_DRIVER_VERSION > MAKE_VERSION(2, 0, 1)
|
||||
if (I2C_MasterWriteBlocking(i2c_addrs[obj->instance], (uint8_t *)(&data), 1, kI2C_TransferNoStopFlag) == kStatus_Success) {
|
||||
return 1;
|
||||
|
|
@ -184,7 +193,8 @@ int i2c_byte_write(i2c_t *obj, int data) {
|
|||
|
||||
|
||||
#if DEVICE_I2CSLAVE
|
||||
void i2c_slave_mode(i2c_t *obj, int enable_slave) {
|
||||
void i2c_slave_mode(i2c_t *obj, int enable_slave)
|
||||
{
|
||||
i2c_slave_config_t slave_config;
|
||||
I2C_SlaveGetDefaultConfig(&slave_config);
|
||||
slave_config.slaveAddress = 0;
|
||||
|
|
@ -196,7 +206,8 @@ void i2c_slave_mode(i2c_t *obj, int enable_slave) {
|
|||
#endif
|
||||
}
|
||||
|
||||
int i2c_slave_receive(i2c_t *obj) {
|
||||
int i2c_slave_receive(i2c_t *obj)
|
||||
{
|
||||
uint32_t status_flags = I2C_SlaveGetStatusFlags(i2c_addrs[obj->instance]);
|
||||
|
||||
if (status_flags & kI2C_AddressMatchFlag) {
|
||||
|
|
@ -213,7 +224,8 @@ int i2c_slave_receive(i2c_t *obj) {
|
|||
}
|
||||
}
|
||||
|
||||
int i2c_slave_read(i2c_t *obj, char *data, int length) {
|
||||
int i2c_slave_read(i2c_t *obj, char *data, int length)
|
||||
{
|
||||
I2C_Type *base = i2c_addrs[obj->instance];
|
||||
|
||||
if (base->S & kI2C_AddressMatchFlag) {
|
||||
|
|
@ -228,7 +240,8 @@ int i2c_slave_read(i2c_t *obj, char *data, int length) {
|
|||
return length;
|
||||
}
|
||||
|
||||
int i2c_slave_write(i2c_t *obj, const char *data, int length) {
|
||||
int i2c_slave_write(i2c_t *obj, const char *data, int length)
|
||||
{
|
||||
I2C_Type *base = i2c_addrs[obj->instance];
|
||||
|
||||
I2C_SlaveWriteBlocking(base, (uint8_t *)data, length);
|
||||
|
|
@ -241,7 +254,8 @@ int i2c_slave_write(i2c_t *obj, const char *data, int length) {
|
|||
return length;
|
||||
}
|
||||
|
||||
void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
|
||||
void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask)
|
||||
{
|
||||
i2c_addrs[obj->instance]->A1 = address & 0xfe;
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -21,7 +21,8 @@
|
|||
/* Array of PORT peripheral base address. */
|
||||
static PORT_Type *const port_addrs[] = PORT_BASE_PTRS;
|
||||
|
||||
void pin_function(PinName pin, int function) {
|
||||
void pin_function(PinName pin, int function)
|
||||
{
|
||||
MBED_ASSERT(pin != (PinName)NC);
|
||||
clock_ip_name_t port_clocks[] = PORT_CLOCKS;
|
||||
|
||||
|
|
@ -30,7 +31,8 @@ void pin_function(PinName pin, int function) {
|
|||
PORT_SetPinMux(port_addrs[pin >> GPIO_PORT_SHIFT], pin & 0xFF, (port_mux_t)function);
|
||||
}
|
||||
|
||||
void pin_mode(PinName pin, PinMode mode) {
|
||||
void pin_mode(PinName pin, PinMode mode)
|
||||
{
|
||||
MBED_ASSERT(pin != (PinName)NC);
|
||||
uint32_t instance = pin >> GPIO_PORT_SHIFT;
|
||||
uint32_t pinName = pin & 0xFF;
|
||||
|
|
|
|||
|
|
@ -23,11 +23,13 @@
|
|||
/* Array of GPIO peripheral base address. */
|
||||
static GPIO_Type *const port_addrs[] = GPIO_BASE_PTRS;
|
||||
|
||||
PinName port_pin(PortName port, int pin_n) {
|
||||
PinName port_pin(PortName port, int pin_n)
|
||||
{
|
||||
return (PinName)((port << GPIO_PORT_SHIFT) | pin_n);
|
||||
}
|
||||
|
||||
void port_init(port_t *obj, PortName port, int mask, PinDirection dir) {
|
||||
void port_init(port_t *obj, PortName port, int mask, PinDirection dir)
|
||||
{
|
||||
obj->port = port;
|
||||
obj->mask = mask;
|
||||
|
||||
|
|
@ -41,8 +43,8 @@ void port_init(port_t *obj, PortName port, int mask, PinDirection dir) {
|
|||
port_dir(obj, dir);
|
||||
}
|
||||
|
||||
void port_mode(port_t *obj, PinMode mode) {
|
||||
|
||||
void port_mode(port_t *obj, PinMode mode)
|
||||
{
|
||||
// The mode is set per pin: reuse pinmap logic
|
||||
for (uint32_t i = 0; i < 32; i++) {
|
||||
if (obj->mask & (1 << i)) {
|
||||
|
|
@ -51,7 +53,8 @@ void port_mode(port_t *obj, PinMode mode) {
|
|||
}
|
||||
}
|
||||
|
||||
void port_dir(port_t *obj, PinDirection dir) {
|
||||
void port_dir(port_t *obj, PinDirection dir)
|
||||
{
|
||||
GPIO_Type *base = port_addrs[obj->port];
|
||||
uint32_t direction = base->PDDR;
|
||||
|
||||
|
|
@ -66,14 +69,16 @@ void port_dir(port_t *obj, PinDirection dir) {
|
|||
base->PDDR = direction;
|
||||
}
|
||||
|
||||
void port_write(port_t *obj, int value) {
|
||||
void port_write(port_t *obj, int value)
|
||||
{
|
||||
GPIO_Type *base = port_addrs[obj->port];
|
||||
uint32_t input = base->PDIR & ~obj->mask;
|
||||
|
||||
base->PDOR = (input | (uint32_t)(value & obj->mask));
|
||||
}
|
||||
|
||||
int port_read(port_t *obj) {
|
||||
int port_read(port_t *obj)
|
||||
{
|
||||
GPIO_Type *base = port_addrs[obj->port];
|
||||
|
||||
return (int)(base->PDIR & obj->mask);
|
||||
|
|
|
|||
|
|
@ -23,7 +23,8 @@
|
|||
|
||||
extern void rtc_setup_oscillator(RTC_Type *base);
|
||||
|
||||
void rtc_init(void) {
|
||||
void rtc_init(void)
|
||||
{
|
||||
rtc_config_t rtcConfig;
|
||||
|
||||
RTC_GetDefaultConfig(&rtcConfig);
|
||||
|
|
@ -34,7 +35,8 @@ void rtc_init(void) {
|
|||
RTC_StartTimer(RTC);
|
||||
}
|
||||
|
||||
void rtc_free(void) {
|
||||
void rtc_free(void)
|
||||
{
|
||||
RTC_Deinit(RTC);
|
||||
}
|
||||
|
||||
|
|
@ -42,16 +44,19 @@ void rtc_free(void) {
|
|||
* Little check routine to see if the RTC has been enabled
|
||||
* 0 = Disabled, 1 = Enabled
|
||||
*/
|
||||
int rtc_isenabled(void) {
|
||||
int rtc_isenabled(void)
|
||||
{
|
||||
CLOCK_EnableClock(kCLOCK_Rtc0);
|
||||
return (int)((RTC->SR & RTC_SR_TCE_MASK) >> RTC_SR_TCE_SHIFT);
|
||||
}
|
||||
|
||||
time_t rtc_read(void) {
|
||||
time_t rtc_read(void)
|
||||
{
|
||||
return (time_t)RTC->TSR;
|
||||
}
|
||||
|
||||
void rtc_write(time_t t) {
|
||||
void rtc_write(time_t t)
|
||||
{
|
||||
if (t == 0) {
|
||||
t = 1;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -18,13 +18,15 @@
|
|||
#include "fsl_smc.h"
|
||||
#include "fsl_clock_config.h"
|
||||
|
||||
void sleep(void) {
|
||||
void sleep(void)
|
||||
{
|
||||
SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll);
|
||||
|
||||
SMC_SetPowerModeWait(SMC);
|
||||
}
|
||||
|
||||
void deepsleep(void) {
|
||||
void deepsleep(void)
|
||||
{
|
||||
#if (defined(FSL_FEATURE_SOC_MCG_COUNT) && FSL_FEATURE_SOC_MCG_COUNT)
|
||||
mcg_mode_t mode = CLOCK_GetMode();
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue