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[STM32] HAL F1: I2C fix btf / rxne cases 

Applying the same fix as in L1 and F4.
This is an alignement to F4 HAL as the same IP is used.
pull/3442/head
Laurent MEUNIER 2016-12-08 09:46:54 +01:00
parent f88803b7fe
commit e7cab5c8dc
1 changed files with 33 additions and 41 deletions
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74
targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_i2c.c
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@ -3980,6 +3980,7 @@ static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
return HAL_OK;
}
/**
* @brief Handle RXNE flag for Master
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
@ -3988,6 +3989,7 @@ static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
*/
static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
{
if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
{
uint32_t tmp = 0U;
@ -4001,34 +4003,24 @@ static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
}
else if((tmp == 2U) || (tmp == 3U))
{
if(hi2c->XferOptions != I2C_NEXT_FRAME)
{
/* Disable Acknowledge */
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
/* Enable Pos */
hi2c->Instance->CR1 |= I2C_CR1_POS;
}
else
{
/* Enable Acknowledge */
hi2c->Instance->CR1 |= I2C_CR1_ACK;
}
/* Disable Acknowledge */
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
/* Enable Pos */
hi2c->Instance->CR1 |= I2C_CR1_POS;
/* Disable BUF interrupt */
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
}
else
{
if(hi2c->XferOptions != I2C_NEXT_FRAME)
/* Disable Acknowledge */
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
if(hi2c->XferOptions == I2C_NEXT_FRAME)
{
/* Disable Acknowledge */
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
}
else
{
/* Enable Acknowledge */
hi2c->Instance->CR1 |= I2C_CR1_ACK;
/* Enable Pos */
hi2c->Instance->CR1 |= I2C_CR1_POS;
}
/* Disable EVT, BUF and ERR interrupt */
@ -4038,17 +4030,17 @@ static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
hi2c->XferCount--;
tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
hi2c->State = HAL_I2C_STATE_READY;
if(hi2c->Mode == HAL_I2C_MODE_MEM)
{
hi2c->PreviousState = I2C_STATE_NONE;
hi2c->Mode = HAL_I2C_MODE_NONE;
HAL_I2C_MemRxCpltCallback(hi2c);
}
else
{
hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
hi2c->Mode = HAL_I2C_MODE_NONE;
HAL_I2C_MasterRxCpltCallback(hi2c);
}
@ -4066,6 +4058,7 @@ static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
{
/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
uint32_t tmp;
uint32_t CurrentXferOptions = hi2c->XferOptions;
if(hi2c->XferCount == 3U)
@ -4085,25 +4078,21 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
/* Prepare next transfer or stop current transfer */
if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
{
if(CurrentXferOptions != I2C_NEXT_FRAME)
{
/* Disable Acknowledge */
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
}
else
{
/* Enable Acknowledge */
hi2c->Instance->CR1 |= I2C_CR1_ACK;
}
/* Disable Acknowledge */
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
/* Disable EVT and ERR interrupt */
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
if((CurrentXferOptions == I2C_NEXT_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME))
{
/* Generate Start */
hi2c->Instance->CR1 |= I2C_CR1_START;
}
tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
}
else
{
/* Disable EVT and ERR interrupt */
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
/* Generate Stop */
hi2c->Instance->CR1 |= I2C_CR1_STOP;
}
@ -4116,18 +4105,20 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
hi2c->XferCount--;
/* Disable EVT and ERR interrupt */
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
hi2c->State = HAL_I2C_STATE_READY;
hi2c->PreviousState = I2C_STATE_NONE;
if(hi2c->Mode == HAL_I2C_MODE_MEM)
{
hi2c->PreviousState = I2C_STATE_NONE;
hi2c->Mode = HAL_I2C_MODE_NONE;
HAL_I2C_MemRxCpltCallback(hi2c);
}
else
{
hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
hi2c->Mode = HAL_I2C_MODE_NONE;
HAL_I2C_MasterRxCpltCallback(hi2c);
@ -4142,6 +4133,7 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
return HAL_OK;
}
/**
* @brief Handle SB flag for Master
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains