mirror of https://github.com/ARMmbed/mbed-os.git
STM32Cube_FW_F7_V1.5.1
CMSIS v1.1.0 => v1.1.2
STM32F7 HAL v1.1.0 => v1.1.2
pull/3583/head
jeromecoutant
parent
74f192add5
commit
f5b62208f4
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@ -2,8 +2,8 @@
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******************************************************************************
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* @file stm32f746xx.h
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* @author MCD Application Team
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* @version V1.1.0
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* @date 22-April-2016
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* @version V1.1.2
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* @date 23-September-2016
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* @brief CMSIS Cortex-M7 Device Peripheral Access Layer Header File.
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*
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* This file contains:
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@ -314,7 +314,6 @@ typedef struct
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__IO uint32_t IER; /*!< CEC interrupt enable register, Address offset:0x14 */
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}CEC_TypeDef;
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/**
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* @brief CRC calculation unit
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*/
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@ -407,7 +406,6 @@ typedef struct
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__IO uint32_t HIFCR; /*!< DMA high interrupt flag clear register, Address offset: 0x0C */
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} DMA_TypeDef;
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/**
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* @brief DMA2D Controller
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*/
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@ -854,7 +852,6 @@ typedef struct
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__IO uint32_t DIR; /*!< Debug Information register, Address offset: 0x18 */
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} SPDIFRX_TypeDef;
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/**
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* @brief SD host Interface
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*/
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@ -1322,7 +1319,7 @@ typedef struct
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#define IWDG ((IWDG_TypeDef *) IWDG_BASE)
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#define SPI2 ((SPI_TypeDef *) SPI2_BASE)
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#define SPI3 ((SPI_TypeDef *) SPI3_BASE)
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#define SPDIFRX ((SPDIFRX_TypeDef *) SPDIFRX_BASE)
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#define SPDIFRX ((SPDIFRX_TypeDef *) SPDIFRX_BASE)
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#define USART2 ((USART_TypeDef *) USART2_BASE)
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#define USART3 ((USART_TypeDef *) USART3_BASE)
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#define UART4 ((USART_TypeDef *) UART4_BASE)
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@ -3667,7 +3664,6 @@ typedef struct
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/******************** Bit definition for DMA2D_BGCLUT register **************/
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/******************************************************************************/
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/* */
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/* External Interrupt/Event Controller */
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@ -3977,6 +3973,7 @@ typedef struct
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#define FLASH_OPTCR1_BOOT_ADD0 0x0000FFFFU
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#define FLASH_OPTCR1_BOOT_ADD1 0xFFFF0000U
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/******************************************************************************/
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/* */
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/* Flexible Memory Controller */
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@ -6044,7 +6041,7 @@ typedef struct
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#define RTC_CR_OSEL_1 0x00400000U
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#define RTC_CR_POL 0x00100000U
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#define RTC_CR_COSEL 0x00080000U
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#define RTC_CR_BCK 0x00040000U
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#define RTC_CR_BKP 0x00040000U
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#define RTC_CR_SUB1H 0x00020000U
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#define RTC_CR_ADD1H 0x00010000U
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#define RTC_CR_TSIE 0x00008000U
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@ -6064,6 +6061,9 @@ typedef struct
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#define RTC_CR_WUCKSEL_1 0x00000002U
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#define RTC_CR_WUCKSEL_2 0x00000004U
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/* Legacy define */
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#define RTC_CR_BCK RTC_CR_BKP
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/******************** Bits definition for RTC_ISR register ******************/
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#define RTC_ISR_ITSF 0x00020000U
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#define RTC_ISR_RECALPF 0x00010000U
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@ -6639,7 +6639,6 @@ typedef struct
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#define SPDIFRX_DIR_THI 0x000013FFU /*!<Threshold LOW */
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#define SPDIFRX_DIR_TLO 0x1FFF0000U /*!<Threshold HIGH */
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/******************************************************************************/
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/* */
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/* SD host Interface */
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@ -8974,6 +8973,7 @@ typedef struct
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/**
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* @}
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*/
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@ -9027,28 +9027,28 @@ typedef struct
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/******************************* GPIO Instances *******************************/
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#define IS_GPIO_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == GPIOA) || \
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((__INSTANCE__) == GPIOB) || \
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((__INSTANCE__) == GPIOC) || \
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((__INSTANCE__) == GPIOD) || \
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((__INSTANCE__) == GPIOE) || \
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((__INSTANCE__) == GPIOF) || \
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((__INSTANCE__) == GPIOG) || \
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((__INSTANCE__) == GPIOH) || \
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((__INSTANCE__) == GPIOI) || \
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((__INSTANCE__) == GPIOJ) || \
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((__INSTANCE__) == GPIOK))
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((__INSTANCE__) == GPIOB) || \
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((__INSTANCE__) == GPIOC) || \
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((__INSTANCE__) == GPIOD) || \
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((__INSTANCE__) == GPIOE) || \
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((__INSTANCE__) == GPIOF) || \
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((__INSTANCE__) == GPIOG) || \
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((__INSTANCE__) == GPIOH) || \
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((__INSTANCE__) == GPIOI) || \
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((__INSTANCE__) == GPIOJ) || \
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((__INSTANCE__) == GPIOK))
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#define IS_GPIO_AF_INSTANCE(__INSTANCE__) (((__INSTANCE__) == GPIOA) || \
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((__INSTANCE__) == GPIOB) || \
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((__INSTANCE__) == GPIOC) || \
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((__INSTANCE__) == GPIOD) || \
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((__INSTANCE__) == GPIOE) || \
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((__INSTANCE__) == GPIOF) || \
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((__INSTANCE__) == GPIOG) || \
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((__INSTANCE__) == GPIOH) || \
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((__INSTANCE__) == GPIOI) || \
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((__INSTANCE__) == GPIOJ) || \
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((__INSTANCE__) == GPIOK))
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((__INSTANCE__) == GPIOB) || \
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((__INSTANCE__) == GPIOC) || \
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((__INSTANCE__) == GPIOD) || \
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((__INSTANCE__) == GPIOE) || \
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((__INSTANCE__) == GPIOF) || \
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((__INSTANCE__) == GPIOG) || \
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((__INSTANCE__) == GPIOH) || \
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((__INSTANCE__) == GPIOI) || \
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((__INSTANCE__) == GPIOJ) || \
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((__INSTANCE__) == GPIOK))
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/****************************** CEC Instances *********************************/
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#define IS_CEC_ALL_INSTANCE(__INSTANCE__) ((__INSTANCE__) == CEC)
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@ -9059,14 +9059,14 @@ typedef struct
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/******************************** I2C Instances *******************************/
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#define IS_I2C_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == I2C1) || \
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((__INSTANCE__) == I2C2) || \
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((__INSTANCE__) == I2C3) || \
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((__INSTANCE__) == I2C4))
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((__INSTANCE__) == I2C2) || \
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((__INSTANCE__) == I2C3) || \
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((__INSTANCE__) == I2C4))
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/******************************** I2S Instances *******************************/
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#define IS_I2S_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == SPI1) || \
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((__INSTANCE__) == SPI2) || \
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((__INSTANCE__) == SPI3))
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((__INSTANCE__) == SPI2) || \
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((__INSTANCE__) == SPI3))
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/******************************* LPTIM Instances ********************************/
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#define IS_LPTIM_INSTANCE(__INSTANCE__) ((__INSTANCE__) == LPTIM1)
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/******************************* RNG Instances ********************************/
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#define IS_RNG_ALL_INSTANCE(__INSTANCE__) ((__INSTANCE__) == RNG)
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/******************************** SPI Instances *******************************/
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#define IS_SPI_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == SPI1) || \
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((__INSTANCE__) == SPI2) || \
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((__INSTANCE__) == SPI3) || \
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((__INSTANCE__) == SPI4) || \
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((__INSTANCE__) == SPI5) || \
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((__INSTANCE__) == SPI6))
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((__INSTANCE__) == SPI2) || \
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((__INSTANCE__) == SPI3) || \
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((__INSTANCE__) == SPI4) || \
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((__INSTANCE__) == SPI5) || \
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((__INSTANCE__) == SPI6))
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/****************** TIM Instances : All supported instances *******************/
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#define IS_TIM_INSTANCE(__INSTANCE__) (((__INSTANCE__) == TIM1) || \
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******************************************************************************
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* @file stm32f7xx.h
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* @author MCD Application Team
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* @version V1.1.0
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* @date 22-April-2016
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* @version V1.1.2
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* @date 23-September-2016
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* @brief CMSIS STM32F7xx Device Peripheral Access Layer Header File.
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*
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* The file is the unique include file that the application programmer
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application
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*/
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#if !defined (STM32F756xx) && !defined (STM32F746xx) && !defined (STM32F745xx) && !defined (STM32F767xx) && \
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!defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx)
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!defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx) && !defined (STM32F722xx) && \
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!defined (STM32F723xx) && !defined (STM32F732xx) && !defined (STM32F733xx)
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/* #define STM32F756xx */ /*!< STM32F756VG, STM32F756ZG, STM32F756ZG, STM32F756IG, STM32F756BG,
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STM32F756NG Devices */
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#define STM32F746xx /*!< STM32F746VE, STM32F746VG, STM32F746ZE, STM32F746ZG, STM32F746IE, STM32F746IG,
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/* #define STM32F765xx */ /*!< STM32F765BI, STM32F765BG, STM32F765NI, STM32F765NG, STM32F765II, STM32F765IG,
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STM32F765ZI, STM32F765ZG, STM32F765VI, STM32F765VG Devices */
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/* #define STM32F767xx */ /*!< STM32F767BG, STM32F767BI, STM32F767IG, STM32F767II, STM32F767NG, STM32F767NI,
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STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI, STM32F768AI Devices */
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STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI Devices */
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/* #define STM32F769xx */ /*!< STM32F769AG, STM32F769AI, STM32F769BG, STM32F769BI, STM32F769IG, STM32F769II,
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STM32F769NG, STM32F769NI Devices */
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/* #define STM32F777xx */ /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI, STM32F778AI Devices */
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/* #define STM32F779xx */ /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI Devices */
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STM32F769NG, STM32F769NI, STM32F768AI Devices */
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/* #define STM32F777xx */ /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI Devices */
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/* #define STM32F779xx */ /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI, STM32F778AI Devices */
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/* #define STM32F722xx */ /*!< STM32F722IE, STM32F722ZE, STM32F722VE, STM32F722RE, STM32F722IC, STM32F722ZC,
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STM32F722VC, STM32F722RC Devices */
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/* #define STM32F723xx */ /*!< STM32F723IE, STM32F723ZE, STM32F723VE, STM32F723IC, STM32F723ZC, STM32F723VC Devices */
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/* #define STM32F732xx */ /*!< STM32F732IE, STM32F732ZE, STM32F732VE, STM32F732RE Devices */
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/* #define STM32F733xx */ /*!< STM32F733IE, STM32F733ZE, STM32F733VE Devices */
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#endif
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/* Tip: To avoid modifying this file each time you need to switch between these
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@ -105,11 +111,11 @@
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#endif /* USE_HAL_DRIVER */
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/**
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* @brief CMSIS Device version number V1.1.0
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* @brief CMSIS Device version number V1.1.2
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*/
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#define __STM32F7_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
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#define __STM32F7_CMSIS_VERSION_SUB1 (0x01) /*!< [23:16] sub1 version */
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#define __STM32F7_CMSIS_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
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#define __STM32F7_CMSIS_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */
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#define __STM32F7_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
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#define __STM32F7_CMSIS_VERSION ((__STM32F7_CMSIS_VERSION_MAIN << 24)\
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|(__STM32F7_CMSIS_VERSION_SUB1 << 16)\
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@ -122,7 +128,15 @@
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/** @addtogroup Device_Included
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* @{
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*/
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#if defined(STM32F756xx)
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#if defined(STM32F722xx)
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#include "stm32f722xx.h"
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#elif defined(STM32F723xx)
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#include "stm32f723xx.h"
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#elif defined(STM32F732xx)
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#include "stm32f732xx.h"
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#elif defined(STM32F733xx)
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#include "stm32f733xx.h"
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#elif defined(STM32F756xx)
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#include "stm32f756xx.h"
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#elif defined(STM32F746xx)
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#include "stm32f746xx.h"
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@ -2,8 +2,8 @@
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******************************************************************************
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* @file system_stm32f7xx.c
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* @author MCD Application Team
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* @version V1.0.2
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* @date 21-September-2015
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* @version V1.1.2
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* @date 23-September-2016
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* @brief CMSIS Cortex-M7 Device Peripheral Access Layer System Source File.
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*
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* This file provides two functions and one global variable to be called from
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@ -2,8 +2,8 @@
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******************************************************************************
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* @file system_stm32f7xx.h
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* @author MCD Application Team
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* @version V1.1.0
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* @date 22-April-2016
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* @version V1.1.2
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* @date 23-September-2016
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* @brief CMSIS Cortex-M7 Device System Source File for STM32F7xx devices.
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******************************************************************************
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* @attention
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@ -2,8 +2,8 @@
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******************************************************************************
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* @file stm32f769xx.h
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* @author MCD Application Team
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* @version V1.1.0
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* @date 22-April-2016
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* @version V1.1.2
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* @date 23-September-2016
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* @brief CMSIS Cortex-M7 Device Peripheral Access Layer Header File.
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*
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* This file contains:
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@ -326,7 +326,6 @@ typedef struct
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__IO uint32_t IER; /*!< CEC interrupt enable register, Address offset:0x14 */
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}CEC_TypeDef;
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/**
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* @brief CRC calculation unit
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*/
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@ -453,7 +452,6 @@ typedef struct
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__IO uint32_t HIFCR; /*!< DMA high interrupt flag clear register, Address offset: 0x0C */
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} DMA_TypeDef;
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/**
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* @brief DMA2D Controller
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*/
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@ -901,7 +899,6 @@ typedef struct
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__IO uint32_t DIR; /*!< Debug Information register, Address offset: 0x18 */
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} SPDIFRX_TypeDef;
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/**
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* @brief SD host Interface
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*/
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@ -1584,7 +1581,7 @@ typedef struct
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#define IWDG ((IWDG_TypeDef *) IWDG_BASE)
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#define SPI2 ((SPI_TypeDef *) SPI2_BASE)
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#define SPI3 ((SPI_TypeDef *) SPI3_BASE)
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#define SPDIFRX ((SPDIFRX_TypeDef *) SPDIFRX_BASE)
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#define SPDIFRX ((SPDIFRX_TypeDef *) SPDIFRX_BASE)
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#define USART2 ((USART_TypeDef *) USART2_BASE)
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#define USART3 ((USART_TypeDef *) USART3_BASE)
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#define UART4 ((USART_TypeDef *) UART4_BASE)
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@ -4090,7 +4087,6 @@ typedef struct
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/******************** Bit definition for DMA2D_BGCLUT register **************/
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/******************************************************************************/
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/* */
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/* External Interrupt/Event Controller */
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@ -4417,6 +4413,7 @@ typedef struct
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#define FLASH_OPTCR1_BOOT_ADD0 0x0000FFFFU
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#define FLASH_OPTCR1_BOOT_ADD1 0xFFFF0000U
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/******************************************************************************/
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/* */
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/* Flexible Memory Controller */
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@ -6504,7 +6501,7 @@ typedef struct
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#define RTC_CR_OSEL_1 0x00400000U
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#define RTC_CR_POL 0x00100000U
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#define RTC_CR_COSEL 0x00080000U
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#define RTC_CR_BCK 0x00040000U
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#define RTC_CR_BKP 0x00040000U
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#define RTC_CR_SUB1H 0x00020000U
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#define RTC_CR_ADD1H 0x00010000U
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#define RTC_CR_TSIE 0x00008000U
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@ -6524,6 +6521,9 @@ typedef struct
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#define RTC_CR_WUCKSEL_1 0x00000002U
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#define RTC_CR_WUCKSEL_2 0x00000004U
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/* Legacy define */
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#define RTC_CR_BCK RTC_CR_BKP
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/******************** Bits definition for RTC_ISR register ******************/
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#define RTC_ISR_ITSF 0x00020000U
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#define RTC_ISR_RECALPF 0x00010000U
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@ -7095,7 +7095,6 @@ typedef struct
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#define SPDIFRX_DIR_THI 0x000013FFU /*!<Threshold LOW */
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#define SPDIFRX_DIR_TLO 0x1FFF0000U /*!<Threshold HIGH */
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/******************************************************************************/
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/* */
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/* SD host Interface */
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@ -9435,6 +9434,7 @@ typedef struct
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#define USB_OTG_PCGCCTL_GATECLK 0x00000002U /*!<Bit 0 */
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#define USB_OTG_PCGCCTL_PHYSUSP 0x00000010U /*!<Bit 1 */
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/******************************************************************************/
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/* */
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/* JPEG Encoder/Decoder */
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@ -10882,28 +10882,28 @@ typedef struct
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/******************************* GPIO Instances *******************************/
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#define IS_GPIO_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == GPIOA) || \
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((__INSTANCE__) == GPIOB) || \
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((__INSTANCE__) == GPIOC) || \
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((__INSTANCE__) == GPIOD) || \
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((__INSTANCE__) == GPIOE) || \
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((__INSTANCE__) == GPIOF) || \
|
||||
((__INSTANCE__) == GPIOG) || \
|
||||
((__INSTANCE__) == GPIOH) || \
|
||||
((__INSTANCE__) == GPIOI) || \
|
||||
((__INSTANCE__) == GPIOJ) || \
|
||||
((__INSTANCE__) == GPIOK))
|
||||
((__INSTANCE__) == GPIOB) || \
|
||||
((__INSTANCE__) == GPIOC) || \
|
||||
((__INSTANCE__) == GPIOD) || \
|
||||
((__INSTANCE__) == GPIOE) || \
|
||||
((__INSTANCE__) == GPIOF) || \
|
||||
((__INSTANCE__) == GPIOG) || \
|
||||
((__INSTANCE__) == GPIOH) || \
|
||||
((__INSTANCE__) == GPIOI) || \
|
||||
((__INSTANCE__) == GPIOJ) || \
|
||||
((__INSTANCE__) == GPIOK))
|
||||
|
||||
#define IS_GPIO_AF_INSTANCE(__INSTANCE__) (((__INSTANCE__) == GPIOA) || \
|
||||
((__INSTANCE__) == GPIOB) || \
|
||||
((__INSTANCE__) == GPIOC) || \
|
||||
((__INSTANCE__) == GPIOD) || \
|
||||
((__INSTANCE__) == GPIOE) || \
|
||||
((__INSTANCE__) == GPIOF) || \
|
||||
((__INSTANCE__) == GPIOG) || \
|
||||
((__INSTANCE__) == GPIOH) || \
|
||||
((__INSTANCE__) == GPIOI) || \
|
||||
((__INSTANCE__) == GPIOJ) || \
|
||||
((__INSTANCE__) == GPIOK))
|
||||
((__INSTANCE__) == GPIOB) || \
|
||||
((__INSTANCE__) == GPIOC) || \
|
||||
((__INSTANCE__) == GPIOD) || \
|
||||
((__INSTANCE__) == GPIOE) || \
|
||||
((__INSTANCE__) == GPIOF) || \
|
||||
((__INSTANCE__) == GPIOG) || \
|
||||
((__INSTANCE__) == GPIOH) || \
|
||||
((__INSTANCE__) == GPIOI) || \
|
||||
((__INSTANCE__) == GPIOJ) || \
|
||||
((__INSTANCE__) == GPIOK))
|
||||
|
||||
/****************************** CEC Instances *********************************/
|
||||
#define IS_CEC_ALL_INSTANCE(__INSTANCE__) ((__INSTANCE__) == CEC)
|
||||
|
|
@ -10914,14 +10914,14 @@ typedef struct
|
|||
|
||||
/******************************** I2C Instances *******************************/
|
||||
#define IS_I2C_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == I2C1) || \
|
||||
((__INSTANCE__) == I2C2) || \
|
||||
((__INSTANCE__) == I2C3) || \
|
||||
((__INSTANCE__) == I2C4))
|
||||
((__INSTANCE__) == I2C2) || \
|
||||
((__INSTANCE__) == I2C3) || \
|
||||
((__INSTANCE__) == I2C4))
|
||||
|
||||
/******************************** I2S Instances *******************************/
|
||||
#define IS_I2S_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == SPI1) || \
|
||||
((__INSTANCE__) == SPI2) || \
|
||||
((__INSTANCE__) == SPI3))
|
||||
((__INSTANCE__) == SPI2) || \
|
||||
((__INSTANCE__) == SPI3))
|
||||
|
||||
/******************************* LPTIM Instances ********************************/
|
||||
#define IS_LPTIM_INSTANCE(__INSTANCE__) ((__INSTANCE__) == LPTIM1)
|
||||
|
|
@ -10935,6 +10935,7 @@ typedef struct
|
|||
/****************************** MDIOS Instances ********************************/
|
||||
#define IS_JPEG_ALL_INSTANCE(__INSTANCE__) ((__INSTANCE__) == JPEG)
|
||||
|
||||
|
||||
/******************************* RNG Instances ********************************/
|
||||
#define IS_RNG_ALL_INSTANCE(__INSTANCE__) ((__INSTANCE__) == RNG)
|
||||
|
||||
|
|
@ -10958,11 +10959,11 @@ typedef struct
|
|||
|
||||
/******************************** SPI Instances *******************************/
|
||||
#define IS_SPI_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == SPI1) || \
|
||||
((__INSTANCE__) == SPI2) || \
|
||||
((__INSTANCE__) == SPI3) || \
|
||||
((__INSTANCE__) == SPI4) || \
|
||||
((__INSTANCE__) == SPI5) || \
|
||||
((__INSTANCE__) == SPI6))
|
||||
((__INSTANCE__) == SPI2) || \
|
||||
((__INSTANCE__) == SPI3) || \
|
||||
((__INSTANCE__) == SPI4) || \
|
||||
((__INSTANCE__) == SPI5) || \
|
||||
((__INSTANCE__) == SPI6))
|
||||
|
||||
/****************** TIM Instances : All supported instances *******************/
|
||||
#define IS_TIM_INSTANCE(__INSTANCE__) (((__INSTANCE__) == TIM1) || \
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief CMSIS STM32F7xx Device Peripheral Access Layer Header File.
|
||||
*
|
||||
* The file is the unique include file that the application programmer
|
||||
|
|
@ -75,7 +75,8 @@
|
|||
application
|
||||
*/
|
||||
#if !defined (STM32F756xx) && !defined (STM32F746xx) && !defined (STM32F745xx) && !defined (STM32F767xx) && \
|
||||
!defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx)
|
||||
!defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx) && !defined (STM32F722xx) && \
|
||||
!defined (STM32F723xx) && !defined (STM32F732xx) && !defined (STM32F733xx)
|
||||
/* #define STM32F756xx */ /*!< STM32F756VG, STM32F756ZG, STM32F756ZG, STM32F756IG, STM32F756BG,
|
||||
STM32F756NG Devices */
|
||||
/* #define STM32F746xx */ /*!< STM32F746VE, STM32F746VG, STM32F746ZE, STM32F746ZG, STM32F746IE, STM32F746IG,
|
||||
|
|
@ -84,11 +85,16 @@
|
|||
/* #define STM32F765xx */ /*!< STM32F765BI, STM32F765BG, STM32F765NI, STM32F765NG, STM32F765II, STM32F765IG,
|
||||
STM32F765ZI, STM32F765ZG, STM32F765VI, STM32F765VG Devices */
|
||||
/* #define STM32F767xx */ /*!< STM32F767BG, STM32F767BI, STM32F767IG, STM32F767II, STM32F767NG, STM32F767NI,
|
||||
STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI, STM32F768AI Devices */
|
||||
#define STM32F769xx /*!< STM32F769AG, STM32F769AI, STM32F769BG, STM32F769BI, STM32F769IG, STM32F769II,
|
||||
STM32F769NG, STM32F769NI Devices */
|
||||
/* #define STM32F777xx */ /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI, STM32F778AI Devices */
|
||||
/* #define STM32F779xx */ /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI Devices */
|
||||
STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI Devices */
|
||||
#define STM32F769xx /*!< STM32F769AG, STM32F769AI, STM32F769BG, STM32F769BI, STM32F769IG, STM32F769II,
|
||||
STM32F769NG, STM32F769NI, STM32F768AI Devices */
|
||||
/* #define STM32F777xx */ /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI Devices */
|
||||
/* #define STM32F779xx */ /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI, STM32F778AI Devices */
|
||||
/* #define STM32F722xx */ /*!< STM32F722IE, STM32F722ZE, STM32F722VE, STM32F722RE, STM32F722IC, STM32F722ZC,
|
||||
STM32F722VC, STM32F722RC Devices */
|
||||
/* #define STM32F723xx */ /*!< STM32F723IE, STM32F723ZE, STM32F723VE, STM32F723IC, STM32F723ZC, STM32F723VC Devices */
|
||||
/* #define STM32F732xx */ /*!< STM32F732IE, STM32F732ZE, STM32F732VE, STM32F732RE Devices */
|
||||
/* #define STM32F733xx */ /*!< STM32F733IE, STM32F733ZE, STM32F733VE Devices */
|
||||
#endif
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to switch between these
|
||||
|
|
@ -105,11 +111,11 @@
|
|||
#endif /* USE_HAL_DRIVER */
|
||||
|
||||
/**
|
||||
* @brief CMSIS Device version number V1.1.0
|
||||
* @brief CMSIS Device version number V1.1.2
|
||||
*/
|
||||
#define __STM32F7_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
|
||||
#define __STM32F7_CMSIS_VERSION_SUB1 (0x01) /*!< [23:16] sub1 version */
|
||||
#define __STM32F7_CMSIS_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
|
||||
#define __STM32F7_CMSIS_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */
|
||||
#define __STM32F7_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
|
||||
#define __STM32F7_CMSIS_VERSION ((__STM32F7_CMSIS_VERSION_MAIN << 24)\
|
||||
|(__STM32F7_CMSIS_VERSION_SUB1 << 16)\
|
||||
|
|
@ -122,7 +128,15 @@
|
|||
/** @addtogroup Device_Included
|
||||
* @{
|
||||
*/
|
||||
#if defined(STM32F756xx)
|
||||
#if defined(STM32F722xx)
|
||||
#include "stm32f722xx.h"
|
||||
#elif defined(STM32F723xx)
|
||||
#include "stm32f723xx.h"
|
||||
#elif defined(STM32F732xx)
|
||||
#include "stm32f732xx.h"
|
||||
#elif defined(STM32F733xx)
|
||||
#include "stm32f733xx.h"
|
||||
#elif defined(STM32F756xx)
|
||||
#include "stm32f756xx.h"
|
||||
#elif defined(STM32F746xx)
|
||||
#include "stm32f746xx.h"
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file system_stm32f7xx.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.2
|
||||
* @date 21-September-2015
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief CMSIS Cortex-M7 Device Peripheral Access Layer System Source File.
|
||||
*
|
||||
* This file provides two functions and one global variable to be called from
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file system_stm32f7xx.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief CMSIS Cortex-M7 Device System Source File for STM32F7xx devices.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f746xx.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief CMSIS Cortex-M7 Device Peripheral Access Layer Header File.
|
||||
*
|
||||
* This file contains:
|
||||
|
|
@ -314,7 +314,6 @@ typedef struct
|
|||
__IO uint32_t IER; /*!< CEC interrupt enable register, Address offset:0x14 */
|
||||
}CEC_TypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief CRC calculation unit
|
||||
*/
|
||||
|
|
@ -407,7 +406,6 @@ typedef struct
|
|||
__IO uint32_t HIFCR; /*!< DMA high interrupt flag clear register, Address offset: 0x0C */
|
||||
} DMA_TypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief DMA2D Controller
|
||||
*/
|
||||
|
|
@ -854,7 +852,6 @@ typedef struct
|
|||
__IO uint32_t DIR; /*!< Debug Information register, Address offset: 0x18 */
|
||||
} SPDIFRX_TypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief SD host Interface
|
||||
*/
|
||||
|
|
@ -1322,7 +1319,7 @@ typedef struct
|
|||
#define IWDG ((IWDG_TypeDef *) IWDG_BASE)
|
||||
#define SPI2 ((SPI_TypeDef *) SPI2_BASE)
|
||||
#define SPI3 ((SPI_TypeDef *) SPI3_BASE)
|
||||
#define SPDIFRX ((SPDIFRX_TypeDef *) SPDIFRX_BASE)
|
||||
#define SPDIFRX ((SPDIFRX_TypeDef *) SPDIFRX_BASE)
|
||||
#define USART2 ((USART_TypeDef *) USART2_BASE)
|
||||
#define USART3 ((USART_TypeDef *) USART3_BASE)
|
||||
#define UART4 ((USART_TypeDef *) UART4_BASE)
|
||||
|
|
@ -3667,7 +3664,6 @@ typedef struct
|
|||
|
||||
/******************** Bit definition for DMA2D_BGCLUT register **************/
|
||||
|
||||
|
||||
/******************************************************************************/
|
||||
/* */
|
||||
/* External Interrupt/Event Controller */
|
||||
|
|
@ -3977,6 +3973,7 @@ typedef struct
|
|||
#define FLASH_OPTCR1_BOOT_ADD0 0x0000FFFFU
|
||||
#define FLASH_OPTCR1_BOOT_ADD1 0xFFFF0000U
|
||||
|
||||
|
||||
/******************************************************************************/
|
||||
/* */
|
||||
/* Flexible Memory Controller */
|
||||
|
|
@ -6044,7 +6041,7 @@ typedef struct
|
|||
#define RTC_CR_OSEL_1 0x00400000U
|
||||
#define RTC_CR_POL 0x00100000U
|
||||
#define RTC_CR_COSEL 0x00080000U
|
||||
#define RTC_CR_BCK 0x00040000U
|
||||
#define RTC_CR_BKP 0x00040000U
|
||||
#define RTC_CR_SUB1H 0x00020000U
|
||||
#define RTC_CR_ADD1H 0x00010000U
|
||||
#define RTC_CR_TSIE 0x00008000U
|
||||
|
|
@ -6064,6 +6061,9 @@ typedef struct
|
|||
#define RTC_CR_WUCKSEL_1 0x00000002U
|
||||
#define RTC_CR_WUCKSEL_2 0x00000004U
|
||||
|
||||
/* Legacy define */
|
||||
#define RTC_CR_BCK RTC_CR_BKP
|
||||
|
||||
/******************** Bits definition for RTC_ISR register ******************/
|
||||
#define RTC_ISR_ITSF 0x00020000U
|
||||
#define RTC_ISR_RECALPF 0x00010000U
|
||||
|
|
@ -6639,7 +6639,6 @@ typedef struct
|
|||
#define SPDIFRX_DIR_THI 0x000013FFU /*!<Threshold LOW */
|
||||
#define SPDIFRX_DIR_TLO 0x1FFF0000U /*!<Threshold HIGH */
|
||||
|
||||
|
||||
/******************************************************************************/
|
||||
/* */
|
||||
/* SD host Interface */
|
||||
|
|
@ -8974,6 +8973,7 @@ typedef struct
|
|||
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
@ -9027,28 +9027,28 @@ typedef struct
|
|||
|
||||
/******************************* GPIO Instances *******************************/
|
||||
#define IS_GPIO_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == GPIOA) || \
|
||||
((__INSTANCE__) == GPIOB) || \
|
||||
((__INSTANCE__) == GPIOC) || \
|
||||
((__INSTANCE__) == GPIOD) || \
|
||||
((__INSTANCE__) == GPIOE) || \
|
||||
((__INSTANCE__) == GPIOF) || \
|
||||
((__INSTANCE__) == GPIOG) || \
|
||||
((__INSTANCE__) == GPIOH) || \
|
||||
((__INSTANCE__) == GPIOI) || \
|
||||
((__INSTANCE__) == GPIOJ) || \
|
||||
((__INSTANCE__) == GPIOK))
|
||||
((__INSTANCE__) == GPIOB) || \
|
||||
((__INSTANCE__) == GPIOC) || \
|
||||
((__INSTANCE__) == GPIOD) || \
|
||||
((__INSTANCE__) == GPIOE) || \
|
||||
((__INSTANCE__) == GPIOF) || \
|
||||
((__INSTANCE__) == GPIOG) || \
|
||||
((__INSTANCE__) == GPIOH) || \
|
||||
((__INSTANCE__) == GPIOI) || \
|
||||
((__INSTANCE__) == GPIOJ) || \
|
||||
((__INSTANCE__) == GPIOK))
|
||||
|
||||
#define IS_GPIO_AF_INSTANCE(__INSTANCE__) (((__INSTANCE__) == GPIOA) || \
|
||||
((__INSTANCE__) == GPIOB) || \
|
||||
((__INSTANCE__) == GPIOC) || \
|
||||
((__INSTANCE__) == GPIOD) || \
|
||||
((__INSTANCE__) == GPIOE) || \
|
||||
((__INSTANCE__) == GPIOF) || \
|
||||
((__INSTANCE__) == GPIOG) || \
|
||||
((__INSTANCE__) == GPIOH) || \
|
||||
((__INSTANCE__) == GPIOI) || \
|
||||
((__INSTANCE__) == GPIOJ) || \
|
||||
((__INSTANCE__) == GPIOK))
|
||||
((__INSTANCE__) == GPIOB) || \
|
||||
((__INSTANCE__) == GPIOC) || \
|
||||
((__INSTANCE__) == GPIOD) || \
|
||||
((__INSTANCE__) == GPIOE) || \
|
||||
((__INSTANCE__) == GPIOF) || \
|
||||
((__INSTANCE__) == GPIOG) || \
|
||||
((__INSTANCE__) == GPIOH) || \
|
||||
((__INSTANCE__) == GPIOI) || \
|
||||
((__INSTANCE__) == GPIOJ) || \
|
||||
((__INSTANCE__) == GPIOK))
|
||||
|
||||
/****************************** CEC Instances *********************************/
|
||||
#define IS_CEC_ALL_INSTANCE(__INSTANCE__) ((__INSTANCE__) == CEC)
|
||||
|
|
@ -9059,14 +9059,14 @@ typedef struct
|
|||
|
||||
/******************************** I2C Instances *******************************/
|
||||
#define IS_I2C_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == I2C1) || \
|
||||
((__INSTANCE__) == I2C2) || \
|
||||
((__INSTANCE__) == I2C3) || \
|
||||
((__INSTANCE__) == I2C4))
|
||||
((__INSTANCE__) == I2C2) || \
|
||||
((__INSTANCE__) == I2C3) || \
|
||||
((__INSTANCE__) == I2C4))
|
||||
|
||||
/******************************** I2S Instances *******************************/
|
||||
#define IS_I2S_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == SPI1) || \
|
||||
((__INSTANCE__) == SPI2) || \
|
||||
((__INSTANCE__) == SPI3))
|
||||
((__INSTANCE__) == SPI2) || \
|
||||
((__INSTANCE__) == SPI3))
|
||||
|
||||
/******************************* LPTIM Instances ********************************/
|
||||
#define IS_LPTIM_INSTANCE(__INSTANCE__) ((__INSTANCE__) == LPTIM1)
|
||||
|
|
@ -9076,6 +9076,7 @@ typedef struct
|
|||
|
||||
|
||||
|
||||
|
||||
/******************************* RNG Instances ********************************/
|
||||
#define IS_RNG_ALL_INSTANCE(__INSTANCE__) ((__INSTANCE__) == RNG)
|
||||
|
||||
|
|
@ -9098,11 +9099,11 @@ typedef struct
|
|||
|
||||
/******************************** SPI Instances *******************************/
|
||||
#define IS_SPI_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == SPI1) || \
|
||||
((__INSTANCE__) == SPI2) || \
|
||||
((__INSTANCE__) == SPI3) || \
|
||||
((__INSTANCE__) == SPI4) || \
|
||||
((__INSTANCE__) == SPI5) || \
|
||||
((__INSTANCE__) == SPI6))
|
||||
((__INSTANCE__) == SPI2) || \
|
||||
((__INSTANCE__) == SPI3) || \
|
||||
((__INSTANCE__) == SPI4) || \
|
||||
((__INSTANCE__) == SPI5) || \
|
||||
((__INSTANCE__) == SPI6))
|
||||
|
||||
/****************** TIM Instances : All supported instances *******************/
|
||||
#define IS_TIM_INSTANCE(__INSTANCE__) (((__INSTANCE__) == TIM1) || \
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief CMSIS STM32F7xx Device Peripheral Access Layer Header File.
|
||||
*
|
||||
* The file is the unique include file that the application programmer
|
||||
|
|
@ -75,7 +75,8 @@
|
|||
application
|
||||
*/
|
||||
#if !defined (STM32F756xx) && !defined (STM32F746xx) && !defined (STM32F745xx) && !defined (STM32F767xx) && \
|
||||
!defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx)
|
||||
!defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx) && !defined (STM32F722xx) && \
|
||||
!defined (STM32F723xx) && !defined (STM32F732xx) && !defined (STM32F733xx)
|
||||
/* #define STM32F756xx */ /*!< STM32F756VG, STM32F756ZG, STM32F756ZG, STM32F756IG, STM32F756BG,
|
||||
STM32F756NG Devices */
|
||||
#define STM32F746xx /*!< STM32F746VE, STM32F746VG, STM32F746ZE, STM32F746ZG, STM32F746IE, STM32F746IG,
|
||||
|
|
@ -84,11 +85,16 @@
|
|||
/* #define STM32F765xx */ /*!< STM32F765BI, STM32F765BG, STM32F765NI, STM32F765NG, STM32F765II, STM32F765IG,
|
||||
STM32F765ZI, STM32F765ZG, STM32F765VI, STM32F765VG Devices */
|
||||
/* #define STM32F767xx */ /*!< STM32F767BG, STM32F767BI, STM32F767IG, STM32F767II, STM32F767NG, STM32F767NI,
|
||||
STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI, STM32F768AI Devices */
|
||||
STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI Devices */
|
||||
/* #define STM32F769xx */ /*!< STM32F769AG, STM32F769AI, STM32F769BG, STM32F769BI, STM32F769IG, STM32F769II,
|
||||
STM32F769NG, STM32F769NI Devices */
|
||||
/* #define STM32F777xx */ /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI, STM32F778AI Devices */
|
||||
/* #define STM32F779xx */ /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI Devices */
|
||||
STM32F769NG, STM32F769NI, STM32F768AI Devices */
|
||||
/* #define STM32F777xx */ /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI Devices */
|
||||
/* #define STM32F779xx */ /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI, STM32F778AI Devices */
|
||||
/* #define STM32F722xx */ /*!< STM32F722IE, STM32F722ZE, STM32F722VE, STM32F722RE, STM32F722IC, STM32F722ZC,
|
||||
STM32F722VC, STM32F722RC Devices */
|
||||
/* #define STM32F723xx */ /*!< STM32F723IE, STM32F723ZE, STM32F723VE, STM32F723IC, STM32F723ZC, STM32F723VC Devices */
|
||||
/* #define STM32F732xx */ /*!< STM32F732IE, STM32F732ZE, STM32F732VE, STM32F732RE Devices */
|
||||
/* #define STM32F733xx */ /*!< STM32F733IE, STM32F733ZE, STM32F733VE Devices */
|
||||
#endif
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to switch between these
|
||||
|
|
@ -105,11 +111,11 @@
|
|||
#endif /* USE_HAL_DRIVER */
|
||||
|
||||
/**
|
||||
* @brief CMSIS Device version number V1.1.0
|
||||
* @brief CMSIS Device version number V1.1.2
|
||||
*/
|
||||
#define __STM32F7_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
|
||||
#define __STM32F7_CMSIS_VERSION_SUB1 (0x01) /*!< [23:16] sub1 version */
|
||||
#define __STM32F7_CMSIS_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
|
||||
#define __STM32F7_CMSIS_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */
|
||||
#define __STM32F7_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
|
||||
#define __STM32F7_CMSIS_VERSION ((__STM32F7_CMSIS_VERSION_MAIN << 24)\
|
||||
|(__STM32F7_CMSIS_VERSION_SUB1 << 16)\
|
||||
|
|
@ -122,7 +128,15 @@
|
|||
/** @addtogroup Device_Included
|
||||
* @{
|
||||
*/
|
||||
#if defined(STM32F756xx)
|
||||
#if defined(STM32F722xx)
|
||||
#include "stm32f722xx.h"
|
||||
#elif defined(STM32F723xx)
|
||||
#include "stm32f723xx.h"
|
||||
#elif defined(STM32F732xx)
|
||||
#include "stm32f732xx.h"
|
||||
#elif defined(STM32F733xx)
|
||||
#include "stm32f733xx.h"
|
||||
#elif defined(STM32F756xx)
|
||||
#include "stm32f756xx.h"
|
||||
#elif defined(STM32F746xx)
|
||||
#include "stm32f746xx.h"
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f756xx.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief CMSIS Cortex-M7 Device Peripheral Access Layer Header File.
|
||||
*
|
||||
* This file contains:
|
||||
|
|
@ -315,7 +315,6 @@ typedef struct
|
|||
__IO uint32_t IER; /*!< CEC interrupt enable register, Address offset:0x14 */
|
||||
}CEC_TypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief CRC calculation unit
|
||||
*/
|
||||
|
|
@ -408,7 +407,6 @@ typedef struct
|
|||
__IO uint32_t HIFCR; /*!< DMA high interrupt flag clear register, Address offset: 0x0C */
|
||||
} DMA_TypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief DMA2D Controller
|
||||
*/
|
||||
|
|
@ -855,7 +853,6 @@ typedef struct
|
|||
__IO uint32_t DIR; /*!< Debug Information register, Address offset: 0x18 */
|
||||
} SPDIFRX_TypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief SD host Interface
|
||||
*/
|
||||
|
|
@ -1394,7 +1391,7 @@ typedef struct
|
|||
#define IWDG ((IWDG_TypeDef *) IWDG_BASE)
|
||||
#define SPI2 ((SPI_TypeDef *) SPI2_BASE)
|
||||
#define SPI3 ((SPI_TypeDef *) SPI3_BASE)
|
||||
#define SPDIFRX ((SPDIFRX_TypeDef *) SPDIFRX_BASE)
|
||||
#define SPDIFRX ((SPDIFRX_TypeDef *) SPDIFRX_BASE)
|
||||
#define USART2 ((USART_TypeDef *) USART2_BASE)
|
||||
#define USART3 ((USART_TypeDef *) USART3_BASE)
|
||||
#define UART4 ((USART_TypeDef *) UART4_BASE)
|
||||
|
|
@ -3795,7 +3792,6 @@ typedef struct
|
|||
|
||||
/******************** Bit definition for DMA2D_BGCLUT register **************/
|
||||
|
||||
|
||||
/******************************************************************************/
|
||||
/* */
|
||||
/* External Interrupt/Event Controller */
|
||||
|
|
@ -4105,6 +4101,7 @@ typedef struct
|
|||
#define FLASH_OPTCR1_BOOT_ADD0 0x0000FFFFU
|
||||
#define FLASH_OPTCR1_BOOT_ADD1 0xFFFF0000U
|
||||
|
||||
|
||||
/******************************************************************************/
|
||||
/* */
|
||||
/* Flexible Memory Controller */
|
||||
|
|
@ -6231,7 +6228,7 @@ typedef struct
|
|||
#define RTC_CR_OSEL_1 0x00400000U
|
||||
#define RTC_CR_POL 0x00100000U
|
||||
#define RTC_CR_COSEL 0x00080000U
|
||||
#define RTC_CR_BCK 0x00040000U
|
||||
#define RTC_CR_BKP 0x00040000U
|
||||
#define RTC_CR_SUB1H 0x00020000U
|
||||
#define RTC_CR_ADD1H 0x00010000U
|
||||
#define RTC_CR_TSIE 0x00008000U
|
||||
|
|
@ -6251,6 +6248,9 @@ typedef struct
|
|||
#define RTC_CR_WUCKSEL_1 0x00000002U
|
||||
#define RTC_CR_WUCKSEL_2 0x00000004U
|
||||
|
||||
/* Legacy define */
|
||||
#define RTC_CR_BCK RTC_CR_BKP
|
||||
|
||||
/******************** Bits definition for RTC_ISR register ******************/
|
||||
#define RTC_ISR_ITSF 0x00020000U
|
||||
#define RTC_ISR_RECALPF 0x00010000U
|
||||
|
|
@ -6826,7 +6826,6 @@ typedef struct
|
|||
#define SPDIFRX_DIR_THI 0x000013FFU /*!<Threshold LOW */
|
||||
#define SPDIFRX_DIR_TLO 0x1FFF0000U /*!<Threshold HIGH */
|
||||
|
||||
|
||||
/******************************************************************************/
|
||||
/* */
|
||||
/* SD host Interface */
|
||||
|
|
@ -9161,6 +9160,7 @@ typedef struct
|
|||
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
@ -9214,28 +9214,28 @@ typedef struct
|
|||
|
||||
/******************************* GPIO Instances *******************************/
|
||||
#define IS_GPIO_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == GPIOA) || \
|
||||
((__INSTANCE__) == GPIOB) || \
|
||||
((__INSTANCE__) == GPIOC) || \
|
||||
((__INSTANCE__) == GPIOD) || \
|
||||
((__INSTANCE__) == GPIOE) || \
|
||||
((__INSTANCE__) == GPIOF) || \
|
||||
((__INSTANCE__) == GPIOG) || \
|
||||
((__INSTANCE__) == GPIOH) || \
|
||||
((__INSTANCE__) == GPIOI) || \
|
||||
((__INSTANCE__) == GPIOJ) || \
|
||||
((__INSTANCE__) == GPIOK))
|
||||
((__INSTANCE__) == GPIOB) || \
|
||||
((__INSTANCE__) == GPIOC) || \
|
||||
((__INSTANCE__) == GPIOD) || \
|
||||
((__INSTANCE__) == GPIOE) || \
|
||||
((__INSTANCE__) == GPIOF) || \
|
||||
((__INSTANCE__) == GPIOG) || \
|
||||
((__INSTANCE__) == GPIOH) || \
|
||||
((__INSTANCE__) == GPIOI) || \
|
||||
((__INSTANCE__) == GPIOJ) || \
|
||||
((__INSTANCE__) == GPIOK))
|
||||
|
||||
#define IS_GPIO_AF_INSTANCE(__INSTANCE__) (((__INSTANCE__) == GPIOA) || \
|
||||
((__INSTANCE__) == GPIOB) || \
|
||||
((__INSTANCE__) == GPIOC) || \
|
||||
((__INSTANCE__) == GPIOD) || \
|
||||
((__INSTANCE__) == GPIOE) || \
|
||||
((__INSTANCE__) == GPIOF) || \
|
||||
((__INSTANCE__) == GPIOG) || \
|
||||
((__INSTANCE__) == GPIOH) || \
|
||||
((__INSTANCE__) == GPIOI) || \
|
||||
((__INSTANCE__) == GPIOJ) || \
|
||||
((__INSTANCE__) == GPIOK))
|
||||
((__INSTANCE__) == GPIOB) || \
|
||||
((__INSTANCE__) == GPIOC) || \
|
||||
((__INSTANCE__) == GPIOD) || \
|
||||
((__INSTANCE__) == GPIOE) || \
|
||||
((__INSTANCE__) == GPIOF) || \
|
||||
((__INSTANCE__) == GPIOG) || \
|
||||
((__INSTANCE__) == GPIOH) || \
|
||||
((__INSTANCE__) == GPIOI) || \
|
||||
((__INSTANCE__) == GPIOJ) || \
|
||||
((__INSTANCE__) == GPIOK))
|
||||
|
||||
/****************************** CEC Instances *********************************/
|
||||
#define IS_CEC_ALL_INSTANCE(__INSTANCE__) ((__INSTANCE__) == CEC)
|
||||
|
|
@ -9246,14 +9246,14 @@ typedef struct
|
|||
|
||||
/******************************** I2C Instances *******************************/
|
||||
#define IS_I2C_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == I2C1) || \
|
||||
((__INSTANCE__) == I2C2) || \
|
||||
((__INSTANCE__) == I2C3) || \
|
||||
((__INSTANCE__) == I2C4))
|
||||
((__INSTANCE__) == I2C2) || \
|
||||
((__INSTANCE__) == I2C3) || \
|
||||
((__INSTANCE__) == I2C4))
|
||||
|
||||
/******************************** I2S Instances *******************************/
|
||||
#define IS_I2S_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == SPI1) || \
|
||||
((__INSTANCE__) == SPI2) || \
|
||||
((__INSTANCE__) == SPI3))
|
||||
((__INSTANCE__) == SPI2) || \
|
||||
((__INSTANCE__) == SPI3))
|
||||
|
||||
/******************************* LPTIM Instances ********************************/
|
||||
#define IS_LPTIM_INSTANCE(__INSTANCE__) ((__INSTANCE__) == LPTIM1)
|
||||
|
|
@ -9263,6 +9263,7 @@ typedef struct
|
|||
|
||||
|
||||
|
||||
|
||||
/******************************* RNG Instances ********************************/
|
||||
#define IS_RNG_ALL_INSTANCE(__INSTANCE__) ((__INSTANCE__) == RNG)
|
||||
|
||||
|
|
@ -9285,11 +9286,11 @@ typedef struct
|
|||
|
||||
/******************************** SPI Instances *******************************/
|
||||
#define IS_SPI_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == SPI1) || \
|
||||
((__INSTANCE__) == SPI2) || \
|
||||
((__INSTANCE__) == SPI3) || \
|
||||
((__INSTANCE__) == SPI4) || \
|
||||
((__INSTANCE__) == SPI5) || \
|
||||
((__INSTANCE__) == SPI6))
|
||||
((__INSTANCE__) == SPI2) || \
|
||||
((__INSTANCE__) == SPI3) || \
|
||||
((__INSTANCE__) == SPI4) || \
|
||||
((__INSTANCE__) == SPI5) || \
|
||||
((__INSTANCE__) == SPI6))
|
||||
|
||||
/****************** TIM Instances : All supported instances *******************/
|
||||
#define IS_TIM_INSTANCE(__INSTANCE__) (((__INSTANCE__) == TIM1) || \
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief CMSIS STM32F7xx Device Peripheral Access Layer Header File.
|
||||
*
|
||||
* The file is the unique include file that the application programmer
|
||||
|
|
@ -75,8 +75,9 @@
|
|||
application
|
||||
*/
|
||||
#if !defined (STM32F756xx) && !defined (STM32F746xx) && !defined (STM32F745xx) && !defined (STM32F767xx) && \
|
||||
!defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx)
|
||||
#define STM32F756xx /*!< STM32F756VG, STM32F756ZG, STM32F756ZG, STM32F756IG, STM32F756BG,
|
||||
!defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx) && !defined (STM32F722xx) && \
|
||||
!defined (STM32F723xx) && !defined (STM32F732xx) && !defined (STM32F733xx)
|
||||
#define STM32F756xx /*!< STM32F756VG, STM32F756ZG, STM32F756ZG, STM32F756IG, STM32F756BG,
|
||||
STM32F756NG Devices */
|
||||
/* #define STM32F746xx */ /*!< STM32F746VE, STM32F746VG, STM32F746ZE, STM32F746ZG, STM32F746IE, STM32F746IG,
|
||||
STM32F746BE, STM32F746BG, STM32F746NE, STM32F746NG Devices */
|
||||
|
|
@ -84,11 +85,16 @@
|
|||
/* #define STM32F765xx */ /*!< STM32F765BI, STM32F765BG, STM32F765NI, STM32F765NG, STM32F765II, STM32F765IG,
|
||||
STM32F765ZI, STM32F765ZG, STM32F765VI, STM32F765VG Devices */
|
||||
/* #define STM32F767xx */ /*!< STM32F767BG, STM32F767BI, STM32F767IG, STM32F767II, STM32F767NG, STM32F767NI,
|
||||
STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI, STM32F768AI Devices */
|
||||
STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI Devices */
|
||||
/* #define STM32F769xx */ /*!< STM32F769AG, STM32F769AI, STM32F769BG, STM32F769BI, STM32F769IG, STM32F769II,
|
||||
STM32F769NG, STM32F769NI Devices */
|
||||
/* #define STM32F777xx */ /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI, STM32F778AI Devices */
|
||||
/* #define STM32F779xx */ /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI Devices */
|
||||
STM32F769NG, STM32F769NI, STM32F768AI Devices */
|
||||
/* #define STM32F777xx */ /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI Devices */
|
||||
/* #define STM32F779xx */ /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI, STM32F778AI Devices */
|
||||
/* #define STM32F722xx */ /*!< STM32F722IE, STM32F722ZE, STM32F722VE, STM32F722RE, STM32F722IC, STM32F722ZC,
|
||||
STM32F722VC, STM32F722RC Devices */
|
||||
/* #define STM32F723xx */ /*!< STM32F723IE, STM32F723ZE, STM32F723VE, STM32F723IC, STM32F723ZC, STM32F723VC Devices */
|
||||
/* #define STM32F732xx */ /*!< STM32F732IE, STM32F732ZE, STM32F732VE, STM32F732RE Devices */
|
||||
/* #define STM32F733xx */ /*!< STM32F733IE, STM32F733ZE, STM32F733VE Devices */
|
||||
#endif
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to switch between these
|
||||
|
|
@ -105,11 +111,11 @@
|
|||
#endif /* USE_HAL_DRIVER */
|
||||
|
||||
/**
|
||||
* @brief CMSIS Device version number V1.1.0
|
||||
* @brief CMSIS Device version number V1.1.2
|
||||
*/
|
||||
#define __STM32F7_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
|
||||
#define __STM32F7_CMSIS_VERSION_SUB1 (0x01) /*!< [23:16] sub1 version */
|
||||
#define __STM32F7_CMSIS_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
|
||||
#define __STM32F7_CMSIS_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */
|
||||
#define __STM32F7_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
|
||||
#define __STM32F7_CMSIS_VERSION ((__STM32F7_CMSIS_VERSION_MAIN << 24)\
|
||||
|(__STM32F7_CMSIS_VERSION_SUB1 << 16)\
|
||||
|
|
@ -122,7 +128,15 @@
|
|||
/** @addtogroup Device_Included
|
||||
* @{
|
||||
*/
|
||||
#if defined(STM32F756xx)
|
||||
#if defined(STM32F722xx)
|
||||
#include "stm32f722xx.h"
|
||||
#elif defined(STM32F723xx)
|
||||
#include "stm32f723xx.h"
|
||||
#elif defined(STM32F732xx)
|
||||
#include "stm32f732xx.h"
|
||||
#elif defined(STM32F733xx)
|
||||
#include "stm32f733xx.h"
|
||||
#elif defined(STM32F756xx)
|
||||
#include "stm32f756xx.h"
|
||||
#elif defined(STM32F746xx)
|
||||
#include "stm32f746xx.h"
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file system_stm32f7xx.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.2
|
||||
* @date 21-September-2015
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief CMSIS Cortex-M7 Device Peripheral Access Layer System Source File.
|
||||
*
|
||||
* This file provides two functions and one global variable to be called from
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file system_stm32f7xx.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief CMSIS Cortex-M7 Device System Source File for STM32F7xx devices.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f767xx.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief CMSIS Cortex-M7 Device Peripheral Access Layer Header File.
|
||||
*
|
||||
* This file contains:
|
||||
|
|
@ -325,7 +325,6 @@ typedef struct
|
|||
__IO uint32_t IER; /*!< CEC interrupt enable register, Address offset:0x14 */
|
||||
}CEC_TypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief CRC calculation unit
|
||||
*/
|
||||
|
|
@ -452,7 +451,6 @@ typedef struct
|
|||
__IO uint32_t HIFCR; /*!< DMA high interrupt flag clear register, Address offset: 0x0C */
|
||||
} DMA_TypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief DMA2D Controller
|
||||
*/
|
||||
|
|
@ -900,7 +898,6 @@ typedef struct
|
|||
__IO uint32_t DIR; /*!< Debug Information register, Address offset: 0x18 */
|
||||
} SPDIFRX_TypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief SD host Interface
|
||||
*/
|
||||
|
|
@ -1502,7 +1499,7 @@ typedef struct
|
|||
#define IWDG ((IWDG_TypeDef *) IWDG_BASE)
|
||||
#define SPI2 ((SPI_TypeDef *) SPI2_BASE)
|
||||
#define SPI3 ((SPI_TypeDef *) SPI3_BASE)
|
||||
#define SPDIFRX ((SPDIFRX_TypeDef *) SPDIFRX_BASE)
|
||||
#define SPDIFRX ((SPDIFRX_TypeDef *) SPDIFRX_BASE)
|
||||
#define USART2 ((USART_TypeDef *) USART2_BASE)
|
||||
#define USART3 ((USART_TypeDef *) USART3_BASE)
|
||||
#define UART4 ((USART_TypeDef *) UART4_BASE)
|
||||
|
|
@ -4007,7 +4004,6 @@ typedef struct
|
|||
|
||||
/******************** Bit definition for DMA2D_BGCLUT register **************/
|
||||
|
||||
|
||||
/******************************************************************************/
|
||||
/* */
|
||||
/* External Interrupt/Event Controller */
|
||||
|
|
@ -4334,6 +4330,7 @@ typedef struct
|
|||
#define FLASH_OPTCR1_BOOT_ADD0 0x0000FFFFU
|
||||
#define FLASH_OPTCR1_BOOT_ADD1 0xFFFF0000U
|
||||
|
||||
|
||||
/******************************************************************************/
|
||||
/* */
|
||||
/* Flexible Memory Controller */
|
||||
|
|
@ -6417,7 +6414,7 @@ typedef struct
|
|||
#define RTC_CR_OSEL_1 0x00400000U
|
||||
#define RTC_CR_POL 0x00100000U
|
||||
#define RTC_CR_COSEL 0x00080000U
|
||||
#define RTC_CR_BCK 0x00040000U
|
||||
#define RTC_CR_BKP 0x00040000U
|
||||
#define RTC_CR_SUB1H 0x00020000U
|
||||
#define RTC_CR_ADD1H 0x00010000U
|
||||
#define RTC_CR_TSIE 0x00008000U
|
||||
|
|
@ -6437,6 +6434,9 @@ typedef struct
|
|||
#define RTC_CR_WUCKSEL_1 0x00000002U
|
||||
#define RTC_CR_WUCKSEL_2 0x00000004U
|
||||
|
||||
/* Legacy define */
|
||||
#define RTC_CR_BCK RTC_CR_BKP
|
||||
|
||||
/******************** Bits definition for RTC_ISR register ******************/
|
||||
#define RTC_ISR_ITSF 0x00020000U
|
||||
#define RTC_ISR_RECALPF 0x00010000U
|
||||
|
|
@ -7008,7 +7008,6 @@ typedef struct
|
|||
#define SPDIFRX_DIR_THI 0x000013FFU /*!<Threshold LOW */
|
||||
#define SPDIFRX_DIR_TLO 0x1FFF0000U /*!<Threshold HIGH */
|
||||
|
||||
|
||||
/******************************************************************************/
|
||||
/* */
|
||||
/* SD host Interface */
|
||||
|
|
@ -9348,6 +9347,7 @@ typedef struct
|
|||
#define USB_OTG_PCGCCTL_GATECLK 0x00000002U /*!<Bit 0 */
|
||||
#define USB_OTG_PCGCCTL_PHYSUSP 0x00000010U /*!<Bit 1 */
|
||||
|
||||
|
||||
/******************************************************************************/
|
||||
/* */
|
||||
/* JPEG Encoder/Decoder */
|
||||
|
|
@ -9606,28 +9606,28 @@ typedef struct
|
|||
|
||||
/******************************* GPIO Instances *******************************/
|
||||
#define IS_GPIO_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == GPIOA) || \
|
||||
((__INSTANCE__) == GPIOB) || \
|
||||
((__INSTANCE__) == GPIOC) || \
|
||||
((__INSTANCE__) == GPIOD) || \
|
||||
((__INSTANCE__) == GPIOE) || \
|
||||
((__INSTANCE__) == GPIOF) || \
|
||||
((__INSTANCE__) == GPIOG) || \
|
||||
((__INSTANCE__) == GPIOH) || \
|
||||
((__INSTANCE__) == GPIOI) || \
|
||||
((__INSTANCE__) == GPIOJ) || \
|
||||
((__INSTANCE__) == GPIOK))
|
||||
((__INSTANCE__) == GPIOB) || \
|
||||
((__INSTANCE__) == GPIOC) || \
|
||||
((__INSTANCE__) == GPIOD) || \
|
||||
((__INSTANCE__) == GPIOE) || \
|
||||
((__INSTANCE__) == GPIOF) || \
|
||||
((__INSTANCE__) == GPIOG) || \
|
||||
((__INSTANCE__) == GPIOH) || \
|
||||
((__INSTANCE__) == GPIOI) || \
|
||||
((__INSTANCE__) == GPIOJ) || \
|
||||
((__INSTANCE__) == GPIOK))
|
||||
|
||||
#define IS_GPIO_AF_INSTANCE(__INSTANCE__) (((__INSTANCE__) == GPIOA) || \
|
||||
((__INSTANCE__) == GPIOB) || \
|
||||
((__INSTANCE__) == GPIOC) || \
|
||||
((__INSTANCE__) == GPIOD) || \
|
||||
((__INSTANCE__) == GPIOE) || \
|
||||
((__INSTANCE__) == GPIOF) || \
|
||||
((__INSTANCE__) == GPIOG) || \
|
||||
((__INSTANCE__) == GPIOH) || \
|
||||
((__INSTANCE__) == GPIOI) || \
|
||||
((__INSTANCE__) == GPIOJ) || \
|
||||
((__INSTANCE__) == GPIOK))
|
||||
((__INSTANCE__) == GPIOB) || \
|
||||
((__INSTANCE__) == GPIOC) || \
|
||||
((__INSTANCE__) == GPIOD) || \
|
||||
((__INSTANCE__) == GPIOE) || \
|
||||
((__INSTANCE__) == GPIOF) || \
|
||||
((__INSTANCE__) == GPIOG) || \
|
||||
((__INSTANCE__) == GPIOH) || \
|
||||
((__INSTANCE__) == GPIOI) || \
|
||||
((__INSTANCE__) == GPIOJ) || \
|
||||
((__INSTANCE__) == GPIOK))
|
||||
|
||||
/****************************** CEC Instances *********************************/
|
||||
#define IS_CEC_ALL_INSTANCE(__INSTANCE__) ((__INSTANCE__) == CEC)
|
||||
|
|
@ -9638,14 +9638,14 @@ typedef struct
|
|||
|
||||
/******************************** I2C Instances *******************************/
|
||||
#define IS_I2C_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == I2C1) || \
|
||||
((__INSTANCE__) == I2C2) || \
|
||||
((__INSTANCE__) == I2C3) || \
|
||||
((__INSTANCE__) == I2C4))
|
||||
((__INSTANCE__) == I2C2) || \
|
||||
((__INSTANCE__) == I2C3) || \
|
||||
((__INSTANCE__) == I2C4))
|
||||
|
||||
/******************************** I2S Instances *******************************/
|
||||
#define IS_I2S_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == SPI1) || \
|
||||
((__INSTANCE__) == SPI2) || \
|
||||
((__INSTANCE__) == SPI3))
|
||||
((__INSTANCE__) == SPI2) || \
|
||||
((__INSTANCE__) == SPI3))
|
||||
|
||||
/******************************* LPTIM Instances ********************************/
|
||||
#define IS_LPTIM_INSTANCE(__INSTANCE__) ((__INSTANCE__) == LPTIM1)
|
||||
|
|
@ -9659,6 +9659,7 @@ typedef struct
|
|||
/****************************** MDIOS Instances ********************************/
|
||||
#define IS_JPEG_ALL_INSTANCE(__INSTANCE__) ((__INSTANCE__) == JPEG)
|
||||
|
||||
|
||||
/******************************* RNG Instances ********************************/
|
||||
#define IS_RNG_ALL_INSTANCE(__INSTANCE__) ((__INSTANCE__) == RNG)
|
||||
|
||||
|
|
@ -9682,11 +9683,11 @@ typedef struct
|
|||
|
||||
/******************************** SPI Instances *******************************/
|
||||
#define IS_SPI_ALL_INSTANCE(__INSTANCE__) (((__INSTANCE__) == SPI1) || \
|
||||
((__INSTANCE__) == SPI2) || \
|
||||
((__INSTANCE__) == SPI3) || \
|
||||
((__INSTANCE__) == SPI4) || \
|
||||
((__INSTANCE__) == SPI5) || \
|
||||
((__INSTANCE__) == SPI6))
|
||||
((__INSTANCE__) == SPI2) || \
|
||||
((__INSTANCE__) == SPI3) || \
|
||||
((__INSTANCE__) == SPI4) || \
|
||||
((__INSTANCE__) == SPI5) || \
|
||||
((__INSTANCE__) == SPI6))
|
||||
|
||||
/****************** TIM Instances : All supported instances *******************/
|
||||
#define IS_TIM_INSTANCE(__INSTANCE__) (((__INSTANCE__) == TIM1) || \
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief CMSIS STM32F7xx Device Peripheral Access Layer Header File.
|
||||
*
|
||||
* The file is the unique include file that the application programmer
|
||||
|
|
@ -75,7 +75,8 @@
|
|||
application
|
||||
*/
|
||||
#if !defined (STM32F756xx) && !defined (STM32F746xx) && !defined (STM32F745xx) && !defined (STM32F767xx) && \
|
||||
!defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx)
|
||||
!defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx) && !defined (STM32F722xx) && \
|
||||
!defined (STM32F723xx) && !defined (STM32F732xx) && !defined (STM32F733xx)
|
||||
/* #define STM32F756xx */ /*!< STM32F756VG, STM32F756ZG, STM32F756ZG, STM32F756IG, STM32F756BG,
|
||||
STM32F756NG Devices */
|
||||
/* #define STM32F746xx */ /*!< STM32F746VE, STM32F746VG, STM32F746ZE, STM32F746ZG, STM32F746IE, STM32F746IG,
|
||||
|
|
@ -83,12 +84,17 @@
|
|||
/* #define STM32F745xx */ /*!< STM32F745VE, STM32F745VG, STM32F745ZG, STM32F745ZE, STM32F745IE, STM32F745IG Devices */
|
||||
/* #define STM32F765xx */ /*!< STM32F765BI, STM32F765BG, STM32F765NI, STM32F765NG, STM32F765II, STM32F765IG,
|
||||
STM32F765ZI, STM32F765ZG, STM32F765VI, STM32F765VG Devices */
|
||||
#define STM32F767xx /*!< STM32F767BG, STM32F767BI, STM32F767IG, STM32F767II, STM32F767NG, STM32F767NI,
|
||||
STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI, STM32F768AI Devices */
|
||||
#define STM32F767xx /*!< STM32F767BG, STM32F767BI, STM32F767IG, STM32F767II, STM32F767NG, STM32F767NI,
|
||||
STM32F767VG, STM32F767VI, STM32F767ZG, STM32F767ZI Devices */
|
||||
/* #define STM32F769xx */ /*!< STM32F769AG, STM32F769AI, STM32F769BG, STM32F769BI, STM32F769IG, STM32F769II,
|
||||
STM32F769NG, STM32F769NI Devices */
|
||||
/* #define STM32F777xx */ /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI, STM32F778AI Devices */
|
||||
/* #define STM32F779xx */ /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI Devices */
|
||||
STM32F769NG, STM32F769NI, STM32F768AI Devices */
|
||||
/* #define STM32F777xx */ /*!< STM32F777VI, STM32F777ZI, STM32F777II, STM32F777BI, STM32F777NI Devices */
|
||||
/* #define STM32F779xx */ /*!< STM32F779II, STM32F779BI, STM32F779NI, STM32F779AI, STM32F778AI Devices */
|
||||
/* #define STM32F722xx */ /*!< STM32F722IE, STM32F722ZE, STM32F722VE, STM32F722RE, STM32F722IC, STM32F722ZC,
|
||||
STM32F722VC, STM32F722RC Devices */
|
||||
/* #define STM32F723xx */ /*!< STM32F723IE, STM32F723ZE, STM32F723VE, STM32F723IC, STM32F723ZC, STM32F723VC Devices */
|
||||
/* #define STM32F732xx */ /*!< STM32F732IE, STM32F732ZE, STM32F732VE, STM32F732RE Devices */
|
||||
/* #define STM32F733xx */ /*!< STM32F733IE, STM32F733ZE, STM32F733VE Devices */
|
||||
#endif
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to switch between these
|
||||
|
|
@ -105,11 +111,11 @@
|
|||
#endif /* USE_HAL_DRIVER */
|
||||
|
||||
/**
|
||||
* @brief CMSIS Device version number V1.1.0
|
||||
* @brief CMSIS Device version number V1.1.2
|
||||
*/
|
||||
#define __STM32F7_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
|
||||
#define __STM32F7_CMSIS_VERSION_SUB1 (0x01) /*!< [23:16] sub1 version */
|
||||
#define __STM32F7_CMSIS_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
|
||||
#define __STM32F7_CMSIS_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */
|
||||
#define __STM32F7_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
|
||||
#define __STM32F7_CMSIS_VERSION ((__STM32F7_CMSIS_VERSION_MAIN << 24)\
|
||||
|(__STM32F7_CMSIS_VERSION_SUB1 << 16)\
|
||||
|
|
@ -122,7 +128,15 @@
|
|||
/** @addtogroup Device_Included
|
||||
* @{
|
||||
*/
|
||||
#if defined(STM32F756xx)
|
||||
#if defined(STM32F722xx)
|
||||
#include "stm32f722xx.h"
|
||||
#elif defined(STM32F723xx)
|
||||
#include "stm32f723xx.h"
|
||||
#elif defined(STM32F732xx)
|
||||
#include "stm32f732xx.h"
|
||||
#elif defined(STM32F733xx)
|
||||
#include "stm32f733xx.h"
|
||||
#elif defined(STM32F756xx)
|
||||
#include "stm32f756xx.h"
|
||||
#elif defined(STM32F746xx)
|
||||
#include "stm32f746xx.h"
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file system_stm32f7xx.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.2
|
||||
* @date 21-September-2015
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief CMSIS Cortex-M7 Device Peripheral Access Layer System Source File.
|
||||
*
|
||||
* This file provides two functions and one global variable to be called from
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file system_stm32f7xx.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief CMSIS Cortex-M7 Device System Source File for STM32F7xx devices.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -676,7 +676,64 @@ Notes for STM32F7xx HAL Drivers</span><span style="font-size: 20pt; font-family:
|
|||
<tr style="">
|
||||
<td style="padding: 0in;" valign="top">
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">Update History</span></h2>
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.0 / 22-April-2016</span></h3>
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.2 / 23-September-2016</span></h3>
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes</span></u></b></p><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-family: Verdana,sans-serif; font-size: 10pt;">General updates
|
||||
to fix known defects and enhancements implementation</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;">HAL
|
||||
Cortex</span></b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;"> update</span><span style="font-size: 12pt; font-family: "Times New Roman",serif;"><o:p></o:p></span></li><ul style="margin-top: 0cm; list-style-type: circle;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Move HAL_MPU_Disable() and
|
||||
HAL_MPU_Enable() from stm32f7xx_hal_cortex.h to stm32f7xx_hal_cortex.c</span><span style="font-size: 12pt; font-family: "Times New Roman",serif;" lang="EN-US"><o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Clear the whole MPU control
|
||||
register in HAL_MPU_Disable() API</span><span style="font-size: 12pt; font-family: "Times New Roman",serif;" lang="EN-US"><o:p></o:p></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;">HAL
|
||||
CRC</span></b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;"> update</span><span style="font-size: 12pt; font-family: "Times New Roman",serif;"><o:p></o:p></span></li><ul style="margin-top: 0cm; list-style-type: circle;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Update HAL_CRC_DeInit()
|
||||
function to reset IDR register</span><span style="font-size: 12pt; font-family: "Times New Roman",serif;" lang="EN-US"><o:p></o:p></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;">HAL
|
||||
DMA</span></b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;"> update</span><span style="font-size: 12pt; font-family: "Times New Roman",serif;"><o:p></o:p></span></li><ul style="margin-top: 0cm; list-style-type: circle;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Add a check on DMA stream
|
||||
instance in HAL_DMA_DeInit() API</span><span style="font-size: 12pt; font-family: "Times New Roman",serif;" lang="EN-US"><o:p></o:p></span></li></ul></ul>
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;">HAL
|
||||
DSI</span></b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;"> update</span><span style="font-size: 12pt; font-family: "Times New Roman",serif;"><o:p></o:p></span></li><ul style="margin-top: 0cm; list-style-type: circle;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Update
|
||||
HAL_DSI_ConfigHostTimeouts() and HAL_DSI_Init() functions to avoid
|
||||
scratch in DSI_CCR register</span></li></ul></ul><ul style="margin-top: 0cm;" type="square"><li style="margin-top: 4.5pt; margin-bottom: 4.5pt; color: black;" class="MsoNormal"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;"><span style="font-weight: bold;">HAL ETH</span> update </span></li><ul><li style="margin-top: 4.5pt; margin-bottom: 4.5pt; color: black;" class="MsoNormal"><span style="font-family: Verdana,sans-serif; font-size: 10pt;">Fix wrong definitions in driver header file stm32f7_hal_eth.h</span></li></ul><li style="margin-top: 4.5pt; margin-bottom: 4.5pt; color: black;" class="MsoNormal"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;"><span style="font-weight: bold;">HAL FLASH</span> update </span></li><ul><li style="margin-top: 4.5pt; margin-bottom: 4.5pt; color: black;" class="MsoNormal"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;">Update the clearing of error flags</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;">HAL
|
||||
GPIO</span></b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;"> update </span><span style="font-size: 12pt; font-family: "Times New Roman",serif;"><o:p></o:p></span></li><ul style="margin-top: 0cm; list-style-type: circle;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Add GPIO_AF14_LTDC definition</span><span style="font-size: 12pt; font-family: "Times New Roman",serif;" lang="EN-US"><o:p></o:p></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;">HAL
|
||||
I2C</span></b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;"> update </span><span style="font-size: 12pt; font-family: "Times New Roman",serif;"><o:p></o:p></span></li><ul style="margin-top: 0cm; list-style-type: circle;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Add I2C_FIRST_AND_NEXT_FRAME
|
||||
for I2C Sequential Transfer Options</span><span style="font-size: 12pt; font-family: "Times New Roman",serif;" lang="EN-US"><o:p></o:p></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL IRDA</span></b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US"> update</span><span style="font-size: 12pt; font-family: "Times New Roman",serif;" lang="EN-US"><o:p></o:p></span></li><ul style="margin-top: 0cm; list-style-type: circle;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Add IRDA_CLOCKSOURCE_UNDEFINED
|
||||
define</span><span style="font-size: 12pt; font-family: "Times New Roman",serif;" lang="EN-US"><o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Add
|
||||
__HAL_IRDA_FLUSH_DRREGISTER() macro for IRDA DR register flush</span><span style="font-size: 12pt; font-family: "Times New Roman",serif;" lang="EN-US"><o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Add macros for specific flag
|
||||
clear <o:p></o:p></span></li><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">__HAL_IRDA_CLEAR_FLAG()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">__HAL_IRDA_CLEAR_PEFLAG()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">__HAL_IRDA_CLEAR_FEFLAG()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">__HAL_IRDA_CLEAR_NEFLAG() <o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">__HAL_IRDA_CLEAR_OREFLAG()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">__HAL_IRDA_CLEAR_IDLEFLAG()<o:p></o:p></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Add new functions and call
|
||||
backs for Transfer Abort<o:p></o:p></span></li><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL_IRDA_Abort()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL_IRDA_AbortTransmit()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL_IRDA_AbortReceive()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL_IRDA_Abort_IT()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL_IRDA_AbortTransmit_IT()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL_IRDA_AbortReceive_IT()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL_IRDA_AbortCpltCallback()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL_IRDA_AbortTransmitCpltCallback()<o:p></o:p></span></li></ul></ul></ul>
|
||||
<ul style="margin-top: 0cm;" type="square"><ul style="margin-top: 0cm;" type="square"><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL_IRDA_AbortReceiveCpltCallback()<o:p></o:p></span></li></ul></ul></ul>
|
||||
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;">HAL
|
||||
JPEG</span></b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;"> update </span><span style="font-size: 12pt; font-family: "Times New Roman",serif;"><o:p></o:p></span></li><ul style="margin-top: 0cm; list-style-type: circle;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Update the output data
|
||||
management when HAL_JPEG_Pause() is performed during the last data
|
||||
sending</span><span style="font-size: 12pt; font-family: "Times New Roman",serif;" lang="EN-US"><o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Update JPEG_FIFO_SIZE
|
||||
definition</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;">HAL
|
||||
RCC </span></b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;">update</span><span style="font-size: 12pt; font-family: "Times New Roman",serif;"><o:p></o:p></span></li><ul style="margin-top: 0cm; list-style-type: circle;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Enable PWR only if necessary
|
||||
for LSE configuration in HAL_RCC_OscConfig() API</span><span style="font-size: 12pt; font-family: "Times New Roman",serif;" lang="EN-US"><o:p></o:p></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL RTC</span></b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US"> update<o:p></o:p></span></li><ul style="margin-top: 0cm; list-style-type: circle;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Update
|
||||
HAL_RTCEx_SetTimeStamp_IT() function implementation to clear RTC
|
||||
Timestamp flag<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Update
|
||||
HAL_RTCEx_SetTamper_IT() function implementation for better management of
|
||||
different RTC tampers flags<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Update
|
||||
HAL_RTCEx_SetWakeUpTimer_IT() function implementation to clear wake up
|
||||
timer flag</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL SMARTCARD</span></b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US"> update</span><span style="font-size: 12pt; font-family: "Times New Roman",serif;" lang="EN-US"><o:p></o:p></span></li><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Rename NACKState to NACKEnable
|
||||
in the SMARTCARD_InitTypeDef structure</span><span style="font-size: 12pt; font-family: "Times New Roman",serif;" lang="EN-US"><o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Add macros for specific flag
|
||||
clear <o:p></o:p></span></li><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">__HAL_SMARTCARD_CLEAR_FLAG()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">__HAL_SMARTCARD_CLEAR_PEFLAG()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">__HAL_SMARTCARD_CLEAR_FEFLAG()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">__HAL_SMARTCARD_CLEAR_NEFLAG()
|
||||
<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">__HAL_</span><span style="color: windowtext;" lang="EN-US"> </span><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">SMARTCARD_CLEAR_OREFLAG()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">__HAL_</span><span style="color: windowtext;" lang="EN-US"> </span><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">SMARTCARD_CLEAR_IDLEFLAG()<o:p></o:p></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Add new functions and call backs
|
||||
for Transfer Abort<o:p></o:p></span></li><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL_</span><span style="color: windowtext;" lang="EN-US"> </span><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">SMARTCARD_Abort()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL_</span><span style="color: windowtext;" lang="EN-US"> </span><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">SMARTCARD_AbortTransmit()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL_</span><span style="color: windowtext;" lang="EN-US"> </span><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">SMARTCARD_AbortReceive()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL_</span><span style="color: windowtext;" lang="EN-US"> </span><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">SMARTCARD_Abort_IT()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL_</span><span style="color: windowtext;" lang="EN-US"> </span><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">SMARTCARD_AbortTransmit_IT()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL_</span><span style="color: windowtext;" lang="EN-US"> </span><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">SMARTCARD_AbortReceive_IT()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL_</span><span style="color: windowtext;" lang="EN-US"> </span><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">SMARTCARD_AbortCpltCallback()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL_</span><span style="color: windowtext;" lang="EN-US"> </span><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">SMARTCARD_AbortTransmitCpltCallback()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL_</span><span style="color: windowtext;" lang="EN-US"> </span><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">SMARTCARD_AbortReceiveCpltCallback()<o:p></o:p></span></li></ul></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL SPI</span></b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US"> update</span><span style="font-size: 12pt; font-family: "Times New Roman",serif;" lang="EN-US"><o:p></o:p></span></li><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Update SPI_EndRxTxTransaction() function to RX FiFo at the end of each transaction</span><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US"></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Add HAL_SPI_STATE_ABORT in the
|
||||
HAL_SPI_StateTypeDef enum<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Add new functions and call
|
||||
backs for Transfer Abort<o:p></o:p></span></li><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL_SPI_Abort ()<o:p></o:p></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL_SPI_Abort_IT()</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">HAL_SPI_AbortCpltCallback()<br></span></li></ul></ul></ul>
|
||||
|
||||
<span style="font-size: 10pt; font-family: "Verdana",sans-serif; color: black;" lang="EN-US"></span>
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;">HAL
|
||||
UART </span></b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;">update<o:p></o:p></span></li><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Update HAL_UART_Receive_IT()
|
||||
and HAL_UART_DMAStop() functions implementations to manage Parity error
|
||||
interrupt<o:p></o:p></span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;">HAL
|
||||
USART </span></b><span style="font-size: 10pt; font-family: "Verdana",sans-serif;">update<o:p></o:p></span></li><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Update HAL_USART_Init() function by removing the clear of CLKEN bit</span><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US"></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Update HAL_USART_Receive_IT()
|
||||
and HAL_USART_DMAStop() functions implementations to manage Parity error
|
||||
interrupt<o:p></o:p></span></li></ul></ul>
|
||||
<ul style="margin-top: 0cm;" type="square"><li style="margin-top: 4.5pt; margin-bottom: 4.5pt; color: black;" class="MsoNormal"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;"><span style="font-weight: bold;">HAL USB</span> update</span></li><ul style="margin-top: 0cm; list-style-type: circle;"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana",sans-serif;" lang="EN-US">Update PENA bit clearing in
|
||||
OTG_HPRT0 register</span><span style="font-size: 12pt; font-family: "Times New Roman",serif;" lang="EN-US"><o:p></o:p></span></li></ul></ul>
|
||||
<h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.1 / 01-July-2016</span></h3>
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes</span></u></b></p><ul style="margin-top: 0cm;" type="square"><li style="margin-top: 4.5pt; margin-bottom: 4.5pt; color: black;" class="MsoNormal"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;"><span style="font-weight: bold;">HAL DMA</span> update </span></li><ul><li style="margin-top: 4.5pt; margin-bottom: 4.5pt; color: black;" class="MsoNormal"><span style="font-family: Verdana,sans-serif; font-size: 10pt;">Update HAL_DMA_PollForTransfer() function implementation to avoid early TIMEOUT error.</span> </li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;"><span style="font-weight: bold;">HAL JPEG</span> update</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;">Update HAL_JPEG_ConfigEncoding() function to properly set the ImageHeight and ImageWidth</span></li></ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;"><span style="font-weight: bold;">HAL SPI</span> update</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;">Update SPI_DMATransmitReceiveCplt() function to properly handle the CRC and avoid conditional statement duplication<br></span></li></ul></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.1.0 / 22-April-2016</span></h3>
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes</span></u></b></p><ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;">Official release to add the support of <span style="font-weight: bold;">STM32F765xx, STM32F767xx, STM32F768xx, STM32F769xx, STM32F777xx, STM32F778xx</span> <span style="font-weight: bold;">and STM32F779xx</span> devices<br></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-family: Verdana,sans-serif; font-size: 10pt;">General updates
|
||||
to fix known defects and enhancements implementation</span></li><li class="MsoNormal" style="margin: 4.5pt 0in; font-size: 12pt; font-family: 'Times New Roman',serif; color: black;"><span style="font-size: 10pt; font-family: Verdana,sans-serif;">Add new HAL drivers for<span class="Apple-converted-space"> </span><span style="font-weight: bold;">DFSDM, DSI<span class="Apple-converted-space">, JPEG </span></span>and<span class="Apple-converted-space"> </span><span style="font-weight: bold;">MDIOS<span class="Apple-converted-space"> </span></span>peripherals</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;">Enhance HAL delay and timebase implementation</span></li><ul><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;"></span><span style="font-family: 'Verdana','sans-serif'; font-size: 10pt;">Add new
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32_hal_legacy.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief This file contains aliases definition for the STM32Cube HAL constants
|
||||
* macros and functions maintained for legacy purpose.
|
||||
******************************************************************************
|
||||
|
|
@ -138,6 +138,7 @@
|
|||
#define COMP_EXTI_LINE_COMP5_EVENT COMP_EXTI_LINE_COMP5
|
||||
#define COMP_EXTI_LINE_COMP6_EVENT COMP_EXTI_LINE_COMP6
|
||||
#define COMP_EXTI_LINE_COMP7_EVENT COMP_EXTI_LINE_COMP7
|
||||
#define COMP_LPTIMCONNECTION_ENABLED COMP_LPTIMCONNECTION_IN1_ENABLED /*!< COMPX output is connected to LPTIM input 1 */
|
||||
#define COMP_OUTPUT_COMP6TIM2OCREFCLR COMP_OUTPUT_COMP6_TIM2OCREFCLR
|
||||
#if defined(STM32F373xC) || defined(STM32F378xx)
|
||||
#define COMP_OUTPUT_TIM3IC1 COMP_OUTPUT_COMP1_TIM3IC1
|
||||
|
|
@ -150,6 +151,9 @@
|
|||
#define COMP_NONINVERTINGINPUT_IO1 COMP_INPUT_PLUS_IO1
|
||||
#define COMP_NONINVERTINGINPUT_IO2 COMP_INPUT_PLUS_IO2
|
||||
#define COMP_NONINVERTINGINPUT_IO3 COMP_INPUT_PLUS_IO3
|
||||
#define COMP_NONINVERTINGINPUT_IO4 COMP_INPUT_PLUS_IO4
|
||||
#define COMP_NONINVERTINGINPUT_IO5 COMP_INPUT_PLUS_IO5
|
||||
#define COMP_NONINVERTINGINPUT_IO6 COMP_INPUT_PLUS_IO6
|
||||
|
||||
#define COMP_INVERTINGINPUT_1_4VREFINT COMP_INPUT_MINUS_1_4VREFINT
|
||||
#define COMP_INVERTINGINPUT_1_2VREFINT COMP_INPUT_MINUS_1_2VREFINT
|
||||
|
|
@ -160,8 +164,16 @@
|
|||
#define COMP_INVERTINGINPUT_DAC1 COMP_INPUT_MINUS_DAC1_CH1
|
||||
#define COMP_INVERTINGINPUT_DAC2 COMP_INPUT_MINUS_DAC1_CH2
|
||||
#define COMP_INVERTINGINPUT_IO1 COMP_INPUT_MINUS_IO1
|
||||
#if defined(STM32L0)
|
||||
/* Issue fixed on STM32L0 COMP driver: only 2 dedicated IO (IO1 and IO2), */
|
||||
/* IO2 was wrongly assigned to IO shared with DAC and IO3 was corresponding */
|
||||
/* to the second dedicated IO (only for COMP2). */
|
||||
#define COMP_INVERTINGINPUT_IO2 COMP_INPUT_MINUS_DAC1_CH2
|
||||
#define COMP_INVERTINGINPUT_IO3 COMP_INPUT_MINUS_IO2
|
||||
#else
|
||||
#define COMP_INVERTINGINPUT_IO2 COMP_INPUT_MINUS_IO2
|
||||
#define COMP_INVERTINGINPUT_IO3 COMP_INPUT_MINUS_IO3
|
||||
#endif
|
||||
#define COMP_INVERTINGINPUT_IO4 COMP_INPUT_MINUS_IO4
|
||||
#define COMP_INVERTINGINPUT_IO5 COMP_INPUT_MINUS_IO5
|
||||
|
||||
|
|
@ -344,6 +356,7 @@
|
|||
#define OB_RDP_LEVEL0 OB_RDP_LEVEL_0
|
||||
#define OB_RDP_LEVEL1 OB_RDP_LEVEL_1
|
||||
#define OB_RDP_LEVEL2 OB_RDP_LEVEL_2
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
@ -841,6 +854,8 @@
|
|||
#define __DIVFRAQ_SAMPLING8 UART_DIVFRAQ_SAMPLING8
|
||||
#define __UART_BRR_SAMPLING8 UART_BRR_SAMPLING8
|
||||
|
||||
#define __DIV_LPUART UART_DIV_LPUART
|
||||
|
||||
#define UART_WAKEUPMETHODE_IDLELINE UART_WAKEUPMETHOD_IDLELINE
|
||||
#define UART_WAKEUPMETHODE_ADDRESSMARK UART_WAKEUPMETHOD_ADDRESSMARK
|
||||
|
||||
|
|
@ -2637,10 +2652,22 @@
|
|||
|
||||
#define RCC_IT_HSI14 RCC_IT_HSI14RDY
|
||||
|
||||
#if defined(STM32L0)
|
||||
#define RCC_IT_LSECSS RCC_IT_CSSLSE
|
||||
#define RCC_IT_CSS RCC_IT_CSSHSE
|
||||
#endif
|
||||
#define RCC_IT_CSSLSE RCC_IT_LSECSS
|
||||
#define RCC_IT_CSSHSE RCC_IT_CSS
|
||||
|
||||
#define RCC_PLLMUL_3 RCC_PLL_MUL3
|
||||
#define RCC_PLLMUL_4 RCC_PLL_MUL4
|
||||
#define RCC_PLLMUL_6 RCC_PLL_MUL6
|
||||
#define RCC_PLLMUL_8 RCC_PLL_MUL8
|
||||
#define RCC_PLLMUL_12 RCC_PLL_MUL12
|
||||
#define RCC_PLLMUL_16 RCC_PLL_MUL16
|
||||
#define RCC_PLLMUL_24 RCC_PLL_MUL24
|
||||
#define RCC_PLLMUL_32 RCC_PLL_MUL32
|
||||
#define RCC_PLLMUL_48 RCC_PLL_MUL48
|
||||
|
||||
#define RCC_PLLDIV_2 RCC_PLL_DIV2
|
||||
#define RCC_PLLDIV_3 RCC_PLL_DIV3
|
||||
#define RCC_PLLDIV_4 RCC_PLL_DIV4
|
||||
|
||||
#define IS_RCC_MCOSOURCE IS_RCC_MCO1SOURCE
|
||||
#define __HAL_RCC_MCO_CONFIG __HAL_RCC_MCO1_CONFIG
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief HAL module driver.
|
||||
* This is the common part of the HAL initialization
|
||||
*
|
||||
|
|
@ -68,11 +68,11 @@
|
|||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief STM32F7xx HAL Driver version number V1.1.0
|
||||
* @brief STM32F7xx HAL Driver version number V1.1.2
|
||||
*/
|
||||
#define __STM32F7xx_HAL_VERSION_MAIN (0x01) /*!< [31:24] main version */
|
||||
#define __STM32F7xx_HAL_VERSION_SUB1 (0x01) /*!< [23:16] sub1 version */
|
||||
#define __STM32F7xx_HAL_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
|
||||
#define __STM32F7xx_HAL_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */
|
||||
#define __STM32F7xx_HAL_VERSION_RC (0x00) /*!< [7:0] release candidate */
|
||||
#define __STM32F7xx_HAL_VERSION ((__STM32F7xx_HAL_VERSION_MAIN << 24)\
|
||||
|(__STM32F7xx_HAL_VERSION_SUB1 << 16)\
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief This file contains all the functions prototypes for the HAL
|
||||
* module driver.
|
||||
******************************************************************************
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_adc.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Analog to Digital Convertor (ADC) peripheral:
|
||||
* + Initialization and de-initialization functions
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_adc.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of ADC HAL extension module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_adc_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the ADC extension peripheral:
|
||||
* + Extended features functions
|
||||
|
|
@ -804,7 +804,7 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_I
|
|||
assert_param(IS_ADC_RANGE(tmp, sConfigInjected->InjectedOffset));
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
if(sConfigInjected->ExternalTrigInjecConvEdge != ADC_INJECTED_SOFTWARE_START)
|
||||
if(sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
|
||||
{
|
||||
assert_param(IS_ADC_EXT_INJEC_TRIG_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_adc.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of ADC HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_can.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief CAN HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the Controller Area Network (CAN) peripheral:
|
||||
|
|
@ -381,10 +381,12 @@ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTy
|
|||
|
||||
/* Initialisation mode for the filter */
|
||||
can_ip->FMR |= (uint32_t)CAN_FMR_FINIT;
|
||||
|
||||
|
||||
#if defined (CAN2)
|
||||
/* Select the start slave bank */
|
||||
can_ip->FMR &= ~((uint32_t)CAN_FMR_CAN2SB);
|
||||
can_ip->FMR |= (uint32_t)(sFilterConfig->BankNumber << 8);
|
||||
#endif
|
||||
|
||||
/* Filter Deactivation */
|
||||
can_ip->FA1R &= ~(uint32_t)filternbrbitpos;
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_can.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of CAN HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_cec.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief CEC HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the High Definition Multimedia Interface
|
||||
|
|
@ -88,6 +88,7 @@
|
|||
* @{
|
||||
*/
|
||||
#ifdef HAL_CEC_MODULE_ENABLED
|
||||
#if defined (CEC)
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
|
|
@ -655,7 +656,8 @@ uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec)
|
|||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
*/
|
||||
#endif /* CEC */
|
||||
#endif /* HAL_CEC_MODULE_ENABLED */
|
||||
/**
|
||||
* @}
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_cec.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of CEC HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
@ -43,6 +43,8 @@
|
|||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined (CEC)
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f7xx_hal_def.h"
|
||||
|
||||
|
|
@ -737,7 +739,9 @@ uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec);
|
|||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
#endif /* CEC */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_conf.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief HAL configuration file.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_cortex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief CORTEX HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the CORTEX:
|
||||
|
|
@ -269,6 +269,46 @@ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
|
|||
*/
|
||||
|
||||
#if (__MPU_PRESENT == 1)
|
||||
/**
|
||||
* @brief Disables the MPU
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_MPU_Disable(void)
|
||||
{
|
||||
/* Make sure outstanding transfers are done */
|
||||
__DMB();
|
||||
|
||||
/* Disable fault exceptions */
|
||||
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
|
||||
/* Disable the MPU and clear the control register*/
|
||||
MPU->CTRL = 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables the MPU
|
||||
* @param MPU_Control: Specifies the control mode of the MPU during hard fault,
|
||||
* NMI, FAULTMASK and privileged access to the default memory
|
||||
* This parameter can be one of the following values:
|
||||
* @arg MPU_HFNMI_PRIVDEF_NONE
|
||||
* @arg MPU_HARDFAULT_NMI
|
||||
* @arg MPU_PRIVILEGED_DEFAULT
|
||||
* @arg MPU_HFNMI_PRIVDEF
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_MPU_Enable(uint32_t MPU_Control)
|
||||
{
|
||||
/* Enable the MPU */
|
||||
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
|
||||
|
||||
/* Enable fault exceptions */
|
||||
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
|
||||
/* Ensure MPU setting take effects */
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes and configures the Region and the memory to be protected.
|
||||
* @param MPU_Init: Pointer to a MPU_Region_InitTypeDef structure that contains
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_cortex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of CORTEX HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
@ -291,6 +291,8 @@ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb);
|
|||
*/
|
||||
/* Peripheral Control functions ***********************************************/
|
||||
#if (__MPU_PRESENT == 1)
|
||||
void HAL_MPU_Enable(uint32_t MPU_Control);
|
||||
void HAL_MPU_Disable(void);
|
||||
void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init);
|
||||
#endif /* __MPU_PRESENT */
|
||||
uint32_t HAL_NVIC_GetPriorityGrouping(void);
|
||||
|
|
@ -401,53 +403,8 @@ void HAL_SYSTICK_Callback(void);
|
|||
#endif /* __MPU_PRESENT */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
/** @defgroup CORTEX_Private_Functions CORTEX Private Functions
|
||||
* @brief CORTEX private functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if (__MPU_PRESENT == 1)
|
||||
/**
|
||||
* @brief Disables the MPU
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void HAL_MPU_Disable(void)
|
||||
{
|
||||
/* Disable fault exceptions */
|
||||
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
|
||||
/* Disable the MPU */
|
||||
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables the MPU
|
||||
* @param MPU_Control: Specifies the control mode of the MPU during hard fault,
|
||||
* NMI, FAULTMASK and privileged access to the default memory
|
||||
* This parameter can be one of the following values:
|
||||
* @arg MPU_HFNMI_PRIVDEF_NONE
|
||||
* @arg MPU_HARDFAULT_NMI
|
||||
* @arg MPU_PRIVILEGED_DEFAULT
|
||||
* @arg MPU_HFNMI_PRIVDEF
|
||||
* @retval None
|
||||
*/
|
||||
__STATIC_INLINE void HAL_MPU_Enable(uint32_t MPU_Control)
|
||||
{
|
||||
/* Enable the MPU */
|
||||
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
|
||||
|
||||
/* Enable fault exceptions */
|
||||
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
}
|
||||
#endif /* __MPU_PRESENT */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_crc.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief CRC HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the Cyclic Redundancy Check (CRC) peripheral:
|
||||
|
|
@ -214,6 +214,9 @@ HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc)
|
|||
|
||||
/* Reset CRC calculation unit */
|
||||
__HAL_CRC_DR_RESET(hcrc);
|
||||
|
||||
/* Reset IDR register content */
|
||||
CLEAR_BIT(hcrc->Instance->IDR, CRC_IDR_IDR);
|
||||
|
||||
/* DeInit the low level hardware */
|
||||
HAL_CRC_MspDeInit(hcrc);
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_crc.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of CRC HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_crc_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Extended CRC HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_crc_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of CRC HAL extension module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_cryp.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief CRYP HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the Cryptography (CRYP) peripheral:
|
||||
|
|
@ -100,18 +100,18 @@
|
|||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f7xx_hal.h"
|
||||
|
||||
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||
|
||||
#if defined (CRYP)
|
||||
|
||||
/** @addtogroup STM32F7xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
#if defined (STM32F756xx) || defined (STM32F777xx) || defined (STM32F779xx)
|
||||
/** @defgroup CRYP CRYP
|
||||
* @brief CRYP HAL module driver.
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/** @addtogroup CRYP_Private_define
|
||||
|
|
@ -3808,16 +3808,14 @@ HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp)
|
|||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* CRYP */
|
||||
|
||||
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* STM32F756xx || STM32F777xx || STM32F779xx */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_cryp.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of CRYP HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
@ -43,10 +43,10 @@
|
|||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined (STM32F756xx) || defined (STM32F777xx) || defined (STM32F779xx)
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f7xx_hal_def.h"
|
||||
|
||||
#if defined (CRYP)
|
||||
/** @addtogroup STM32F7xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
|
@ -521,7 +521,7 @@ HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp);
|
|||
* @}
|
||||
*/
|
||||
|
||||
#endif /* STM32F756xx || STM32F777xx || STM32F779xx */
|
||||
#endif /* CRYP */
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_cryp_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Extended CRYP HAL module driver
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of CRYP extension peripheral:
|
||||
|
|
@ -102,7 +102,6 @@
|
|||
/** @addtogroup STM32F7xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
#if defined (STM32F756xx) || defined (STM32F777xx) || defined (STM32F779xx)
|
||||
/** @defgroup CRYPEx CRYPEx
|
||||
* @brief CRYP Extension HAL module driver.
|
||||
* @{
|
||||
|
|
@ -111,6 +110,8 @@
|
|||
|
||||
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||
|
||||
#if defined (CRYP)
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/** @addtogroup CRYPEx_Private_define
|
||||
|
|
@ -3027,12 +3028,15 @@ void HAL_CRYPEx_GCMCCM_IRQHandler(CRYP_HandleTypeDef *hcryp)
|
|||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* CRYP */
|
||||
|
||||
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* STM32F756xx || STM32F777xx || STM32F779xx */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_cryp_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of CRYP HAL Extension module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
@ -43,10 +43,11 @@
|
|||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined (STM32F756xx) || defined (STM32F777xx) || defined (STM32F779xx)
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f7xx_hal_def.h"
|
||||
|
||||
#if defined (CRYP)
|
||||
|
||||
/** @addtogroup STM32F7xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
|
@ -206,7 +207,8 @@ void HAL_CRYPEx_GCMCCM_IRQHandler(CRYP_HandleTypeDef *hcryp);
|
|||
* @}
|
||||
*/
|
||||
|
||||
#endif /* STM32F756xx || STM32F777xx || STM32F779xx */
|
||||
#endif /* CRYP */
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_dac.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief DAC HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the Digital to Analog Converter (DAC) peripheral:
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_dac.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of DAC HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_dac_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Extended DAC HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of DAC extension peripheral:
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_dac.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of DAC HAL Extension module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_dcmi.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief DCMI HAL module driver
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the Digital Camera Interface (DCMI) peripheral:
|
||||
|
|
@ -102,6 +102,7 @@
|
|||
*/
|
||||
|
||||
#ifdef HAL_DCMI_MODULE_ENABLED
|
||||
#if defined (DCMI)
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
|
|
@ -892,6 +893,7 @@ static void DCMI_DMAError(DMA_HandleTypeDef *hdma)
|
|||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* DCMI */
|
||||
#endif /* HAL_DCMI_MODULE_ENABLED */
|
||||
/**
|
||||
* @}
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_dcmi.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of DCMI HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
@ -43,6 +43,8 @@
|
|||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined (DCMI)
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f7xx_hal_def.h"
|
||||
|
||||
|
|
@ -615,6 +617,7 @@ uint32_t HAL_DCMI_GetError(DCMI_HandleTypeDef *hdcmi);
|
|||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* DCMI */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_dcmi_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Empty file; This file is no longer used to handle the Black&White
|
||||
* feature. Its content is now moved to common files
|
||||
* (stm32f7xx_hal_dcmi.c/.h) as there's no device's dependency within F7
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_dcmi_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of DCMI Extension HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_def.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief This file contains HAL common defines, enumeration, macros and
|
||||
* structures definitions.
|
||||
******************************************************************************
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_dfsdm.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief This file provides firmware functions to manage the following
|
||||
* functionalities of the Digital Filter for Sigma-Delta Modulators
|
||||
* (DFSDM) peripherals:
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_dfsdm.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of DFSDM HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_dma.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief DMA HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
|
|
@ -19,21 +19,25 @@
|
|||
(#) Enable and configure the peripheral to be connected to the DMA Stream
|
||||
(except for internal SRAM/FLASH memories: no initialization is
|
||||
necessary) please refer to Reference manual for connection between peripherals
|
||||
and DMA requests .
|
||||
and DMA requests.
|
||||
|
||||
(#) For a given Stream, program the required configuration through the following parameters:
|
||||
Transfer Direction, Source and Destination data formats,
|
||||
Circular, Normal or peripheral flow control mode, Stream Priority level,
|
||||
Source and Destination Increment mode, FIFO mode and its Threshold (if needed),
|
||||
Burst mode for Source and/or Destination (if needed) using HAL_DMA_Init() function.
|
||||
|
||||
-@- Prior to HAL_DMA_Init() the clock must be enabled for DMA through the following macros:
|
||||
__HAL_RCC_DMA1_CLK_ENABLE() or __HAL_RCC_DMA2_CLK_ENABLE().
|
||||
|
||||
*** Polling mode IO operation ***
|
||||
=================================
|
||||
[..]
|
||||
(+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source
|
||||
address and destination address and the Length of data to be transferred
|
||||
address and destination address and the Length of data to be transferred.
|
||||
(+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this
|
||||
case a fixed Timeout can be configured by User depending from his application.
|
||||
(+) Use HAL_DMA_Abort() function to abort the current transfer.
|
||||
|
||||
*** Interrupt mode IO operation ***
|
||||
===================================
|
||||
|
|
@ -51,7 +55,7 @@
|
|||
(#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error
|
||||
detection.
|
||||
|
||||
(#) Use HAL_DMA_Abort() function to abort the current transfer
|
||||
(#) Use HAL_DMA_Abort_IT() function to abort the current transfer
|
||||
|
||||
-@- In Memory-to-Memory transfer mode, Circular mode is not allowed.
|
||||
|
||||
|
|
@ -72,9 +76,6 @@
|
|||
|
||||
(+) __HAL_DMA_ENABLE: Enable the specified DMA Stream.
|
||||
(+) __HAL_DMA_DISABLE: Disable the specified DMA Stream.
|
||||
(+) __HAL_DMA_GET_FS: Return the current DMA Stream FIFO filled level.
|
||||
(+) __HAL_DMA_ENABLE_IT: Enable the specified DMA Stream interrupts.
|
||||
(+) __HAL_DMA_DISABLE_IT: Disable the specified DMA Stream interrupts.
|
||||
(+) __HAL_DMA_GET_IT_SOURCE: Check whether the specified DMA Stream interrupt has occurred or not.
|
||||
|
||||
[..]
|
||||
|
|
@ -335,6 +336,9 @@ HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
|
|||
/* Return error status */
|
||||
return HAL_BUSY;
|
||||
}
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_DMA_STREAM_ALL_INSTANCE(hdma->Instance));
|
||||
|
||||
/* Disable the selected DMA Streamx */
|
||||
__HAL_DMA_DISABLE(hdma);
|
||||
|
|
@ -613,13 +617,21 @@ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
|
|||
HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef CompleteLevel, uint32_t Timeout)
|
||||
{
|
||||
HAL_StatusTypeDef status = HAL_OK;
|
||||
uint32_t temp;
|
||||
uint32_t mask_cpltlevel;
|
||||
uint32_t tickstart = HAL_GetTick();
|
||||
uint32_t tmpisr;
|
||||
|
||||
/* calculate DMA base and stream number */
|
||||
DMA_Base_Registers *regs;
|
||||
|
||||
if(HAL_DMA_STATE_BUSY != hdma->State)
|
||||
{
|
||||
/* No transfer ongoing */
|
||||
hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
|
||||
__HAL_UNLOCK(hdma);
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Polling mode not supported in circular mode and double buffering mode */
|
||||
if ((hdma->Instance->CR & DMA_SxCR_CIRC) != RESET)
|
||||
{
|
||||
|
|
@ -631,18 +643,18 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_Level
|
|||
if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
|
||||
{
|
||||
/* Transfer Complete flag */
|
||||
temp = DMA_FLAG_TCIF0_4 << hdma->StreamIndex;
|
||||
mask_cpltlevel = DMA_FLAG_TCIF0_4 << hdma->StreamIndex;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Half Transfer Complete flag */
|
||||
temp = DMA_FLAG_HTIF0_4 << hdma->StreamIndex;
|
||||
mask_cpltlevel = DMA_FLAG_HTIF0_4 << hdma->StreamIndex;
|
||||
}
|
||||
|
||||
regs = (DMA_Base_Registers *)hdma->StreamBaseAddress;
|
||||
tmpisr = regs->ISR;
|
||||
|
||||
while((tmpisr & temp) == RESET )
|
||||
while(((tmpisr & mask_cpltlevel) == RESET) && ((hdma->ErrorCode & HAL_DMA_ERROR_TE) == RESET))
|
||||
{
|
||||
/* Check for the Timeout (Not applicable in circular mode)*/
|
||||
if(Timeout != HAL_MAX_DELAY)
|
||||
|
|
@ -662,6 +674,9 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_Level
|
|||
}
|
||||
}
|
||||
|
||||
/* Get the ISR register value */
|
||||
tmpisr = regs->ISR;
|
||||
|
||||
if((tmpisr & (DMA_FLAG_TEIF0_4 << hdma->StreamIndex)) != RESET)
|
||||
{
|
||||
/* Update error code */
|
||||
|
|
@ -707,8 +722,6 @@ HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_Level
|
|||
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
status = HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Get the level transfer complete flag */
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_dma.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of DMA HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_dma2d.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief DMA2D HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the DMA2D peripheral:
|
||||
|
|
@ -138,6 +138,7 @@
|
|||
*/
|
||||
|
||||
#ifdef HAL_DMA2D_MODULE_ENABLED
|
||||
#if defined (DMA2D)
|
||||
|
||||
/* Private types -------------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
|
|
@ -589,8 +590,8 @@ HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d)
|
|||
|
||||
/* Abort the DMA2D transfer */
|
||||
/* START bit is reset to make sure not to set it again, in the event the HW clears it
|
||||
between the register read and the register write by the CPU (writing ‘0’ has no
|
||||
effect on START bitvalue). */
|
||||
between the register read and the register write by the CPU (writing 0 has no
|
||||
effect on START bitvalue) */
|
||||
MODIFY_REG(hdma2d->Instance->CR, DMA2D_CR_ABORT|DMA2D_CR_START, DMA2D_CR_ABORT);
|
||||
|
||||
/* Get tick */
|
||||
|
|
@ -638,7 +639,7 @@ HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d)
|
|||
|
||||
/* Suspend the DMA2D transfer */
|
||||
/* START bit is reset to make sure not to set it again, in the event the HW clears it
|
||||
between the register read and the register write by the CPU (writing ‘0’ has no
|
||||
between the register read and the register write by the CPU (writing 0 has no
|
||||
effect on START bitvalue). */
|
||||
MODIFY_REG(hdma2d->Instance->CR, DMA2D_CR_SUSP|DMA2D_CR_START, DMA2D_CR_SUSP);
|
||||
|
||||
|
|
@ -693,7 +694,7 @@ HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d)
|
|||
|
||||
/* Resume the DMA2D transfer */
|
||||
/* START bit is reset to make sure not to set it again, in the event the HW clears it
|
||||
between the register read and the register write by the CPU (writing ‘0’ has no
|
||||
between the register read and the register write by the CPU (writing 0 has no
|
||||
effect on START bitvalue). */
|
||||
CLEAR_BIT(hdma2d->Instance->CR, (DMA2D_CR_SUSP|DMA2D_CR_START));
|
||||
|
||||
|
|
@ -1750,6 +1751,7 @@ static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_
|
|||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* DMA2D */
|
||||
#endif /* HAL_DMA2D_MODULE_ENABLED */
|
||||
/**
|
||||
* @}
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_dma2d.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of DMA2D HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
@ -43,6 +43,8 @@
|
|||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined (DMA2D)
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f7xx_hal_def.h"
|
||||
|
||||
|
|
@ -624,6 +626,7 @@ uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d);
|
|||
* @}
|
||||
*/
|
||||
|
||||
#endif /* DMA2D */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_dma_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief DMA Extension HAL module driver
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the DMA Extension peripheral:
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_dma_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of DMA HAL extension module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_dsi.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief DSI HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the DSI peripheral:
|
||||
|
|
@ -222,7 +222,7 @@ HAL_StatusTypeDef HAL_DSI_Init(DSI_HandleTypeDef *hdsi, DSI_PLLInitTypeDef *PLLI
|
|||
|
||||
/* Set the TX escape clock division factor */
|
||||
hdsi->Instance->CCR &= ~DSI_CCR_TXECKDIV;
|
||||
hdsi->Instance->CCR = hdsi->Init.TXEscapeCkdiv;
|
||||
hdsi->Instance->CCR |= hdsi->Init.TXEscapeCkdiv;
|
||||
|
||||
/* Calculate the bit period in high-speed mode in unit of 0.25 ns (UIX4) */
|
||||
/* The equation is : UIX4 = IntegerPart( (1000/F_PHY_Mhz) * 4 ) */
|
||||
|
|
@ -1005,7 +1005,7 @@ HAL_StatusTypeDef HAL_DSI_ConfigHostTimeouts(DSI_HandleTypeDef *hdsi, DSI_HOST_T
|
|||
|
||||
/* Set the timeout clock division factor */
|
||||
hdsi->Instance->CCR &= ~DSI_CCR_TOCKDIV;
|
||||
hdsi->Instance->CCR = ((HostTimeouts->TimeoutCkdiv)<<8);
|
||||
hdsi->Instance->CCR |= ((HostTimeouts->TimeoutCkdiv)<<8);
|
||||
|
||||
/* High-speed transmission timeout */
|
||||
hdsi->Instance->TCCR[0] &= ~DSI_TCCR0_HSTX_TOCNT;
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_dsi.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of DSI HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_eth.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief ETH HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the Ethernet (ETH) peripheral:
|
||||
|
|
@ -108,6 +108,7 @@
|
|||
*/
|
||||
|
||||
#ifdef HAL_ETH_MODULE_ENABLED
|
||||
#if defined (ETH)
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
|
|
@ -2031,6 +2032,7 @@ static void ETH_FlushTransmitFIFO(ETH_HandleTypeDef *heth)
|
|||
* @}
|
||||
*/
|
||||
|
||||
#endif /* ETH */
|
||||
#endif /* HAL_ETH_MODULE_ENABLED */
|
||||
/**
|
||||
* @}
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_eth.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of ETH HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
@ -43,6 +43,8 @@
|
|||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if defined (ETH)
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f7xx_hal_def.h"
|
||||
|
||||
|
|
@ -692,7 +694,7 @@ typedef struct
|
|||
|
||||
/* 5 Ethernet driver receive buffers are used (in a chained linked list)*/
|
||||
#ifndef ETH_RXBUFNB
|
||||
#define ETH_RXBUFNB ((uint32_t)5U /* 5 Rx buffers of size ETH_RX_BUF_SIZE */
|
||||
#define ETH_RXBUFNB ((uint32_t)5U) /* 5 Rx buffers of size ETH_RX_BUF_SIZE */
|
||||
#endif
|
||||
|
||||
|
||||
|
|
@ -719,7 +721,7 @@ typedef struct
|
|||
|
||||
/* 5 Ethernet driver transmit buffers are used (in a chained linked list)*/
|
||||
#ifndef ETH_TXBUFNB
|
||||
#define ETH_TXBUFNB ((uint32_t)5U /* 5 Tx buffers of size ETH_TX_BUF_SIZE */
|
||||
#define ETH_TXBUFNB ((uint32_t)5U) /* 5 Tx buffers of size ETH_TX_BUF_SIZE */
|
||||
#endif
|
||||
|
||||
/**
|
||||
|
|
@ -2169,6 +2171,8 @@ HAL_ETH_StateTypeDef HAL_ETH_GetState(ETH_HandleTypeDef *heth);
|
|||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* ETH */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_flash.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief FLASH HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the internal FLASH memory:
|
||||
|
|
@ -327,6 +327,9 @@ void HAL_FLASH_IRQHandler(void)
|
|||
/* Check FLASH End of Operation flag */
|
||||
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP) != RESET)
|
||||
{
|
||||
/* Clear FLASH End of Operation pending bit */
|
||||
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
|
||||
|
||||
switch (pFlash.ProcedureOnGoing)
|
||||
{
|
||||
case FLASH_PROC_SECTERASE :
|
||||
|
|
@ -341,9 +344,6 @@ void HAL_FLASH_IRQHandler(void)
|
|||
/* Indicate user which sector has been erased */
|
||||
HAL_FLASH_EndOfOperationCallback(temp);
|
||||
|
||||
/* Clear pending flags (if any) */
|
||||
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
|
||||
|
||||
/* Increment sector number */
|
||||
temp = ++pFlash.Sector;
|
||||
FLASH_Erase_Sector(temp, pFlash.VoltageForErase);
|
||||
|
|
@ -357,8 +357,6 @@ void HAL_FLASH_IRQHandler(void)
|
|||
HAL_FLASH_EndOfOperationCallback(temp);
|
||||
/* Sector Erase procedure is completed */
|
||||
pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
|
||||
/* Clear FLASH End of Operation pending bit */
|
||||
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
|
@ -370,8 +368,6 @@ void HAL_FLASH_IRQHandler(void)
|
|||
HAL_FLASH_EndOfOperationCallback(0);
|
||||
/* MAss Erase procedure is completed */
|
||||
pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
|
||||
/* Clear FLASH End of Operation pending bit */
|
||||
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -382,8 +378,6 @@ void HAL_FLASH_IRQHandler(void)
|
|||
HAL_FLASH_EndOfOperationCallback(pFlash.Address);
|
||||
/* Programming procedure is completed */
|
||||
pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
|
||||
/* Clear FLASH End of Operation pending bit */
|
||||
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
|
||||
break;
|
||||
}
|
||||
default :
|
||||
|
|
@ -392,7 +386,7 @@ void HAL_FLASH_IRQHandler(void)
|
|||
}
|
||||
|
||||
/* Check FLASH operation error flags */
|
||||
if(__HAL_FLASH_GET_FLAG((FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR | FLASH_FLAG_ERSERR )) != RESET)
|
||||
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_ALL_ERRORS) != RESET)
|
||||
{
|
||||
switch (pFlash.ProcedureOnGoing)
|
||||
{
|
||||
|
|
@ -423,8 +417,6 @@ void HAL_FLASH_IRQHandler(void)
|
|||
|
||||
/* FLASH error interrupt user callback */
|
||||
HAL_FLASH_OperationErrorCallback(temp);
|
||||
/* Clear FLASH error pending bits */
|
||||
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR | FLASH_FLAG_ERSERR );
|
||||
|
||||
/*Stop the procedure ongoing */
|
||||
pFlash.ProcedureOnGoing = FLASH_PROC_NONE;
|
||||
|
|
@ -641,13 +633,19 @@ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout)
|
|||
}
|
||||
}
|
||||
|
||||
if(__HAL_FLASH_GET_FLAG((FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | \
|
||||
FLASH_FLAG_PGPERR | FLASH_FLAG_ERSERR )) != RESET)
|
||||
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_ALL_ERRORS) != RESET)
|
||||
{
|
||||
/*Save the error code*/
|
||||
FLASH_SetErrorCode();
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
/* Check FLASH End of Operation flag */
|
||||
if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP) != RESET)
|
||||
{
|
||||
/* Clear FLASH End of Operation pending bit */
|
||||
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
|
||||
}
|
||||
|
||||
/* If there is an error flag set */
|
||||
return HAL_OK;
|
||||
|
|
@ -777,7 +775,12 @@ static void FLASH_Program_Byte(uint32_t Address, uint8_t Data)
|
|||
* @retval None
|
||||
*/
|
||||
static void FLASH_SetErrorCode(void)
|
||||
{
|
||||
{
|
||||
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPERR) != RESET)
|
||||
{
|
||||
pFlash.ErrorCode |= HAL_FLASH_ERROR_OPERATION;
|
||||
}
|
||||
|
||||
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) != RESET)
|
||||
{
|
||||
pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
|
||||
|
|
@ -798,10 +801,8 @@ static void FLASH_SetErrorCode(void)
|
|||
pFlash.ErrorCode |= HAL_FLASH_ERROR_ERS;
|
||||
}
|
||||
|
||||
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPERR) != RESET)
|
||||
{
|
||||
pFlash.ErrorCode |= HAL_FLASH_ERROR_OPERATION;
|
||||
}
|
||||
/* Clear error programming flags */
|
||||
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_ALL_ERRORS);
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_flash.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of FLASH HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
@ -136,7 +136,11 @@ typedef struct
|
|||
#define FLASH_FLAG_PGAERR FLASH_SR_PGAERR /*!< FLASH Programming Alignment error flag */
|
||||
#define FLASH_FLAG_PGPERR FLASH_SR_PGPERR /*!< FLASH Programming Parallelism error flag */
|
||||
#define FLASH_FLAG_ERSERR FLASH_SR_ERSERR /*!< FLASH Erasing Sequence error flag */
|
||||
#define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */
|
||||
#define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */
|
||||
|
||||
|
||||
#define FLASH_FLAG_ALL_ERRORS (FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | \
|
||||
FLASH_FLAG_PGPERR | FLASH_FLAG_ERSERR)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_flash_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Extended FLASH HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the FLASH extension peripheral:
|
||||
|
|
@ -90,8 +90,8 @@
|
|||
/** @addtogroup FLASHEx_Private_Constants
|
||||
* @{
|
||||
*/
|
||||
#define SECTOR_MASK ((uint32_t)0xFFFFFF07)
|
||||
#define FLASH_TIMEOUT_VALUE ((uint32_t)50000)/* 50 s */
|
||||
#define SECTOR_MASK 0xFFFFFF07U
|
||||
#define FLASH_TIMEOUT_VALUE 50000U/* 50 s */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
@ -774,7 +774,7 @@ static HAL_StatusTypeDef FLASH_OB_UserConfig(uint32_t Wwdg, uint32_t Iwdg, uint3
|
|||
static uint32_t FLASH_OB_GetUser(void)
|
||||
{
|
||||
/* Return the User Option Byte */
|
||||
return ((uint32_t)(FLASH->OPTCR & 0xC00000F0));
|
||||
return ((uint32_t)(FLASH->OPTCR & 0xC00000F0U));
|
||||
}
|
||||
#endif /* FLASH_OPTCR_nDBANK */
|
||||
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_flash_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of FLASH HAL Extension module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
@ -540,7 +540,7 @@ void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
|
|||
((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\
|
||||
((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7))
|
||||
|
||||
#define IS_OB_WRP_SECTOR(SECTOR) ((((SECTOR) & (uint32_t)0xFF00FFFF) == 0x00000000U) && ((SECTOR) != 0x00000000U))
|
||||
#define IS_OB_WRP_SECTOR(SECTOR) ((((SECTOR) & 0xFF00FFFFU) == 0x00000000U) && ((SECTOR) != 0x00000000U))
|
||||
#endif /* FLASH_SECTOR_TOTAL == 8 */
|
||||
|
||||
#if (FLASH_SECTOR_TOTAL == 24)
|
||||
|
|
@ -557,7 +557,7 @@ void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
|
|||
((SECTOR) == FLASH_SECTOR_20) || ((SECTOR) == FLASH_SECTOR_21) ||\
|
||||
((SECTOR) == FLASH_SECTOR_22) || ((SECTOR) == FLASH_SECTOR_23))
|
||||
|
||||
#define IS_OB_WRP_SECTOR(SECTOR) ((((SECTOR) & (uint32_t)0xF000FFFFU) == 0x00000000U) && ((SECTOR) != 0x00000000U))
|
||||
#define IS_OB_WRP_SECTOR(SECTOR) ((((SECTOR) & 0xF000FFFFU) == 0x00000000U) && ((SECTOR) != 0x00000000U))
|
||||
#endif /* FLASH_SECTOR_TOTAL == 24 */
|
||||
|
||||
#if defined (FLASH_OPTCR_nDBANK)
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_gpio.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief GPIO HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the General Purpose Input/Output (GPIO) peripheral:
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_gpio.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of GPIO HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
@ -280,7 +280,7 @@ void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin);
|
|||
* @{
|
||||
*/
|
||||
#define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET))
|
||||
#define IS_GPIO_PIN(PIN) (((PIN) & GPIO_PIN_MASK ) != (uint32_t)0x00)
|
||||
#define IS_GPIO_PIN(__PIN__) ((((__PIN__) & GPIO_PIN_MASK) != (uint32_t)0x00))
|
||||
#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) ||\
|
||||
((MODE) == GPIO_MODE_OUTPUT_PP) ||\
|
||||
((MODE) == GPIO_MODE_OUTPUT_OD) ||\
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_gpio_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of GPIO HAL Extension module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
@ -64,7 +64,9 @@
|
|||
/** @defgroup GPIO_Alternate_function_selection GPIO Alternate Function Selection
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*--------------- STM32F74xxx/STM32F75xxx/STM32F76xxx/STM32F77xxx -------------*/
|
||||
#if defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx) || defined (STM32F765xx) || defined (STM32F767xx) ||\
|
||||
defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)
|
||||
/**
|
||||
* @brief AF 0 selection
|
||||
*/
|
||||
|
|
@ -188,7 +190,8 @@
|
|||
#define GPIO_AF10_SAI2 ((uint8_t)0xAU) /* SAI2 Alternate Function mapping */
|
||||
#if defined (STM32F765xx) || defined(STM32F767xx) || defined(STM32F769xx) || defined(STM32F777xx) || defined(STM32F779xx)
|
||||
#define GPIO_AF10_DFSDM1 ((uint8_t)0x0AU) /* DFSDM1 Alternate Function mapping */
|
||||
#define GPIO_AF10_SDMMC2 ((uint8_t)0x0AU) /* SDMMC2 Alternate Function mapping */
|
||||
#define GPIO_AF10_SDMMC2 ((uint8_t)0x0AU) /* SDMMC2 Alternate Function mapping */
|
||||
#define GPIO_AF10_LTDC ((uint8_t)0x0AU) /* LCD-TFT Alternate Function mapping */
|
||||
#endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
|
||||
|
||||
/**
|
||||
|
|
@ -231,7 +234,8 @@
|
|||
* @brief AF 15 selection
|
||||
*/
|
||||
#define GPIO_AF15_EVENTOUT ((uint8_t)0x0FU) /* EVENTOUT Alternate Function mapping */
|
||||
|
||||
#endif /* STM32F745xx || STM32F746xx || STM32F756xx || STM32F765xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
|
||||
/*----------------------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
|
@ -291,6 +295,8 @@
|
|||
/** @defgroup GPIOEx_Get_Port_Index GPIO Get Port Index
|
||||
* @{
|
||||
*/
|
||||
#if defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx) || defined (STM32F765xx) ||\
|
||||
defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)
|
||||
#define GPIO_GET_INDEX(__GPIOx__) (uint8_t)(((__GPIOx__) == (GPIOA))? 0U :\
|
||||
((__GPIOx__) == (GPIOB))? 1U :\
|
||||
((__GPIOx__) == (GPIOC))? 2U :\
|
||||
|
|
@ -300,7 +306,9 @@
|
|||
((__GPIOx__) == (GPIOG))? 6U :\
|
||||
((__GPIOx__) == (GPIOH))? 7U :\
|
||||
((__GPIOx__) == (GPIOI))? 8U :\
|
||||
((__GPIOx__) == (GPIOJ))? 9U : 10U)
|
||||
((__GPIOx__) == (GPIOJ))? 9U : 10U)
|
||||
#endif /* STM32F745xx || STM32F746xx || STM32F756xx || STM32F765xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
@ -352,9 +360,9 @@
|
|||
((AF) == GPIO_AF12_FMC) || ((AF) == GPIO_AF15_EVENTOUT) || \
|
||||
((AF) == GPIO_AF13_DCMI) || ((AF) == GPIO_AF14_LTDC))
|
||||
#elif defined(STM32F745xx)
|
||||
#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) || ((AF) == GPIO_AF1_TIM1) || \
|
||||
#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) || ((AF) == GPIO_AF1_TIM1) || \
|
||||
((AF) == GPIO_AF0_SWJ) || ((AF) == GPIO_AF0_TRACE) || \
|
||||
((AF) == GPIO_AF0_MCO) || ((AF) == GPIO_AF1_TIM2) || \
|
||||
((AF) == GPIO_AF0_MCO) || ((AF) == GPIO_AF1_TIM2) || \
|
||||
((AF) == GPIO_AF2_TIM3) || ((AF) == GPIO_AF2_TIM4) || \
|
||||
((AF) == GPIO_AF2_TIM5) || ((AF) == GPIO_AF3_TIM8) || \
|
||||
((AF) == GPIO_AF3_TIM9) || ((AF) == GPIO_AF3_TIM10) || \
|
||||
|
|
@ -379,7 +387,7 @@
|
|||
((AF) == GPIO_AF13_DCMI) || ((AF) == GPIO_AF10_OTG_FS) || \
|
||||
((AF) == GPIO_AF10_OTG_HS) || ((AF) == GPIO_AF10_SAI2) || \
|
||||
((AF) == GPIO_AF10_QUADSPI) || ((AF) == GPIO_AF11_ETH) || \
|
||||
((AF) == GPIO_AF12_OTG_HS_FS) || ((AF) == GPIO_AF12_SDMMC1) || \
|
||||
((AF) == GPIO_AF12_OTG_HS_FS) || ((AF) == GPIO_AF12_SDMMC1) || \
|
||||
((AF) == GPIO_AF12_FMC) || ((AF) == GPIO_AF15_EVENTOUT))
|
||||
#elif defined(STM32F767xx) || defined(STM32F777xx)
|
||||
#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) || ((AF) == GPIO_AF1_TIM1) || \
|
||||
|
|
@ -409,10 +417,11 @@
|
|||
((AF) == GPIO_AF10_OTG_FS) || ((AF) == GPIO_AF9_LTDC) || \
|
||||
((AF) == GPIO_AF10_OTG_HS) || ((AF) == GPIO_AF10_SAI2) || \
|
||||
((AF) == GPIO_AF10_QUADSPI) || ((AF) == GPIO_AF11_ETH) || \
|
||||
((AF) == GPIO_AF10_SDMMC2) || ((AF) == GPIO_AF11_SDMMC2) || \
|
||||
((AF) == GPIO_AF11_CAN3) || ((AF) == GPIO_AF12_OTG_HS_FS) || \
|
||||
((AF) == GPIO_AF12_SDMMC1) || ((AF) == GPIO_AF12_FMC) || \
|
||||
((AF) == GPIO_AF15_EVENTOUT) || ((AF) == GPIO_AF13_DCMI) || \
|
||||
((AF) == GPIO_AF14_LTDC))
|
||||
((AF) == GPIO_AF14_LTDC))
|
||||
#elif defined(STM32F769xx) || defined(STM32F779xx)
|
||||
#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) || ((AF) == GPIO_AF1_TIM1) || \
|
||||
((AF) == GPIO_AF0_SWJ) || ((AF) == GPIO_AF0_TRACE) || \
|
||||
|
|
@ -441,6 +450,7 @@
|
|||
((AF) == GPIO_AF9_LTDC) || ((AF) == GPIO_AF10_OTG_FS) || \
|
||||
((AF) == GPIO_AF10_OTG_HS) || ((AF) == GPIO_AF10_SAI2) || \
|
||||
((AF) == GPIO_AF10_QUADSPI) || ((AF) == GPIO_AF11_ETH) || \
|
||||
((AF) == GPIO_AF10_SDMMC2) || ((AF) == GPIO_AF11_SDMMC2) || \
|
||||
((AF) == GPIO_AF11_CAN3) || ((AF) == GPIO_AF12_OTG_HS_FS) || \
|
||||
((AF) == GPIO_AF12_SDMMC1) || ((AF) == GPIO_AF12_FMC) || \
|
||||
((AF) == GPIO_AF15_EVENTOUT) || ((AF) == GPIO_AF13_DCMI) || \
|
||||
|
|
@ -472,6 +482,7 @@
|
|||
((AF) == GPIO_AF9_TIM14) || ((AF) == GPIO_AF9_QUADSPI) || \
|
||||
((AF) == GPIO_AF10_OTG_HS) || ((AF) == GPIO_AF10_SAI2) || \
|
||||
((AF) == GPIO_AF10_QUADSPI) || ((AF) == GPIO_AF11_ETH) || \
|
||||
((AF) == GPIO_AF10_SDMMC2) || ((AF) == GPIO_AF11_SDMMC2) || \
|
||||
((AF) == GPIO_AF11_CAN3) || ((AF) == GPIO_AF12_OTG_HS_FS) || \
|
||||
((AF) == GPIO_AF12_SDMMC1) || ((AF) == GPIO_AF12_FMC) || \
|
||||
((AF) == GPIO_AF15_EVENTOUT) || ((AF) == GPIO_AF13_DCMI) || \
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_hash.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief HASH HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the HASH peripheral:
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_hash.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of HASH HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_hash_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief HASH HAL Extension module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of HASH peripheral:
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_hash_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of HASH HAL Extension module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_hcd.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief HCD HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the USB Peripheral Controller:
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_hcd.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of HCD HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_i2c.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief I2C HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the Inter Integrated Circuit (I2C) peripheral:
|
||||
|
|
@ -98,6 +98,9 @@
|
|||
(++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode
|
||||
(++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
|
||||
and data to transfer without a final stop condition
|
||||
(++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a sequence with start condition, address
|
||||
and data to transfer without a final stop condition, an then permit a call the same master sequential interface
|
||||
several times (like HAL_I2C_Master_Sequential_Transmit_IT() then HAL_I2C_Master_Sequential_Transmit_IT())
|
||||
(++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address
|
||||
and with new data to transfer if the direction change or manage only the new data to transfer
|
||||
if no direction change and without a final stop condition in both cases
|
||||
|
|
@ -284,15 +287,17 @@
|
|||
#define I2C_STATE_MEM_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MEM)) /*!< Memory Busy TX, combinaison of State LSB and Mode enum */
|
||||
#define I2C_STATE_MEM_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MEM)) /*!< Memory Busy RX, combinaison of State LSB and Mode enum */
|
||||
|
||||
|
||||
/* Private define to centralize the enable/disable of Interrupts */
|
||||
#define I2C_XFER_TX_IT ((uint32_t)0x00000001)
|
||||
#define I2C_XFER_RX_IT ((uint32_t)0x00000002)
|
||||
#define I2C_XFER_LISTEN_IT ((uint32_t)0x00000004)
|
||||
#define I2C_XFER_TX_IT ((uint32_t)0x00000001U)
|
||||
#define I2C_XFER_RX_IT ((uint32_t)0x00000002U)
|
||||
#define I2C_XFER_LISTEN_IT ((uint32_t)0x00000004U)
|
||||
|
||||
#define I2C_XFER_ERROR_IT ((uint32_t)0x00000011)
|
||||
#define I2C_XFER_CPLT_IT ((uint32_t)0x00000012)
|
||||
#define I2C_XFER_RELOAD_IT ((uint32_t)0x00000012)
|
||||
#define I2C_XFER_ERROR_IT ((uint32_t)0x00000011U)
|
||||
#define I2C_XFER_CPLT_IT ((uint32_t)0x00000012U)
|
||||
#define I2C_XFER_RELOAD_IT ((uint32_t)0x00000012U)
|
||||
|
||||
/* Private define Sequential Transfer Options default/reset value */
|
||||
#define I2C_NO_OPTION_FRAME ((uint32_t)0xFFFF0000U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
@ -400,13 +405,13 @@ static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, ui
|
|||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
|
||||
{
|
||||
{
|
||||
/* Check the I2C handle allocation */
|
||||
if(hi2c == NULL)
|
||||
{
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
|
||||
assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
|
||||
|
|
@ -421,35 +426,34 @@ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
|
|||
{
|
||||
/* Allocate lock resource and initialize it */
|
||||
hi2c->Lock = HAL_UNLOCKED;
|
||||
|
||||
|
||||
/* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
|
||||
HAL_I2C_MspInit(hi2c);
|
||||
}
|
||||
|
||||
hi2c->State = HAL_I2C_STATE_BUSY;
|
||||
|
||||
|
||||
/* Disable the selected I2C peripheral */
|
||||
__HAL_I2C_DISABLE(hi2c);
|
||||
|
||||
|
||||
/*---------------------------- I2Cx TIMINGR Configuration ------------------*/
|
||||
/* Configure I2Cx: Frequency range */
|
||||
hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK;
|
||||
|
||||
|
||||
/*---------------------------- I2Cx OAR1 Configuration ---------------------*/
|
||||
/* Configure I2Cx: Own Address1 and ack own address1 mode */
|
||||
/* Disable Own Address1 before set the Own Address1 configuration */
|
||||
hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN;
|
||||
if(hi2c->Init.OwnAddress1 != 0)
|
||||
|
||||
/* Configure I2Cx: Own Address1 and ack own address1 mode */
|
||||
if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
|
||||
{
|
||||
if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
|
||||
{
|
||||
hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1);
|
||||
}
|
||||
else /* I2C_ADDRESSINGMODE_10BIT */
|
||||
{
|
||||
hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1);
|
||||
}
|
||||
hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1);
|
||||
}
|
||||
|
||||
else /* I2C_ADDRESSINGMODE_10BIT */
|
||||
{
|
||||
hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1);
|
||||
}
|
||||
|
||||
/*---------------------------- I2Cx CR2 Configuration ----------------------*/
|
||||
/* Configure I2Cx: Addressing Master mode */
|
||||
if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
|
||||
|
|
@ -458,15 +462,18 @@ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
|
|||
}
|
||||
/* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */
|
||||
hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK);
|
||||
|
||||
|
||||
/*---------------------------- I2Cx OAR2 Configuration ---------------------*/
|
||||
/* Disable Own Address2 before set the Own Address2 configuration */
|
||||
hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE;
|
||||
|
||||
/* Configure I2Cx: Dual mode and Own Address2 */
|
||||
hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | (hi2c->Init.OwnAddress2Masks << 8));
|
||||
|
||||
/*---------------------------- I2Cx CR1 Configuration ----------------------*/
|
||||
/* Configure I2Cx: Generalcall and NoStretch mode */
|
||||
hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
|
||||
|
||||
|
||||
/* Enable the selected I2C peripheral */
|
||||
__HAL_I2C_ENABLE(hi2c);
|
||||
|
||||
|
|
@ -613,7 +620,8 @@ __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
|
|||
* @brief Transmits in master mode an amount of data in blocking mode.
|
||||
* @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified I2C.
|
||||
* @param DevAddress: Target device address
|
||||
* @param DevAddress: Target device address. The device 7 bits address value
|
||||
* in datasheet must be shift at right before call interface
|
||||
* @param pData: Pointer to data buffer
|
||||
* @param Size: Amount of data to be sent
|
||||
* @param Timeout: Timeout duration
|
||||
|
|
@ -736,7 +744,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevA
|
|||
* @brief Receives in master mode an amount of data in blocking mode.
|
||||
* @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified I2C.
|
||||
* @param DevAddress: Target device address
|
||||
* @param DevAddress: Target device address. The device 7 bits address value
|
||||
* in datasheet must be shift at right before call interface
|
||||
* @param pData: Pointer to data buffer
|
||||
* @param Size: Amount of data to be sent
|
||||
* @param Timeout: Timeout duration
|
||||
|
|
@ -1131,7 +1140,8 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData,
|
|||
* @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt
|
||||
* @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified I2C.
|
||||
* @param DevAddress: Target device address
|
||||
* @param DevAddress: Target device address. The device 7 bits address value
|
||||
* in datasheet must be shift at right before call interface
|
||||
* @param pData: Pointer to data buffer
|
||||
* @param Size: Amount of data to be sent
|
||||
* @retval HAL status
|
||||
|
|
@ -1199,7 +1209,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t D
|
|||
* @brief Receive in master mode an amount of data in non-blocking mode with Interrupt
|
||||
* @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified I2C.
|
||||
* @param DevAddress: Target device address
|
||||
* @param DevAddress: Target device address. The device 7 bits address value
|
||||
* in datasheet must be shift at right before call interface
|
||||
* @param pData: Pointer to data buffer
|
||||
* @param Size: Amount of data to be sent
|
||||
* @retval HAL status
|
||||
|
|
@ -1365,7 +1376,8 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pDa
|
|||
* @brief Transmit in master mode an amount of data in non-blocking mode with DMA
|
||||
* @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified I2C.
|
||||
* @param DevAddress: Target device address
|
||||
* @param DevAddress: Target device address. The device 7 bits address value
|
||||
* in datasheet must be shift at right before call interface
|
||||
* @param pData: Pointer to data buffer
|
||||
* @param Size: Amount of data to be sent
|
||||
* @retval HAL status
|
||||
|
|
@ -1449,7 +1461,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t
|
|||
* @brief Receive in master mode an amount of data in non-blocking mode with DMA
|
||||
* @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified I2C.
|
||||
* @param DevAddress: Target device address
|
||||
* @param DevAddress: Target device address. The device 7 bits address value
|
||||
* in datasheet must be shift at right before call interface
|
||||
* @param pData: Pointer to data buffer
|
||||
* @param Size: Amount of data to be sent
|
||||
* @retval HAL status
|
||||
|
|
@ -2510,7 +2523,8 @@ HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAdd
|
|||
* @note This interface allow to manage repeated start condition when a direction change during transfer
|
||||
* @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified I2C.
|
||||
* @param DevAddress: Target device address
|
||||
* @param DevAddress: Target device address. The device 7 bits address value
|
||||
* in datasheet must be shift at right before call interface
|
||||
* @param pData: Pointer to data buffer
|
||||
* @param Size: Amount of data to be sent
|
||||
* @param XferOptions: Options of Transfer, value of @ref I2C_XFEROPTIONS
|
||||
|
|
@ -2575,7 +2589,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c,
|
|||
* @note This interface allow to manage repeated start condition when a direction change during transfer
|
||||
* @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified I2C.
|
||||
* @param DevAddress: Target device address
|
||||
* @param DevAddress: Target device address. The device 7 bits address value
|
||||
* in datasheet must be shift at right before call interface
|
||||
* @param pData: Pointer to data buffer
|
||||
* @param Size: Amount of data to be sent
|
||||
* @param XferOptions: Options of Transfer, value of @ref I2C_XFEROPTIONS
|
||||
|
|
@ -2826,7 +2841,8 @@ HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
|
|||
* @brief Abort a master I2C IT or DMA process communication with Interrupt.
|
||||
* @param hi2c: Pointer to a I2C_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified I2C.
|
||||
* @param DevAddress: Target device address
|
||||
* @param DevAddress Target device address: The device 7 bits address value
|
||||
* in datasheet must be shift at right before call interface
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_i2c.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of I2C HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
@ -247,8 +247,8 @@ typedef struct __I2C_HandleTypeDef
|
|||
/** @defgroup I2C_XFEROPTIONS I2C Sequential Transfer Options
|
||||
* @{
|
||||
*/
|
||||
#define I2C_NO_OPTION_FRAME ((uint32_t)0xFFFF0000U)
|
||||
#define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE)
|
||||
#define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
|
||||
#define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
|
||||
#define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
|
||||
#define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
|
||||
|
|
@ -660,6 +660,7 @@ uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
|
|||
((REQUEST) == I2C_NO_STARTSTOP))
|
||||
|
||||
#define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
|
||||
((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
|
||||
((REQUEST) == I2C_NEXT_FRAME) || \
|
||||
((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
|
||||
((REQUEST) == I2C_LAST_FRAME))
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_i2c_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief I2C Extended HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of I2C Extended peripheral:
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_i2c_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of I2C HAL Extension module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_i2s.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief I2S HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the Integrated Interchip Sound (I2S) peripheral:
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_i2s.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of I2S HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_irda.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of IRDA HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
@ -157,7 +157,8 @@ typedef enum
|
|||
IRDA_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */
|
||||
IRDA_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */
|
||||
IRDA_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */
|
||||
IRDA_CLOCKSOURCE_LSE = 0x08U /*!< LSE clock source */
|
||||
IRDA_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */
|
||||
IRDA_CLOCKSOURCE_UNDEFINED = 0x10 /*!< Undefined clock source */
|
||||
}IRDA_ClockSourceTypeDef;
|
||||
|
||||
/**
|
||||
|
|
@ -173,13 +174,13 @@ typedef struct
|
|||
|
||||
uint16_t TxXferSize; /* IRDA Tx Transfer size */
|
||||
|
||||
uint16_t TxXferCount; /* IRDA Tx Transfer Counter */
|
||||
__IO uint16_t TxXferCount; /* IRDA Tx Transfer Counter */
|
||||
|
||||
uint8_t *pRxBuffPtr; /* Pointer to IRDA Rx transfer Buffer */
|
||||
|
||||
uint16_t RxXferSize; /* IRDA Rx Transfer size */
|
||||
|
||||
uint16_t RxXferCount; /* IRDA Rx Transfer Counter */
|
||||
__IO uint16_t RxXferCount; /* IRDA Rx Transfer Counter */
|
||||
|
||||
uint16_t Mask; /* IRDA RX RDR register mask */
|
||||
|
||||
|
|
@ -401,6 +402,60 @@ typedef struct
|
|||
*/
|
||||
#define __HAL_IRDA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IRDA_STATE_RESET)
|
||||
|
||||
/** @brief Flush the IRDA DR register.
|
||||
* @param __HANDLE__: specifies the IRDA Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_IRDA_FLUSH_DRREGISTER(__HANDLE__) \
|
||||
do{ \
|
||||
SET_BIT((__HANDLE__)->Instance->RQR, IRDA_RXDATA_FLUSH_REQUEST); \
|
||||
SET_BIT((__HANDLE__)->Instance->RQR, IRDA_TXDATA_FLUSH_REQUEST); \
|
||||
} while(0)
|
||||
|
||||
/** @brief Clear the specified IRDA pending flag.
|
||||
* @param __HANDLE__: specifies the IRDA Handle.
|
||||
* @param __FLAG__: specifies the flag to check.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg @ref IRDA_CLEAR_PEF
|
||||
* @arg @ref IRDA_CLEAR_FEF
|
||||
* @arg @ref IRDA_CLEAR_NEF
|
||||
* @arg @ref IRDA_CLEAR_OREF
|
||||
* @arg @ref IRDA_CLEAR_TCF
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_IRDA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
|
||||
|
||||
/** @brief Clear the IRDA PE pending flag.
|
||||
* @param __HANDLE__: specifies the IRDA Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_PEF)
|
||||
|
||||
|
||||
/** @brief Clear the IRDA FE pending flag.
|
||||
* @param __HANDLE__: specifies the IRDA Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_IRDA_CLEAR_FEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_FEF)
|
||||
|
||||
/** @brief Clear the IRDA NE pending flag.
|
||||
* @param __HANDLE__: specifies the IRDA Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_IRDA_CLEAR_NEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_NEF)
|
||||
|
||||
/** @brief Clear the IRDA ORE pending flag.
|
||||
* @param __HANDLE__: specifies the IRDA Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_IRDA_CLEAR_OREFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_OREF)
|
||||
|
||||
/** @brief Clear the IRDA IDLE pending flag.
|
||||
* @param __HANDLE__: specifies the IRDA Handle.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_IRDA_CLEAR_IDLEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_IDLEF)
|
||||
|
||||
/** @brief Check whether the specified IRDA flag is set or not.
|
||||
* @param __HANDLE__: specifies the IRDA Handle.
|
||||
* The Handle Instance which can be USART1 or USART2.
|
||||
|
|
@ -575,12 +630,24 @@ HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData
|
|||
HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda);
|
||||
HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda);
|
||||
HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda);
|
||||
/* Transfer Abort functions */
|
||||
HAL_StatusTypeDef HAL_IRDA_Abort(IRDA_HandleTypeDef *hirda);
|
||||
HAL_StatusTypeDef HAL_IRDA_AbortTransmit(IRDA_HandleTypeDef *hirda);
|
||||
HAL_StatusTypeDef HAL_IRDA_AbortReceive(IRDA_HandleTypeDef *hirda);
|
||||
HAL_StatusTypeDef HAL_IRDA_Abort_IT(IRDA_HandleTypeDef *hirda);
|
||||
HAL_StatusTypeDef HAL_IRDA_AbortTransmit_IT(IRDA_HandleTypeDef *hirda);
|
||||
HAL_StatusTypeDef HAL_IRDA_AbortReceive_IT(IRDA_HandleTypeDef *hirda);
|
||||
|
||||
void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda);
|
||||
void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda);
|
||||
void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda);
|
||||
void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
|
||||
void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
|
||||
void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda);
|
||||
void HAL_IRDA_AbortCpltCallback (IRDA_HandleTypeDef *hirda);
|
||||
void HAL_IRDA_AbortTransmitCpltCallback (IRDA_HandleTypeDef *hirda);
|
||||
void HAL_IRDA_AbortReceiveCpltCallback (IRDA_HandleTypeDef *hirda);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_irda_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of IRDA HAL Extension module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_iwdg.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief IWDG HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the Independent Watchdog (IWDG) peripheral:
|
||||
|
|
@ -50,20 +50,20 @@
|
|||
==============================================================================
|
||||
[..]
|
||||
(#) Use IWDG using HAL_IWDG_Init() function to :
|
||||
(+) Enable instance by writing Start keyword in IWDG_KEY register. LSI
|
||||
(++) Enable instance by writing Start keyword in IWDG_KEY register. LSI
|
||||
clock is forced ON and IWDG counter starts downcounting.
|
||||
(+) Enable write access to configuration register: IWDG_PR, IWDG_RLR &
|
||||
(++) Enable write access to configuration register: IWDG_PR, IWDG_RLR &
|
||||
IWDG_WINR.
|
||||
(+) Configure the IWDG prescaler and counter reload value. This reload
|
||||
(++) Configure the IWDG prescaler and counter reload value. This reload
|
||||
value will be loaded in the IWDG counter each time the watchdog is
|
||||
reloaded, then the IWDG will start counting down from this value.
|
||||
(+) wait for status flags to be reset"
|
||||
(+) Depending on window parameter:
|
||||
(++) If Window Init parameter is same as Window register value,
|
||||
nothing more is done but reload counter value in order to exit
|
||||
function withy exact time base.
|
||||
(++) Else modify Window register. This will automatically reload
|
||||
watchdog counter.
|
||||
(++) wait for status flags to be reset
|
||||
(++) Depending on window parameter:
|
||||
(+++) If Window Init parameter is same as Window register value,
|
||||
nothing more is done but reload counter value in order to exit
|
||||
function withy exact time base.
|
||||
(+++) Else modify Window register. This will automatically reload
|
||||
watchdog counter.
|
||||
|
||||
(#) Then the application program must refresh the IWDG counter at regular
|
||||
intervals during normal operation to prevent an MCU reset, using
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_iwdg.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of IWDG HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_jpeg.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief JPEG HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the JPEG encoder/decoder peripheral:
|
||||
|
|
@ -60,57 +60,57 @@
|
|||
consumed by the peripheral and to ask for a new data chunk if the operation
|
||||
(encoding/decoding) has not been complete yet.
|
||||
|
||||
This CallBack should be implemented in the application side. It should
|
||||
call the function HAL_JPEG_ConfigInputBuffer if new input data are available,
|
||||
or call HAL_JPEG_Pause with parameter XferSelection set to "JPEG_PAUSE_RESUME_INPUT"
|
||||
to inform the JPEG HAL driver that the ongoing operation shall pause waiting for the
|
||||
application to provide a new input data chunk.
|
||||
Once the application succeed getting new data and if the input has been paused,
|
||||
the application can call the function HAL_JPEG_ConfigInputBuffer to set the new
|
||||
input buffer and size, then resume the JPEG HAL input by calling new function HAL_JPEG_Resume.
|
||||
If the application has ended feeding the HAL JPEG with input data (no more input data), the application
|
||||
Should call the function “HAL_JPEG_ConfigInputBuffer” (within the callback HAL_JPEG_GetDataCallback)
|
||||
with the parameter “InDataLength” set to zero.
|
||||
(++) This CallBack should be implemented in the application side. It should
|
||||
call the function HAL_JPEG_ConfigInputBuffer if new input data are available,
|
||||
or call HAL_JPEG_Pause with parameter XferSelection set to JPEG_PAUSE_RESUME_INPUT
|
||||
to inform the JPEG HAL driver that the ongoing operation shall pause waiting for the
|
||||
application to provide a new input data chunk.
|
||||
Once the application succeed getting new data and if the input has been paused,
|
||||
the application can call the function HAL_JPEG_ConfigInputBuffer to set the new
|
||||
input buffer and size, then resume the JPEG HAL input by calling new function HAL_JPEG_Resume.
|
||||
If the application has ended feeding the HAL JPEG with input data (no more input data), the application
|
||||
Should call the function HAL_JPEG_ConfigInputBuffer (within the callback HAL_JPEG_GetDataCallback)
|
||||
with the parameter InDataLength set to zero.
|
||||
|
||||
The mechanism of HAL_JPEG_ConfigInputBuffer/HAL_JPEG_Pause/HAL_JPEG_Resume allows
|
||||
to the application to provide the input data (for encoding or decoding) by chunks.
|
||||
If the new input data chunk is not available (because data should be read from an input file
|
||||
for example) the application can pause the JPEG input (using function HAL_JPEG_Pause)
|
||||
Once the new input data chunk is available ( read from a file for example), the application
|
||||
can call the function "HAL_JPEG_ConfigInputBuffer" to provide the HAL with the new chunk
|
||||
then resume the JPEG HAL input by calling function "HAL_JPEG_Resume".
|
||||
(++) The mechanism of HAL_JPEG_ConfigInputBuffer/HAL_JPEG_Pause/HAL_JPEG_Resume allows
|
||||
to the application to provide the input data (for encoding or decoding) by chunks.
|
||||
If the new input data chunk is not available (because data should be read from an input file
|
||||
for example) the application can pause the JPEG input (using function HAL_JPEG_Pause)
|
||||
Once the new input data chunk is available ( read from a file for example), the application
|
||||
can call the function HAL_JPEG_ConfigInputBuffer to provide the HAL with the new chunk
|
||||
then resume the JPEG HAL input by calling function HAL_JPEG_Resume.
|
||||
|
||||
The application can call functions “HAL_JPEG_ConfigInputBuffer “ then "HAL_JPEG_Resume".
|
||||
any time (outside the HAL_JPEG_GetDataCallback) Once the new input chunk data available.
|
||||
However, to keep data coherency, the function “HAL_JPEG_Pause” must be imperatively called
|
||||
(if necessary) within the callback “HAL_JPEG_GetDataCallback”, i.e when the HAL JPEG has ended
|
||||
Transferring the previous chunk buffer to the JPEG peripheral.
|
||||
(++) The application can call functions HAL_JPEG_ConfigInputBuffer then HAL_JPEG_Resume.
|
||||
any time (outside the HAL_JPEG_GetDataCallback) Once the new input chunk data available.
|
||||
However, to keep data coherency, the function HAL_JPEG_Pause must be imperatively called
|
||||
(if necessary) within the callback HAL_JPEG_GetDataCallback, i.e when the HAL JPEG has ended
|
||||
Transferring the previous chunk buffer to the JPEG peripheral.
|
||||
|
||||
(#) Callback HAL_JPEG_DataReadyCallback is asserted when the HAL JPEG driver
|
||||
has filled the given output buffer with the given size.
|
||||
|
||||
This CallBack should be implemented in the application side. It should
|
||||
call the function HAL_JPEG_ConfigOutputBuffer to provide the HAL JPEG driver
|
||||
with the new output buffer location and size to be used to store next data chunk.
|
||||
if the application is not ready to provide the output chunk location then it can
|
||||
call the function "HAL_JPEG_Pause" with parameter XferSelection set to "JPEG_PAUSE_RESUME_OUTPUT"
|
||||
to inform the JPEG HAL driver that it shall pause output data. Once the application
|
||||
is ready to receive the new data chunk (output buffer location free or available) it should call
|
||||
the function "HAL_JPEG_ConfigOutputBuffer" to provide the HAL JPEG driver
|
||||
with the new output chunk buffer location and size, then call "HAL_JPEG_Resume"
|
||||
to inform the HAL that it shall resume outputting data in the given output buffer.
|
||||
(++) This CallBack should be implemented in the application side. It should
|
||||
call the function HAL_JPEG_ConfigOutputBuffer to provide the HAL JPEG driver
|
||||
with the new output buffer location and size to be used to store next data chunk.
|
||||
if the application is not ready to provide the output chunk location then it can
|
||||
call the function HAL_JPEG_Pause with parameter XferSelection set to "JPEG_PAUSE_RESUME_OUTPUT"
|
||||
to inform the JPEG HAL driver that it shall pause output data. Once the application
|
||||
is ready to receive the new data chunk (output buffer location free or available) it should call
|
||||
the function HAL_JPEG_ConfigOutputBuffer to provide the HAL JPEG driver
|
||||
with the new output chunk buffer location and size, then call "HAL_JPEG_Resume"
|
||||
to inform the HAL that it shall resume outputting data in the given output buffer.
|
||||
|
||||
The mechanism of HAL_JPEG_ConfigOutputBuffer/HAL_JPEG_Pause/HAL_JPEG_Resume allows
|
||||
the application to receive data from the JPEG peripheral by chunks. when a chunk
|
||||
is received, the application can pause the HAL JPEG output data to be able to process
|
||||
these received data (YCbCr to RGB conversion in case of decoding or data storage in case
|
||||
of encoding).
|
||||
(++) The mechanism of HAL_JPEG_ConfigOutputBuffer/HAL_JPEG_Pause/HAL_JPEG_Resume allows
|
||||
the application to receive data from the JPEG peripheral by chunks. when a chunk
|
||||
is received, the application can pause the HAL JPEG output data to be able to process
|
||||
these received data (YCbCr to RGB conversion in case of decoding or data storage in case
|
||||
of encoding).
|
||||
|
||||
The application can call functions “HAL_JPEG_ ConfigOutputBuffer“ then "HAL_JPEG_Resume".
|
||||
any time (outside the HAL_JPEG_ DataReadyCallback) Once the output data buffer is free to use.
|
||||
However, to keep data coherency, the function “HAL_JPEG_Pause” must be imperatively called
|
||||
(if necessary) within the callback “HAL_JPEG_ DataReadyCallback”, i.e when the HAL JPEG has ended
|
||||
Transferring the previous chunk buffer from the JPEG peripheral to the application.
|
||||
(++) The application can call functions HAL_JPEG_ ConfigOutputBuffer then HAL_JPEG_Resume.
|
||||
any time (outside the HAL_JPEG_DataReadyCallback) Once the output data buffer is free to use.
|
||||
However, to keep data coherency, the function HAL_JPEG_Pause must be imperatively called
|
||||
(if necessary) within the callback HAL_JPEG_ DataReadyCallback, i.e when the HAL JPEG has ended
|
||||
Transferring the previous chunk buffer from the JPEG peripheral to the application.
|
||||
|
||||
(#) Callback HAL_JPEG_EncodeCpltCallback is asserted when the HAL JPEG driver has
|
||||
ended the current JPEG encoding operation, and all output data has been transmitted
|
||||
|
|
@ -125,10 +125,10 @@
|
|||
to retrieve the error codes.
|
||||
|
||||
(#) By default the HAL JPEG driver uses the default quantization tables
|
||||
as provide in the JPEG specification (ISO/IEC 10918-1 standard) for encoding.
|
||||
User can change these default tables if necessary using the function "HAL_JPEG_SetUserQuantTables"
|
||||
Note that for decoding the quantization tables are automatically extracted from
|
||||
the JPEG header.
|
||||
as provide in the JPEG specification (ISO/IEC 10918-1 standard) for encoding.
|
||||
User can change these default tables if necessary using the function HAL_JPEG_SetUserQuantTables
|
||||
Note that for decoding the quantization tables are automatically extracted from
|
||||
the JPEG header.
|
||||
|
||||
(#) To control JPEG state you can use the following function: HAL_JPEG_GetState()
|
||||
|
||||
|
|
@ -202,7 +202,7 @@
|
|||
#define JPEG_AC_HUFF_TABLE_SIZE ((uint32_t)162U) /* Huffman AC table size : 162 codes*/
|
||||
#define JPEG_DC_HUFF_TABLE_SIZE ((uint32_t)12U) /* Huffman AC table size : 12 codes*/
|
||||
|
||||
#define JPEG_FIFO_SIZE ((uint32_t)8U) /* JPEG Input/Output HW FIFO size in words*/
|
||||
#define JPEG_FIFO_SIZE ((uint32_t)16U) /* JPEG Input/Output HW FIFO size in words*/
|
||||
|
||||
#define JPEG_INTERRUPT_MASK ((uint32_t)0x0000007EU) /* JPEG Interrupt Mask*/
|
||||
|
||||
|
|
@ -438,6 +438,7 @@ static uint32_t JPEG_GetQuality(JPEG_HandleTypeDef *hjpeg);
|
|||
static HAL_StatusTypeDef JPEG_DMA_StartProcess(JPEG_HandleTypeDef *hjpeg);
|
||||
static uint32_t JPEG_DMA_ContinueProcess(JPEG_HandleTypeDef *hjpeg);
|
||||
static uint32_t JPEG_DMA_EndProcess(JPEG_HandleTypeDef *hjpeg);
|
||||
static void JPEG_DMA_PollResidualData(JPEG_HandleTypeDef *hjpeg);
|
||||
static void JPEG_DMAOutCpltCallback(DMA_HandleTypeDef *hdma);
|
||||
static void JPEG_DMAInCpltCallback(DMA_HandleTypeDef *hdma);
|
||||
static void JPEG_DMAErrorCallback(DMA_HandleTypeDef *hdma);
|
||||
|
|
@ -720,7 +721,7 @@ HAL_StatusTypeDef HAL_JPEG_ConfigEncoding(JPEG_HandleTypeDef *hjpeg, JPEG_ConfTy
|
|||
error |= JPEG_Set_Quantization_Mem(hjpeg, hjpeg->QuantTable2, (uint32_t *)(hjpeg->Instance->QMEM2));
|
||||
|
||||
/*Use Quantization 1 table for component 1*/
|
||||
hjpeg->Instance->CONFR5 &= (~JPEG_CONFR6_QT);
|
||||
hjpeg->Instance->CONFR5 &= (~JPEG_CONFR5_QT);
|
||||
hjpeg->Instance->CONFR5 |= JPEG_CONFR5_QT_0;
|
||||
|
||||
/*Use Quantization 2 table for component 2*/
|
||||
|
|
@ -769,8 +770,8 @@ HAL_StatusTypeDef HAL_JPEG_ConfigEncoding(JPEG_HandleTypeDef *hjpeg, JPEG_ConfTy
|
|||
return HAL_ERROR;
|
||||
}
|
||||
/* Set the image size*/
|
||||
hjpeg->Instance->CONFR1 |= ((hjpeg->Conf.ImageHeight & 0x0000FFFF) << 16); /* set the number of lines*/
|
||||
hjpeg->Instance->CONFR3 |= ((hjpeg->Conf.ImageWidth & 0x0000FFFF) << 16); /* set the number of pixels per line*/
|
||||
MODIFY_REG(hjpeg->Instance->CONFR1, JPEG_CONFR1_YSIZE, ((hjpeg->Conf.ImageHeight & 0x0000FFFF) << 16)); /* set the number of lines*/
|
||||
MODIFY_REG(hjpeg->Instance->CONFR3, JPEG_CONFR3_XSIZE, ((hjpeg->Conf.ImageWidth & 0x0000FFFF) << 16)); /* set the number of pixels per line*/
|
||||
|
||||
if(hjpeg->Conf.ChromaSubsampling == JPEG_420_SUBSAMPLING) /* 4:2:0*/
|
||||
{
|
||||
|
|
@ -1593,6 +1594,12 @@ HAL_StatusTypeDef HAL_JPEG_Resume(JPEG_HandleTypeDef *hjpeg, uint32_t XferSelec
|
|||
|
||||
assert_param(IS_JPEG_PAUSE_RESUME_STATE(XferSelection));
|
||||
|
||||
if(((hjpeg->Context & JPEG_CONTEXT_PAUSE_INPUT) == 0) && ((hjpeg->Context & JPEG_CONTEXT_PAUSE_OUTPUT) == 0))
|
||||
{
|
||||
/* if nothing paused to resume return error*/
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
if((hjpeg->Context & JPEG_CONTEXT_METHOD_MASK) == JPEG_CONTEXT_DMA)
|
||||
{
|
||||
|
||||
|
|
@ -1614,11 +1621,20 @@ HAL_StatusTypeDef HAL_JPEG_Resume(JPEG_HandleTypeDef *hjpeg, uint32_t XferSelec
|
|||
}
|
||||
if((XferSelection & JPEG_PAUSE_RESUME_OUTPUT) == JPEG_PAUSE_RESUME_OUTPUT)
|
||||
{
|
||||
hjpeg->Context &= (~JPEG_CONTEXT_PAUSE_OUTPUT);
|
||||
mask |= JPEG_DMA_ODMA;
|
||||
|
||||
/* Start DMA FIFO Out transfer */
|
||||
HAL_DMA_Start_IT(hjpeg->hdmaout, (uint32_t)&hjpeg->Instance->DOR, (uint32_t)hjpeg->pJpegOutBuffPtr, hjpeg->OutDataLength >> 2);
|
||||
if((hjpeg->Context & JPEG_CONTEXT_ENDING_DMA) != 0)
|
||||
{
|
||||
JPEG_DMA_PollResidualData(hjpeg);
|
||||
}
|
||||
else
|
||||
{
|
||||
hjpeg->Context &= (~JPEG_CONTEXT_PAUSE_OUTPUT);
|
||||
mask |= JPEG_DMA_ODMA;
|
||||
|
||||
/* Start DMA FIFO Out transfer */
|
||||
HAL_DMA_Start_IT(hjpeg->hdmaout, (uint32_t)&hjpeg->Instance->DOR, (uint32_t)hjpeg->pJpegOutBuffPtr, hjpeg->OutDataLength >> 2);
|
||||
}
|
||||
|
||||
}
|
||||
JPEG_ENABLE_DMA(hjpeg,mask);
|
||||
|
||||
|
|
@ -1758,7 +1774,7 @@ HAL_StatusTypeDef HAL_JPEG_Abort(JPEG_HandleTypeDef *hjpeg)
|
|||
*
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### JPEG Decode/Encode callback functions #####
|
||||
##### JPEG Decode and Encode callback functions #####
|
||||
==============================================================================
|
||||
[..] This section provides callback functions:
|
||||
(+) HAL_JPEG_InfoReadyCallback() : Decoding JPEG Info ready callback
|
||||
|
|
@ -1993,7 +2009,7 @@ static HAL_StatusTypeDef JPEG_Bits_To_SizeCodes(uint8_t *Bits, uint8_t *Huffsize
|
|||
{
|
||||
uint32_t i, p, l, code, si;
|
||||
|
||||
/* Figure C.1 – Generation of table of Huffman code sizes */
|
||||
/* Figure C.1: Generation of table of Huffman code sizes */
|
||||
p = 0;
|
||||
for (l = 0; l < 16; l++)
|
||||
{
|
||||
|
|
@ -2011,7 +2027,7 @@ static HAL_StatusTypeDef JPEG_Bits_To_SizeCodes(uint8_t *Bits, uint8_t *Huffsize
|
|||
Huffsize[p] = 0;
|
||||
*LastK = p;
|
||||
|
||||
/* Figure C.2 – Generation of table of Huffman codes */
|
||||
/* Figure C.2: Generation of table of Huffman codes */
|
||||
code = 0;
|
||||
si = Huffsize[0];
|
||||
p = 0;
|
||||
|
|
@ -2056,7 +2072,7 @@ static HAL_StatusTypeDef JPEG_ACHuff_BitsVals_To_SizeCodes(JPEG_ACHuffTableTypeD
|
|||
return error;
|
||||
}
|
||||
|
||||
/* Figure C.3 – Ordering procedure for encoding procedure code tables */
|
||||
/* Figure C.3: Ordering procedure for encoding procedure code tables */
|
||||
k=0;
|
||||
|
||||
while(k < lastK)
|
||||
|
|
@ -2227,7 +2243,7 @@ static HAL_StatusTypeDef JPEG_Set_HuffAC_Mem(JPEG_HandleTypeDef *hjpeg, JPEG_ACH
|
|||
{
|
||||
return error;
|
||||
}
|
||||
/* Default values settings : 162–167 FFFh , 168–175 FD0h–FD7h */
|
||||
/* Default values settings: 162:167 FFFh , 168:175 FD0h_FD7h */
|
||||
/* Locations 162:175 of each AC table contain information used internally by the core */
|
||||
|
||||
addressDef = address;
|
||||
|
|
@ -3155,8 +3171,7 @@ static uint32_t JPEG_DMA_ContinueProcess(JPEG_HandleTypeDef *hjpeg)
|
|||
*/
|
||||
static uint32_t JPEG_DMA_EndProcess(JPEG_HandleTypeDef *hjpeg)
|
||||
{
|
||||
uint32_t tmpContext, count = JPEG_FIFO_SIZE, *pDataOut;
|
||||
|
||||
uint32_t tmpContext;
|
||||
hjpeg->JpegOutCount = hjpeg->OutDataLength - ((hjpeg->hdmaout->Instance->NDTR & DMA_SxNDT) << 2);
|
||||
|
||||
/*if Output Buffer is full, call HAL_JPEG_DataReadyCallback*/
|
||||
|
|
@ -3166,6 +3181,51 @@ static uint32_t JPEG_DMA_EndProcess(JPEG_HandleTypeDef *hjpeg)
|
|||
hjpeg->JpegOutCount = 0;
|
||||
}
|
||||
|
||||
/*Check if remaining data in the output FIFO*/
|
||||
if(__HAL_JPEG_GET_FLAG(hjpeg, JPEG_FLAG_OFNEF) == 0)
|
||||
{
|
||||
/*Stop Encoding/Decoding*/
|
||||
hjpeg->Instance->CONFR0 &= ~JPEG_CONFR0_START;
|
||||
|
||||
tmpContext = hjpeg->Context;
|
||||
/*Clear all context fileds execpt JPEG_CONTEXT_CONF_ENCODING and JPEG_CONTEXT_CUSTOM_TABLES*/
|
||||
hjpeg->Context &= (JPEG_CONTEXT_CONF_ENCODING | JPEG_CONTEXT_CUSTOM_TABLES);
|
||||
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(hjpeg);
|
||||
|
||||
/* Change the JPEG state */
|
||||
hjpeg->State = HAL_JPEG_STATE_READY;
|
||||
|
||||
/*Call End of Encoding/Decoding callback */
|
||||
if((tmpContext & JPEG_CONTEXT_OPERATION_MASK) == JPEG_CONTEXT_DECODE)
|
||||
{
|
||||
HAL_JPEG_DecodeCpltCallback(hjpeg);
|
||||
}
|
||||
else if((tmpContext & JPEG_CONTEXT_OPERATION_MASK) == JPEG_CONTEXT_ENCODE)
|
||||
{
|
||||
HAL_JPEG_EncodeCpltCallback(hjpeg);
|
||||
}
|
||||
}
|
||||
else if((hjpeg->Context & JPEG_CONTEXT_PAUSE_OUTPUT) == 0)
|
||||
{
|
||||
JPEG_DMA_PollResidualData(hjpeg);
|
||||
|
||||
return JPEG_PROCESS_DONE;
|
||||
}
|
||||
|
||||
return JPEG_PROCESS_ONGOING;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Poll residual output data when DMA process (encoding/decoding)
|
||||
* @param hjpeg: pointer to a JPEG_HandleTypeDef structure that contains
|
||||
* the configuration information for JPEG module
|
||||
* @retval None.
|
||||
*/
|
||||
static void JPEG_DMA_PollResidualData(JPEG_HandleTypeDef *hjpeg)
|
||||
{
|
||||
uint32_t tmpContext, count = JPEG_FIFO_SIZE, *pDataOut;
|
||||
pDataOut = (uint32_t *)(hjpeg->pJpegOutBuffPtr + hjpeg->JpegOutCount);
|
||||
|
||||
while((__HAL_JPEG_GET_FLAG(hjpeg, JPEG_FLAG_OFNEF) != 0) && (count > 0))
|
||||
|
|
@ -3213,9 +3273,6 @@ static uint32_t JPEG_DMA_EndProcess(JPEG_HandleTypeDef *hjpeg)
|
|||
{
|
||||
HAL_JPEG_EncodeCpltCallback(hjpeg);
|
||||
}
|
||||
|
||||
|
||||
return JPEG_PROCESS_DONE;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_jpeg.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of JPEG HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
@ -128,7 +128,7 @@ typedef struct
|
|||
|
||||
DMA_HandleTypeDef *hdmaout; /*!< JPEG Out DMA handle parameters */
|
||||
|
||||
uint8_t CustomQuanTable; /*!< If set to ‘1’ specify that user customized quantization tables are used */
|
||||
uint8_t CustomQuanTable; /*!< If set to 1 specify that user customized quantization tables are used */
|
||||
|
||||
uint8_t *QuantTable0; /*!< Basic Quantization Table for component 0 */
|
||||
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_lptim.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief LPTIM HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the Low Power Timer (LPTIM) peripheral:
|
||||
|
|
@ -24,29 +24,29 @@
|
|||
HAL_LPTIM_MspInit():
|
||||
(##) Enable the LPTIM interface clock using __LPTIMx_CLK_ENABLE().
|
||||
(##) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
|
||||
(+) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
|
||||
(+) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
|
||||
(+) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
|
||||
(+++) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
|
||||
(+++) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
|
||||
(+++) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
|
||||
|
||||
(#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
|
||||
configures mainly:
|
||||
(##) The instance: LPTIM1.
|
||||
(##) Clock: the counter clock.
|
||||
- Source : it can be either the ULPTIM input (IN1) or one of
|
||||
(+++) Source: it can be either the ULPTIM input (IN1) or one of
|
||||
the internal clock; (APB, LSE, LSI or MSI).
|
||||
- Prescaler: select the clock divider.
|
||||
(+++) Prescaler: select the clock divider.
|
||||
(##) UltraLowPowerClock : To be used only if the ULPTIM is selected
|
||||
as counter clock source.
|
||||
- Polarity: polarity of the active edge for the counter unit
|
||||
(+++) Polarity: polarity of the active edge for the counter unit
|
||||
if the ULPTIM input is selected.
|
||||
- SampleTime: clock sampling time to configure the clock glitch
|
||||
(+++) SampleTime: clock sampling time to configure the clock glitch
|
||||
filter.
|
||||
(##) Trigger: How the counter start.
|
||||
- Source: trigger can be software or one of the hardware triggers.
|
||||
- ActiveEdge : only for hardware trigger.
|
||||
- SampleTime : trigger sampling time to configure the trigger
|
||||
(+++) Source: trigger can be software or one of the hardware triggers.
|
||||
(+++) ActiveEdge: only for hardware trigger.
|
||||
(+++) SampleTime: trigger sampling time to configure the trigger
|
||||
glitch filter.
|
||||
(##) OutputPolarity : 2 opposite polarities are possibles.
|
||||
(##) OutputPolarity: 2 opposite polarities are possibles.
|
||||
(##) UpdateMode: specifies whether the update of the autoreload and
|
||||
the compare values is done immediately or after the end of current
|
||||
period.
|
||||
|
|
@ -87,7 +87,7 @@
|
|||
HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
|
||||
already started in interruption mode.
|
||||
|
||||
(#)Call HAL_LPTIM_DeInit() to deinitialize the LPTIM peripheral.
|
||||
(#) Call HAL_LPTIM_DeInit() to deinitialize the LPTIM peripheral.
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_lptim.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of LPTIM HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_ltdc.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief LTDC HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the LTDC peripheral:
|
||||
|
|
@ -44,15 +44,15 @@
|
|||
functions: HAL_LTDC_SetPixelFormat(), HAL_LTDC_SetAlpha(), HAL_LTDC_SetWindowSize(),
|
||||
HAL_LTDC_SetWindowPosition(), HAL_LTDC_SetAddress.
|
||||
|
||||
(#) Variant functions with “_NoReload” post fix allows to set the LTDC configuration/settings without immediate reload.
|
||||
(#) Variant functions with "_NoReload" post fix allows to set the LTDC configuration/settings without immediate reload.
|
||||
This is useful in case when the program requires to modify serval LTDC settings (on one or both layers)
|
||||
then applying(reload) these settings in one shot by calling the function “HAL_LTDC_Reload”
|
||||
then applying(reload) these settings in one shot by calling the function "HAL_LTDC_Reload"
|
||||
|
||||
After calling the “_NoReload” functions to set different color/format/layer settings,
|
||||
the program can call the function “HAL_LTDC_Reload” To apply(Reload) these settings.
|
||||
Function “HAL_LTDC_Reload” can be called with the parameter “ReloadType”
|
||||
After calling the "_NoReload" functions to set different color/format/layer settings,
|
||||
the program can call the function "HAL_LTDC_Reload" To apply(Reload) these settings.
|
||||
Function "HAL_LTDC_Reload" can be called with the parameter "ReloadType"
|
||||
set to LTDC_RELOAD_IMMEDIATE if an immediate reload is required.
|
||||
Function “HAL_LTDC_Reload” can be called with the parameter “ReloadType”
|
||||
Function "HAL_LTDC_Reload" can be called with the parameter "ReloadType"
|
||||
set to LTDC_RELOAD_VERTICAL_BLANKING if the reload should be done in the next vertical blanking period,
|
||||
this option allows to avoid display flicker by applying the new settings during the vertical blanking period.
|
||||
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_ltdc.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of LTDC HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_ltdc_ex.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief LTDC Extension HAL module driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
@ -87,15 +87,13 @@ HAL_StatusTypeDef HAL_LTDC_StructInitFromVideoConfig(LTDC_HandleTypeDef* hltdc,
|
|||
{
|
||||
/* Retrieve signal polarities from DSI */
|
||||
|
||||
/* The following polarities are inverted:
|
||||
LTDC_DEPOLARITY_AL <-> LTDC_DEPOLARITY_AH
|
||||
LTDC_VSPOLARITY_AL <-> LTDC_VSPOLARITY_AH
|
||||
LTDC_HSPOLARITY_AL <-> LTDC_HSPOLARITY_AH)*/
|
||||
/* The following polarity is inverted:
|
||||
LTDC_DEPOLARITY_AL <-> LTDC_DEPOLARITY_AH */
|
||||
|
||||
/* Note 1 : Code in line w/ Current LTDC specification */
|
||||
hltdc->Init.DEPolarity = (VidCfg->DEPolarity == DSI_DATA_ENABLE_ACTIVE_HIGH) ? LTDC_DEPOLARITY_AL : LTDC_DEPOLARITY_AH;
|
||||
hltdc->Init.VSPolarity = (VidCfg->VSPolarity == DSI_VSYNC_ACTIVE_HIGH) ? LTDC_VSPOLARITY_AL : LTDC_VSPOLARITY_AH;
|
||||
hltdc->Init.HSPolarity = (VidCfg->HSPolarity == DSI_HSYNC_ACTIVE_HIGH) ? LTDC_HSPOLARITY_AL : LTDC_HSPOLARITY_AH;
|
||||
hltdc->Init.VSPolarity = (VidCfg->VSPolarity == DSI_VSYNC_ACTIVE_HIGH) ? LTDC_VSPOLARITY_AH : LTDC_VSPOLARITY_AL;
|
||||
hltdc->Init.HSPolarity = (VidCfg->HSPolarity == DSI_HSYNC_ACTIVE_HIGH) ? LTDC_HSPOLARITY_AH : LTDC_HSPOLARITY_AL;
|
||||
|
||||
/* Note 2: Code to be used in case LTDC polarities inversion updated in the specification */
|
||||
/* hltdc->Init.DEPolarity = VidCfg->DEPolarity << 29;
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_ltdc_ex.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of LTDC HAL Extension module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,23 +2,21 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_mdios.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief MDIOS HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the MDIOS Peripheral.
|
||||
* + Initialization and de-initialization functions
|
||||
* + IO operation functions
|
||||
* + Peripheral Control functions
|
||||
*
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### How to use this driver #####
|
||||
===============================================================================
|
||||
[..]
|
||||
The MDIOS HAL driver can be used as follow:
|
||||
The MDIOS HAL driver can be used as follows:
|
||||
|
||||
(#) Declare a MDIOS_HandleTypeDef handle structure.
|
||||
|
||||
|
|
@ -53,9 +51,9 @@
|
|||
(##) a DOUTn register read by the Master
|
||||
(##) an error occur
|
||||
|
||||
(@) A callback is executed for each genereted interrupt, so the driver provide the following
|
||||
-@@- A callback is executed for each genereted interrupt, so the driver provides the following
|
||||
HAL_MDIOS_WriteCpltCallback(), HAL_MDIOS_ReadCpltCallback() and HAL_MDIOS_ErrorCallback()
|
||||
(@) HAL_MDIOS_IRQHandler() must be called from the MDIOS IRQ Handler, to handle the interrupt
|
||||
-@@- HAL_MDIOS_IRQHandler() must be called from the MDIOS IRQ Handler, to handle the interrupt
|
||||
and execute the previous callbacks
|
||||
|
||||
(#) Reset the MDIOS peripheral and all related ressources by calling the HAL_MDIOS_DeInit() API.
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_mdios.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of MDIOS HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_nand.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief NAND HAL module driver.
|
||||
* This file provides a generic firmware to drive NAND memories mounted
|
||||
* as external device.
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_nand.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of NAND HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_nor.c
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief NOR HAL module driver.
|
||||
* This file provides a generic firmware to drive NOR memories mounted
|
||||
* as external device.
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
******************************************************************************
|
||||
* @file stm32f7xx_hal_nor.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.1.0
|
||||
* @date 22-April-2016
|
||||
* @version V1.1.2
|
||||
* @date 23-September-2016
|
||||
* @brief Header file of NOR HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue