mirror of https://github.com/ARMmbed/mbed-os.git
STM32F7 : correct ST HAL API call
- RCC init: unused clock was enabled without any init parameters - RCC init: one PLL parameter was missing - GPIO: mode was not allowed by ST HAL APIpull/3408/head
parent
9dc5cd1266
commit
db9dcb8b40
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@ -83,9 +83,7 @@
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HAL_StatusTypeDef HAL_Init(void);
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#if !defined (HSE_VALUE)
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#define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
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#endif /* HSE_VALUE */
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#define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
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#if !defined (HSI_VALUE)
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#define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
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@ -801,7 +799,7 @@ uint8_t SetSysClock_PLL_HSI(void)
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__PWR_CLK_ENABLE();
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// Enable HSI oscillator and activate PLL with HSI as source
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
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RCC_OscInitStruct.HSICalibrationValue = 16;
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@ -757,6 +757,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
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RCC_OscInitStruct.PLL.PLLN = 432; // VCO output clock = 432 MHz (1 MHz * 432)
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 216 MHz (432 MHz / 2)
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RCC_OscInitStruct.PLL.PLLQ = 9; // USB clock = 48 MHz (432 MHz / 9) --> OK for USB
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RCC_OscInitStruct.PLL.PLLR = 2; // I2S clock
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
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{
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@ -801,7 +802,7 @@ uint8_t SetSysClock_PLL_HSI(void)
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__PWR_CLK_ENABLE();
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// Enable HSI oscillator and activate PLL with HSI as source
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
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RCC_OscInitStruct.HSICalibrationValue = 16;
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@ -811,6 +812,7 @@ uint8_t SetSysClock_PLL_HSI(void)
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RCC_OscInitStruct.PLL.PLLN = 432; // VCO output clock = 432 MHz (1 MHz * 432)
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 216 MHz (432 MHz / 2)
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RCC_OscInitStruct.PLL.PLLQ = 9; // USB clock = 48 MHz (432 MHz / 9) --> OK for USB
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RCC_OscInitStruct.PLL.PLLR = 2; // I2S clock
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
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{
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@ -304,7 +304,7 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
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mode = STM_MODE_IT_FALLING;
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obj->event = EDGE_FALL;
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} else { // NONE or RISE
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mode = STM_MODE_IT_EVT_RESET;
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mode = STM_MODE_INPUT;
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obj->event = EDGE_NONE;
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}
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}
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@ -313,7 +313,7 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
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mode = STM_MODE_IT_RISING;
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obj->event = EDGE_RISE;
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} else { // NONE or FALL
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mode = STM_MODE_IT_EVT_RESET;
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mode = STM_MODE_INPUT;
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obj->event = EDGE_NONE;
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}
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}
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