The NRF52_DK and DELTA_DFBM_NQ620 have the SWO pin (p0_18) mapped to
LED2. This means that on startup LED2 turns on after the ITM is
initialized which is confusing. Since most users want LED2 usage
instead of SWO we remove the ITM for these targets.
The nRF52 readme is updated to instruct users how to get SWO support
if they need it.
Add the functions qspi_master_sclk_pinmap, qspi_master_ssel_pinmap and
qspi_master_data0_pinmap-qspi_master_data3_pinmap to all targets with
qspi support.
Use new atomics (exchange, load, store and bool types) to simplify
and improve the atomics in the nRF52 serial HAL.
* Ensure mutexes are released last and atomically when done
done inside a critical section.
* Compare-and-swap is not required for the spinlock - exchange is
sufficient. (Not clear a spinlock is needed anyway, but left in).
* Remove unneeded volatile, and make mutexes bool.
The DEVICE_FOO macros are always defined (either 0 or 1).
This patch replaces any instances of a define check on a DEVICE_FOO
macro with value test instead.
Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
When using UARTSerial sending data over the uart follows the sequence
below:
<-TX done ISR runs and sets a software interrupt to pending
<-Software interrupt fires:
-disables TX done interrupt
-calls UARTSerial TX handler which sends bytes until the uart
buffer filled (writeable returns false). Sending a byte
re-enables the TX done interrupt continuing the cycle
Due to this sequence, if the UARTSerial TX handler does not send a byte
then the transmit state machine mentioned above will get stuck with
the TX done interrupt disabled. The events causing this failure:
<-TX done ISR runs and sets a software interrupt to pending
<-Software interrupt fires:
-disables TX done interrupt
-calls UARTSerial TX handler:
-checks writeable which is true and sends a byte
<- interrupted by a higher priority interrrupt
<- TX done ISR runs, setting software interrupt to
pending again
-checks writeable which is true and sends a second byte
-Software interrupt finishes
<-Software interrupt fires:
-disables TX done interrupt
-calls UARTSerial TX handler:
-checks writeable which is false and DOES NOT SEND A BYTE
-Software interrupt finishes, the TX interrupt is still disabled
*-Byte gets sent but TX done ISR does not fire
This patch prevents the TX lockup by removing the code in the
software interrupt which disables the TX done interrupt. Disabling the
TX done interrupt at this point is not necessary so this code is safe
to remove.
When initializing serial disable all interrupts as some of these may
have been enabled by a bootloader. This ensures that the NRF52
serial driver remains compatible with any bootloader version.
Make the following enhancement:
-Support serial port use without flow control
-Prevent dropped bytes by updating flow control handling
-Remove dead code
Serial port use without flow control:
In the prior implementation there was a window of time between
reloading DMA buffers after a timeout where bytes could be dropped.
This is because the uart needed to be turned off in order to flush the
bytes in the DMA buffer.
This change configures the DMA buffer to only receive one byte at a
time so there is no need to disable the uart to flush it. After each
byte is received the DMA transfer will be over so the transfer will
never be partially complete and need flushing. Since the uart is
always on it is safe to use it even without flow control.
Prevent dropped bytes by updating flow control handling:
To prevent dropped bytes due to high latency the flow control handling
of the RTS line was configured to be asserted automatically by
hardware after each byte. Once the CPU has read the byte and setup
the next receive buffer the RTS line is deasserted to the transfer can
continue. This ensure that when flow control is enabled data won't be
lost due to interrupt latency.
Remove dead code:
With the above changes there is a lot of dead code, such as the timer
handling code. This patch removes the code that is no longer used.
Busy-wait before sending a charecter instead of after. If
serial_writeable has been called first, the busy-wait loop will
be skipped.
Added initialization code to ensure NRF_UARTE_EVENT_TXDRDY is
armed correctly.
In nordic_nrf5_uart_event_handler if the events NRF_UARTE_EVENT_ENDRX
and NRF_UARTE_EVENT_RXSTARTED become pending after the check for
NRF_UARTE_EVENT_ENDRX but before the check for
NRF_UARTE_EVENT_RXSTARTED the RX DMA buffers will be setup incorrectly
by nordic_nrf5_uart_event_handler_rxstarted because active_bank hasn't
been updated. This cause dropped and incorrect data.
This patch fixes that problem by adding a second check for
NRF_UARTE_EVENT_ENDRX after checking for NRF_UARTE_EVENT_RXSTARTED
and skipping processing if NRF_UARTE_EVENT_ENDRX is set. The
subsequent interrupt will process both in the correct order. This
ensures that these events cannot be handled out of order and thus fixes
the corruption.
Due to buggy flow control logic in the UARTE, the stop signal
is not being set as it is supposed to when the the module is
not ready to receive data.
This commit signals the sender to halt transmitting when a DMA
buffer is full and only continue again when the atomic FIFO
buffer has been emptied. This allows platforms with hardware
flow control to minimize all buffers and rely on flow control
instead.
The preprocessor based macro check #if evaluates all
enums as 0 and hence the code does not get compiled.
Since move this to a runtime check where the pin variable
can be correctly evaluated.
Delete mbed_overrides.c as it has a target specific mbed_sdk_init() to
resolve linking problem.
This is a follow on patch to:
https://github.com/ARMmbed/mbed-os/pull/8046
While investigating the RX issue on NRF52_DK after SDK 14 updates,
it is observed that the RX FIFO doesn't get filled up, when the
flow control is disabled. Hence the readable never returns true.
If using Serial interface, the stdio file handles (0, 1, 2) get opened.
This results in configuring the flow control for STDIO, and it is observed
that the RX FIFO gets filled.
However, if RawSerial is used, the STDIO file handles
don't get opened. During the debug process it was observed that if the
flow control is configured once and then set to disabled, RX worked
as expected.
Alternative to this approach is that user application specifically
enables flow control as done in mbed's Greentea test suite. See https://goo.gl/r8nBYH
See https://goo.gl/8VB2qg step 14 for _initio's description.
See test code to reproduce the issue and test fix here: https://goo.gl/AQU1xG
Description
The change in behavior with NRF52's UART RX is documented here. #6891
This change is a fix for the above issue.
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files (GCC and IAR as well to have uniformity)
should strictly align to 8-byte boundary
While investigating the RX issue on NRF52_DK after SDK 14 updates,
it is observed that the RX FIFO doesn't get filled up, when the
flow control is disabled. Hence the readable never returns true.
If using Serial interface, the stdio file handles (0, 1, 2) get opened.
This results in configuring the flow control for STDIO, and it is observed
that the RX FIFO gets filled.
However, if RawSerial is used, the STDIO file handles
don't get opened. During the debug process it was observed that if the
flow control is configured once and then set to disabled, RX worked
as expected.
Alternative to this approach is that user application specifically
enables flow control as done in mbed's Greentea test suite. See https://goo.gl/r8nBYH
See https://goo.gl/8VB2qg step 14 for _initio's description.
See test code to reproduce the issue and test fix here: https://goo.gl/AQU1xG
Description
The change in behavior with NRF52's UART RX is documented here. #6891
This change is a fix for the above issue.
There are scenarios where putc is called within a critical section, e.g
to log ASSERTs in early initialization code. The interrupts being
disabled here prevents the handlers for the UARTE from executing.
This breaks the tx_in_progress flag based approach. The tx_in_progress
never gets reset. Poll on the TXDRDY instead.
It can be recreated with a simple program as shown here:
*************** Current Behavior ****************
++ MbedOS Error Info ++
Error Status: 0x80FF0100 Code: 256 Module: 255
Error Message: F
************** With Fix *************************
++ MbedOS Error Info ++
Error Status: 0x80FF0100 Code: 256 Module: 255
Error Message: Fatal Run-time error
Location: 0x2C0A9
Error Value: 0x0
Current Thread: Id: 0x20005520 Entry: 0x30EBF StackSize: 0x1000 StackMem: 0x20004520 SP: 0x20005490
For more info, visit: https://armmbed.github.io/mbedos-error/?error=0x80FF0100
-- MbedOS Error Info --
nrf failure at .\main.cpp:22
***************************************************
Deleted lines that caused the problem. Note that, in nrf_drv_pwm_init there are lines that check if pwm instance is already running, so we don't even need to check it in nordic_pwm_init.
nrf_drv_uninit should be used in nordic_pwm_restart.
This PR provides implementation of ticker_free() function for the following boards:
ARCH_PRO
EV_COG_AD3029LZ
EV_COG_AD4050LZ
K22F
K64F
K82F
KW24D
KW41Z
LPC546XX
NRF51_DK
NRF52_DK
NUCLEO_F207ZG
NUCLEO_F401RE
NUCLEO_F429ZI
NUCLEO_F746ZG
REALTEK_RTL8195AM
i2c_api implementation for NRF52 does a disable() followed by uninit().
The uniinit() implementation in NRF drivers layer makes another call to
disable. This throws off the state of the I2C instance leading to an
assert. Since the disable is only invoked from the I2C API layer for
Nordic, remove this redundant call.
Signed-off-by: Naveen Kaje <Naveen.Kaje@arm.com>
The ITM must be initialized before the SoftDevice, but due to the
lazy initialization in C++ on (at least) GCC the ITM init call
might happen too late.
This commit moves the initialization code into the NRF52 system
startup file.
* Elevate RTC2 interrupt priority to same level as UARTE to prevent
race condition on shared variables.
* Remove unused TXDRDY event code.
* Fix typo in macro.
It has been noticed that there is a problem with us ticker on NRF_52840 board after 32 bit counter has been used for us ticker on NRF52 family boards.
Currently NRF52 symbol is defined only for MCU_NRF52832 (not for MCU_NRF52840) and based on this symbol 16 or 32 bit counter is selected (16 bit for NRF51 family and 32 for NRF52 family).
Since MCU_NRF52840 defines NRF52840_XXAA and provides 32 bit counters, 32 bit counter should be selected also when NRF52840_XXAA symbol is defined.
New changes to Mbed error reporting in 5.9 exposed bug in SPI
driver where an instance was uninitialized twice which triggered
an ASSERT.
This fix keeps track of which instance has been initialized and
only calls uninit when it is safe.
Set the second highest user level, leaving the highest for UART (we are having constant overflows) and two levels below for everything else.
This should increase the timer accuracy.
RTC counter is 24-bit. Upper layer handles counter size and wraps ticks count when interrupt is to be fired before passing it to common_rtc_set_interrupt(), but for consistency and safety reasons we can wrap it again in the NRF driver.
The nrf section features has different implementations for each compilers supported by mbed-os. The header guard was ruling out compiler other than GCC by checking if __GNUC__ is defined. This check is not applicable on mbed os as the ARM compiler compile sources with gnu compatibility.
This patch makes sure that the right implementation is selected for the right compiler . The previous patch has been reverted as it is not reliable.
I decided to move these files to the targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51 since us_ticker.h is for sure specific for NRF51_DK and common_rtc.c might be valid also for NRF52, but this needs to be checked while porting NRF52_DK board.
Provide the following modifications for lp ticker driver:
- According to NRF51_DK reference manual rtc interrupt cannot be controlled by rtc event. In the previous implementation interrupts were enabled permanently and specific interrupt was enabled/disabled by enabling/disabling the specific event. If event is enabled, then event signal is provided to Programmable Peripheral Interconnect (PPI). If interrupt is enabled, then interrupt signal is provided to Nested Vector Interrupt Controller (NVIC). Disable all events permanently. Enable lp ticker overflow interrupt permanently(needed for RTC), disable lp ticker capture/compare interrupt on init (lp_ticker_init) , enable lp ticker interrupt when lp ticker interrupt is set (lp_ticker_set_interrupt), disable lp ticker interrupt on disable request(lp_ticker_disable_interrupt).
- Provide lp ticker data for higher level (freq: 32kHz / len: 24 bits),
- Add the following features to init routine: disable lp ticker interrupt.
- Make ticker driver to operate on ticks instead of us.
- Simplify lp ticker read and set interrupt routines (upper layers handle conversion to us and interrupt scheduling).
According to new ticker standards the following requirements for us ticker are not met on RRF5 boards:
- has a frequency between 250KHz and 8MHz (currently is driven by 32kHz clock)
- ticker increments by 1 each tick (currently is scaled to 1 MHz by incrementing counter by ~31)
Since BLE softdevice uses TIMER0 the proposition is to use high speed TIMER1 for us ticker configured as follows:
- TIMER counter width: 16 bits (max)
- TIMER frequency: 1MHz
This solution also uses Timer's capture/compare register 0 to specify interrupt time and Timer's capture/compare register 1 to read current timer value.
New directory structure:
* TARGET_SOFTDEVICE_COMMON
* TARGET_SOFTDEVICE_S112
* TARGET_SOFTDEVICE_S132_FULL (MBR + SoftDevice, default)
* TARGET_SOFTDEVICE_S132_OTA (SoftDevice only, for firmware updates)
* TARGET_SOFTDEVICE_S132_MBR (MBR only, for bootloader builds)
* TARGET_SOFTDEVICE_S140_FULL (MBR + SoftDevice, default)
* TARGET_SOFTDEVICE_S140_OTA (SoftDevice only, for firmware updates)
* TARGET_SOFTDEVICE_S140_MBR (MBR only, for bootloader builds)
* TARGET_SOFTDEVICE_NONE
The X_OTA and X_MBR binaries are obtained from the original x_FULL SoftDevice
by splitting it in an MBR part and a SoftDevice part. The MBR is needed for
the bootloader and the SoftDevice for firmware updates.
Build application without SoftDevice:
"target_overrides": {
"*": {
"target.extra_labels_remove": ["SOFTDEVICE_COMMON", "SOFTDEVICE_X_FULL"],
"target.extra_labels_add": ["SOFTDEVICE_NONE"]
}
}
Build application for firmware update using SoftDevice X:
"target_overrides": {
"*": {
"target.extra_labels_remove": ["SOFTDEVICE_X_FULL"],
"target.extra_labels_add": ["SOFTDEVICE_X_OTA"]
}
}
Build bootloader without SoftDevice X:
"target_overrides": {
"*": {
"target.extra_labels_remove": ["SOFTDEVICE_COMMON", "SOFTDEVICE_X_FULL"],
"target.extra_labels_add": ["SOFTDEVICE_X_MBR"]
}
}
After rebase, the build target NRF52840_DK is using TARGET_NRF5x,
instead of TARGET_NRF5. Moved Cryptocell TRNG related code from
`targets/TARGET_NORDIC/TARGET_NRF5/` to `targets/TARGET_NORDIC/TARGET_NRF5x/`
The unified NRF51 target and feature BLE directories have been
reorganized to follow the naming and directory structure of the
NRF52 implementation.
This reorganization does not include TARGET_MCU_NRF51822 and
derived targets.
The MBR VTOR state depends on how the application is booted.
This makes it difficult to initialize the MBR correctly since a
bug prevents the MBR from being initialized more than once.
This commit resets the MBR and SoftDevice to a known state before
initializing the MBR and setting the VTOR through the SoftDevice.
Delayed initialization can cause problems when both UARTE instances
are in use. This change causes each UART object to initialize the
underlying UARTE instance immediately.
The vector table relocation sequence depends on:
1. Whether the SoftDevice is present.
2. The Application is a bootloader or not.
If the SoftDevice is present and the application is a bootloader
the MBR must be initialized to trap SoftDevice service calls
before setting the new vector table address.
The SCB->VTOR must be set to point at the MBR as well.
If the SoftDevice is not present the SCB->VTOR can point at the
new vector table directly.
SPI pins are not initialized correctly according to the current
SPI mode.
This commit changes how the SPI instance is configured and ensures
that:
1. SPI pins are initialized on each object initialization.
2. SPI pins are reinitialized on each mode or object change.
3. SPI instance is only initialized when a change has occured.
* Consolidated device_has and macros to the main MCU targets.
* Moved errata configuration to mbed_lib.json for HAL implementation.
* Moved clock configuration to mbed_lib.json for HAL implementation.
* Moved UART configuration to mbed_lib.json for HAL implementation.
Instance counter keeps track of how many objects have been
initialized and freed. On the first object the instance is
enabled and on the last object the instance is disabled.
Serial implementation uses UARTE instead of UART peripheral:
* EasyDMA is used for reading and writing data.
* Triple buffering for receiving data.
See README for full description.
When possible, the I2C HAL will now use the TWI driver in SDK 14.
The manual I2C API still maps onto the old TWI peripheral directly
because the TWI driver doesn't provide the needed low-level functionality.
The NRF52 series can map digital signals to any physical pin which
makes it challenging to associate pin names with hardware instances.
pinmap_ex:
Keep track of which hardware instance is in use and what pins are
associated with it. Currently only supports I2C and SPI, but
provides a mechanism for allocating the shared I2C/SPI hardware.
PeripheralPinsDefault:
Optional pin map for pre-assigning hardware instances at compile
time. This makes it easier to optimize hardware utilization.
* Add NRF_SD_BLE_API_VERSION=5 macro to MCU_NRF52832 target
* Added initial Softdevice v5 API support for nRF5XPalGattClient.cpp
* Added initial Softdevice v5 API support for nRF5xGap.h
* Added initial Softdevice v5 API support for nRF5xGattServer.cpp
* Make sure the ah() hash function used by the security manager is declared with C linkage
* Removed 'ARM porting pending' checks in Nordic SDK
* Added BLE configuration to mbed_lib.json for NRF52x targets
* Migrated APIs and events model for Nordic SDK14.2 & SD API v5 in btle.cpp; adopted polling dispatch model
* Migrated APIs and events model for Nordic SDK14.2 & SD API v5 in nRF5xn.cpp
* Migrated APIs and events model for Nordic SDK14.2 & SD API v5 in nRF5xGap.cpp
* Added const qualifier to hwCallbacks's p_ble_evt parameter in nRF5xGattServer
* Add workaround to enable Radio Notification module from Nordic SDK
* Disabled SWI1 interrupt manually from SWI driver module
* Added missing include directive for "nrf_nvic.h" in ble_radio_notification.c
* Set correct number of custom UUIDs
* Adjust Softdevice RAM requirements for NRF52832/S132
* RAM settings for the application were adjusted as follow:
* Start: 0x20003800
* Size: 0xC800
* Adjust Softdevice RAM requirements for NRF52840/S140
* RAM settings for the application were adjusted as follow:
* Start: 0x20003700 (was 0x20003000)
* Size: 0xC900
* Added 3dBm as a permitted TX Power value for NRF52832
* Fix address type recovery in GAP
* Return min non-connectable adv interval compatible with infrastrcture's expectations
* Moved BLE driver from TARGET_SDK_14_2/FEATURE_BLE to TARGET_SDK_14_2/TARGET_SOFTDEVICE_COMMON/ble
* When multiple TRNG objects are initialized, destroying the first
object will turn the TRNG off for the other objects. This fix
adds a counter to ensure that only when the last object is
destroyed will it cause the TRNG to be disabled.
* The corner case where a user request 0 bytes is correctly handled
and will now return immediately.
Add fstorage and fds from Nordic SDK for SoftDevice compatible
flash storage. Mbed HAL flash API mapped to use fstorage API
to ensure write and erase doesn't conflict with BLE operation.
Various bug fixes:
* Moved SPIM3 location in vector table based on new location in SDK 14.2.
* Updated vector table entries and size in startup code and linker scripts.
* Added missing vector table RAM section to IAR linker script.
Ability to swap SoftDevices using the mbed configuration system.
For example, build NRF52840_DK without SoftDevice:
"target_overrides": {
"*": {
"target.MERGE_SOFT_DEVICE": false,
"target.extra_labels_remove": ["SOFTDEVICE_COMMON", "SOFTDEVICE_S140"],
"target.extra_labels_add": ["SOFTDEVICE_NONE"]
}
}
Pinned down vector table to beginningn of RAM.
Critical section enter/exit is now delegated to Nordic SDK's
sd_nvic_critical_region_enter
sd_nvic_critical_region_exit
When the SoftDevice is not included these functions map to
__disable_irq
__enable_irq
Initial commit for separating NRF52 code from the NRF51 and for
combining the NRF52832 and NRF52840 SDK to version 14.
nRF5_SDK_14.2.0_17b948a.zip has been used as baseline.
The folders in SDK/components:
* ble
* boards
* device
* drivers_nrf
* libraries
* softdevice
have been copied to TARGET_NORDIC/TARGET_NRF52/TARGET_SDK14.
Each folder contains a README.md file describing any modifications
made to that particular folder. Most common operation is deletion
of files.
If the need arise in the future the missing files can be added again.
The SoftDevices have been moved to TARGET_SOFTDEVICE_x folders for
flexible selection.
ble.h has been renamed to nrf_ble.h to avoid namespace clash with
mbed OS BLE.
Few targets need more than just pending IRQ set. They include some flags to be
set that are checked in IRQ handler. This is the case for targets in this
commit.
How you write and ersae the flash on the NRF52 changes depending on
whether the SoftDevice is enabled or not.
This change does a runtime check before erasing and writing, and
then chooses the correct function to perform the action.
Read By group type response can return 4 descriptor discovered when the remote server have 4 descriptors with a 16 bit UUID. The handle, UUID pair get stored in a ble_gattc_desc_t that is 20 bytes long.
This PR increase buffer size to handle this use case.
hal_critical_section_enter() is safe to call multiple times, however
hal_critical_section_exit() is only called on the last exit from a
critical section. This will cause a mismatch in the counter and the
interrupt state will never be restored if the critical section is
nested. Change this to a bool so that the interrupt save state is
tracked for hal_in_critical_section() to work correctly.
Call underlying HAL implementation to enter critical section/disable interrupts
before incrementing the global critical section counter.
Modify HAL implementations to track first entrances to the critical section and
only update the saved state on first enter.
which can be called from diferent contexts.
Orginal nordic critical primitives must been called in pairs
from exacly the same function. As mbed hal call it in separate
methods, so they are not suitable here.
signals are lost. It was observed at last for tests-api-spi ci-test-shield's
test.
This patch introduce usage of sdk5 origin implementation in which
sd_nvic_critical_region_enter/exit is calling each time critical region
is enter/exit. This fixes the issue.
For api usage like DigitalOut led(LED1, 1) the hal function gpio_write()
sets the output before f. gpio_mode() is called. gpio_mode() clears the
output as it take never writen parameters (gpio_cfg_t.init_hight).
This patch use internal hardware register of GPIO output instedad of above paramiter latch
for retaining proper writen state.
Cribbed from 4bf42f2e20
I'm not sure if if there are any copyright issues here with what is
effectively a set of config files. A few folks have been bugging me (and
the redbear folks) for these changes, so I wanted them somewhere
centralized.
Change implementation of timeout to one that is using us_ticker hal.
Timeout is now configurable by I2C_TIMEOUT_VALUE_US macro and this
value will be imported if will be defined externaly.
The allocation of GPIOTE channels for DigitalIn is unwanted behavior.
This caused early run-out of channels for InterruptPin.
This patch replacing input configuration that is using gpiote driver by configuration that is
using gpio hal.
Previous the voltage range was set to 1.2 from SoC internal reference source.
This caused problem with testing. It is unexpected that range is much
shorter than vdd as well.
The voltage range was extended using SoC build in analog prescaler (set to 1/3).
Some Cortex-M0 devices, such as the nrf51, don't have the SysTick.
Instead, these targets use a software interrupt to simulate SysTick.
Add the hooks in the tickless code to support these devices. Targets
which do not have SysTick should now define NO_SYSTICK in targets.json
and implement mbed_get_m0_tick_irqn to add os suport.
This patch also removes os tick handling from the existing devices
(nrf51) since this is now handled in common code.
fire_interrupt function should be used for events in the past. As we have now
64bit timestamp, we can figure out what is in the past, and ask a target to invoke
an interrupt immediately. The previous attemps in the target HAL tickers were not ideal, as it can wrap around easily (16 or 32 bit counters). This new
functionality should solve this problem.
set_interrupt for tickers in HAL code should not handle anything but the next match interrupt. If it was in the past is handled by the upper layer.
It is possible that we are setting next event to the close future, so once it is set it is already in the past. Therefore we add a check after set interrupt to verify it is in future.
If it is not, we fire interrupt immediately. This results in
two events - first one immediate, correct one. The second one might be scheduled in far future (almost entire ticker range),
that should be discarded.
The specification for the fire_interrupts are:
- should set pending bit for the ticker interrupt (as soon as possible),
the event we are scheduling is already in the past, and we do not want to skip
any events
- no arguments are provided, neither return value, not needed
- ticker should be initialized prior calling this function (no need to check if it is already initialized)
All our targets provide this new functionality, removing old misleading if (timestamp is in the past) checks.
The symbol Systick_Handler was defined as a weak symbol in us_ticker.c and
startup_nRF51822.s. While it work as expected when an application is compiled
from mbed OS source code it creates a duplicate symbol issue when mbed OS is
bundled as a library.
Use serial-box of Nordic nRF5 SDK to share resource between
SPI and I2C.
SPI is allocated from highest hw instance number resource in order
to allocate as many I2C instances as possible.
+ VBLUno51 board:
Nordic nRF51822
Bluetooth Low Energy
DAPLink interface
Arduino UNO pinout compatible
4 Power
+ Wiki: https://vngiotlab.github.io/vbluno/
+ Pass all test case in mbed test suite
Signed-off-by: iotvietmember <robotden@gmail.com>
Restore cmsis_nvic (cmsis_nvic.c and cmsis_nvic.h) files for the
implementations which use a mechanism other than the VTOR to set
interrupts. These are vendor specific and were done for M0 devices
which do not have a VTOR.
Note - There were two cmsis_nvic files which did not use the VTOR that
which not restored in this patch. This is because these targets were
not M0 devices and could use the new unified implementation instead.
These files are:
targets\TARGET_ARM_SSG\TARGET_MPS2\TARGET_MPS2_M0P\device\cmsis_nvic.c
targets\TARGET_ONSEMI\TARGET_NCS36510\device\cmsis_nvic.c
Note - cmsis_nvic.c and cmsis_nvic.h were initial removed in
(and restored from) the commit:
b97ffe8fdc -
"CMSIS5: Replace target defined NVIC_Set/GetVector with CMSIS implementation"
Senthil Ramakrishnan
j3hill
Cruz Monrreal
deepikabhavnani
RFulchiero
Russ Butler
Kevin Bracey
Przemyslaw Stekiel
Martin Kojtal
Alastair D'Silva
Wilfried Chauveau
Russ Butler
Marcus Chang
Ashok Rao
David Saada
Naveen Kaje
Andrew Leech
Yossi Levy
Jammu Kekkonen
Maciej Bocianski
Martin Kojtal
MateuszM
Jiwon Yune
Jiwon Yune
Bernhard Schuster
Melvin van den berg
Vincent Coubard
Anna Bridge
Bartek Szatkowski
Steven Cartmell
paul-szczepanek-arm
Ron Eldor
Jimmy Brisson
sarahmarshy
Blackstone Engineering
Donatien Garnier
Cruz Monrreal
drewcassidy
Andrzej Puzdrowski
Dexter Fryar
johnny
iotvietmember
andreas.larsson
Kevin Gilbert
kl-cruz