Deprecate wait() in favour of acquire(), try_acquire(),
try_acquire_for() and try_acquire_until().
Brings Semaphore more into line with CMSIS-RTOS 2 (which uses "acquire"),
itself (as it has "release"), and other classes having "try", "try for"
and "try until".
Also steps away from vague "wait" term - the primary operation here is
to acquire the semaphore, and this will of course sleep.
* The following v14.2 files are removed from nrfx/legacy:
nrf_drv_clock.h
nrf_drv_common.h
nrf_drv_gpiote.h
nrf_drv_spi.h
nrf_drv_twi.h
nrf_drv_uarth.h
* Remove unneeded references to "nrfx_glue.h" and "nrf_drv_common.h"
* Remove the definition of PACKED from app_util_platform.h (already defined
in mbed_toolchain.h)
* Update all scatterfiles to define MBED_RAM_START and MBED_RAM_SIZE. These
get defined in mbed_lib.json when building with a SoftDevice but were missing
when no SoftDevice is brought in.
* Remove SDK 14.2 SoftDevice files.
* Add missing header file to qspi_api.c.
- Adjust memory for SoftDevice
- Enable PRIO=5 for interrupt priority check
- Change NRF_SD_BLE_API_VERSION to 6
- Add handle and buffer for advertising and scanning
- Remove guard for phy update
- Change scatter files and mbed_lib.json for PR #8607
* Update TARGET_NRF5x/README.md to improve "Changing SoftDevice" section
and added section on NRF52840 CryptoCell310 Support
* Update the file list in TARGET_SDK_15_0/TARGET_SOFTDEVICE_COMMON/README.md
* Add missing CR-LF to Nordic-provided SDK file
* Rename a header file in the TARGET_SOFTDEVICE_S112 tree
This reverts commit 3d2fa535a71b7bad08c6a91a31d74f4492c8948c.
This was a breaking change for the "MBR" and "NONE" builds.
After testing it was also determined that copying the vector
table a second time wasn't required for the "FULL" build.
- Add MBR, NONE and OTA SoftDevice build options for S132 and S140
- Add S112 SoftDevice (single build option)
- Some folder restructuring in TARGET_SOFTDEVICE_COMMON was required
The 15.0 SDK doesn't support the nRF51 so it must continue to use the legacy
NRF drivers. Thus the original common_rtc.c, gpio_api.c and us_ticker.c are
restored and placed under TARGET_NRF5x/TARGET_NRF51.
Likewise the modified common_rtc.c, gpio_api.c and us_ticker.c are moved to
TARGET_NRF5x/TARGET_NRF52 so they are excluded from nRF51 builds.
Ensure that vector table gets initialized properly. The table that we
initialize in startup_nrf52840.S gets wiped out as the section is
declared as noinit. Fix this by implementing the weak function mbed_sdk_init
that inits the vector table.
When the SoftDevice (SD) is enabled we need to set the app_offset
to 0x26000 to make room for the SoftDevice. If we let the build
tools self-manage this, MBED_APP_START is coming out at 0x25000
which is not correct for the Nordic 15.0 SDK.
The app_offset value is translated to MBED_APP_START by the build
infrastructure. We were hard coding MBED_APP_START in the scatter
and ld files as a temporary measure while testing. This now sets
it properly if the SD is being brought in.
- Added legacy nrf_drv_rng.c as there is no merit in fully adopting nrfx_rng.c
- Added nrf_queue library component
- Removed apply_old_config.h (unused for some time now)
- Updated sdk_config.h for queue and RNG support for nRF52832
- Brought back RNG into targets.json for nRF52832
Note: nRF52840 still uses CryptoCell 310 for TRNG
- Use new NRFX header file
- Fix nRF52832 linker script/ld files (hardcoded addresses for now)
- Temporarily remove DEVICE_TRNG for nRF52832 (which broke the build)
- Improve serial_putc() fix so we don't rely on "extra" functions
- Missed some NRFX defines that needed to changed
- Set PWM base clock to 125kHz (needs to be reverted back to 1 MHz)
- Updated sdk_config.h for nRF52_DK builds
- Brought in updates from PR7779 (fix for nRF52 PWM issues)
Also addressed:
- removed dependency on legacy config (excluded apply_old_config.h)
- removed legacy pwm and saadc headers
- Arm Compiler 5 linking issue (a band-aid for now... needs to
be properly addressed for peripheral sharing)
- added missing header in SoftDevice file
- top level files ported from TARGET_NORDIC/TARGET_NRF5x/
Also addressed:
- fixed linking issue for gcc
- added support for nRF52-DK builds, but reverted to using nRF52840 sdk_config.h (must be updated)
- introduced "RTC" to targets.json (might need to be removed eventually)
Imports working McuBoot for reset.
Updates microsec ticker driver.
Default baudrate is set to 115200 to see TF-M boot messages.
Stack top is set to scatter file dependent and not hard-coded.
Musca-A1 is a Cortex-M33 based target with security extension enabled.
- ARM_MUSCA_A1 is the non-secure target running mbed-os.
- ARM_MUSCA_A1_S is the secure target running TF-M.
- TF-M sources were imported and patched in previous commits.
- TF-M secure bootloader (McuBoot) for MUSCA_A1 is submitted by a pre-built binary.
- A post-build hook concatenates The secure and non-secure binaries,
signs it and then concatenates the bootloader with the signed binary.
due to partial implementation. Having FUTURE_SEQUANA_M0 and
FUTURE_SEQUANA PSA targets is misleading.
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
In M2351 SPDMC (SMCC) test, it boots from secure code to non-secure bootloader, and finally
to non-secure test code itself. The boot sequence will takes longer than usual. In test
initiation, host will send sync signal 1s after reset device. But due to the longer boot
sequence, test code in device can miss the signal. We enlarge the reset idle time to fix
the issue.
On ARMC6 with optimization level "-Os", the two functions NVIC_SetVector/NVIC_GetVector
will be translated to illegal instruction for trapping due to NVIC_FLASH_VECTOR_ADDRESS
defined as direct 0. Fixed by defining NVIC_FLASH_VECTOR_ADDRESS as a symbol instead to
avoid such optimization error.
By default, FLASH_SIZE should be read from HW.
In case this is not the case, we define it here, as the size of FLASH
that is available to the application running on M4.
the flash is shared and split between cortex-M4 that
runs (mbed-os) application and the cortex-M0+ that
runs the BLE firmware.
The 512K allocated to the application was a
conservative that can now be updated.
With recent up-to-date BLE firmware flashed @ 0x080CB000,
there should be 812K available to application.
But there are boards out there that don't have an up-to-date
firmware, so we're keeping an intermediate, safer,
application size of 768K.
Change the heuristic for selection of CMSE in the tools python, so that
a non-TrustZone ARMv8 build can happen.
Ideally we would have more direct flagging in the targets, but this
refines the heuristic so the necessary behaviour can be easily
achieved.
* DOMAIN_NS=1 is based purely on the `-NS` suffix on the core name.
* Enabling CMSE in the compiler and outputting a secure import library
is now enabled when the core doesn't have an `-NS` suffix by either
the target label `TFM` being present or the flag `trustzone` being set.
This covers the existing ARMv8-M behaviour - TF-M builds have the TFM
label, as per its documentation; M2351 secure builds have no explicit
flagging, so we ensure that the M2351_NS target has the trustzone flag
set, and the out-of-tree secure target inherits that.
Some Nuvoton targets support DEVICE_FLASH but their corresponding COMPONENT_FLASHIAP
supports are not enabled. Enable them:
NUMAKER_PFM_M453
NUMAKER_PFM_M2351
Reimplement atomic code in inline assembly. This can improve
optimisation, and avoids potential architectural problems with using
LDREX/STREX intrinsics.
API further extended:
* Bitwise operations (fetch_and/fetch_or/fetch_xor)
* fetch_add and fetch_sub (like incr/decr, but returning old value -
aligning with C++11)
* compare_exchange_weak
* Explicit memory order specification
* Basic freestanding template overloads for C++
This gives our existing C implementation essentially all the functionality
needed by C++11.
An actual Atomic<T> template based upon these C functions could follow.
Purposes:
* Remove MbedOS-specific code from system_psoc6_{cm4,cm0plus}.c
to simplify updates to new PDL version (startup code is part of PDL).
* Unify mbed_sdk_init initialization sequence for both CPU cores.
This change is non-functional, sequence itself is not changed for any
of the PSoC 6 M4/M0 PSA/non-PSA targets.
According to their cmsis.h, FPU is present, so change targets.json to
use it.
* ARM_MPS2_M4: already was Cortex-M4F
* ARM_MPS2_M7: Cortex-M7 -> M7FD
* FVP_MPS2_M4: Cortex-M4 -> M4F
* FVP_MPS2_M7: Cortex-M7 -> M7FD
If they do not in fact have FPU, then cmsis.h should be modified to set
`__FPU_PRESENT` to 0. This will currently cause compilation problems
with ARMC6, but I'll be submitting a fix for that.
On NUC472, on wake-up from power-down mode, we may meet hard fault or some other
unknown error. Before its cause is found, we enter idle mode instead for a workaround.
To simulate power-down mode with idle mode, we also disable us_ticker during
power-down period.
PDL Flash API requires that the data buffer is 32-bit aligned, otherwise
programming can hung. Buffer declared as uint8_t array is not always
properly aligned, e.g. with gcc 6 when -Os option is used.
Flash driver 3.30:
Moved ipcWaitMessageStc structure to the RAM section called ".cy_sharedmem"
Added support Secure Boot devices
Moved CY_FLASH_EFFECTIVE_PAGE_SIZE to flash_api.c (the macro is Mbed specific).
GeneratedSource folders are BSP specific. No parts of the kit BSP can be reused
as generic chip support package. Remove TARGET_CY8C62XX directory,
and use flat BSP inheritance model:
MCU_PSOC6 -> MCU_PSOC6_M4 -> CY8CKIT_062_WIFI_BT
MCU_PSOC6 -> MCU_PSOC6_M0 -> CY8CKIT_062_WIFI_BT_M0
Add file MPS2.icf and startup_MPS2.S to suppout IAR of the target
AN382(ARM_MPS2_M0). Add "IAR" to supported_toolchain list.
Change-Id: I2b2ad7645166c4f973a8baa9c394521514183767
Signed-off-by: Shawn Shan <shawn.shan@arm.com>
Add file MPS2.icf and startup_MPS2.S to suppout IAR of the target
AN383(ARM_MPS2_M0P). Add "IAR" to supported_toolchain list.
Change-Id: Ib2278d34e265e53ad070aecd318ed4e6a355e3c0
Signed-off-by: Shawn Shan <shawn.shan@arm.com>
Add files MPS2.ld and startup_MPS2.S to support GCC_ARM of the target
AN382(ARM_MPS2_M0). Add "GCC_ARM" to supported_toolchains list.
Change-Id: I7046b698834c82e94015e51eef9a0f5e1315ddaa
Signed-off-by: Shawn Shan <shawn.shan@arm.com>
Add files MPS2.ld and startup_MPS2.S to support GCC_ARM of the target
AN383(ARM_MPS2_M0P). Add "GCC_ARM" to supported_toolchains list.
Change-Id: I48020b4f0f1b6e0aef3c53f5a3586bc9e9fca9c9
Signed-off-by: Shawn Shan <shawn.shan@arm.com>
Add file MPS2.icf and startup_MPS2.S to suppout IAR of the target
AN385(ARM_MPS2_M3). Add "IAR" to supported_toolchain list.
Change-Id: I038b05b8b21bd146a1568de897ed030ccd52ab79
Signed-off-by: Shawn Shan <shawn.shan@arm.com>
Add file MPS2.icf and startup_MPS2.S to suppout IAR of the target
AN386(ARM_MPS2_M4). Add "IAR" to supported_toolchain list.
Change-Id: I4f43617c870197b9d39a4d4c9c12456adcc6f96f
Signed-off-by: Shawn Shan <shawn.shan@arm.com>
Add file MPS2.icf and startup_MPS2.S to suppout IAR of the target
AN500(ARM_MPS2_M7). Add "IAR" to supported_toolchain list.
Change-Id: I0b8f018fc937727382b27ea0669940ae6675c834
Signed-off-by: Shawn Shan <shawn.shan@arm.com>
Add files MPS2.ld and startup_MPS2.S to support GCC_ARM of the target
AN385(ARM_MPS2_M3). Add "GCC_ARM" to supported_toolchains list.
Change-Id: I3110d4ab37a3294488a80a8dc1c929bfd87ce989
Signed-off-by: Shawn Shan <shawn.shan@arm.com>
Add files MPS2.ld and startup_MPS2.S to support GCC_ARM of the target
AN386(ARM_MPS2_M4). Add "GCC_ARM" to supported_toolchains list.
Change-Id: Ib8cea952e1ce0a5ef11ab623cca6f3786eab56f5
Signed-off-by: Shawn Shan <shawn.shan@arm.com>
Add files MPS2.ld and startup_MPS2.S to support GCC_ARM of the target
AN500(ARM_MPS2_M7). Add "GCC_ARM" to supported_toolchains list.
Change-Id: Ife109e9e1f2ec8e075e566f9d5c2ec7e3c5067f2
Signed-off-by: Shawn Shan <shawn.shan@arm.com>
These file changes provide small fixes for various targets
on MPS2 platform in order to work properly and pass all
Greentea test cases. The __initial_sp has been explicitly set
in the targets' startup files, and also INITIAL_SP has been
given a different value. The values have been extracted from
the specific targets' Application Note documentation.
Affected targets are: ARM_MPS2_M0, ARM_MPS2_M0P, ARM_MPS2_M3,
ARM_MPS2_M4 and ARM_MPS2_M7.
Change-Id: I3d5d0e1ae386cdcc3ba5eb63be929267a257b139
Signed-off-by: Bence Kaposzta <bence.kaposzta@arm.com>
Spotted in compiler warnings - code was trying to access a non-existent
second security control block, rather than access the settings for the
second APB bridge in the first and only security control block.
The hal code for this target uses "const volatile" types inside of
structs, which are non-trivially copyable in clang (used by ARMC6). This
causes the build to fail.
Here's the commit that changed this in clang:
a3d727ba77
It seems this was reverteed some time ago in clang, but ARMC6 may not
be up to date.
To have the flexibilty in application; to use any of the section
(data/bss/heap) without updating linker script in every use case,
following decisions are made:
1. Fixed size and small sections moved to SRAM2 (32K)
Vectors
Crash data
Remaining section - RW / ZI
2. Large memory space should be used for variable sections
RW/ZI
Heap - (Minimum - 0x12000)
Stack - At bottom
Please note the heap address of the both the banks must not be contigious else
GCC considers it to be single memory bank and does allocation across the banks,
which might result into hard-fault
To have the flexibilty in application; to use any of the section
(data/bss/heap) without updating linker script in every use case,
following decisions are made:
1. Fixed size and small sections moved to SRAM2 (32K)
Vectors
Crash data
Stack
Remaining section - Heap memory
2. Large memory space should be used for variable sections
Data
BSS
Heap - Remaining section
Heap is moved to the end of both sections as GCC allocates till 4K boundary,
if end of heap is not aligned to 4K, that chunk of memory will go unutilized
Fixes test failure seen with tests-mbed_hal-stack_size_unification
under IAR and ARM toolchain
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
panyz0725@thundersoft.com
jeromecoutant
ale87jan
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adbridge
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