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465 Commits (a48d12683f8b6b96b07c262398097eeb89990506)

Author SHA1 Message Date
ccli8 313f322cf7 [Nuvoton] Replace __wrap__sbrk with overriding _sbrk 
With _sbrk being weak, we can override it directly rather than #if to support heap with
two-region model.
 2018-07-26 15:47:25 +08:00
ccli8 caf06e83c1 [Nuvoton] Fix __user_setup_stackheap and ARM_LIB_STACK/ARM_LIB_HEAP cannot co-exist in RTOS-less build 2018-07-25 17:19:09 +08:00
ccli8 d6ae30a728 [Nuvoton] Merge multiple ARM/ARMC6 sys.cpp into one 2018-07-25 10:04:31 +08:00
cyliangtw 240619745d Fixed NUC472 SD & EMAC IP reset define 2018-07-20 18:23:41 +08:00
Deepika 2bbe043793 [M2351] Adding missing ENDP for ARM 2018-07-13 10:56:45 -05:00
ccli8 e61c5146c6 [M2351] Fix binary-compatible across compilers in secure functions 
1. Rename m2351_stddriver_sup.h/c to stddriver_secure.h/.c for naming consistency
2. Add hal_secure.h to include hal-exported secure functions
3. Change return/argument type in secure functions:
   (1) Change int to int32_t
   (2) Change PinName to int32_t
   (3) Change time_t to int64_t
4. Update secure lib/bin accordingly
 2018-07-12 18:01:41 +08:00
ccli8 6bf8e191af [M2351] Support configurable for partitioning flash/SRAM 2018-07-12 18:01:39 +08:00
ccli8 778aa1e766 [M2351] Place default secure binary/library 2018-07-12 18:01:38 +08:00
ccli8 31bf7bf342 [M2351] Fix include file name error on case-sensitive system 2018-07-12 18:01:36 +08:00
ccli8 d350f45b4b [M2351] Synchronize lp_ticker code to us_ticker 
This is to make us_ticker/lp_ticker code consistent.
 2018-07-12 18:01:35 +08:00
ccli8 688029a511 [M2351] Remove special handling for dummy interrupt in lp_ticker 
It is because dummy interrupt is very rare or pending time caused by it
is very short.
 2018-07-12 18:01:34 +08:00
ccli8 c382e9642e [M2351] Upgrade chip version to B from A 
There is a reset halt issue with PLL in A version.
To switch back to A version for some reason, define NU_CHIP_MAJOR to 1.
 2018-07-12 17:52:10 +08:00
ccli8 c725f188ec [M2351] Change pinout to meet NuMaker-PFM-M2351 V1.1 2018-07-12 17:52:09 +08:00
ccli8 93ee13adbe [M2351] Change secure flash/SRAM to 256KB/32KB as default 
This is to compilant with CMSIS pack.
 2018-07-12 17:52:08 +08:00
ccli8 c3c661da8d [M2351] Change secure/non-secure stack/heap size 
1. Change RTOS-less main stack/RTOS ISR stack size to 2KiB
2. Change secure/non-secure heap size to 16KiB/32KiB for IAR
 2018-07-12 17:52:07 +08:00
ccli8 04f723755b [M2351] Meet new RTC HAL spec (Mbed OS 5.9) 
1. Power down RTC access from CPU domain in rtc_free. After rtc_free, RTC gets
   inaccessible from CPU domain but keeps counting.
2. Fix RTC cannot cross reset cycle.
 2018-07-12 17:52:06 +08:00
ccli8 6729b65236 [M2351] Meet new lp_ticker HAL spec (Mbed OS 5.9) 
1. Add LPTICKER in device_has option of targets.json file.
2. Disable interrupt in lp_ticker_init
3. Add lp_ticker_free
4. Enable interrupt in lp_ticker_set_interrupt/lp_ticker_fire_interrupt
5. Disable interupt in ISR
 2018-07-12 17:52:05 +08:00
ccli8 9cbc8b21ee [M2351] Meet new us_ticker HAL spec (Mbed OS 5.9) 
1. Add USTICKER in device_has option of targets.json file.
2. Disable interrupt in us_ticker_init
3. Add us_ticker_free
4. Enable interrupt in us_ticker_set_interrupt/us_ticker_fire_interrupt
5. Disable interrupt in ISR
 2018-07-12 17:52:03 +08:00
ccli8 de83cb2892 [M2351] Add secure gateway functions SYS_LockReg_S/SYS_UnlockReg_S 2018-07-12 17:52:02 +08:00
ccli8 990665512d [M2351] Add SD pinmap 2018-07-12 17:52:01 +08:00
ccli8 89d32227a0 [M2351] Replace __attribute__((cmse_nonsecure_entry)) with compiler agnostic __NONSECURE_ENTRY 2018-07-12 17:51:59 +08:00
ccli8 767e74b1db [M2351] Support TrustZone and bootloader for IAR 2018-07-12 17:51:58 +08:00
ccli8 8f1623f717 [M2351] Add consistency check for CRYPTO/CRPT's secure attribute and TRNG/Mbed TLS H/W 2018-07-12 17:51:55 +08:00
ccli8 2854b57091 [M2351] Remove dead code with '#if 0' in SPI 2018-07-12 17:51:54 +08:00
ccli8 13e1209c83 [M2351] Support PWM out 2018-07-12 17:51:52 +08:00
ccli8 d05ef693ac [M2351] Support analog-in 2018-07-12 17:51:51 +08:00
ccli8 1da430f1e9 [M2351] Support TRNG 
To change TRNG security state, we need to:
1. Change CRPT/CRYPTO bit in NVIC/SCU in partition_M2351.h
2. Add/remove TRNG in device_has list in targets.json to match partition_M2351.h
 2018-07-12 17:51:50 +08:00
ccli8 dd7fd76758 [M2351] Centralize size configuration for secure flash, secure SRAM, NSC, and bootloader 2018-07-12 17:51:48 +08:00
ccli8 ca63abae73 [M2351] Change NSC location 
NSC location has the following requirements:
1. By IDAU, 0~0x4000 is secure. NSC can only locate in 0x4000~0x10000000.
2. Greentea flash IAP uses last 4 sectors for its test. Avoid this range.
3. Greentea NVSTORE uses last 2 sectors or 4KB x 2 for its test. Avoid this range.
 2018-07-12 17:51:48 +08:00
ccli8 42aa7fe0c5 [M2351] Upgrade partition format 
Following BSP, this upgrade makes partitioning flash/SRAM clear.
flash_api.c relies on flash partition, so it is updated accordingly.
 2018-07-12 17:51:47 +08:00
ccli8 805049d80f [M2351] Fix page size in flash IAP 
In Mbed OS, page size is program unit, which is different than FMC definition.
After fixing page size, we can pass NVSTORE test (mbed-os-features-nvstore-tests-nvstore-functionality).
 2018-07-12 17:51:45 +08:00
ccli8 711cb64e95 [M2351] Support flash IAP 2018-07-12 17:51:44 +08:00
ccli8 fa0124ed8d [M2351] Add missing delay in lp_ticker 2018-07-12 17:51:43 +08:00
ccli8 06cb070442 [M2351] Trim HIRC48 to 48M against LXT 2018-07-12 17:51:42 +08:00
ccli8 649389a962 [M2351] Support I2C 2018-07-12 17:51:41 +08:00
ccli8 3ca24b62ff [M2351] Support SPI 2018-07-12 17:51:40 +08:00
ccli8 dcfe1d4283 [M2351] Refine UART code 
1. Replace SYS_ResetModule/CLK_SetModuleClock/CLK_EnableModuleClock/CLK_DisableModuleClock with TrustZone-aware versions.
2. Configure all UART to secure
3. Support asynchronous transfer
4. Remove sleep management code, which has been replaced with Sleep Manager.
 2018-07-12 17:51:38 +08:00
ccli8 ebf53b9f64 [M2351] Support PDMA 2018-07-12 17:51:38 +08:00
cyliangtw 999dd332e6 [M2351] Rework us_ticker and lp_ticker 
The rework includes the following:
1. Remove ticker overflow handling because upper layer (mbed_ticker_api.c) has done with it.
   This makes us_ticker/lp_ticker implementation more succinct and avoids potential error.
2. Refine timer register access with low-power clock source
 2018-07-12 17:51:37 +08:00
ccli8 236bf657b6 [M2351] Remove peripheral sleep management from hal_sleep/hal_deepsleep 
The upper layer has introduced Sleep Manager to handle the task.
 2018-07-12 17:51:36 +08:00
ccli8 6bfc90dc73 [M2351] Rework RTC 
The rework includes the following:
1. Support year range beyond H/W RTC 2000~2099.
2. Refine RTC register access with low-power clock source
 2018-07-12 17:51:34 +08:00
ccli8 f16b971482 [M2351] Fix GPIO to be TrustZone-aware 
1. Revise NU_PORT_BASE to be TrustZone-aware
2. Add TrustZone-aware NU_GET_GPIO_PIN_DATA/NU_SET_GPIO_PIN_DATA to replace GPIO_PIN_DATA
3. Revise pin_function to be TrustZone-aware
 2018-07-12 17:51:33 +08:00
ccli8 2aa2b7eb00 [M2351] Fix SystemCoreClockUpdate isn't called in non-secure domain 2018-07-12 17:51:32 +08:00
ccli8 0cb7633356 [M2351] Fix HCLK clock source 
There is a reset halt issue with PLL in A version.
Work around it by using HIRC48 instead of PLL as HCLK clock source.
 2018-07-12 17:51:31 +08:00
ccli8 135f1279ca [M2351] Add secure BSP driver function 
SYS_ResetModule_S
CLK_SetModuleClock_S
CLK_EnableModuleClock_S
CLK_DisableModuleClock_S
 2018-07-12 17:51:30 +08:00
ccli8 d84a90e29d [M2351] Unify secure/non-secure peripheral base based on partition file 2018-07-12 17:51:29 +08:00
ccli8 77e45d414b [M2351] Configure most modules to non-secure 
All modules are configured to non-secure except:
1. TIMER0/1 hard-wired to secure and TIMER2/3 reserved for non-secure.
2. PDMA0 hard-wired to secure and PDMA1 reserved for non-secure.
3. RTC configured to secure and shared to non-secure through NSC.
4. CRYPTO configured to secure and shared to non-secure through NSC.
 2018-07-12 17:51:28 +08:00
ccli8 2da6bf6301 [M2351] Fix STDIO UART 2018-07-12 17:51:27 +08:00
cyliangtw 0c3f0f7cb7 [M2351] To fulfill _rtc_localtime one more argument 2018-07-12 17:51:24 +08:00
cyliangtw 2b44eeaef5 [M2351] Add gpio_is_connected 2018-07-12 17:51:22 +08:00
cyliangtw ef7f04808d [M2351] Set secure SRAM size as 24KB in SAU & SCU 2018-07-12 17:51:21 +08:00
cyliangtw d99fbcb166 [M2351] Set 48KB SRAM and UART0 as non-secure 2018-07-12 17:51:20 +08:00
cyliangtw 12a7830c9a [M2351] Resolve reset halt issue in MP chip A version 2018-07-12 17:51:19 +08:00
cyliangtw 6163628b1e [M2351] Sync IRQ arrangement to fulfill MP version 2018-07-12 17:51:18 +08:00
cyliangtw 331945fa08 [M2351] Remove redundant GetPC 2018-07-12 17:51:17 +08:00
cyliangtw 90fcc04596 [M2351] Migrate for MP chip version, build sucessfully 2018-07-12 17:51:16 +08:00
Deepika 94d95d34a4 [M2351] Support TrustZone in port_read/port_write 2018-07-12 17:51:14 +08:00
Deepika aec7c5441c [M2351] Add non-secure reset handler address 2018-07-12 17:51:13 +08:00
deepikabhavnani eebc6e38cb [M2351] Corrected Vector table address in scatter file 2018-07-12 17:51:12 +08:00
cyliangtw 46f948aa6f [M2351] Link register base with partition file & correct heap size in linker file 2018-07-12 17:51:11 +08:00
cyliangtw 5985dcd268 [M2351] Support secure loader invoke non-secure Mbed OS 2018-07-12 17:51:10 +08:00
deepikabhavnani 2f01120d93 [M2351] Corrected preprocess define usage in toolchain specific linker files 2018-07-12 17:51:09 +08:00
cyliangtw 18ca9b5e6c [M2351] Fix GCC linker file 'cannot move location counter backwards' issue 2018-07-12 17:51:08 +08:00
cyliangtw ba9e5fdc29 [M2351] IAR linker file support both of secure & non-secure domain 2018-07-12 17:51:07 +08:00
cyliangtw f06644a920 [M2351] Linker files support both of secure & non-secure domain 2018-07-12 17:51:06 +08:00
cyliangtw a2aac528f4 [M2351] Update GCC linker for NSC Veneer 2018-07-12 17:51:05 +08:00
Deepika f7ea847dfe [M2351] ARMC6 compiler related changes 2018-07-12 17:51:04 +08:00
Deepika d46220c7e0 [M2351] Set SAU Region present flag for M2351 device and include security header file. 
As per SAU documents, SAU is always present if the security extension is
available. The functionality differs if the SAU contains SAU regions.
If SAU regions are available it is configured with the macro __SAUREGION_PRESENT
 2018-07-12 17:51:02 +08:00
Deepika 11792f60fa [M2351] Added xx_ticker_fire_interrupt function for M2351 device 2018-07-12 17:51:01 +08:00
Deepika ffcc438b5a [M2351] Use Cortex M23 specific header files and interrupts 
1. Update use of correct header files
2. Added missing entry of M2351 device in IAR defines.
3. Removed support of ARM toolchain in targets.json
 2018-07-12 17:51:00 +08:00
cyliangtw e67ed3f86e [M2351] Revise nu_bitutil.h for M23 2018-07-12 17:50:59 +08:00
cyliangtw 6b85478730 [M2351] Modify Nuvoton common files to avoid conflicting with master 2018-07-12 17:50:58 +08:00
cyliangtw 98c8427a90 [M2351] Add partition header file for CMSE feature 2018-07-12 17:50:57 +08:00
cyliangtw 368f8eef93 [M2351] Remove mbed_sdk_init_forced 
1. mbed_sdk_init is called before C++ global obj constructor in OS 5
2. Refine startup file with GCC_ARM toolchain related to this modification.
 2018-07-12 17:50:56 +08:00
cyliangtw c5494eb751 [M2351] Support __vector_table instead of __vector_handlers in IAR 2018-07-12 17:50:54 +08:00
cyliangtw 1f27546480 [M2351] Support GCC & IAR toolchain 2018-07-12 17:50:53 +08:00
cyliangtw dcdd9fb56e [M2351] Sync SDH_CardDetection type to avoid GCC compiler error 2018-07-12 17:50:52 +08:00
cyliangtw 205f8dbab2 [M2351] Add one new target M2351, regard as M0+ with some V8M CPU control at first 2018-07-12 17:50:51 +08:00
ccli8 13fec628d0 [NANO130] Change PLL clock source to HIRC instead of HXT 
This change is to reduce delay of wake-up from power-down to pass Greentea test.
Because HIRC's accuracy is worse than HXT's, we must switch back to HXT for e.g. USBD application.
This can be done through setting NU_CLOCK_PLL to NU_HXT_PLL.
 2018-07-03 15:37:53 +08:00
ccli8 4f04ae489e [Nuvoton] Synchronize lp_ticker code to us_ticker 
This is to make us_ticker/lp_ticker code consistent.
 2018-06-28 16:34:45 +08:00
ccli8 1fa3374310 [Nuvoton] Remove special handling for dummy interrupt in lp_ticker 
It is because dummy interrupt is very rare or pending time caused by it
is very short.
 2018-06-28 16:27:37 +08:00
ccli8 310a1fe318 [Nuvoton] Synchronize lp_ticker code to us_ticker 
This is to make us_ticker/lp_ticker code consistent.
 2018-06-26 13:47:30 +08:00
ccli8 8e11ddf3b6 [Nuvoton] Fix trap in lp_ticker ISR with non-blocking "clear interrupt flag" 2018-06-26 13:47:29 +08:00
ccli8 fe627cb722 [Nuvoton] Synchronize lp_ticker code to us_ticker 
This is to make us_ticker/lp_ticker code consistent.
 2018-06-26 13:47:27 +08:00
ccli8 86e194d075 [Nuvoton] Reduce blocking code in lp_ticker 
1. Introduce S/W interrupt enable/disable to reduce calls to TIMER_EnableInt/TIMER_DisableInt.
2. Allow dummy interrupt because clear interrupt flag is not synchronized.
3. Enable LPTICKER_DELAY_TICKS to make lp_ticker_set_interrupt non-blocking.
 2018-06-26 13:47:26 +08:00
ccli8 7caec46512 [NANO130] Adjust static/dynamic memory allocation for IAR toolchain to pass Greentea test 2018-06-26 13:47:23 +08:00
ccli8 12792fde27 [NANO130] Fix CLK_Idle incorrectly enters into deep sleep mode 
This can happen with CLK_PowerDown() called first and then CLK_Idle() called.
 2018-06-26 13:47:22 +08:00
ccli8 3f861425da [Nuvoton] Meet new lp_ticker HAL spec (Mbed OS 5.9) 
1. Add LPTICKER in device_has option of targets.json file.
2. Disable ticker interrupt in lp_ticker_init
3. Add lp_ticker_free
4. Enable interrupt in lp_ticker_set_interrupt
 2018-06-26 13:47:17 +08:00
ccli8 ebd93ba753 [Nuvoton] Meet new us_ticker HAL spec (Mbed OS 5.9) 
1. Add USTICKER in device_has option of targets.json file.
2. Disable ticker interrupt in us_ticker_init
3. Add us_ticker_free
4. Enable interrupt in us_ticker_set_interrupt
 2018-06-26 13:45:33 +08:00
ccli8 6065e3a943 [Nuvoton] Fix RTC cannot cross reset cycle 2018-05-29 17:22:02 +08:00
ccli8 2cefe7d8d5 [Nuvoton] Power down RTC access from CPU domain in rtc_free 
After rtc_free, RTC gets inaccessible from CPU domain but keeps counting.
 2018-05-29 10:33:01 +08:00
Bartek Szatkowski 6e9f04bf2f Rename DEVICE_LOWPOWERTIMER to DEVICE_LPTICKER 
That's to match DEVICE_USTICKER.
 2018-05-25 12:20:09 -05:00
deepikabhavnani ba4aa3f3a6 Updating HEAP size 
IAR 7.8 does not support dynamic heap, and some test/addition of new
feature fail on this device because of less static RAM memory.
Reducing the heap memory size for the same reason.
 2018-04-27 15:48:52 -05:00
Cruz Monrreal f73415e9f8
Merge pull request #6466 from OpenNuvoton/nuvoton_fix_spi 
Nuvoton: Fix issues with SPI
 2018-04-16 10:47:51 -05:00
ccli8 571e89048f [Nuvoton] Remove dead code with '#if 0' in SPI 2018-04-09 09:33:52 +08:00
Jimmy Brisson 897885909d
Merge pull request #6394 from OpenNuvoton/nuvoton_fix_ticker 
Nuvoton: Fix us_ticker/lp_ticker
 2018-03-29 11:58:53 -05:00
Cruz Monrreal e9b234b876
Merge pull request #6424 from OpenNuvoton/m487_v3 
Nuvoton: Support M487 v3.0 pin map
 2018-03-26 14:26:32 -05:00
ccli8 707de87497 [Nuvoton] Refine SPI code 
1. Remove dead code
2. Remove space in empty lines
3. Fix compile warnings
4. Fix some comments
 2018-03-26 11:02:54 +08:00
ccli8 7275ee8626 [Nuvoton] Fix SPI DMA transfer 
1. Disable unnecessary TX/RX threshold interrupts to avoid potential trap in DMA transfer
2. Start TX/RX DMA transfer simultaneously to fit H/W spec and avoid potential RX FIFO overflow issue
 2018-03-26 10:58:18 +08:00
ccli8 9e72756878 [Nuvoton] Use vector rather than SPI_CTL_SPIEN_Msk to judge if asynchronous transfer is on-going (spi_active) 2018-03-26 10:50:14 +08:00
ccli8 643d772cf9 [Nuvoton] Introduce SPI_ENABLE_SYNC/SPI_DISABLE_SYNC to simplify enable/disable control 2018-03-26 10:34:22 +08:00
ccli8 ccec9d75d6 [Nuvoton] Add missing delay in lp_ticker 
mbed-os-tests-mbed_drivers-lp_ticker/Test multi ticker test fails inconstantly.
This commit is mainly to fix the issue.
 2018-03-26 09:45:59 +08:00
ccli8 5d453ed381 [Nuvoton] Check timer active flag after enabling timer counting in us_ticker/lp_ticker 2018-03-26 09:42:53 +08:00
ccli8 3cd8d3df9f [Nuvoton] Remove unnecessary TIMER_Start in the end of lp_ticker_set_interrupt 2018-03-26 09:27:05 +08:00
cyliangtw efe57a00b4 [M487] Support v3.0 pin map 2018-03-22 20:09:09 +08:00
ccli8 f0865f8546 [Nuvoton] Fix page size in flash IAP 
In Mbed OS, page size is program unit, which is different than FMC definition.
After fixing page size, we can pass NVSTORE test (mbed-os-features-nvstore-tests-nvstore-functionality).
 2018-03-22 16:45:01 +08:00
ccli8 7ed3bac85d [Nuvoton] Remove unnecessary UART INT in UART DMA transfer 
In UART DMA transfer, it is PDMA INT rather than UART INT to go INT path
 2018-03-19 17:52:01 +08:00
Cruz Monrreal f1d493dd0c
Merge pull request #6228 from OpenNuvoton/nuvoton_1timer_ticker 
Nuvoton: Rework us_ticker/lp_ticker with one H/W timer
 2018-03-05 10:19:56 -06:00
Bartek Szatkowski 4cb47df40a Add system_reset() function to Mbed OS 2018-02-28 16:42:34 +00:00
cyliangtw b6ff40e94d [M451/M480/NANO100/NUC472] Define SERIAL and I2C pin name for compatiblity 2018-02-27 11:38:29 +08:00
ccli8 1d7e7fd543 [NUC472/M453/M487/NANO130] Rework us_ticker and lp_ticker with one H/W timer 
Originally, we use 2 H/W timers for us_ticker/lp_ticker, one for counting and the other for alarm.
With H/W timer running in continuous mode, we could use just one H/W timer for counting/alarm simultaneously.
 2018-02-26 17:41:05 +08:00
Cruz Monrreal 817f9a569c
Merge pull request #5812 from OpenNuvoton/nuvoton_crypto 
M487: Support ECP H/W accelerator
 2018-02-20 11:53:23 -06:00
Cruz Monrreal aa6835a069
Merge pull request #6048 from OpenNuvoton/nuvoton_ticker 
Nuvoton: Rework us_ticker and lp_ticker
 2018-02-16 15:59:05 -06:00
ccli8 cfdc72d75e [NUC472/M487] Refine crypto_zeroize/crypto_zeroize32 2018-02-12 14:04:56 +08:00
ccli8 0271df1fa5 [NUC472/M453/M487/NANO130] Rework RTC 
The rework includes the following:
1. Support year range beyond H/W RTC 2000~2099.
2. Refine RTC register access with low-power clock source
 2018-02-09 10:47:18 +08:00
ccli8 fae160fb9f [NUC472/M453/M487/NANO130] Rework us_ticker and lp_ticker 
The rework includes the following:
1. Remove ticker overflow handling because upper layer (mbed_ticker_api.c) has done with it.
   This makes us_ticker/lp_ticker implementation more succinct and avoids potential error.
2. Refine timer register access with low-power clock source
 2018-02-07 09:09:39 +08:00
ccli8 160f75d536 [NUC472/M487] Fix warning in crypto 2018-01-22 10:51:12 +08:00
ccli8 f61d9d48c8 [NUC472/M453/M487/NANO130] Add gpio_is_connected 2018-01-18 17:33:03 +08:00
ccli8 a68750473c [M487] Support ECP H/W accelerator 2018-01-09 16:20:41 +08:00
ccli8 67386b9ebd [NUC472/M487] Fix DMA input/output buffers are overlapped in AES alter. 2018-01-05 09:18:26 +08:00
ccli8 d96bcda606 [NUC472/M487] Fix indefinite loop in SHA alter. 2018-01-05 09:18:25 +08:00
ccli8 a00f8d0e8b [NUC472/M487] Guard from reordering DMA wait and post-wait for crypto modules 2018-01-05 09:18:25 +08:00
ccli8 3a8c1aa687 [NUC472/M487] Use interrupt signal rather than polling to check operation completion in DES alter. 
This is to be consistent with PRNG/AES.
 2018-01-05 09:18:24 +08:00
ccli8 0c1098483f [NUC472/M487] Refine flow control code between crypto start and crypto ISR 2018-01-05 09:18:24 +08:00
ccli8 e1fbf0f6a7 [NUC472/M487] Add comment for crypto_zeroize 2018-01-05 09:18:24 +08:00
ccli8 9edda18b0f [NUC472] Update BSP crypto driver 2018-01-05 09:18:23 +08:00
ccli8 a0a8a955a9 [NUC472/M487] Strengthen crypto DMA buffer check 
1. Catch incompatible buffer range, where buffer base = 0xffffff00 and buffer size = 0x100.
2. Add buffer size alignment check.
 2018-01-05 09:18:21 +08:00
ccli8 b0228d020d [NUC472/M487] Fix compile error as mbedtls is not included 
Currently, trng_api.c is located in targets/ and AES/DES/SHA alter. are located in mbedtls/.
They have shared crypto code.
If they could locate at same location e.g. mbedtls/, the shared crypto code placement would be more reasonable.
 2018-01-05 09:18:20 +08:00
ccli8 6464649c41 [NUC472/M487] Coordinate crypto interrupt handler among AES/PRNG 2018-01-05 09:18:20 +08:00
ccli8 d66074fecc [NUC472/M487] Coordinate crypto init among AES/DES/SHA/PRNG 
Add counter to track crypto init among crypto sub-modules. It includes:
1. Enable crypto clock
2. Enable crypto interrupt

As counter gets zero, crypto clock is disabled to save power.
 2018-01-05 09:18:18 +08:00
Martin Kojtal be52ba2156
Merge pull request #5363 from mprse/extended_rtc 
Add support and tests for extended RTC
 2017-12-12 17:36:44 +00:00
Przemyslaw Stekiel 106561669f Update RTC drivers for extended RTC. 2017-12-05 07:54:02 +01:00
Jimmy Brisson ab1b3ae8d3
Merge pull request #5454 from OpenNuvoton/trng_get_unalignment 
Nuvoton: TRNG_Get support 32 bytes unalignment
 2017-11-22 10:21:39 -06:00
ccli8 bc9c9ca1e2 [M487] Remove trailing space in lp_ticker/us_ticker 2017-11-22 08:55:58 +00:00
ccli8 8b86d44867 [M487] Fix premature lp_ticker interrupt 
Old lp_ticker handles past event, but it has a bug with premature go-off.
The bug can re-produce on mbed-os-tests-mbed_drivers-lp_timeout/mbed-os-tests-mbed_hal-lp_us_tickers (mbed-os commit: 9c1fd48529).
Because upper layer (mbed-os/hal/mbed_ticker_api.c) has handled past event, this code can be removed from lp_ticker.

The similar fix also applies to us_ticker.
 2017-11-22 08:55:58 +00:00
cyliangtw 288094568c [M487/NUC472/NANO130] fix TRUE/FALSE redefinition 2017-11-16 11:21:20 +00:00
cyliangtw d8a9e35a0c [M487/NUC472] Refine trng_get_bytes for consistency and readability 2017-11-13 12:11:08 +08:00
cyliangtw 2ee058be53 [M487/NUC472] Refine for correctness control 2017-11-10 16:22:35 +08:00
cyliangtw e252b10148 [M487/NUC472] zeroize random data on the stack memory 2017-11-09 16:01:14 +08:00
cyliangtw 76c2c19853 [M487/NUC472] Unified code-path for remaining bytes of TRNG_Get 2017-11-08 19:56:12 +08:00
cyliangtw 4118afa259 [M487/NUC472] TRN_Get support 32 bytes unalignment 2017-11-08 14:23:05 +08:00
ccli8 bf426b0771 [NUC472/M453/M487/NANO130] Remove dead power-down code with mbed OS 3 
These power-down code are stale and would be superseded by sleep manager.
 2017-09-22 09:42:51 +08:00
ccli8 4040211f9e [NANO130] Refine sleep code 
1. Remove stale code with mbed OS 3.
2. Remove check for busy peripherals unorganizedly. This would be supported by e.g. official sleep manager.
 2017-09-22 09:33:53 +08:00
ccli8 785413aa1e [NANO130] Fix RTC hour error with AM/PM 2017-09-21 16:42:00 +08:00
ccli8 33070988de [NANO130] Fix lp_ticker wake-up is incorrectly disabled 2017-09-20 16:56:37 +08:00
ccli8 f553277198 [NANO130] Fix lp_ticker typo 2017-09-20 16:56:36 +08:00
ccli8 c4c902289f [NANO130] Change SW2/SW3 to SW1/SW2 to match target board 2017-09-20 16:56:35 +08:00
ccli8 443d18a18c [NANO130] Move target configuration from mbed_lib.json to targets.json 2017-09-20 16:56:34 +08:00
ccli8 d4af4ba3a7 [NUC472/M453/M487] Fix RTC hour error with AM/PM 2017-09-20 16:56:34 +08:00
ccli8 83fc132b97 [NUC472] Fix RTC macro function with no arguments in BSP 2017-09-20 16:56:33 +08:00