Commit Graph

604 Commits (6cc3d6dd179f006c06de0c63bcf5b9dbaedb188c)

Author SHA1 Message Date
Martin Kojtal aef93ca7c9
Merge pull request #14020 from pea-pod/stm-spi-more-bits
Add SPI bitwidths to ST targets where supported
2021-01-15 10:01:28 +00:00
Hugues Kamba 24132695e3 These targets have a different memory layout,
they have two RAMs at two distinct locations:

RAM1 (address: MBED_RAM_START, size: MBED_RAM_SIZE):
* stack
* heap
* some part of static memory

RAM2 (address: MBED_IRAM2_START, size: MBED_IRAM2_SIZE):
* remaining part of static memory starting at MBED_IRAM2_START
* crash report
* vector
2021-01-13 12:46:35 +00:00
pea-pod e1c754b179 Add SPI bitwidths to ST targets where supported 2021-01-11 07:53:07 -06:00
Hugues Kamba a3fccf7d21 STM: Fix heap size formula in scatter files
The heap size was incorrectly calculated.
This fixes it by subtracting the Stack size, any memory chunks allocated
before the start of the application (for vectors and/or crash report), and
finally the size of the application from the total RAM size.
2021-01-08 18:18:40 +00:00
Martin Kojtal 0169915a71
Merge pull request #13998 from MultiTechSystems/mtqn-crash-data-ram
Add crash reporting and autoreboot capability to MTS_DRAGONFLY_L471QG
2020-12-09 11:58:19 +00:00
Martin Kojtal 56f731027e
Merge pull request #13929 from JeanMarcR/DEEP_SLEEP
STM32: LPUART clock source selection up to a serial driver
2020-12-03 08:47:01 +00:00
Leon 310b6dd127 Add crash reporting and autoreboot capability to MTS_DRAGONFLY_L471QG 2020-12-01 14:18:16 -06:00
Martin Kojtal fc16d2bae7 STM: fix ARMClang sct files, using proper -E command
This is required for ARMClang, otherwise there is an error with unknown command.
2020-11-25 13:35:36 +00:00
Martin Kojtal 6d89500dfe
Merge pull request #13935 from MultiTechSystems/mtqn-soft-power-on
Dragonfly Nano(MTQN): power on/off so soft_power_on() fix
2020-11-24 14:14:07 +00:00
Martin Kojtal ced4aa6e2d
Merge pull request #13939 from jeromecoutant/PR_LSEDRIVE
STM32: LSE DRIVE feature update
2020-11-24 14:13:52 +00:00
Martin Kojtal a1fc9cdad5
Merge pull request #13915 from 0xc0170/cmake-stm32
CMake: add all TARGET_STM targets
2020-11-24 14:09:28 +00:00
Martin Kojtal 59c03e1e75
Merge pull request #13914 from JeanMarcR/FLASH_API
STM32 FLASH API : add critical sections
2020-11-24 14:08:52 +00:00
Martin Kojtal 2f709cc13f
Merge pull request #13896 from jeromecoutant/PR_OSPI
STM32 OSPI support
2020-11-24 13:53:30 +00:00
reme 41ed9239be LPUART CLOCK SOURCE SELECTION LEFT TO SERIAL DRIVER.
The clock source selection of LPUART depends on System clocks but also on
the serial baudrate. There is a specific computation done in serial driver
targets/target_STM/serial_api.c

At first start-up the LPUART1 clock selected in SetSysClock was anyway
overridden by the serial driver, so this was of no effect. But in case
of deep sleep SetSysClock is called again, while the driver isn't, so
SetSyClock was corrupting the serial clock configuration.

So let's remove these few lines of code which are causing trouble.

For targets L496 and L5.

Taking into account device TRNG in L5 configuration
2020-11-23 17:10:49 +01:00
jeromecoutant 29af76fcca STM32: LSE DRIVE feature update 2020-11-20 17:31:26 +01:00
reme 16e63dc108 STM32 FLASH API : add critical sections
See PR #13802 (for F4 board)

Concerned boards are

STM32F0
STM32F1
STM32F2
STM32F3
STM32F4
STM32F7
STM32G0
STM32G4
STM32H7
STM32L0
STM32L1
STM32L4
STM32L5

Adding test of return code of HAL_FLASH_Lock() function
Adding board STM32F4
Running AStyle
2020-11-20 08:03:24 +00:00
Leon 01b60c20a1 Update Dragonfly Nano(MTQN) power on/off so soft_power_on() performs a reset 2020-11-19 18:09:06 -06:00
Martin Kojtal 468b66944d CMake: STM32 TARGET_ prefix removal fix 2020-11-18 12:13:46 +00:00
Martin Kojtal 134c39cb7e
Merge pull request #13905 from jeromecoutant/PR_L422
STM32L4: ADC compilation issue with L422
2020-11-18 10:59:06 +00:00
Martin Kojtal 4c115a5c8d CMake: fix STM32 cmsis include 2020-11-17 16:30:37 +00:00
Martin Kojtal 519ac980ab CMake: add STM32L4 targets 2020-11-17 16:22:16 +00:00
jeromecoutant c288034ff7 STM32L4: ADC compilation issue with L422 2020-11-13 10:13:46 +01:00
Martin Kojtal 18b898d708 STM32L475xG: fix linker/startup inclusion
No function required.
2020-11-12 11:54:21 +00:00
jeromecoutant 3697167b73 STM32: add OSPI capability
PeripheralPins.c and PinNames.h files
generated by STM32_gen_PeripheralPins.py v1.17
2020-11-10 18:37:51 +01:00
Hugues Kamba 794e32df74 CMake: Use relative paths to list source files and directories
The absolute path is still required for listing linker
files as they are referenced from a function in the top
level CMake input source file.
2020-11-09 12:32:30 +00:00
Rajkumar Kanagaraj e7c0d93ad4 CMake: add mbed-os and mbed-baremetal targets
mbed-os consists of mbed-core and mbed-rtos
mbed-baremetal consists of mbed-core

The main change is for mbed-core. Changing from object library to be interface. This way it allows us to do the above to have 2 main targets for users to use.

This should be backward compatible change as mbed-os target we used contains the same files/options as previously set.
2020-11-06 17:25:22 +00:00
Hugues Kamba bf84a5b329 CMake: Rename CMake targets
* mbed-os renamed mbed-core
* mbed-os-<COMPONENT> renamed mbed-<COMPONENT>
2020-11-06 17:25:22 +00:00
Rajkumar Kanagaraj a42ad9dea4 Update CMake based on new STM32L4 directory structure 2020-11-06 17:25:22 +00:00
Rajkumar Kanagaraj 8016a53400 CMake: replace usage of the mbed_add_cmake_directory_if_labels() function (#13754)
Directories that start with special prefixes (TARGET_, FEATURE_, COMPONENT_)  are added to the build based on Mbed target configuration from targets.json instead of calling utility function mbed_add_cmake_directory_if_labels().
2020-11-06 17:25:21 +00:00
Hugues Kamba 0ba05246cc CMake: Fix selection of scatter file and startup file for DISCO_L475_IOT01A 2020-11-06 17:25:20 +00:00
Hugues Kamba 30e88863f4 CMake: Add support for DISCO_L475VG_IOT01A target 2020-11-06 17:25:15 +00:00
jeromecoutant 73d1c63741 STM32 SERIAL: free RTS/CTS pins 2020-11-04 15:47:14 +01:00
jeromecoutant 3c6ba98823 STM32L4: STM32Cube_FW_L4_V1.16.0
source: https://github.com/STMicroelectronics/STM32CubeL4
2020-10-20 08:51:37 +02:00
jeromecoutant 81f919b6c2 STM32L4 : license header alignment 2020-10-20 08:51:36 +02:00
jeromecoutant 95f8b2dfd4 STM32L4 : common file factorisation 2020-10-20 08:51:36 +02:00
jeromecoutant dcc066db59 STM32L4 : alignment with STM32Cube_FW_L4_V1.14.0 2020-10-20 08:51:35 +02:00
jeromecoutant 3b14c478c1 STM32L4 : directory retructuration
- Alignment with other STM32 families
2020-10-20 08:51:35 +02:00
Martin Kojtal 61aa6817f0
Merge pull request #13724 from harmut01/license_refactor
Add license notice to Arm copyrighted source files
2020-10-16 09:09:53 +01:00
Harrison Mutai 4fad1112e5 Add SPDX license identifier to Arm files
Add license identifier to files which Arm owns the copyright to,
and contain either BSD-3 or Apache-2.0 licenses. This is to address
license errors raised by scancode analysis.
2020-10-15 10:47:27 +01:00
jeromecoutant 282bc22247 STM32: update SetSysClock for NUCLEO_L476RG
Change in case of clock_source is set to HSI or HSE
(not the default configuration)
2020-10-06 15:11:34 +02:00
Martin Kojtal 21652971a5
Merge pull request #12644 from macronix/macronix_ospi
Add OSPI driver to support the Octa mode of Macronix octaflash MX25LM51245G
2020-09-30 16:07:20 +01:00
jeromecoutant 0af260fe43 STM32L4: link issue with IAR 2020-09-18 12:27:53 +02:00
rogeryou 48524f25ae add opsi driver 2020-09-16 11:27:23 +08:00
Martin Kojtal a17a481c54
Merge pull request #13583 from jeromecoutant/PR_ARDUINO_PIN
STM32: correct few Arduino pins value
2020-09-10 12:38:02 +01:00
Jaeden Amero 612b148fd4 stack: armc: Workaround config passing bug
Workaround a bug where the boot stack size configuration option is not
passed on to armlink, the Arm Compiler's linker. Prefer
MBED_CONF_TARGET_BOOT_STACK_SIZE if present, as this is what the
configuration system should provide. Fall back to MBED_BOOT_STACK_SIZE
if MBED_CONF_TARGET_BOOT_STACK_SIZE is not defined, as in the case of
buggy tools. If both MBED_CONF_TARGET_BOOT_STACK_SIZE and
MBED_BOOT_STACK_SIZE are not defined, then we fall back to a hard-coded
value provided by the linkerscript. See
https://github.com/ARMmbed/mbed-os/issues/13474 for more information.
2020-09-10 10:08:38 +01:00
Jaeden Amero 39e69d328d Use boot stack size from config system
To allow overriding of the boot stack size from the Mbed configuration
system, consistently use MBED_CONF_TARGET_BOOT_STACK_SIZE rather than
MBED_BOOT_STACK_SIZE.

Fixes #10319
2020-09-10 10:08:38 +01:00
jeromecoutant 668412ccde NUCLEO_L433RC_P: wrong D0 and D1 pins 2020-09-10 10:05:41 +02:00
jeromecoutant d804167816 STM32L4S5xI: B_L4S5I_IOT01A new target 2020-09-09 15:19:21 +02:00
jeromecoutant c65ad59ccd STM32L4S5xI introduction 2020-09-09 15:19:11 +02:00
jeromecoutant a0b718fc04 STM32 ANALOGOUT and DEEPSLEEP
keep DAC on during wait period
2020-07-02 14:18:44 +02:00
jeromecoutant 0d277eefe4 STM32L4: I2C init parameters for L4+ MCU 2020-06-23 10:05:24 +02:00
jeromecoutant 0a447ac798 STM32L4 baremetal support 2020-06-08 12:05:54 +02:00
jeromecoutant c96eb2cd0e STM32 rename TOOLCHAIN_ARM_STD into TOOLCHAIN_ARM 2020-05-15 10:41:28 +02:00
jeromecoutant 303752ad84 STM32 remove all TOOLCHAIN_ARM_MICRO 2020-05-15 09:37:40 +02:00
Hugues Kamba ce1c51ea51 ST Boards: Remove uARM tooolchain support
For NUCLEO_F401RE, NUCLEO_F411RE, NUCLEO_F303RE, and DISCO_L475VG_IOT01A:
* Ensure the scatter files for the ARM toolchain use 2 region memory model.
  The scatter files changes affects the following boards:
    * NUCLEO_F401RE, STEVAL_3DP001V1 (stm32f401xe.sct)
    * NUCLEO_F411RE, MTS_MDOT_F411RE, MTS_DRAGONFLY_F411RE, MTB_MTS_DRAGONFLY, SAKURAIO_EVB_01 (stm32f411re.sct)
    * NUCLEO_F303RE, NUCLEO_F303ZE (stm32f303xe.sct)
    * DISCO_L475VG_IOT01A, MTB_STM_L475 (stm32l475xx.sct)
* Remove the TOOLCHAIN_ARM_MICRO directories.
* Remove release_version as not necessary and as the targets can also run
  Mbed OS 6.
* Remove uARM support for all FAMILY_STM32 targets.
2020-04-30 14:17:39 +01:00
Marcelo Salazar a7b026bd14 Rename ADV_WISE_1510 target 2020-04-30 09:56:35 +01:00
Marcelo Salazar 92cbd9a734 Rename ADV_WISE_1570 target 2020-04-30 09:56:35 +01:00
MarceloSalazar 4b1ad8ad4c Remove MTB_STM_L475 target 2020-04-20 16:55:33 +01:00
MarceloSalazar 831c475a46 Remove Silica target 2020-04-09 15:32:41 +01:00
jeromecoutant 3e30033822 DISCO_L4R9I correct LED pins 2020-03-03 13:36:57 +01:00
Martin Kojtal 7658681a9e
Merge pull request #12409 from LMESTM/Fix_lpuart_deep_sleep
FIX: LPUART clock source selection should be left to serial driver
2020-02-13 09:45:41 +00:00
Laurent Meunier 3fd071404e FIX: LPUART clock source selection should be left to serial driver
The clock source selection of LPUART depends on System clocks but also on
the serial baudrate. There is a specific computation done in serial driver
targets/target_STM/serial_api.c

At first start-up the LPUART1 clock selected in SetSysClock was anyway
overridden by the serial driver, so this was of no effect. But in case
of deep sleep SetSysClock is called again, while the driver isn't, so
SetSyClock was corrupting the serial clock configuration.

So let's remove these few lines of code which are causing trouble.
2020-02-11 17:14:45 +01:00
Martin Kojtal c1eaf2c358
Merge pull request #12380 from mprse/DISCO_L475VG_IOT01A_add_gpio_pinmap
DISCO_L475VG_IOT01A: Add a list of restricted GPIO pins for testing
2020-02-11 11:58:53 +00:00
Martin Kojtal 7fd5119b89
Merge pull request #12341 from fkjagodzinski/fix-stm-hal_fpga
STM32L4: Fix the UART RX & TX data reg bitmasks
2020-02-10 13:21:31 +00:00
Przemyslaw Stekiel 3a71f86235 DISCO_L475VG_IOT01A: Add a list of restricted GPIO pins for testing 2020-02-07 11:41:32 +01:00
Filip Jagodzinski ae635d5cd4 STM32L4: Fix the UART RX & TX data reg bitmasks
The existing logic was insufficient to properly handle odd and even
parity setting, e.g. serial_getc() returned 9-bit data for 8O1
transmission format.
2020-02-06 14:07:51 +01:00
pea-pod f7c4693747 Add new target: NUCLEO_L452RE-P 2020-01-27 18:41:18 -06:00
Martin Kojtal d6e69ef57b
Merge pull request #12208 from hugueskamba/hk-replace-uartserial-st
ST targets: Replace UARTSerial references with BufferedSerial
2020-01-17 08:19:09 +00:00
Hugues Kamba 03cff0a02c ST targets: Replace UARTSerial references with BufferedSerial
BufferedSerial is UARTSerial renamed to convey the original purpose of
the class. It is the recommended buffered I/O serial class.
2020-01-08 08:34:20 +00:00
Leon Lindenfelser 94ead7adb2 Minor fixes for peripheral pins on Dragonfly Nano
1. PG8 should be labeled I2C3 not I2C1.
2. PC0 is dedicated to measuring system voltage.
2020-01-07 08:52:34 -06:00
Antti Kauppila e29cb193ca Added missing define for Quectel UG96 2019-12-27 16:04:10 +01:00
Antti Kauppila ca7848d854 Refactored away onboard_modem_api because it is not needed at all
All targets must implement soft_- and hard_power_on/off() functions which are practically same what onboard_modem_api offered.
These were seen as a duplicate features and therefore we removed this.
All targets involved have been updated to reflect the changes
2019-12-27 16:04:10 +01:00
Anna Bridge b1b0673622
Merge pull request #12086 from ABOSTM/FLASH_API_64B_ALIGNMENT
TARGET_STM: fix flash api 64bit address alignment on L4 and WB
2019-12-17 16:46:21 +00:00
Alexandre Bourdiol 9e3ad13d5e TARGET_STM: fix flash api 64bit address alignment on L4 and WB 2019-12-11 18:32:42 +01:00
jeromecoutant bea83d02c2 STM32 TARGET_STM astyle corrections 2019-12-10 14:39:47 +01:00
Kevin Bracey fe22bc023e Update HAL CRC API
* Change "is supported" check to be a macro, so it can be done at
  compile-time.
* Eliminate weird shift on 7-bit CRCs.
* Add support for 32-bit CRCs and reversals to TMPM3HQ.
2019-12-02 14:45:37 +02:00
Martin Kojtal 48f544f9e4
Merge pull request #11980 from jeromecoutant/PR_L4R9I
DISCO_L4R9I: update clock configuration for all clock sources
2019-12-02 11:23:51 +01:00
Martin Kojtal 7177d8fefe
Merge pull request #11950 from ABOSTM/DISCO_H747I_TICKLESS
DISCO_H747I: add support of MBED_TICKLESS
2019-11-29 09:48:09 +01:00
jeromecoutant 354913a45e DISCO_L4R9I: correct clock tree for all clock sources 2019-11-28 16:29:11 +01:00
Przemyslaw Stekiel b2dad08387 Change explicit pinmap to static pinmap 2019-11-28 08:32:12 +01:00
Przemyslaw Stekiel e3a34a57e1 Move GPIO_AF_NONE from PeripheralPins.h to PinNamesTypes.h 2019-11-28 08:32:10 +01:00
Przemyslaw Stekiel 6489bb7c99 STM: Add support for internal ADC pins 2019-11-28 08:32:06 +01:00
Przemyslaw Stekiel dc26390d08 DISCO_L475VG_IOT01A: Add explicit pinmap support 2019-11-28 08:32:04 +01:00
Martin Kojtal a1cddbae5f
Merge pull request #11938 from LMESTM/stm32_serial_clear_rxne
STM32: Update and align serial_clear implementations
2019-11-27 16:30:11 +01:00
Alexandre Bourdiol 41b038a028 TARGET_STM: rework hal_sleep management to be compatible with all STM32 families 2019-11-27 14:25:30 +01:00
Martin Kojtal 5f7ecea00b
Revert "MbedCRC and CRC HAL revisions" 2019-11-26 13:45:37 +00:00
Laurent Meunier f20529f9e6 STM32: Update and align serial_clear implementations
Clear RXNE flag by reading the RX register and align this implementation
on all families.
2019-11-25 14:55:32 +01:00
Kevin Bracey 1f94428a56 Update HAL CRC API
* Change "is supported" check to be a macro, so it can be done at
  compile-time.
* Eliminate weird shift on 7-bit CRCs.
* Add support for 32-bit CRCs and reversals to TMPM3HQ.
2019-11-13 14:31:49 +02:00
Martin Kojtal df79609cc5
Merge pull request #11675 from jeromecoutant/PR_USB_STEP1
STM32 USB update step 1
2019-10-28 14:06:15 +01:00
Kevin Bracey fb6aa3ef4f Clean up ARM toolchain heap+stack setup in targets
ARM Compiler 6.13 testing revealed linker errors pointing out
conflicting use of `__user_setup_stackheap` and
`__user_initial_stackheap` in some targets. Remove the unwanted
`__user_initial_stackheap` from the targets - the setup is
centralised in the common platform code.

Looking into this, a number of other issues were highlighted

* Almost all targets had `__initial_sp` hardcoded in assembler,
  rather than getting it from the scatter file. This was behind
  issue #11313. Fix this generally.
* A few targets' `__initial_sp` values did not match the scatter
  file layout, in some cases meaning they were overlapping heap
  space. They now all use the area reserved in the scatter file.
  If any problems are seen, then there is an error in the
  scatter file.
* A number of targets were reserving unneeded space for heap and
  stack in their startup assembler, on top of the space reserved in
  the scatter file, so wasting a few K. A couple were using that
  space for the stack, rather than the space in the scatter file.

To clarify expected behaviour:

* Each scatter file contains empty regions `ARM_LIB_HEAP` and
  `ARM_LIB_STACK` to reserve space. `ARM_LIB_STACK` is sized
  by the macro `MBED_BOOT_STACK_SIZE`, which is set by the tools.
  `ARM_LIB_HEAP` is generally the space left over after static
  RAM and stack.
* The address of the end of `ARM_LIB_STACK` is written into the
  vector table and on reset the CPU sets MSP to that address.
* The common platform code in Mbed OS provides `__user_setup_stackheap`
  for the ARM library. The ARM library calls this during startup, and
  it calls `__mbed_user_setup_stackheap`.
* The default weak definition of `__mbed_user_setup_stackheap` does not
  modify SP, so we remain on the boot stack, and the heap is set to
  the region described by `ARM_LIB_HEAP`. If `ARM_LIB_HEAP` doesn't
  exist, then the heap is the space from the end of the used data in
  `RW_IRAM1` to the start of `ARM_LIB_STACK`.
* Targets can override `__mbed_user_setup_stackheap` if they want.
  Currently only Renesas (ARMv7-A class) devices do.
* If microlib is in use, then it doesn't call `__user_setup_stackheap`.
  Instead it just finds and uses `ARM_LIB_STACK` and `ARM_LIB_HEAP`
  itself.
2019-10-23 14:53:49 +03:00
jeromecoutant 01e798fd6a STM32 clock configuration depending on USB 2019-10-21 17:11:59 +02:00
jeromecoutant 03dd8d3e22 STM32L4 USB pins addition 2019-10-21 17:11:55 +02:00
Laurent Meunier e862438fad Clearing UART TC Flag prevents deep sleep, so do not clear it
The TC flag is used in function serial_is_tx_ongoing to check if there is
an ongoing serial transmission. So this Flag must not be cleared at the
end of the transmission, otherwise, serial_is_tx_ongoing will notify that
TX is ongoing.

The impact is that it may prevent deep sleep to be entered.

Also there is no need to clear this flag at the end of the transaction
because it will be cleared automatically by HW when a new transmission
starts.
2019-10-15 15:59:51 +02:00
jeromecoutant fc5b91a36f DISCO_L4R9I: update default STMOD+ pin 2019-10-07 16:01:16 +02:00
jeromecoutant db7efabfd5 STM license file update
Some code have been copied from ST Cube deliveries.
ST copyright is then needed.
2019-09-10 14:24:48 +02:00
jeromecoutant bb1388be8e NUCLEO_L4R5ZI: add QSPI_x definition 2019-08-29 14:17:33 +02:00
jeromecoutant f13072490c NUCLEO_L4R5ZI : add OSPI pins for QSPI 2019-08-29 12:11:28 +02:00
Martin Kojtal 96d9a8fea9 Merge branch 'MX25LM51245G_QSPI_test_config' of git://github.com/LMESTM/mbed into dev_rollup 2019-08-28 18:37:17 +01:00
Martin Kojtal 104f9281c4 Merge branch 'I2C_SEQUENTIAL_COMMUNICATION_REWORK' of git://github.com/ABOSTM/mbed-os into dev_rollup 2019-08-28 18:36:53 +01:00
Leon Lindenfelser 7063ccee9e Add PA6 to ADC PeripheralPins for MTS_DRAGONFLY_L471QG 2019-08-28 13:12:08 +01:00