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Add crash reporting and autoreboot capability to MTS_DRAGONFLY_L471QG

pull/13998/head
Leon 2020-11-30 13:01:25 -06:00
parent e77b1d8a17
commit 310b6dd127
4 changed files with 86 additions and 17 deletions
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4
platform/mbed_lib.json
View File

@ -238,6 +238,10 @@
"ARM_MUSCA_S1": {
"stdio-convert-newlines": true,
"stdio-baud-rate": 115200
},
"MTS_DRAGONFLY_L471QG": {
"crash-capture-enabled": true,
"fatal-error-auto-reboot-enabled": true
}
}
}

32
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/TOOLCHAIN_ARM/stm32l471xg.sct
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@ -37,7 +37,25 @@
/* Round up VECTORS_SIZE to 8 bytes */
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
; Crash report enabled as default
#if !defined(MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
#endif
;Vectors + Crash report - Fixed at start of RAM2 in sequence
#define MBED_IRAM2_SIZE (MBED_RAM1_SIZE - VECTORS_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
#define MBED_CRASH_REPORT_RAM_START (MBED_RAM1_START + VECTORS_SIZE)
#define MBED_IRAM2_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
; Minimum heap should be larger then smallest RAM bank (else can use
; that bank for heap) and less then largest RAM bank.
#define MINIMUM_HEAP 0x12000
;Splitting the RW and ZI section in IRAM1 (MBED_RAM_SIZE-MINIMUM_HEAP = 0x6000 available)
;and IRAM2 (MBED_IRAM2_SIZE = 0x7D78 available)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
*.o (RESET, +First)
@ -45,15 +63,21 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE {
.ANY (+RO)
}
RW_IRAM1 MBED_RAM_START (MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE) { ;
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
RW_IRAM1 MBED_RAM_START (MBED_RAM_SIZE - MINIMUM_HEAP) { ; RW data
.ANY (+RW +ZI)
}
RW_IRAM2 (MBED_RAM1_START+VECTORS_SIZE) (MBED_RAM1_SIZE-VECTORS_SIZE) { ;
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
}
RW_IRAM2 MBED_IRAM2_START MBED_IRAM2_SIZE {
.ANY (+RW +ZI)
}
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack
}
}

14
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/TOOLCHAIN_GCC_ARM/stm32l471xg.ld
View File

@ -26,6 +26,8 @@
#define MBED_APP_SIZE MBED_ROM_SIZE
#endif
M_CRASH_DATA_RAM_SIZE = 0x100;
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
/* This value is normally defined by the tools
to 0x1000 for bare metal and 0x400 for RTOS */
@ -115,6 +117,18 @@ SECTIONS
__etext = .;
_sidata = .;
.crash_data_ram :
{
. = ALIGN(8);
__CRASH_DATA_RAM__ = .;
__CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
KEEP(*(.keep.crash_data_ram))
*(.m_crash_data_ram) /* This is a user defined section */
. += M_CRASH_DATA_RAM_SIZE;
. = ALIGN(8);
__CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
} > SRAM2
/* .stack section doesn't contains any symbols. It is only
* used for linker to reserve space for the isr stack section
* WARNING: .stack should come immediately after the last secure memory

53
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/TOOLCHAIN_IAR/stm32l471xg.icf
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@ -1,3 +1,20 @@
/* Linker script to configure memory regions.
*
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
* @attention
*
* Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; }
@ -6,29 +23,39 @@ define symbol __intvec_start__ = MBED_APP_START;
define symbol __region_ROM_start__ = MBED_APP_START;
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400;
}
/* [RAM = 96kb + 32kb = 0x20000] */
/* Vector table dynamic copy: Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM */
/* Vector table dynamic copy: Total: 98 vectors * 4 = 392 bytes (0x188) to be reserved in RAM */
define symbol __NVIC_start__ = 0x10000000;
define symbol __NVIC_end__ = 0x10000187; /* Aligned on 8 bytes (392 = 49 x 8) */
define symbol __region_SRAM2_start__ = 0x10000188;
define symbol __NVIC_end__ = 0x10000187;
define symbol __region_CSTACK_start__ = 0x10000188;
define symbol __region_CSTACK_end__ = __region_CSTACK_start__ + MBED_CONF_TARGET_BOOT_STACK_SIZE;
define symbol __region_SRAM2_start__ = __region_CSTACK_end__;
define symbol __region_SRAM2_end__ = 0x10007FFF;
define symbol __region_SRAM1_start__ = 0x20000000;
define symbol __region_CRASH_DATA_RAM_start__ = 0x20000000;
define symbol __region_CRASH_DATA_RAM_end__ = 0x200000FF;
define symbol __region_SRAM1_start__ = 0x20000100;
define symbol __region_SRAM1_end__ = 0x20017FFF;
/* Memory regions */
define memory mem with size = 4G;
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__];
define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
define region CSTACK_region = mem:[from __region_CSTACK_start__ to __region_CSTACK_end__];
define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__];
define region RAM_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__]
| mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400;
}
/* Define Crash Data Symbols */
define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__;
define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;
define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x8000;
define symbol __size_heap__ = 0x10000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block HEAP with expanding size, alignment = 8, minimum size = __size_heap__ { };
initialize by copy with packing = zeros { readwrite };
do not initialize { section .noinit };
@ -36,5 +63,5 @@ do not initialize { section .noinit };
place at address mem:__intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in SRAM1_region { readwrite, block HEAP };
place in SRAM2_region { block CSTACK };
place in CSTACK_region { block CSTACK };
place in RAM_region { block HEAP, readwrite, zeroinit };