mirror of https://github.com/ARMmbed/mbed-os.git
Merge pull request #14020 from pea-pod/stm-spi-more-bits
Add SPI bitwidths to ST targets where supportedpull/14156/head
commit
aef93ca7c9
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@ -164,7 +164,7 @@ public:
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/** Configure the data transmission format.
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*
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* @param bits Number of bits per SPI frame (4 - 16).
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* @param bits Number of bits per SPI frame (4 - 32, target dependent).
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* @param mode Clock polarity and phase mode (0 - 3).
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*
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* @code
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@ -18,4 +18,7 @@
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#include "stm32f0xx_ll_spi.h"
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// Defines the word length capability of the device where Nth bit allows for N window size
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#define STM32_SPI_CAPABILITY_WORD_LENGTH (0x0000FFF8)
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#endif
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@ -32,4 +32,7 @@
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#include "stm32f1xx_ll_spi.h"
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// Defines the word length capability of the device where Nth bit allows for N window size
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#define STM32_SPI_CAPABILITY_WORD_LENGTH (0x00008080)
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#endif
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@ -32,4 +32,7 @@
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#include "stm32f2xx_ll_spi.h"
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// Defines the word legnth capability of the device where Nth bit allows for N window size
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#define STM32_SPI_CAPABILITY_WORD_LENGTH (0x00008080)
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#endif
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@ -32,4 +32,7 @@
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#include "stm32f3xx_ll_spi.h"
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// Defines the word legnth capability of the device where Nth bit allows for N window size
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#define STM32_SPI_CAPABILITY_WORD_LENGTH (0x0000FFF8)
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#endif
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@ -32,4 +32,7 @@
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#include "stm32f4xx_ll_spi.h"
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// Defines the word legnth capability of the device where Nth bit allows for N window size
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#define STM32_SPI_CAPABILITY_WORD_LENGTH (0x00008080)
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#endif
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@ -32,4 +32,7 @@
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#include "stm32f7xx_ll_spi.h"
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// Defines the word legnth capability of the device where Nth bit allows for N window size
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#define STM32_SPI_CAPABILITY_WORD_LENGTH (0x0000FFF8)
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#endif
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@ -17,4 +17,7 @@
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#include "stm32g0xx_ll_spi.h"
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// Defines the word legnth capability of the device where Nth bit allows for N window size
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#define STM32_SPI_CAPABILITY_WORD_LENGTH (0x0000FFF8)
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#endif
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@ -18,4 +18,7 @@
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#include "stm32g4xx_ll_spi.h"
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// Defines the word legnth capability of the device where Nth bit allows for N window size
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#define STM32_SPI_CAPABILITY_WORD_LENGTH (0x0000FFF8)
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#endif
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@ -19,4 +19,7 @@
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#include "stm32h7xx_ll_rcc.h"
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#include "stm32h7xx_ll_spi.h"
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// Defines the word legnth capability of the device where Nth bit allows for N window size
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#define STM32_SPI_CAPABILITY_WORD_LENGTH (0xFFFFFFF8)
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#endif
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@ -17,4 +17,7 @@
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#include "stm32l0xx_ll_spi.h"
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// Defines the word legnth capability of the device where Nth bit allows for N window size
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#define STM32_SPI_CAPABILITY_WORD_LENGTH (0x00008080)
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#endif
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@ -32,4 +32,7 @@
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#include "stm32l1xx_ll_spi.h"
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// Defines the word legnth capability of the device where Nth bit allows for N window size
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#define STM32_SPI_CAPABILITY_WORD_LENGTH (0x00008080)
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#endif
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@ -20,4 +20,7 @@
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#include "stm32l4xx_ll_spi.h"
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// Defines the word legnth capability of the device where Nth bit allows for N window size
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#define STM32_SPI_CAPABILITY_WORD_LENGTH (0x0000FFF8)
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#endif
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@ -18,4 +18,7 @@
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#include "stm32l5xx_ll_spi.h"
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// Defines the word legnth capability of the device where Nth bit allows for N window size
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#define STM32_SPI_CAPABILITY_WORD_LENGTH (0x0000FFF8)
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#endif
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@ -20,4 +20,7 @@
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#include "stm32wbxx_ll_spi.h"
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// Defines the word legnth capability of the device where Nth bit allows for N window size
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#define STM32_SPI_CAPABILITY_WORD_LENGTH (0x0000FFF8)
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#endif
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@ -71,6 +71,14 @@
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extern HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef *hspi);
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#endif
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#if defined(SPI_DATASIZE_17BIT) || defined(SPI_DATASIZE_18BIT) || defined(SPI_DATASIZE_19BIT) || defined(SPI_DATASIZE_20BIT) || \
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defined(SPI_DATASIZE_21BIT) || defined(SPI_DATASIZE_22BIT) || defined(SPI_DATASIZE_23BIT) || defined(SPI_DATASIZE_24BIT) || \
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defined(SPI_DATASIZE_25BIT) || defined(SPI_DATASIZE_26BIT) || defined(SPI_DATASIZE_27BIT) || defined(SPI_DATASIZE_28BIT) || \
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defined(SPI_DATASIZE_29BIT) || defined(SPI_DATASIZE_30BIT) || defined(SPI_DATASIZE_31BIT) || defined(SPI_DATASIZE_32BIT)
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#define HAS_32BIT_SPI_TRANSFERS 1
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#endif // SPI_DATASIZE_X
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void spi_get_capabilities(PinName ssel, bool slave, spi_capabilities_t *cap)
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{
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if (slave) {
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@ -90,7 +98,7 @@ void spi_get_capabilities(PinName ssel, bool slave, spi_capabilities_t *cap)
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} else {
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cap->minimum_frequency = 200000; // 200 kHz
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cap->maximum_frequency = 2000000; // 2 MHz
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cap->word_length = 0x00008080; // 8 and 16 bit symbols
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cap->word_length = STM32_SPI_CAPABILITY_WORD_LENGTH; // Defined in spi_device.h
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cap->support_slave_mode = false; // to be determined later based on ssel
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cap->hw_cs_handle = false; // to be determined later based on ssel
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cap->slave_delay_between_symbols_ns = 0; // irrelevant in master mode
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@ -384,7 +392,153 @@ void spi_format(spi_t *obj, int bits, int mode, int slave)
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DEBUG_PRINTF("spi_format, bits:%d, mode:%d, slave?:%d\r\n", bits, mode, slave);
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// Save new values
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handle->Init.DataSize = (bits == 16) ? SPI_DATASIZE_16BIT : SPI_DATASIZE_8BIT;
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uint32_t DataSize;
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switch (bits) {
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#if defined(SPI_DATASIZE_4BIT)
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case 4:
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DataSize = SPI_DATASIZE_4BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_5BIT)
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case 5:
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DataSize = SPI_DATASIZE_5BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_6BIT)
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case 6:
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DataSize = SPI_DATASIZE_6BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_7BIT)
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case 7:
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DataSize = SPI_DATASIZE_7BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_9BIT)
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case 9:
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DataSize = SPI_DATASIZE_9BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_10BIT)
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case 10:
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DataSize = SPI_DATASIZE_10BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_11BIT)
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case 11:
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DataSize = SPI_DATASIZE_11BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_12BIT)
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case 12:
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DataSize = SPI_DATASIZE_12BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_13BIT)
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case 13:
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DataSize = SPI_DATASIZE_13BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_14BIT)
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case 14:
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DataSize = SPI_DATASIZE_14BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_15BIT)
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case 15:
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DataSize = SPI_DATASIZE_15BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_17BIT)
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case 17:
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DataSize = SPI_DATASIZE_17BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_18BIT)
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case 18:
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DataSize = SPI_DATASIZE_18BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_19BIT)
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case 19:
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DataSize = SPI_DATASIZE_19BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_20BIT)
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case 20:
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DataSize = SPI_DATASIZE_20BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_21BIT)
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case 21:
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DataSize = SPI_DATASIZE_21BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_22BIT)
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case 22:
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DataSize = SPI_DATASIZE_22BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_23BIT)
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case 23:
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DataSize = SPI_DATASIZE_23BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_24BIT)
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case 24:
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DataSize = SPI_DATASIZE_24BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_25BIT)
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case 25:
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DataSize = SPI_DATASIZE_25BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_26BIT)
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case 26:
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DataSize = SPI_DATASIZE_26BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_27BIT)
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case 27:
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DataSize = SPI_DATASIZE_27BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_28BIT)
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case 28:
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DataSize = SPI_DATASIZE_28BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_29BIT)
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case 29:
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DataSize = SPI_DATASIZE_29BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_30BIT)
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case 30:
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DataSize = SPI_DATASIZE_30BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_31BIT)
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case 31:
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DataSize = SPI_DATASIZE_31BIT;
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break;
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#endif
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#if defined(SPI_DATASIZE_32BIT)
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case 32:
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DataSize = SPI_DATASIZE_32BIT;
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break;
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#endif
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case 16:
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DataSize = SPI_DATASIZE_16BIT;
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break;
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// 8 bits is the default for anything not found before
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default:
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DataSize = SPI_DATASIZE_8BIT;
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break;
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}
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handle->Init.DataSize = DataSize;
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switch (mode) {
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case 0:
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@ -512,6 +666,115 @@ static inline int ssp_busy(spi_t *obj)
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return status;
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}
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static inline int datasize_to_transfer_bitshift(uint32_t DataSize) {
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switch (DataSize) {
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#if defined(SPI_DATASIZE_4BIT)
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case SPI_DATASIZE_4BIT:
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#endif
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#if defined(SPI_DATASIZE_5BIT)
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case SPI_DATASIZE_5BIT:
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#endif
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#if defined(SPI_DATASIZE_6BIT)
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case SPI_DATASIZE_6BIT:
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#endif
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#if defined(SPI_DATASIZE_7BIT)
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case SPI_DATASIZE_7BIT:
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#endif
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case SPI_DATASIZE_8BIT:
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return 0;
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#if defined(SPI_DATASIZE_9BIT)
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case SPI_DATASIZE_9BIT:
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#endif
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#if defined(SPI_DATASIZE_10BIT)
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case SPI_DATASIZE_10BIT:
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#endif
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#if defined(SPI_DATASIZE_11BIT)
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case SPI_DATASIZE_11BIT:
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#endif
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#if defined(SPI_DATASIZE_12BIT)
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case SPI_DATASIZE_12BIT:
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#endif
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#if defined(SPI_DATASIZE_13BIT)
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case SPI_DATASIZE_13BIT:
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#endif
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#if defined(SPI_DATASIZE_14BIT)
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case SPI_DATASIZE_14BIT:
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#endif
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#if defined(SPI_DATASIZE_15BIT)
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case SPI_DATASIZE_15BIT:
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#endif
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case SPI_DATASIZE_16BIT:
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return 1;
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#if defined(SPI_DATASIZE_17BIT)
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case SPI_DATASIZE_17BIT:
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return 2;
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#endif
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#if defined(SPI_DATASIZE_18BIT)
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case SPI_DATASIZE_18BIT:
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return 2;
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#endif
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#if defined(SPI_DATASIZE_19BIT)
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case SPI_DATASIZE_19BIT:
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return 2;
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#endif
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#if defined(SPI_DATASIZE_20BIT)
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case SPI_DATASIZE_20BIT:
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return 2;
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#endif
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#if defined(SPI_DATASIZE_21BIT)
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case SPI_DATASIZE_21BIT:
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return 2;
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#endif
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#if defined(SPI_DATASIZE_22BIT)
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case SPI_DATASIZE_22BIT:
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return 2;
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#endif
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#if defined(SPI_DATASIZE_23BIT)
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case SPI_DATASIZE_23BIT:
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return 2;
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#endif
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#if defined(SPI_DATASIZE_24BIT)
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case SPI_DATASIZE_24BIT:
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return 2;
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#endif
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#if defined(SPI_DATASIZE_25BIT)
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case SPI_DATASIZE_25BIT:
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return 2;
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#endif
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#if defined(SPI_DATASIZE_26BIT)
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case SPI_DATASIZE_26BIT:
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return 2;
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#endif
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#if defined(SPI_DATASIZE_27BIT)
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case SPI_DATASIZE_27BIT:
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return 2;
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#endif
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#if defined(SPI_DATASIZE_28BIT)
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case SPI_DATASIZE_28BIT:
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return 2;
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#endif
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#if defined(SPI_DATASIZE_29BIT)
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case SPI_DATASIZE_29BIT:
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return 2;
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#endif
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#if defined(SPI_DATASIZE_30BIT)
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case SPI_DATASIZE_30BIT:
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return 2;
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#endif
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#if defined(SPI_DATASIZE_31BIT)
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case SPI_DATASIZE_31BIT:
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return 2;
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#endif
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#if defined(SPI_DATASIZE_32BIT)
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case SPI_DATASIZE_32BIT:
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return 2;
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#endif
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// This point should never be reached, so return a negative value for assertion checking
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default:
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return -1;
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}
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}
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int spi_master_write(spi_t *obj, int value)
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{
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struct spi_s *spiobj = SPI_S(obj);
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@ -520,13 +783,15 @@ int spi_master_write(spi_t *obj, int value)
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if (handle->Init.Direction == SPI_DIRECTION_1LINE) {
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return HAL_SPI_Transmit(handle, (uint8_t *)&value, 1, TIMEOUT_1_BYTE);
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}
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const int bitshift = datasize_to_transfer_bitshift(handle->Init.DataSize);
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MBED_ASSERT(bitshift >= 0);
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#if defined(LL_SPI_RX_FIFO_TH_HALF)
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/* Configure the default data size */
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if (handle->Init.DataSize == SPI_DATASIZE_16BIT) {
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LL_SPI_SetRxFIFOThreshold(SPI_INST(obj), LL_SPI_RX_FIFO_TH_HALF);
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} else {
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if (bitshift == 0) {
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LL_SPI_SetRxFIFOThreshold(SPI_INST(obj), LL_SPI_RX_FIFO_TH_QUARTER);
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} else {
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LL_SPI_SetRxFIFOThreshold(SPI_INST(obj), LL_SPI_RX_FIFO_TH_HALF);
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}
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#endif
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@ -549,8 +814,12 @@ int spi_master_write(spi_t *obj, int value)
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#endif /* TARGET_STM32H7 */
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/* Transmit data */
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if (handle->Init.DataSize == SPI_DATASIZE_16BIT) {
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if (bitshift == 1) {
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LL_SPI_TransmitData16(SPI_INST(obj), (uint16_t)value);
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#ifdef HAS_32BIT_SPI_TRANSFERS
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} else if (bitshift == 2) {
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LL_SPI_TransmitData32(SPI_INST(obj), (uint32_t)value);
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#endif
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} else {
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LL_SPI_TransmitData8(SPI_INST(obj), (uint8_t)value);
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}
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@ -564,8 +833,12 @@ int spi_master_write(spi_t *obj, int value)
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#endif /* TARGET_STM32H7 */
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/* Read received data */
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if (handle->Init.DataSize == SPI_DATASIZE_16BIT) {
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if (bitshift == 1) {
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return LL_SPI_ReceiveData16(SPI_INST(obj));
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#ifdef HAS_32BIT_SPI_TRANSFERS
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} else if (bitshift == 2) {
|
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return LL_SPI_ReceiveData32(SPI_INST(obj));
|
||||
#endif
|
||||
} else {
|
||||
return LL_SPI_ReceiveData8(SPI_INST(obj));
|
||||
}
|
||||
|
@ -614,8 +887,15 @@ int spi_slave_read(spi_t *obj)
|
|||
struct spi_s *spiobj = SPI_S(obj);
|
||||
SPI_HandleTypeDef *handle = &(spiobj->handle);
|
||||
while (!ssp_readable(obj));
|
||||
if (handle->Init.DataSize == SPI_DATASIZE_16BIT) {
|
||||
const int bitshift = datasize_to_transfer_bitshift(handle->Init.DataSize);
|
||||
MBED_ASSERT(bitshift >= 0);
|
||||
|
||||
if (bitshift == 1) {
|
||||
return LL_SPI_ReceiveData16(SPI_INST(obj));
|
||||
#ifdef HAS_32BIT_SPI_TRANSFERS
|
||||
} else if (bitshift == 2) {
|
||||
return LL_SPI_ReceiveData32(SPI_INST(obj));
|
||||
#endif
|
||||
} else {
|
||||
return LL_SPI_ReceiveData8(SPI_INST(obj));
|
||||
}
|
||||
|
@ -627,21 +907,17 @@ void spi_slave_write(spi_t *obj, int value)
|
|||
struct spi_s *spiobj = SPI_S(obj);
|
||||
SPI_HandleTypeDef *handle = &(spiobj->handle);
|
||||
while (!ssp_writeable(obj));
|
||||
if (handle->Init.DataSize == SPI_DATASIZE_8BIT) {
|
||||
// Force 8-bit access to the data register
|
||||
uint8_t *p_spi_dr = 0;
|
||||
#if TARGET_STM32H7
|
||||
p_spi_dr = (uint8_t *) & (spi->TXDR);
|
||||
#else /* TARGET_STM32H7 */
|
||||
p_spi_dr = (uint8_t *) & (spi->DR);
|
||||
#endif /* TARGET_STM32H7 */
|
||||
*p_spi_dr = (uint8_t)value;
|
||||
} else { // SPI_DATASIZE_16BIT
|
||||
#if TARGET_STM32H7
|
||||
spi->TXDR = (uint16_t)value;
|
||||
#else /* TARGET_STM32H7 */
|
||||
spi->DR = (uint16_t)value;
|
||||
#endif /* TARGET_STM32H7 */
|
||||
const int bitshift = datasize_to_transfer_bitshift(handle->Init.DataSize);
|
||||
MBED_ASSERT(bitshift >= 0);
|
||||
|
||||
if (bitshift == 1) {
|
||||
LL_SPI_TransmitData16(spi, (uint16_t)value);
|
||||
#ifdef HAS_32BIT_SPI_TRANSFERS
|
||||
} else if (bitshift == 2) {
|
||||
LL_SPI_TransmitData32(spi, (uint32_t)value);
|
||||
#endif
|
||||
} else {
|
||||
LL_SPI_TransmitData8(spi, (uint8_t)value);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -704,20 +980,18 @@ static int spi_master_start_asynch_transfer(spi_t *obj, transfer_type_t transfer
|
|||
{
|
||||
struct spi_s *spiobj = SPI_S(obj);
|
||||
SPI_HandleTypeDef *handle = &(spiobj->handle);
|
||||
bool is16bit = (handle->Init.DataSize == SPI_DATASIZE_16BIT);
|
||||
// bool is16bit = (handle->Init.DataSize == SPI_DATASIZE_16BIT);
|
||||
const int bitshift = datasize_to_transfer_bitshift(handle->Init.DataSize);
|
||||
MBED_ASSERT(bitshift >= 0);
|
||||
// the HAL expects number of transfers instead of number of bytes
|
||||
// so for 16 bit transfer width the count needs to be halved
|
||||
// so the number of transfers depends on the container size
|
||||
size_t words;
|
||||
|
||||
DEBUG_PRINTF("SPI inst=0x%8X Start: %u, %u\r\n", (int)handle->Instance, transfer_type, length);
|
||||
|
||||
obj->spi.transfer_type = transfer_type;
|
||||
|
||||
if (is16bit) {
|
||||
words = length / 2;
|
||||
} else {
|
||||
words = length;
|
||||
}
|
||||
words = length >> bitshift;
|
||||
|
||||
// enable the interrupt
|
||||
IRQn_Type irq_n = spiobj->spiIRQ;
|
||||
|
@ -770,7 +1044,8 @@ void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx,
|
|||
// check which use-case we have
|
||||
bool use_tx = (tx != NULL && tx_length > 0);
|
||||
bool use_rx = (rx != NULL && rx_length > 0);
|
||||
bool is16bit = (handle->Init.DataSize == SPI_DATASIZE_16BIT);
|
||||
const int bitshift = datasize_to_transfer_bitshift(handle->Init.DataSize);
|
||||
MBED_ASSERT(bitshift >= 0);
|
||||
|
||||
// don't do anything, if the buffers aren't valid
|
||||
if (!use_tx && !use_rx) {
|
||||
|
@ -781,7 +1056,7 @@ void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx,
|
|||
obj->tx_buff.buffer = (void *) tx;
|
||||
obj->tx_buff.length = tx_length;
|
||||
obj->tx_buff.pos = 0;
|
||||
obj->tx_buff.width = is16bit ? 16 : 8;
|
||||
obj->tx_buff.width = 8 << bitshift;
|
||||
|
||||
obj->rx_buff.buffer = rx;
|
||||
obj->rx_buff.length = rx_length;
|
||||
|
|
Loading…
Reference in New Issue