Define CMSIS_VECTAB_VIRTUAL for the M0 targets which have a
corresponding driver. The only M0 target missing this is the LPC4330_M0
which is not part of the 2 or 5 release.
Restore cmsis_nvic (cmsis_nvic.c and cmsis_nvic.h) files for the
implementations which use a mechanism other than the VTOR to set
interrupts. These are vendor specific and were done for M0 devices
which do not have a VTOR.
Note - There were two cmsis_nvic files which did not use the VTOR that
which not restored in this patch. This is because these targets were
not M0 devices and could use the new unified implementation instead.
These files are:
targets\TARGET_ARM_SSG\TARGET_MPS2\TARGET_MPS2_M0P\device\cmsis_nvic.c
targets\TARGET_ONSEMI\TARGET_NCS36510\device\cmsis_nvic.c
Note - cmsis_nvic.c and cmsis_nvic.h were initial removed in
(and restored from) the commit:
b97ffe8fdc -
"CMSIS5: Replace target defined NVIC_Set/GetVector with CMSIS implementation"
Note that this could have side effects on the application as it would
not be aware that data has been missed. This may be later solved by
adding an error management parameter to the Serial API in mbed.
The advantage is that the serial link can work again.
The use of mktime was causing a fault when called in interrupt handler because on GCC it lock the mutex protecting the environment, To overcome this issue, this patch add dedicated routine to convert a time_t into a tm and vice versa.
In the process mktime has been optimized and is now an order of magnitude faster than the routines present in the C library.
The Ameba RTC driver converts time_t to
second/minute/hour/day/month/year in rtc_write and back to time_t in
rtc_read. Replace this with an implementation which uses time_t
directly.
* Make memory sections configurable in linker files
* Dynamically determine vector location in flash for NVIC relocation
* Advertise bootloader support in targets.json
When using ARM Compiler 5, the RTX config hard-coded the heap and stack
sizes to specific values. This prevented the RTX HAL from dynamically
allocating unused memory as heap space.
Specifically, the HEAP_START define prevents this logic in RTX_CM_lib.h
from activating. The rest of the defines are also set in that header,
and should be removed from here.
* Using PinName as bitfield doesn't work without warnings, since NC
needs all 32 bits to be represented.
* lp_ticker should not be freed when interrupt is disabled, since this
will kill the timebase.
Add MBED_APP_START and MBED_APP_SIZE to the linker scripts
so the start and size of an image can be specified. This allows the
ROM to be split into a bootloader region and an application region.
Fix vector table
The address of the vector table is hardcoded to the start of flash.
This patch updates make it properly handle updating the VTOR with
a bootloader.
When initializing the RTC on Kinetis devices, handle the case where
the time overflow interrupt is pending and the case where the time
alarm flag is pending. These flags persist across reset and if not
handled will cause a crash when powering up the low power ticker.
This problem manifested as a lp_ticker test failure on the K22F and
K64F on CI only when running a nightly. This problem has been present
but was made obvious by PR #4094 which configures all tickers to
interrupt at least every MBED_TICKER_INTERRUPT_TIMESTAMP_MAX_DELTA
(~31 minutes). This caused the RTC alarm to fire 31 minutes after the lp_ticker
or lp_timeout test and caused the next run of the lp_ticker test to
crash on boot.
TimMasterHandle.Instance initialization can be removed from here,
because it will either have been already done previously,
or it will be done in the us_ticker_init() call immediately below.
Following previous fixes on 16 tickers handling, the overflow flag
condition will not happen anymore, so the work-around in place is
not needed anymore
This commit simplifies ticker interrupt set function and handler.
There were issues around the 16 bits timer wrap-around timing as we were
aligning interrupts with wrap-around limits (0xFFFF) and then reading
TIM_MST->CNT again in timer_update_irq_handler which could lead
to crossing case with the wrap-around (TIM_FLAG_UPDATE) case.
Now we're using the 16 lower bits of the timestamp as the reference from
using in set_compare and never changing it. There is also no need to set
comparator again in timer_update_irq_handler. This is more robust and
also more efficient.
Move to a single more reliable implementation of us_ticker_read()
There were historically 2 versions of us_ticker_read() implementation.
The one removed here was not reliable because us_ticker_read() can be
called in interrupt context which means that TIM_MST->CNT would have
wrapped around while SlaveCounter is not yet updated. So there is a need
to check the TIM_FLAG_UPDATE inside this function, which was not done in
the implementation that is removed here.
There is an easy default implementation of spi_master_block_write that
just calls spi_master_write in a loop, so the default implementation
of spi_master_block_write has been added to all targets.
As reported in issue #4214, there are seen issues seen first on
NUCLEO_F103RB in case of successive Reads of 1 byte at a time.
This issue is due to a wrong state management in the end of read sequence.
Also F1 i2c driver was not fully aligned to others, which is updated here.
There were still side effects, in particular on I2C master slave test,
when setting by default the Pin Speed for F1 family. So for F1 family,
let's do it only in case of Output which is the only case where this
actually applies on this family.
For STM32 targets using a 32-bit timer for the microsecond ticker, the
driver did not properly handle timestamps that are in the past. It
would just blindly set the compare register to the requested timestamp,
resulting in the interrupt being serviced up to 4295 seconds late
(i.e. after the 32-bit timer counts all the way around to hit the
timestamp again).
This problem can easily be reproduced by creating a Timeout object
then calling the timeout's attach_us() member function to attach a
callback with a timeout of 0 us. The callback will not get called for
over 2147 seconds, and possibly up to 4295 seconds late if no other
microsecond ticker events are getting scheduled in the meantime.
Now, after the compare register has been set, the timestamp is checked
against the current time to see if the timestamp is in the past, and
if so, the compare event is manually set.
NOTE: By checking if the timestamp is in the past after configuring the
capture register, we ensure proper handling in the case where the timer
updates past the timestamp while setting the capture register.
* Initialization clear interrupt status
* Remove state in management of interrupt
* Handle timestamp in the past
* Handle current seconds, even if out of the relative timestamp.
* Simplify interrupt handling logic.
For keep supporting external APIs with the same name (supposedly there are a larger
number of users of those APIs), BufferedSerial and ATParser are being renamed.
BufferedSerial becomes UARTSerial, will complement a future USBSerial etc.
ATParser becomes ATCmdParser.
* UARTSerial moves to /drivers
* APN_db.h is moved from platform to cellular/util/.
* Original CellularInterface is restored for backward compatability (again, supposedly there
are users of that).
* A new file, CellularBase is added which will now servce as the base class for all
upcoming drivers.
* Special restructuring for the driver has been undertaken. This makes a clear cut distinction
between an on-board or an off-board implementation.
- PPPCellularInterface is a generic network interface that works with a generic FileHandle
and PPP. A derived class is needed to pass that FileHandle.
- PPPCellularInterface provides some base functionality like network registration, AT setup,
PPP connection etc. Lower level job is delegated to the derived classes and various modem
specific APIs are provided which are supposed to be overridden.
- UARTCellularInterface is derived from PPPCellularInterface. It constructs a FileHandle and
passes it back to PPPCellularInterface as well as provides modem hangupf functionality.
In future we could proive a USBInterface that would derive from PPPCellularInterface and could
pass the FileHandle back.
- OnboardCellularInterface is derived from UARTCellularInterfae and provides hooks to
the target provided implementation of onbard_modem_api.h. An off-board modem, i.e, a modem on
a shield has to override the modem_init(), modem_power_up() etc as it cannot use
onboard_modem_api.h.
* Implements CellularInterface
* Reference design for CellularInterface implementations
* Uses an external mbed-os IP stack and talks to modem over PPP.
This provides a HAL layer for Modem bearing devices.
Provides a standard interface to upper layer drivers.
Platform providers will be implementing this API under their
specific targets.
As a reference, two implementations are provided under TARGET_C027 (UBLOX)
and TARGET_MTS_DRAGONFLY_F411RE (MultiTech).
targets.json now contains a tag "MODEM" which tells that this target
has a modem and the modem_api is protected by a flag DEVICE_MODEM
(following the DEVICE_SERIAL fashion ).
* Lays down ground for mbed modem_api
* Standardizes pin names relating to modem device for UBLOX C027 and MTS_DRAGONFLY_F411RE
devices
* Ublox modem api is changed to use a standard, platform independent name so that same
api could be used with multiple ubloc modems.
* DCD Polarity macro is added to assist the driver in knowing correct polarity
There is an easy default implementation of spi_master_block_write that
just calls spi_master_write in a loop, so the default implementation
of spi_master_block_write has been added to all targets.
Reworked the serial_format() function for STM32F0x
devices to take the format in the form:
data_bits - parity - stop_bits
E.g. 8 - N - 1
where data_bits exclude the parity bit.
Added a case for 7 bits data as at least the chips
STM32F0x1/STM32F0x2/STM32F0x8 support 7 bits data.
Consolidated serial_format() and uart_init()
functions into a general TARGET_STM serial_api.c
file since the functions are common to all STM targets.
Fixes#4189
F2 family also require that TIM_AUTORELOAD_PRELOAD_DISABLE is set,
otherwise the field could have undefined value from the stacj and may
lead to undefined behavior.
The error was found using USE_FULL_ASSERT HAL option.
Rather than adding F2 to the list of family, let's set this parameter for
any family where TIM_AUTORELOAD_PRELOAD_DISABLE applies.
When we want to activate USE_FULL_ASSERT macro in STM32 CUBE, there is a
need to have the assert map to MBED.
The easiest way to have this definition in a single place for all STM32
HAL and LL files using it, is to add a specific header file where the
porting to MBED is done.
There is an easy default implementation of spi_master_block_write that
just calls spi_master_write in a loop, so the default implementation
of spi_master_block_write has been added to all targets.
The STM32F3 cmsis_nvic code is currently checking for a specific flash
address when determining if the vector table is in flash or RAM. By
changing the test to instead see if the vector table base is NOT set to
the RAM address, it simplifies the code, and removes the dependency on
the flash vectors being located at a specific address. This becomes
important when adding a custom boot loader, which requires that the
flash vector table location in the mbed project be at a different
address.
Affected boards: NRF51_DK, NRF52_DK, Beetle. This change is temporary and
will be overwritten by RTX update. It's necessary for the boards to pass
updated tests.
According to @betzw, #3424 was put in for I2S with DMA. However, the latest I2S library now works without this patch.
The changes in DMA HAL for this potentially introduced corner case
scenarios. So it's best to revert the DMA changes.
Default timeout of 10ms was reported as an issue in #4300
There seems to be conditions or use cases where the system is loaded with
higher priority tasks so that SPI transfer would be delayed more than 10ms.
Recommendation from MBED team is to not implement any timeout at all as
there is no defined API in MBED to inform application of error cases.
Change the irq_handler parameter of NVIC_SetVector from a function
pointer to a uin32_t so it matches the cmsis specification. This
prevents the following problem from occurring in RTX5 when building
for IAR:
The error: Error[Pe167]: argument of type "void (*)(void)" is incompatible
with parameter of type "uint32_t".
Jimmy Brisson
Sam Grove
Russ Butler
Kevin Gilbert
Andrzej Puzdrowski
Laurent MEUNIER
Vincent Coubard
Steven Cooreman
Mahadevan Mahesh
kl-cruz
Aksel Skauge Mellbye
Andreas Larsson
Anna Bridge
Yuguo Zou
ianqianting
Bradley Scott
arostm
jeromecoutant
Martin Kojtal
mickeyln
Hasnain Virk
Bartek Szatkowski
andreas.larsson
Francisco J. Manno
adustm
Christopher Haster
Shaun Nelson
Leon Lindenfelser
Russ Butler
Matthias L. Jugel
Dave Desrochers
Yoshihiro TSUBOI
Bartosz Szatkowski
Martin Kojtal
Brian Daniels