mirror of https://github.com/ARMmbed/mbed-os.git
minor fixes
correct heap size in icf file; improve REALTEK_RTL8195AM.pypull/4438/head
parent
b20d635882
commit
d75c5dbef0
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@ -3,6 +3,9 @@
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
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/*-Specials-*/
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
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define symbol __ICFEDIT_region_ROM_end__ = 0x000FFFFF;
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@ -10,29 +13,45 @@ define symbol __ICFEDIT_region_TCM_start__ = 0x1FFF0000;
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define symbol __ICFEDIT_region_TCM_end__ = 0x1FFFFFFF;
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define symbol __ICFEDIT_region_ROM_USED_RAM_start__ = 0x10000000;
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define symbol __ICFEDIT_region_ROM_USED_RAM_end__ = 0x10005FFF;
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define symbol __ICFEDIT_region_BD_RAM_start__ = 0x10006000;
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define symbol __ICFEDIT_region_BD_RAM_end__ = 0x1006FFFF;
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define symbol __ICFEDIT_region_SDRAM_RAM_start__ = 0x30000000;
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define symbol __ICFEDIT_region_SDRAM_RAM_end__ = 0x301FFFFF;
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/*-Sizes-*/
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define symbol __ICFEDIT_size_cstack__ = 0x2000; // 8K
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define symbol __ICFEDIT_size_heap__ = 0xF000; // 60K
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define symbol __ICFEDIT_size_heap__ = 0x8000; // 60K
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/**** End of ICF editor section. ###ICF###*/
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define memory mem with size = 4G;
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define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
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define region TCM_region = mem:[from __ICFEDIT_region_TCM_start__ to __ICFEDIT_region_TCM_end__];
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define region ROM_USED_RAM_region = mem:[from __ICFEDIT_region_ROM_USED_RAM_start__ to __ICFEDIT_region_ROM_USED_RAM_end__];
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define region BD_RAM_region = mem:[from __ICFEDIT_region_BD_RAM_start__ to __ICFEDIT_region_BD_RAM_end__];
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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//initialize by copy { readwrite };
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do not initialize { section .noinit };
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/****************************************
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* ROM Section config *
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****************************************/
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@ -57,14 +76,20 @@ define block .rom.bss with fixed order{ section .hal.ram.bss* object hal_misc.o,
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section .hal.ram.bss* object diag.o,
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section .hal.ram.bss* object rtl8195a_ssi_rom.o,
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section .hal.ram.bss* object rtl8195a_gpio.o,
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section .hal.ram.bss*,
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section .timer2_7_vector_table.data*,
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section .infra.ram.bss*,
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section .mon.ram.bss*,
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section .wlan_ram_map* object rom_wlan_ram_map.o,
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section .wlan_ram_map*,
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section .libc.ram.bss*,
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};
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keep { section .start.ram.data* };
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define block .ram.start.table with fixed order{ section .start.ram.data* };
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@ -74,6 +99,7 @@ keep { section .image1.validate.rodata* };
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keep { section .hal.ram.data* };
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define block .ram_image1.data with fixed order{ section .image1.validate.rodata*,
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section .infra.ram.data*,
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//section .timer.ram.data*,
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section .cutb.ram.data*,
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section .hal.ram.data* object rom.o, // for standard libaray __impure_data_ptr
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@ -81,10 +107,13 @@ define block .ram_image1.data with fixed order{ section .image1.validate.rodata*
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section .hal.ram.data*
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};
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//define block .ram_image1.bss with fixed order{ //section .hal.flash.data*,
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// section .hal.sdrc.data*
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// };
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define block .ram_image1.text with fixed order{ section .hal.ram.text*,
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// //section .hal.sdrc.text*,
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// //section .text* object startup.o,
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section .infra.ram.text*,
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@ -103,6 +132,7 @@ place at start of ROM_USED_RAM_region { //readwrite,
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block .rom.bss,
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block IMAGE1
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};
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/**
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IMAGE2
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**/
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@ -112,6 +142,7 @@ define block .image2.start.table1 with fixed order{ section .image2.ram.data* };
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keep { section .image2.validate.rodata*, section .custom.validate.rodata* };
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define block .image2.start.table2 with fixed order{ section .image2.validate.rodata*, section .custom.validate.rodata* };
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/*
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define block SHT$$PREINIT_ARRAY { preinit_array };
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define block SHT$$INIT_ARRAY { init_array };
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@ -126,9 +157,13 @@ define block .ram_image2.text with fixed order{ section .infra.ram.start*,
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section .hal.gpio.text*,
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section .text* object main.o,
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section .text*,
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section CODE,
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section .otg.rom.text,
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section Veneer object startup.o,
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section __DLIB_PERTHREAD
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};
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@ -152,9 +187,18 @@ define block .ram.bss with fixed order{ section .bss*,
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};
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place at start of BD_RAM_region {
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block IMAGE2,
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//readwrite,
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readwrite,
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block .ram.bss,
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};
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place at end of BD_RAM_region{
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@ -162,15 +206,52 @@ place at end of BD_RAM_region{
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//block CSTACK
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};
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/****************************************
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* BD RAM Section config *
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****************************************/
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define block .heap with fixed order{ section .heap* };
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define block .stack_dummy with fixed order { section .stack };
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/*TCM placement */
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define overlay TCM_overlay { //section .tcm.heap,
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//section .bss object mem.o,
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//section .bss object memp.o,
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block .heap,
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block .stack_dummy
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};
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@ -189,3 +270,5 @@ define exported symbol __ram_start_table_start__= 0x10000bc8; // use in rom
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define exported symbol __image1_validate_code__= 0x10000bdc; // needed by ram code
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define exported symbol _rtl_impure_ptr = 0x10001c60; // for standard library
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@ -67,7 +67,6 @@ def prepend(image, image_prepend, toolchain, info):
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def parse_section(toolchain, elf, section):
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info = {'addr':None, 'size':None};
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ret1 = ret2 = None
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if toolchain not in ["GCC_ARM", "ARM_STD", "ARM", "ARM_MICRO", "IAR"]:
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print "[ERROR] unsupported toolchain " + toolchain
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sys.exit(-1)
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@ -101,23 +100,19 @@ def parse_section(toolchain, elf, section):
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match = re.match(r'^\s+' + section + \
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r'\s+0x(?P<addr>[0-9A-Fa-f]{8})\s+0x(?P<size>[0-9A-Fa-f]+)\s+.*<Block>$', line)
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if match:
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ret1 = match.group("addr")
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info['addr'] = int(match.group("addr"), 16)
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try:
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ret2 = match.group("size")
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info['size'] = int(match.group("size"), 16)
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except IndexError:
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pass
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break
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info['size'] = 0x0
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return info
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if not ret1:
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if not info['addr']:
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print "[ERROR] cannot find the address of section " + section
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return 0
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elif not ret2:
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ret2 = '0'
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elif not info['size']:
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if toolchain == "IAR":
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print "[WARNING] cannot find the size of section " + section
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info['addr'] = int(ret1, 16)
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info['size'] = int(ret2, 16)
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return info
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# ----------------------------
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