diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_IAR/rtl8195a.icf b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_IAR/rtl8195a.icf index 4a7ff47c2b..284a5f8822 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_IAR/rtl8195a.icf +++ b/targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_IAR/rtl8195a.icf @@ -3,6 +3,9 @@ /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ /*-Specials-*/ + + + /*-Memory Regions-*/ define symbol __ICFEDIT_region_ROM_start__ = 0x00000000; define symbol __ICFEDIT_region_ROM_end__ = 0x000FFFFF; @@ -10,29 +13,45 @@ define symbol __ICFEDIT_region_TCM_start__ = 0x1FFF0000; define symbol __ICFEDIT_region_TCM_end__ = 0x1FFFFFFF; define symbol __ICFEDIT_region_ROM_USED_RAM_start__ = 0x10000000; define symbol __ICFEDIT_region_ROM_USED_RAM_end__ = 0x10005FFF; + + + define symbol __ICFEDIT_region_BD_RAM_start__ = 0x10006000; + + define symbol __ICFEDIT_region_BD_RAM_end__ = 0x1006FFFF; + define symbol __ICFEDIT_region_SDRAM_RAM_start__ = 0x30000000; define symbol __ICFEDIT_region_SDRAM_RAM_end__ = 0x301FFFFF; /*-Sizes-*/ define symbol __ICFEDIT_size_cstack__ = 0x2000; // 8K -define symbol __ICFEDIT_size_heap__ = 0xF000; // 60K +define symbol __ICFEDIT_size_heap__ = 0x8000; // 60K /**** End of ICF editor section. ###ICF###*/ + define memory mem with size = 4G; define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; define region TCM_region = mem:[from __ICFEDIT_region_TCM_start__ to __ICFEDIT_region_TCM_end__]; define region ROM_USED_RAM_region = mem:[from __ICFEDIT_region_ROM_USED_RAM_start__ to __ICFEDIT_region_ROM_USED_RAM_end__]; + define region BD_RAM_region = mem:[from __ICFEDIT_region_BD_RAM_start__ to __ICFEDIT_region_BD_RAM_end__]; + define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; //initialize by copy { readwrite }; + + do not initialize { section .noinit }; + + + + + /**************************************** * ROM Section config * ****************************************/ @@ -57,14 +76,20 @@ define block .rom.bss with fixed order{ section .hal.ram.bss* object hal_misc.o, section .hal.ram.bss* object diag.o, section .hal.ram.bss* object rtl8195a_ssi_rom.o, section .hal.ram.bss* object rtl8195a_gpio.o, + section .hal.ram.bss*, section .timer2_7_vector_table.data*, + + section .infra.ram.bss*, section .mon.ram.bss*, section .wlan_ram_map* object rom_wlan_ram_map.o, + + section .wlan_ram_map*, section .libc.ram.bss*, }; + keep { section .start.ram.data* }; define block .ram.start.table with fixed order{ section .start.ram.data* }; @@ -74,6 +99,7 @@ keep { section .image1.validate.rodata* }; keep { section .hal.ram.data* }; define block .ram_image1.data with fixed order{ section .image1.validate.rodata*, section .infra.ram.data*, + //section .timer.ram.data*, section .cutb.ram.data*, section .hal.ram.data* object rom.o, // for standard libaray __impure_data_ptr @@ -81,10 +107,13 @@ define block .ram_image1.data with fixed order{ section .image1.validate.rodata* section .hal.ram.data* }; //define block .ram_image1.bss with fixed order{ //section .hal.flash.data*, + + // section .hal.sdrc.data* // }; define block .ram_image1.text with fixed order{ section .hal.ram.text*, + // //section .hal.sdrc.text*, // //section .text* object startup.o, section .infra.ram.text*, @@ -103,6 +132,7 @@ place at start of ROM_USED_RAM_region { //readwrite, block .rom.bss, block IMAGE1 }; + /** IMAGE2 **/ @@ -112,6 +142,7 @@ define block .image2.start.table1 with fixed order{ section .image2.ram.data* }; keep { section .image2.validate.rodata*, section .custom.validate.rodata* }; define block .image2.start.table2 with fixed order{ section .image2.validate.rodata*, section .custom.validate.rodata* }; + /* define block SHT$$PREINIT_ARRAY { preinit_array }; define block SHT$$INIT_ARRAY { init_array }; @@ -126,9 +157,13 @@ define block .ram_image2.text with fixed order{ section .infra.ram.start*, section .hal.gpio.text*, section .text* object main.o, section .text*, + section CODE, section .otg.rom.text, section Veneer object startup.o, + + + section __DLIB_PERTHREAD }; @@ -152,9 +187,18 @@ define block .ram.bss with fixed order{ section .bss*, }; + + + + + + + + + place at start of BD_RAM_region { block IMAGE2, - //readwrite, + readwrite, block .ram.bss, }; place at end of BD_RAM_region{ @@ -162,15 +206,52 @@ place at end of BD_RAM_region{ //block CSTACK }; + + + + + + + + + /**************************************** * BD RAM Section config * ****************************************/ define block .heap with fixed order{ section .heap* }; define block .stack_dummy with fixed order { section .stack }; + + + + + + + + + + + + + + + + + + + + + + + + + + /*TCM placement */ define overlay TCM_overlay { //section .tcm.heap, //section .bss object mem.o, //section .bss object memp.o, + + block .heap, block .stack_dummy }; @@ -189,3 +270,5 @@ define exported symbol __ram_start_table_start__= 0x10000bc8; // use in rom define exported symbol __image1_validate_code__= 0x10000bdc; // needed by ram code define exported symbol _rtl_impure_ptr = 0x10001c60; // for standard library + + diff --git a/tools/REALTEK_RTL8195AM.py b/tools/REALTEK_RTL8195AM.py index 4939da6782..a4b060e711 100644 --- a/tools/REALTEK_RTL8195AM.py +++ b/tools/REALTEK_RTL8195AM.py @@ -67,7 +67,6 @@ def prepend(image, image_prepend, toolchain, info): def parse_section(toolchain, elf, section): info = {'addr':None, 'size':None}; - ret1 = ret2 = None if toolchain not in ["GCC_ARM", "ARM_STD", "ARM", "ARM_MICRO", "IAR"]: print "[ERROR] unsupported toolchain " + toolchain sys.exit(-1) @@ -101,23 +100,19 @@ def parse_section(toolchain, elf, section): match = re.match(r'^\s+' + section + \ r'\s+0x(?P[0-9A-Fa-f]{8})\s+0x(?P[0-9A-Fa-f]+)\s+.*$', line) if match: - ret1 = match.group("addr") + info['addr'] = int(match.group("addr"), 16) try: - ret2 = match.group("size") + info['size'] = int(match.group("size"), 16) except IndexError: - pass - break + info['size'] = 0x0 + return info - if not ret1: + if not info['addr']: print "[ERROR] cannot find the address of section " + section - return 0 - elif not ret2: - ret2 = '0' + elif not info['size']: if toolchain == "IAR": print "[WARNING] cannot find the size of section " + section - info['addr'] = int(ret1, 16) - info['size'] = int(ret2, 16) return info # ----------------------------