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414 Commits (14714a8055a68b699107fa0b2b51bc3d76c40b46)

Author SHA1 Message Date
Mathias Brossard ccbb26e2f3 LPC55S69: fix cosFactor data size in header file 
The file 'fsl_powerquad_data.h' declares several dctXXX_cosFactor
arrays with sizes twice larger compared to the actual definitions in
'fsl_powerquad_data.c'.
 2019-06-19 15:17:18 -05:00
Martin Kojtal 3ea1c56124
Merge pull request #10147 from kjbracey-arm/atomic_bitwise 
Assembler atomics
 2019-05-13 14:18:05 +01:00
Wajahat Abbas fd0a2c7e29 C027 Fix for modemOn flag 2019-05-03 14:34:28 +05:00
Mahesh Mahadevan 39975b818d LPC55S69: Add support for UART hardware flow control 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-04-29 14:18:35 -05:00
Kevin Bracey 87396e0bf6 Assembler atomics 
Reimplement atomic code in inline assembly. This can improve
optimisation, and avoids potential architectural problems with using
LDREX/STREX intrinsics.

API further extended:
* Bitwise operations (fetch_and/fetch_or/fetch_xor)
* fetch_add and fetch_sub (like incr/decr, but returning old value -
  aligning with C++11)
* compare_exchange_weak
* Explicit memory order specification
* Basic freestanding template overloads for C++

This gives our existing C implementation essentially all the functionality
needed by C++11.

An actual Atomic<T> template based upon these C functions could follow.
 2019-04-26 13:12:35 +03:00
Martin Kojtal b6a2c7b63f
Merge pull request #10019 from deepikabhavnani/uarm_fix 
uARM - Move heap region after IRAM1
 2019-04-18 12:49:56 +01:00
Martin Kojtal 3ec9c190d0
Merge pull request #10314 from kjbracey-arm/rt1050_dcache 
i.MX RT1050: Reactivate data cache
 2019-04-18 09:49:13 +01:00
Martin Kojtal 93dc5514f2
Merge pull request #10334 from NXPmicro/MXRT1050_FixTestFailure 
MXRT1050_EVK: Fixes test failure seen with ARM & IAR toolchain
 2019-04-16 08:45:46 +01:00
Kevin Bracey b1ba4fe7ec LPC55S69: Cast to cope with const mismatch 2019-04-11 14:57:20 +03:00
Kevin Bracey c89c2809ea LPC55S69: Fix APB bridge security programming 
Spotted in compiler warnings - code was trying to access a non-existent
second security control block, rather than access the settings for the
second APB bridge in the first and only security control block.
 2019-04-11 14:49:54 +03:00
Deepika 36c7b2de86 uARM - Move heap region after IRAM1 
ARM_LIB_HEAP start is aligned to IRAM1 end, hence should be placed next to
RW_IRAM1 i.e. no other region in between.
 2019-04-09 12:01:01 -05:00
Mahesh Mahadevan 5f7f71e7e5 MXRT1050_EVK: Fixes test failure seen with IAR and ARM toolchains 
Fixes test failure seen with tests-mbed_hal-stack_size_unification
under IAR and ARM toolchain

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-04-08 13:42:46 -05:00
Kevin Bracey 6fe50763f3 i.MX RT1050: Reactivate data cache 
Since commit 12c6b1bd8, the i.MX RT1050 has effectively had its data
cache disabled, as the SDRAM was marked Shareable; for the Cortex-M7,
shareable memory is not cached.

This was done to make the Ethernet driver work without any cache
maintenance code. This commit adds cache maintenance and memory barriers
to the Ethernet driver, and removes the Shareable attribute from the
SDRAM, so the data cache is used again.

Cache code in the base fsl_enet.c driver has not been activated - the
bulk of it is in higher-level Read and Write calls that we're not using,
and there is one flawed invalidate in its initialisation. Instead
imx_emac.cpp takes full cache responsibility.

This commit also marks the SDRAM as read/write-allocate. As the
Cortex-M7 has its "Dynamic read allocate mode" to automatically switch
back to read-allocate in cases where write allocate is working poorly
(eg large memset), this should result in a performance boost with no
downside.

Activating write-allocate is also an attempt to provoke any flaws in
cache maintenance - the Ethernet transmit buffers for example will be
more likely to have a little data in the cache that needs cleaning.
 2019-04-04 12:06:24 +03:00
Mahesh Mahadevan 1b9531d1af LPC55S69: Update Flash driver to set clock frequency 
This is to ensure the flash access time is set correctly

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-04-01 12:10:24 -05:00
Michael Schwarcz a91f17e824 LPC targets: Compile us_ticker.c only if USTICKER defined 2019-03-26 09:52:18 +02:00
David Saada eb5cef84fd Add bootloader support for the LPC55S69 board 
bla
 2019-03-16 00:13:40 +02:00
Oren Cohen 2ea13e6149 "Update secure binaries for LPC55S69_S" 2019-03-14 17:03:06 +02:00
Michael Schwarcz dca3ebe9f6 LPC55S69_S: reduce ITS size to 32KB 
- Reduce LPC55S69 secure side ITS from 64KB to 32KB
 2019-03-14 15:49:44 +02:00
Michael Schwarcz 546e33df7b Update NS IAR icf file 2019-03-13 18:21:37 +02:00
Michael Schwarcz f6ab217892 Reduce 32KB from LPC55S69_S binary size 2019-03-13 18:21:37 +02:00
Alexander Zilberkant 661613c998 Rename psa_system_reset to mbed_psa_system_reset 
add noreturn attributes
update lifecycle service to use psa/error.h
fix doxygen
 2019-03-11 10:43:19 +02:00
Mahesh Mahadevan 862961ced5 Updated the binaries 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:33:49 -06:00
Mahesh Mahadevan 4a2dbba7a1 Reduce the number of flash operation related veneer table entries 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:33:48 -06:00
Michael Schwarcz 401580f364 LPC55S69: Change post-build hook to create HEX 2019-03-08 07:33:48 -06:00
Michael Schwarcz ebd9dc83f7 LPC55S69: Use find_secure_image in post-build and add prebuilt secure images 2019-03-08 07:33:48 -06:00
Mahesh Mahadevan 2e9bb17596 MCUXpresso: Update Analogin support 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:59 -06:00
Mahesh Mahadevan 616fa49890 LPC55S69: Add a ctimer for usticker to be used in the secure domain 
CTIMER 0 is used for the secure domain and CTIMER 1 is used for
the non-secure domain

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:59 -06:00
Mahesh Mahadevan 66eb3deca8 LPC55S69: Fix the I2C SDK driver 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:59 -06:00
Mahesh Mahadevan 3d82af0afe LPC55S69: Remove FPU_PRESENT and DSP_PRESENT defines 
These are defined by mbed during compile

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:58 -06:00
Mahesh Mahadevan 98c8aa1ddd MCUXpresso: Update the sleep implementation for LPC55S69 differences 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:58 -06:00
Mahesh Mahadevan b4aaad0f14 Add support for LPC55S69 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:58 -06:00
Mahesh Mahadevan bb2a155ae5 MCUXpresso: Update LPC HAL flash driver 
The flash driver for the LPC55S69 is different from
prior LPC family. Move the Flash HAL driver to SoC
specific folder

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:57 -06:00
Mahesh Mahadevan 5853af76ee MCUXpresso: Update LPC TRNG driver 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:57 -06:00
Mahesh Mahadevan dd21e6dc5a MCUXpresso: Update SPI driver 
Move the clock setup and peripheral reset to the init function

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:57 -06:00
Mahesh Mahadevan 783c02d0a2 MCUXpresso: Update LPC I2C, SPI, UART HAL drivers 
Use the individual IP count and not the FlexComm count

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:57 -06:00
Mahesh Mahadevan a934ba0b5a MCUXpresso: In pin_function() use mask macro instead of a hard-coded value 
The mask size can vary based on the platform

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:57 -06:00
Mahesh Mahadevan a64b192081 MCUXpresso: Update the LPC GPIO drivers 
Update to the latest SDK GPIO driver

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:57 -06:00
Mahesh Mahadevan c05a893111 MCUXpresso: Update usticker driver 
Move clock frequency to a target specific function

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:56 -06:00
Deepika 6ab48b1863 Update linker scripts for LPC824 and Wiznet 2019-02-28 19:54:38 -06:00
deepikabhavnani 944483b0f7 Add missing SHEBANG = #! armcc -E 2019-02-28 19:54:38 -06:00
deepikabhavnani 75040535ed Addressed review comments to correct size values 2019-02-28 19:54:38 -06:00
deepikabhavnani 0ff2d42143 Heap and stack size picked from linker files,export symbols not needed 2019-02-28 19:54:38 -06:00
deepikabhavnani 0dc5561991 Guard RAM start and size defines 2019-02-28 19:54:38 -06:00
deepikabhavnani 4b95b51e1b Target_Freescale: Add ARM_LIB_STACK and ARM_LIB_HEAP section 
Instead of user defined symbols in assembly files or C files,
use linker scripts to add heap and stack - this is inconsistent
with ARM std linker scripts
 2019-02-28 19:54:38 -06:00
deepikabhavnani c91d35ccc8 Target_NXP: Add ARM_LIB_STACK and ARM_LIB_HEAP section 
Instead of user defined symbols in assembly files or C files,
use linker scripts to add heap and stack - this is inconsistent
with ARM std linker scripts
 2019-02-28 19:54:38 -06:00
deepikabhavnani 60e7a7da98 Add heap section to linker file 2019-02-19 15:49:49 -06:00
Deepika 57b9ccc517 Target_NXP: Setup heap limit and size 2019-02-19 15:49:49 -06:00
Cruz Monrreal 31519eff4a
Merge pull request #9667 from deepikabhavnani/NXP_linker 
Linker files for LPC11U68 and LPC1549 updated
 2019-02-15 11:39:55 -06:00
deepikabhavnani 818d38b6ae Only GCC_ARM toolchain is supported, removing legacy code 2019-02-13 16:26:22 -06:00
Deepika 80eb887f5b Update linker files and resolve build issue 
Linker files for LPC11U68 and LPC1549 updated as Mbed OS memory model
1.	LPC1549
Has multiple memory banks, 4K bank used for stack exclusively and 16K for Heap
Its is mbed 2 only target hence 4K for stack.

2.	LPC11U68
Added Heap and Stack sections in linker files. Resolved build issues.
 2019-02-11 14:44:41 -06:00
Russ Butler 800708569d Add testing pinmaps to LPC15XX and LPC8XX devices 
Add pinmap tables to the LPC15XX and LPC8XX families to allow testing.
 2019-02-08 09:10:49 -06:00
Russ Butler 8669417e7b Add HAL API for spi pinmap 
Add the functions to get spi pinmaps to all targets.
 2019-02-08 09:10:37 -06:00
Russ Butler 34c176654d Add HAL API for serial pinmap 
Add the functions serial_tx_pinmap, serial_rx_pinmap, serial_cts_pinmap
and serial_rts_pinmap to all targets.
 2019-02-08 09:10:28 -06:00
Russ Butler 2ed1dc2bfa Add HAL API for qspi pinmap 
Add the functions qspi_master_sclk_pinmap, qspi_master_ssel_pinmap and
qspi_master_data0_pinmap-qspi_master_data3_pinmap to all targets with
qspi support.
 2019-02-08 09:10:25 -06:00
Russ Butler be492fe07a Add HAL API for pwmout pinmap 
Add the function pwm_pinmap to all targets.
 2019-02-08 09:10:19 -06:00
Russ Butler 22a89773fa Add HAL API for i2c pinmap 
Add the functions i2c_master_sda_pinmap, i2c_master_scl_pinmap,
i2c_slave_sda_pinmap and i2c_slave_scl_pinmap to all targets.
 2019-02-08 09:10:12 -06:00
Russ Butler 7e8695a2c5 Add HAL API for can pinmap 
Add the functions can_rd_pinmap and can_td_pinmap to all targets.
 2019-02-08 09:10:10 -06:00
Russ Butler 3bd3aca6db Add HAL API for analog out pinmap 
Add the function analogout_pinmap to all targets.
 2019-02-08 09:10:05 -06:00
Russ Butler 4818f88d73 Add HAL API for analog in pinmap 
Add the function analogin_pinmap to all targets.
 2019-02-08 09:09:51 -06:00
Nir Sonnenschein 8c2ad14ace
Merge pull request #9568 from ARMmbed/feature-cellular-refactor 
Merge feature cellular refactor
 2019-02-07 18:17:32 +02:00
Martin Kojtal d7a442b717
Merge pull request #9593 from c1728p9/standard_form_factor 
Standardize Arduino form factor
 2019-02-05 10:51:32 +01:00
Russ Butler ba30a4aa24 Define Arduino pins for the LPC812 
Define the unconnected Arduino pins to NC so they are all defined.
 2019-02-02 10:56:27 -06:00
Russ Butler 3e10418015 Define USBTX and USBRX for targets missing it 
Define USBTX and USBRX for the LPC11U37H and the MTS_MDOT_F405RG.
 2019-02-02 09:46:29 -06:00
Mahesh Mahadevan 00477ddf68 LPC546XX, MIMXRT1050: Update to fix ARMC6 build failures 
Fix for issue 9402

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-01-29 14:21:44 -06:00
Ari Parkkila 7578d5b174 Cellular: Fix mbed2-build of onboard-modems 2019-01-29 01:08:17 -08:00
Maciej Bocianski a1311f813c ARCH_PRO: add SPI pin definitions 2019-01-24 09:20:29 +01:00
Martin Kojtal a6509cf47f
Merge pull request #9438 from c1728p9/qspi_update 
Use dedicated PinMap for each QSPI data line
 2019-01-23 14:25:14 +01:00
Russ Butler 82b131aa59 Use dedicated PinMap for each QSPI data line 
Split PinMap_QSPI_DATA into PinMap_QSPI_DATA0 - PinMap_QSPI_DATA3.
This allows pins to be selected more accurately.
 2019-01-22 12:11:15 -06:00
Ari Parkkila af0d2cf61d Cellular: Update API description to match better onboard_modem_api 2019-01-22 02:24:45 -08:00
Ari Parkkila c4de2f2f0e Cellular: Power API updated to match onboard_modem_api 2019-01-22 02:24:45 -08:00
Ari Parkkila 269d151b12 Cellular: Default modem drivers with FF_ARDUINO 2019-01-22 02:24:45 -08:00
Ari Parkkila 75caa75a96 Cellular: Add get_target_default_instance in CellularDevice 2019-01-22 02:24:45 -08:00
Mahesh Mahadevan a11e201805 LPC546XX, LPC54114: Add README and LICENSE files for the power libraries 
This is a fix for Issue#9254

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-01-11 14:50:47 -06:00
Przemyslaw Stekiel 3b170118f3 [NXP] Support boot stack size configuration option 2019-01-08 15:32:04 +01:00
Martin Kojtal 63eca294a1
Merge pull request #9163 from InfernoEmbedded/fix-8913-partner 
Don't use define checks on DEVICE_FOO macros (partner code)
 2019-01-07 16:37:24 +00:00
Anna Bridge 70956ee9bb
Merge pull request #8955 from ARMmbed/dreemkiller_LPC54608_fix 
Bug fix for UART issue on LPC54608 - issue #7398
 2018-12-24 12:54:54 +00:00
Alastair D'Silva aa80b7c70a Don't use define checks on DEVICE_FOO macros (partner code) 
The DEVICE_FOO macros are always defined (either 0 or 1).

This patch replaces any instances of a define check on a DEVICE_FOO
macro with value test instead.

Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
 2018-12-20 20:02:29 +11:00
fluidblue 96b345444b Removed GCC_CR toolchain for LPC11U68 2018-12-17 15:54:13 +01:00
Fluidblue c9eb60c6e2
Prevent multiple __aeabi_atexit definition linker error (GCC_CR) 2018-12-17 15:01:00 +01:00
Fluidblue 69ef8043a6
Prevent multiple __aeabi_atexit definition linker error (GCC_ARM) 2018-12-17 15:00:27 +01:00
JojoS62 cb72db2249 fixed wrong __StackTop calculation 
StackTop calculation was not adjusted when ram size was increased by using al 3 ram regions.
This caused memory allocation failures althogh enough free heap was reported
 2018-12-05 14:50:52 +01:00
Derek Miller d1ae8b2604 Bug fix for UART issue on LPC54608 - issue #7398 2018-12-03 16:17:49 -06:00
Mahesh Mahadevan 49c9f7f73d LPC546XX: Fix build failure due to incorrect merge 
Commit ab84d2bf33 missed including
qspi_device.h file

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-11-27 09:42:52 -06:00
Jimmy Brisson 75200144ad Update mbed_rtx.h switch for new target naming 2018-11-19 09:37:17 -06:00
Jimmy Brisson ab84d2bf33 *LPC546XX: Finish MCU Refactoring 
### Description

The Mbed 2 release was broken for FF_LPC546XX as it would include
the entire mbed 2 build of the LPC546XX. This PR seperates these 2
builds completely by:

 * Removing non-shared extra labels from the MCU_LPC546XX target
 * Moving the target implementation to a shared target directory

### Pull request type

    [x] Fix
    [ ] Refactor
    [ ] Target update
    [ ] Functionality change
    [ ] Breaking change
 2018-11-19 09:37:17 -06:00
Martin Kojtal 00c5b56e32
Merge pull request #8683 from NXPmicro/feature-qspi-lpc546xx 
Feature qspi lpc546xx
 2018-11-19 13:11:44 +00:00
Mahesh Mahadevan f8f9faa841 LPC566XX LPCXpresso: Update to add QSPI support 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-11-16 07:56:29 -06:00
Mahesh Mahadevan 4bbf0025b8 LPC MCUXpresso: Add QSPI support 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-11-16 07:56:28 -06:00
Mahesh Mahadevan fffb37534e LPC546XX: Update the SPIFI SDK driver 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-11-14 09:00:34 -06:00
Mahesh Mahadevan d5cf53aba1 MIMXRT1050_EVK: Update the SDK clock driver 
This fixes build failures seen with GCC_ARM

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-11-14 07:13:07 -06:00
Mahesh Mahadevan 12c6b1bd88 MIMXRT1050EVK: Add ENET support 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-11-14 07:13:07 -06:00
Cruz Monrreal II b353136da1 Merge branch 'Fix_LPC_Flash_Driver' of ssh://github.com/NXPmicro/mbed into rollup 2018-11-08 13:24:26 -06:00
David Saada 542744d03c Support erase value in Flash HAL drivers, FlashIAP and block devices 2018-11-07 14:23:07 +02:00
Mahesh Mahadevan 48d4a45345 MCUXpresso: Update LPC Flash driver program page function 
Handle the case where the number of bytes to write is not aligned
to page size

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-10-24 08:20:00 -05:00
Martin Kojtal 5b25b6643d
Merge pull request #8478 from JarkkoPaso/fhss_timer_dev 
Fhss timer dev
 2018-10-24 09:43:13 +01:00
Jarkko Paso de2fce2104 LPC408X: Cstack size reduced from 8K to 1K with IAR 2018-10-23 15:09:12 +03:00
Mahesh Mahadevan 118bde5a14 LPC54608: Raise the core freq on LPC54608 targets 
This is incorrectly set to a lower value

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-10-19 12:49:28 -05:00
Cruz Monrreal 9f98d39d1f
Merge pull request #8122 from thesupershan/master 
LPC1768 us_ticker.c timer choice
 2018-10-10 11:07:26 -05:00
Cruz Monrreal 73f1d4cabd
Merge pull request #8186 from deepikabhavnani/freescale_align_fix 
Freescale/NXP: Fix alignment of execute region to 8byte boundary
 2018-10-10 08:43:51 -05:00
Martin Kojtal c48c2ec89f
Merge pull request #7998 from NXPmicro/MIMXRT1050_Add_RTC 
MIMXRT1050_EVK: Add RTC support
 2018-10-01 11:47:10 +02:00
Martin Kojtal b1011bf12e
Merge pull request #7896 from alrodlim/master 
Fix pin names of MIMXRT1050 I2C pins
 2018-10-01 11:43:43 +02:00
Cruz Monrreal b3fe04f68a
Merge pull request #8099 from NXPmicro/Fix_MXRT_PWM 
MIMXRT1050_EVK: Fix the PWM Hal driver
 2018-09-26 11:38:56 -05:00
alrodlim 7d9263d2ef Move I2C pins definition so that A4 and A5 are defined before using them 2018-09-24 09:46:11 -05:00
Deepika c673d5344c NXP: Fix alignment of execute region to 8-byte boundary 
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files (GCC and IAR as well to have uniformity)
should strictly align to 8-byte boundary
 2018-09-19 09:45:46 -05:00
Martin Kojtal 8604f80a8e
Merge pull request #8010 from NXPmicro/NXP_Fix_UART_Parity_Sel 
NXP: Update serial driver's parity handling
 2018-09-17 14:46:58 +02:00
thesupershan e5000abd93 Merge pull request #1 from thesupershan/lpc1768-us-ticker 
choose which lpc1768 timer to use for us_ticker.c
 2018-09-13 11:56:58 -07:00
Aleshandre Diaz 190803ae6a choose which lpc1768 timer to use for us_ticker.c 2018-09-13 05:57:13 -07:00
Mahesh Mahadevan 3661dc7e71 MIMXRT1050_EVK: Fix the PWM Hal driver 
1. Add Pin defines for missing PWM pins
2. Update the hal to account for the number of PWM instances
3. Fix the register reload policy
4. Configure the XBAR to put the PWM fault inputs in inactive state

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-09-12 08:52:39 -05:00
Cruz Monrreal ff1a0ede1f
Merge pull request #7995 from yossi2le/revert-pinnames-files 
Reverting PinNames.h after PR #7774 changes
 2018-09-06 13:20:43 -05:00
Mahesh Mahadevan 16ff8e7369 NXP: Update serial driver's parity handling 
This is a fix for issue 6305. This fix set the default
parity value to NONE.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-09-05 13:30:36 -05:00
Cruz Monrreal dc45990a58
Merge pull request #7904 from NXPmicro/MIMXRT1050_Fix_Spi 
MIMXRT1050_EVK: Update SPI HAL driver
 2018-09-05 09:18:58 -05:00
Mahesh Mahadevan a8fca70fa9 MIMXRT1050_EVK: Add RTC support 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-09-05 08:29:37 -05:00
Yossi Levy acfda5895e Changes in PR #7774 of PinNames.h should be reverted. This commit reverts those files excpet for K82F and K64F which are left as an example 2018-09-05 14:13:05 +03:00
Yossi Levy ed8e170d15 Moving SD, SPIF and FLASHIAP into mbedos and refactoring features storage directory structure. 2018-08-29 12:01:11 +03:00
Mahesh Mahadevan 2bc140e978 MIMXRT1050_EVK: Update SPI HAL driver 
Use a different SDK API to write to the SPI Bus

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-08-27 14:20:49 -05:00
alrodlim 90689c3191 fixed pin names of I2C pins 2018-08-27 07:29:07 -05:00
Mahesh Mahadevan f71004cf89 MIMXRT1050: Fix I2C Byte transfer functions 
1. Added a flag to issue START command
2. Do not send START command inside i2c_start function as
   the LPI2C hardware will issue a STOP on reception
   of a NACK
3. Remove the i2c_address global variable, this is not
   required

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-08-21 10:25:00 -05:00
Mahesh Mahadevan 64e5eb01d2 MIMXRT1050_EVK: Update the I2C driver 
1. Remove the repeated_start flag and code as this is not needed
   for the LPI2C module
2. Enable the SION bit on the I2C pins
3. Enable 22K Pullup option of the I2C pins
4. Update the 0 byte write implementation to ensure the START
   command gets flushed out of the FIFO

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-08-17 15:03:35 -05:00
Mahesh Mahadevan 74c96b6359 MXRT1050_EVK: Sleep: add pre/post processing steps 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-08-06 11:55:32 -05:00
Mahesh Mahadevan e18e0f12f4 MXRT1050_EVK: Ensure certain low power function are linked to internal memory 
Low power functions related to powering off FLEXSPI and SDRAM needs
to be copied to internal memory

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-08-06 11:55:13 -05:00
Mahesh Mahadevan a1d8298057 MIMXRT1050_EVK: Add Low Power Manager files 
This is needed to support different Low-Power modes available
in MXRT1050

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-08-06 10:36:16 -05:00
Przemyslaw Stekiel ace821017f Add implementation of ticker_free() function to CI boards. 
This PR provides implementation of ticker_free() function for the following boards:
ARCH_PRO
EV_COG_AD3029LZ
EV_COG_AD4050LZ
K22F
K64F
K82F
KW24D
KW41Z
LPC546XX
NRF51_DK
NRF52_DK
NUCLEO_F207ZG
NUCLEO_F401RE
NUCLEO_F429ZI
NUCLEO_F746ZG
REALTEK_RTL8195AM
 2018-08-02 09:48:10 +02:00
Przemyslaw Stekiel c0ee843d63 Add lp/us ticker_free() functions stub. 
This patch adds only empty stubs of `us_ticker_free()` and `lp_ticker_free()` for all boards where these functions are not implemented.
 2018-07-25 08:58:38 +02:00
Cruz Monrreal 69d8c0bac3
Merge pull request #7429 from codeauroraforum/MXRT_Fix_AnalogIn 
MXRT1050: Ensure the pins are in input mode for analogin
 2018-07-06 11:24:40 -05:00
Mahesh Mahadevan 19b6ef2e87 MXRT1050: Ensure the pins are in input mode for analogin 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-07-05 17:23:07 -05:00
Mahesh Mahadevan c24d158fb4 MIMXRT1050_EVK: Move clock enable after check of pin 
Enable clock could return an error if pin is NC

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-07-05 10:59:00 -05:00
Mahesh Mahadevan 9b48f3978a MIMXRT1050_EVK: Fix the GPIO IRQ number assignements 
Use the GPIO_Combined IRQ array

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-07-04 11:53:47 -05:00
Mahesh Mahadevan 34dab4a4d9 LPC546XX: Fix UART mux setting in the LPCXpresso board 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-07-02 15:16:57 -05:00
Mahesh Mahadevan 632892d355 MIMXRT1050: Update to EVK Rev B 
1. Add the IVT header to the binary as this is required for boot up
   This was earlier added by the DAPLink firmware. As it is no longer
   handled in DAPLink, the header needs to be added inside mbed.
2. Update drivers

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-06-21 13:34:12 -05:00
canhkha c64971c100
Fix lpc43xx serial pin map compiling error 2018-06-20 13:59:48 +07:00
Cruz Monrreal 31df3d2865
Merge pull request #7242 from davidsaada/david_uniform_text_region 
Rename text region in ARM linker file for a few NXP CPUs
 2018-06-19 09:45:23 -05:00
Cruz Monrreal f2b72b9914
Merge pull request #7201 from codeauroraforum/Fix_ADC_LPC54628 
LPC54628: Update the ADC clock divider based on the input clock source
 2018-06-18 10:08:38 -05:00
David Saada 714d025f6c Rename text region in ARM linker file for a few NXP CPUs 2018-06-18 17:32:01 +03:00
Mahesh Mahadevan 8c6098229b LPC54628: Update the ADC clock divider based on the input clock source 
1. Problems were seen on the LPC54628 as the ADC clock source was too
   high
2. Moved the pin configuration to set Analog mode to the end of the
   function

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-06-12 12:57:31 -05:00
David Saada 9e5efbcfd5 Fix flash_program_page API in LPC boards. 
This API allocates a program buffer of 256 on the stack to ensure alignment.
However, FlashIAP driver already ensures this alignment of the user data.
 2018-06-12 15:09:05 +03:00
Wilfried Chauveau 1c7b91aa8c us_ticker is not yet initialised at this stage 2018-05-30 15:01:18 +01:00
Bartek Szatkowski a305d849a8 Rename LOWPOWERTIMER to LPTICKER 2018-05-25 13:06:56 -05:00
Mahesh Mahadevan f7c6e555f3 MCUXpresso: Enable RTC on LPC54114 and LPC546XX 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-05-25 13:03:46 -05:00
Mahesh Mahadevan fb622a2081 MIMXRT1050_EVK: Update lpticker implementation 
Use only the GPT module and avoid using RTC.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-05-25 12:33:41 -05:00
Mahesh Mahadevan 774de11d1f MCUXpresso: Enable usticker on MIMXRT1050_EVK 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-05-25 12:32:38 -05:00
Mahesh Mahadevan 659be61e4b MCUXpresso: Enable usticker for LPC546XX and LPC54114 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-05-25 12:32:38 -05:00
Mahesh Mahadevan 870600400d LPC1768: Enable usticker 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-05-25 12:30:53 -05:00
Bartek Szatkowski 6e9f04bf2f Rename DEVICE_LOWPOWERTIMER to DEVICE_LPTICKER 
That's to match DEVICE_USTICKER.
 2018-05-25 12:20:09 -05:00
Martin Kojtal b7682183b8 Sleep: add time requirements for sleep 
Sleep - within 10us
Deepsleep - within 10ms

Note about mbed boards with interface, moved to lpc176x, as they are target related,
should be documented in the target documentation.

The tests will come as separate PR, to conform to this updates to sleep API.
 2018-05-25 12:03:37 -05:00
Kevin Bracey 97b9980c8c LPC546XX: Correct Ethernet MAC address write 
Patch to LPC546XX SDK code - write the low Ethernet MAC address
register last, as that synchronises the update.

Without this change, the ENET_SetMacAddr call only seems to work prior
to MAC initialisation, causing problems for the new mbed OS EMAC system,
which expects it to be changable later.

Updated emac greentea tests #6851.
 2018-05-23 12:25:21 +03:00
Cruz Monrreal 4e1c04feba
Merge pull request #6734 from codeauroraforum/Fix_LPC54XXX_GPIO 
LPC54XXX: Set the pin function to Digital mode
 2018-04-26 20:17:07 -05:00
Mahesh Mahadevan 6513091173 LPC546XX: Add check for GPIO IRQ 
GPIO IRQ is available on pins for Ports 0 & 1. Add
a check to return error for other ports.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-04-24 14:26:20 -05:00
Mahesh Mahadevan 2670f790ce LPC546XX: Set the pin function to Digital mode 
We cannot rely on the default value as a pin could
be use for Analog purposes in which this bit is cleared

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-04-24 11:24:23 -05:00
Martin Kojtal cba28cc0ac
Merge pull request #6221 from codeauroraforum/Add_RNG_LPC54XXX 
LPC546XX: Add TRNG support
 2018-04-18 14:25:56 +02:00
Cruz Monrreal 1cc78f864c
Merge pull request #6647 from codeauroraforum/Fix_LPC54xxx_I2C 
Fix MCUXpresso LPC I2C driver
 2018-04-17 10:56:10 -05:00
Cruz Monrreal 7489401044
Merge pull request #6468 from codeauroraforum/Fix_DeepSleep_Implementation 
Fix deep sleep implementation
 2018-04-17 10:53:27 -05:00
Mahesh Mahadevan 6e9f99ca93 MCUXpresso: Fix LPC I2C driver for byte operations 
The ci-shield tests that manually generate the START, STOP
by calling the HAL functions were failing. The byte operation
HAL functions cannot use the MCUXpresso SDK driver API's.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-04-16 16:35:34 -05:00
Mahesh Mahadevan 69a950c6eb MCUXpresso: Fix SDK LPC driver 
Poll the Pending bit after START and STOP operations to ensure
operation completion.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-04-16 16:35:34 -05:00
Cruz Monrreal 4ff1a49d17
Merge pull request #6541 from jorisa/lpc11c24-spfix 
Add mbed-os 5 build support for LPC11C24
 2018-04-16 10:45:06 -05:00
Andreas Rebert 01d06a9f51 LPC4088: Fix hardfault occuring after power-cycle 
Since revision 5499db1 (mbed-os-5.6.0) a hardfault occurs after a power-cycle.
It doesn't occur after a reset when the application has been downloaded using
drag-and-drop or via debugger. This is probably the reason why this problem
isn't detected when testing new mbed releases.

The hardfault occured in hal_sleep(). Adding a __NOP after __WFI solves the
problem although I don't fully understand why.

- Revision ca661f9 is the last revision where the problem doesn't occur.
- The problem doesn't occur when compiling with GCC instead of ARM compiler
- This issue describes a similar, but not identical problem and led me to test adding a __NOP: https://github.com/ARMmbed/mbed-os/issues/5065
 2018-04-11 11:13:43 +02:00
Mahesh Mahadevan 9a1e749780 LPC546XX: Fix deepsleep implementation 
Add a check to return to 220MHz on LPC54628

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-04-10 08:16:41 -05:00
Joris Aerts f8a06640c1 Add mbed5 build support for LPC11C24 2018-04-03 16:45:16 +02:00
Mahesh Mahadevan 76c8a1bf7e LPC546XX: Add TRNG support 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-03-30 14:12:39 -05:00
toyowata 3acdc81e6d Add alignment check in the flash_program_page 
* Add source address word alignment check
* malloc and memcpy are called only if data is unaligned
* malloc size is now copySize (program page size), rather than whole buffer to be written
 2018-03-27 23:04:26 +09:00
toyowata d76d511969 LPC176X: Fix flash program size 
This patch fix flash write issue when program size is more than page size (= 1024 bytes).  See detail - https://github.com/ARMmbed/mbed-os/issues/6165
Source data always use aligned data in heap memory.
 2018-03-21 18:36:16 +09:00
Cruz Monrreal 95fb33f041
Merge pull request #6198 from codeauroraforum/Add_LPC54XXX_Flash_Support 
Flash support: Add flash support for LPC54114 & LPC546XX
 2018-03-15 10:49:08 -05:00
Cruz Monrreal 5523d53f83
Merge pull request #6287 from codeauroraforum/Update_usticker 
MCUXpresso_MCUS: Apply K64F us_ticker fix across all MCU's
 2018-03-14 13:56:34 -05:00
Martin Kojtal 7917e12eb0 MIMXRT: define PullUp default value 
This target defines few PullUp values, one should be defined to be PullUp that
an application can use. We use the same value as PullDefault
 2018-03-12 09:21:24 +00:00
Mahesh Mahadevan 3f302961e1 Flash support: Add flash support for LPC54114 & LPC546XX 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-03-07 13:06:41 -06:00
Mahesh Mahadevan 7ed36e4986 MCUXpresso_MCUS: Apply K64F us_ticker fix across all MCU's 
Applied changes from commit b6a01de070
for other MCUXpresso MCUs

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-03-07 07:27:04 -06:00
gorazd c053b70a75 lpc546xx and lpc54114: fix clock 2018-02-28 13:23:38 +01:00
Mahesh Mahadevan eff848abea LPC546XX: Update SDK driver to version 2.3 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-02-23 07:31:13 -06:00
Mahesh Mahadevan 069c80b7a5 ff_lpc546xx: Add support for 220MHz core speed. 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-02-22 07:30:20 -06:00
Mahesh Mahadevan a9cd4705d8 LPC546XX: Add support for 220MHz core speed available on LPC54628 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-02-22 07:30:19 -06:00
Cruz Monrreal 964e6e74fb
Merge pull request #5826 from codeauroraforum/Add_iMXRT_Support 
NXP: Add support for MIMXRT1050_EVK
 2018-02-05 10:15:17 -06:00
Mahesh Mahadevan 060daa99c9 NXP: Add support for MIMXRT1050_EVK 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-01-26 07:46:43 -06:00
Serge Camille 63664e11b9
NXP LPC4088: Add missing SPI SSEL pin to Pinmap 
The Pin P5_3 (p31) was missing from the NXP LPC4088 SPI PinMap for SSEL.

Adding this Pin allows usage of SPISlave with SSP2 using the SSEL pin.

The pin and its SSP2_SSEL function is both documented in https://os.mbed.com/media/uploads/embeddedartists/lpc4088_qsb_pinning.xlsx as well as in UM10562 LPC408x/407x User manual Rev. 3 — 12 March 2014 chapter 7.4.1.4 Table 90 (https://www.nxp.com/docs/en/user-guide/UM10562.pdf).
 2018-01-24 13:29:43 +01:00
gorazd 676e56d6fe ff_lpc546xx: change led1 and led3 and p26 pins 2018-01-01 15:55:25 +01:00
gorazd f6283f5b03 ff_lpc546xx: add enet 
fsl_phy.c/.h move to ../drivers to reuse it
lwip: add hardware_init.c
 2018-01-01 15:55:24 +01:00
Martin Kojtal be52ba2156
Merge pull request #5363 from mprse/extended_rtc 
Add support and tests for extended RTC
 2017-12-12 17:36:44 +00:00
Przemyslaw Stekiel 106561669f Update RTC drivers for extended RTC. 2017-12-05 07:54:02 +01:00
Mahadevan Mahesh f2d2ed44cd LPC546XX: Add ENET support 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-11-28 16:18:36 +00:00
gorazd 5c2f2c3cff lpc546xx: remove obsolete line 2017-11-18 10:44:33 +01:00
gorazd 8411134184 lpc546xx: correct register name (DIGIMODE) 2017-11-17 19:16:42 +01:00
gorazd d62b47393e lpc546xx: fix adc 
Resolve #5304
 2017-11-17 13:54:25 +01:00
Martin Kojtal 494c25d71c
Merge pull request #5344 from gorazdko/add-new-target-L-TEK-FF-LPC546XX 
add new target L-Tek FF-LPC546XX
 2017-11-09 16:42:24 +00:00
Jimmy Brisson 02f1d0185a
Merge pull request #5320 from kegilbert/fix-build-warnings-lpc4088 
Fix ethernet API build warnings for LPC4088
 2017-10-30 10:08:15 -05:00
Kevin Gilbert 901157b305 Replace PACKED attribute on lpc4088 ethernet structs with MBED_PACKED. Placement of packed attribute was causing warnings due to following typedef 2017-10-26 11:34:48 -05:00
Anna Bridge 97e2d4a8c5 Merge pull request #5025 from grygorek/master 
LPC1769 port
 2017-10-26 11:35:35 +01:00
gorazd b010223145 add new target L-Tek FF-LPC546XX 2017-10-18 23:56:12 +02:00
Piotr Grygorczuk be5a8a98ee lpc1769 inherits from lpc1768; reuse lpc1768.ld for LPC1769 target 2017-10-17 11:12:59 +01:00
Jimmy Brisson a0b624b62e Merge pull request #5038 from chrissnow/LPC1768-Bootloader 
Lpc1768 bootloader support
 2017-10-05 11:11:08 -05:00
Chris Snow 82ae53a282 Simplify CRP placement. 2017-10-02 19:23:35 +01:00
Mahadevan Mahesh 880f106740 Change LPC54608 to LPC546XX to include support for LPC54608/18/28 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-10-02 11:20:27 -05:00
Piotr Grygorczuk 728a3a4a76 mbed LPC1768 & Xpresso LPC1769 unified 
Target of LPC1769 links to mbed LPC1768.
The PinNames.h has conditional compile for the pin names.
LWIP lpc17xx emac driver modified to allow LPC1769 target
 2017-10-02 11:05:39 +01:00
Chris Snow d6404726dd Ensure CRP is set correctly for IAR, GCC and ARM 
CRP value can be set through a macro in mbed_app such as
"macros": [
    "CRP=CRP_NONE"
]
 2017-09-30 19:26:05 +01:00
Chris Snow f8f54837cd Linker update for bootloader support 2017-09-30 19:00:25 +01:00
Chris Snow a08fc2bb7a Move CRP out of startup and into CRP.c so it can be conditionally compiled 2017-09-30 19:00:25 +01:00
Jimmy Brisson f5bb15f773 Merge pull request #5152 from NXPmicro/Update_RTC_HAL_driver 
Kinetis RTC HAL: Allow writing 0 to the seconds register
 2017-09-29 10:12:22 -05:00
Jimmy Brisson 3b224252ef Merge pull request #5141 from NXPmicro/Fix_LPC54608_LEDMap 
LPC54608: Swap LED pin connections to match naming on the board
 2017-09-29 10:12:04 -05:00
Jimmy Brisson 4f1cafd0b7 Merge pull request #5197 from c1728p9/fix_lpc54114 
Fix LPC54114 vector table size
 2017-09-27 09:01:44 -05:00
Russ Butler c32890294e Fix LPC54114 vector table size 
Correct the vector table size on the LPC54114. This fixes crashes
seen on boot when building with GCC.
 2017-09-25 18:49:38 -05:00
Martin Kojtal 9a191de5f9 LPC1768: flash_hal removal duplication 
IAP typedef duplication removal
 2017-09-25 19:18:18 +02:00
Martin Kojtal 6a6561028e LPC1768: flash erase/write require a critical section 
From RM:

32.3.2.6 Interrupts during IAP
The on-chip flash memory is not accessible during erase/write operations. When the user
application code starts executing the interrupt vectors from the user flash area are active.
The user should either disable interrupts, or ensure that user interrupt vectors are active in
RAM and that the interrupt handlers reside in RAM, before making a flash erase/write IAP
call. The IAP code does not use or disable interrupts.
 2017-09-25 19:18:06 +02:00
Martin Kojtal c623e889c0 LPC1768: RAM end adjust fix 
The topmost 32 bytes used by IAP functions, this was not included in the RAM
end previously.
 2017-09-25 13:50:54 +01:00