LPC566XX LPCXpresso: Update to add QSPI support

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
pull/8683/head
Mahesh Mahadevan 2018-10-19 11:15:11 -05:00
parent b3d0b5c210
commit f8f9faa841
5 changed files with 82 additions and 0 deletions

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@ -105,6 +105,10 @@ typedef enum {
SPI_1 = Flexcomm9
} SPIName;
typedef enum {
QSPI_0 = 0
} QSPIName;
#ifdef __cplusplus
}
#endif

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@ -115,3 +115,21 @@ const PinMap PinMap_SPI_SSEL[] = {
const PinMap PinMap_PWM[] = {
{NC , NC , 0}
};
/************QSPI***************/
const PinMap PinMap_QSPI_DATA[] = {
{P0_24, QSPI_0, 6},
{P0_25, QSPI_0, 6},
{P0_28, QSPI_0, 6},
{P0_27, QSPI_0, 6},
{NC , NC , 0}
};
const PinMap PinMap_QSPI_SCLK[] = {
{P0_26, QSPI_0, 6},
{NC , NC , 0}
};
const PinMap PinMap_QSPI_SSEL[] = {
{P0_23, QSPI_0, 6},
{NC , NC , 0}
};

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@ -219,6 +219,14 @@ typedef enum {
I2C_SCL = D15,
I2C_SDA = D14,
/**** QSPI FLASH pins ****/
QSPI_FLASH1_IO0 = P0_24,
QSPI_FLASH1_IO1 = P0_25,
QSPI_FLASH1_IO2 = P0_28,
QSPI_FLASH1_IO3 = P0_27,
QSPI_FLASH1_SCK = P0_26,
QSPI_FLASH1_CSN = P0_23,
A0 = P0_16,
A1 = P0_31,
A2 = P1_0,

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@ -172,3 +172,12 @@ void BOARD_InitSDRAM(void)
/* EMC Dynamc memory configuration. */
EMC_DynamicMemInit(EMC, &dynTiming, &dynChipConfig, 1);
}
// Get the QSPI clock frequency
uint32_t qspi_get_freq(void)
{
CLOCK_AttachClk(kFRO_HF_to_SPIFI_CLK);
return CLOCK_GetFroHfFreq();
}

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@ -0,0 +1,43 @@
/* mbed Microcontroller Library
* Copyright (c) 2018, ARM Limited
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _FSL_MBED_QSPI_DEVICE_H_
#define _FSL_MBED_QSPI_DEVICE_H_
#include "fsl_spifi.h"
#define FLASH_SIZE 0x00400000U
#define FLASH_PAGE_SIZE 256U
/* Pre-defined commands */
spifi_command_t preset_spifi_command[2] = {
{FLASH_PAGE_SIZE, false, kSPIFI_DataInput, 0, kSPIFI_CommandAllSerial, kSPIFI_CommandOpcodeAddrThreeBytes, 0x3},
{FLASH_PAGE_SIZE, false, kSPIFI_DataOutput, 0, kSPIFI_CommandAllSerial, kSPIFI_CommandOpcodeAddrThreeBytes, 0x2}
};
#endif /* _FSL_MBED_QSPI_DEVICE_H_*/