NOTE1: USB UART is partitioned for non-secure world. Secure world still can share
it with limit that its interrupt cannot use in secure world.
NOTE2: In secure world, USB UART is only for Greentea and STDIO. Developers shouldn't
use it for other purposes.
Support secure/non-secure combined build for non-PSA target:
1. In secure post-build, deliver built secure image to TARGET_NU_PREBUILD_SECURE
directory which is to combine later.
2. In non-secure post-build, merge non-secure image with secure image saved in
TARGET_NU_PREBUILD_SECURE directory.
3. In non-secure post-build, user can also drop pre-built secure image saved in
TARGET_NU_PREBUILD_SECURE directory and provide its own by adding the line below
in mbed_app.json:
"target.extra_labels_remove": ["NU_PREBUILD_SECURE"]
1. Create a private target name NU_PFM_M2351_CM which stands for the
NuMaker-PFM-M2351 board and is to be extended.
2. NU_PFM_M2351_NPSA_S/NS target names for non-PSA secure/non-secure targets
respectively.
3. The original target name NUMAKER_PFM_M2351 is recycled and cannot be used.
Use NU_PFM_M2351_S/NS for non-PSA secure/non-secure targets instead.
NOTE: Target name doesn't follow the rule below because online database has
limit of max 20 chars:
NUMAKER_PFM_M2351_PSA/NOPSA_S/NS
Instead, it has the rule:
NU_PFM_M2351_[NPSA_]S/NS
NU_PFM_M2351_S/NS for PSA targets. This is to be consistent with current
PSA target naming. So the resolved target names are:
NU_PFM_M2351_S : PSA secure target
NU_PFM_M2351_NS : PSA non-secure target
NU_PFM_M2351_NPSA_S : Non-PSA secure target
NU_PFM_M2351_NPSA_NS : Non-PSA non-secure target
We should not block in case the UART is busy transmitting. The
API has been updated to check the status of all UART's and return
1 in case any of them is busy transmitting.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The code checks if any of the UART's is still transmitting.
If so then prevent from entering deepsleep
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
We should not block in case the UART is busy transmitting. The
API has been updated to check the status of all UART's and return
1 in case any of them is busy transmitting.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The code checks if any of the UART's is still transmitting.
If so then prevent from entering deepsleep
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Fixed HAL API implementation for InterruptIn:
- Interrupt was not enabled by default after configuration as it should be.
- Interrupt-to-object linking was not handled properly.
Removed private TODO file.
Fixed cmsis.h so that renaming of CS and DIR_H is not necessary any more.
Leave pinmap.h unchanged although it should include stdint.h
Moved stdint.h to PinNames.h instead, where it is also used.
Reworked system startup (clock configuration) to be more flexible
(different clock sources for MCLK and SMCLK, configurable clock dividers).
Fixed Copyright headers
Changed default clock settings for MSP432 Launchpad to
MCLK 48 MHz (HFXT) and SMCLK 24 MHz (HFXT)
Remove mbed_rtx.h
Added common mbed_rtx.h file (merge with lastest master)
Added support for IAR toolchain
Fixed some astyle problems.
Added support for ARM C5/C6 toolchains
Small changes to us_ticker implementation after port testing.
Changed default clock configuration to DCO (MCLK 48MHz, SMCLK 24MHz).
De-configured the LFXT crysal, because this made the system_reset() test to time out.
Removed MPU from device_has list. Changed clock source to HFXT.
Reworked startup_msp432p401r.c -> now only one startup file for all compilers.
Changed all linker scripts to delete VECTORS stuff (not needed).
Moved position of MSP432 in targets.json so TI stuff is in one block.
Without free-up of peripheral pins, peripheral pins of the same peripheral may
share by multiple ports after port iteration, and this peripheral may fail with
pin interference.
In Nuvoton, only new-design chips support GPIO input pull-high/pull-low modes.
Targets not supporting this feature are listed below:
- NUMAKER_PFM_NANO130
- NUMAKER_PFM_NUC472
- NUMAKER_PFM_M453
Fix logic error on replying NACK at the end of transfer.
This is also to fix FPGA CI test mbed_hal_fpga_ci_test_shield-i2c/
i2c - test single byte read i2c API.
Better IP initialization sequence:
1. Configure IP pins
2. Select IP clock source and then enable it
3. Reset the IP (SYS_ResetModule)
NOTE1: IP reset takes effect regardless of IP clock. So it doesn't matter if
IP clock enable is before IP reset.
NOTE2: Non-configured pins may disturb IP's state, so IP pinout first and then
IP reset.
NOTE3: IP reset at the end of IP initialization sequence can cover unexpected
situation.
This test requires total latency (tot = h/w + s/w) (wakeup from deepsleep) be
under 1ms. To check the issue, measure total latency on Nuvoton targets:
TARGET EXP(us) EXP+TOL(us) ACT(us)
NANO130 42000 43000 42939
NUC472 42000 43000 42236
M453 42000 43000 43274
M487 42000 43000 42877
M2351 42000 43000 43213
Checking h/w spec, h/w latency (wakeup time from normal power-down mode) on
M487/M2351 is just 1us (n/a on other targets). S/W latency plays the major
part here.
S/W latency relies on system performance. On Nuvoton targets, 'LPTICKER_DELAY_TICKS'
possibly complicates the test. Anyway, to pass the test, add extra 1ms latency
(deep-sleep-latency) in targets.json for Nuvoton targets.
On Nuvoton targets, lp_ticker_set_interrupt(...) needs around 3 lp-ticker
ticks to take effect. It may miss when current tick and match tick are very
close (see hal/LowPowerTickerWrapper.cpp). Enlarge LPTICKER_DELAY_TICKS to
4 from 3 to address this boundary case.
For kit targets that inherit from a module, move the kit a top-level
target folder rather than nesting underneath the module folder, to
avoid too-long-path issues on Windows.
Note this only changes the folder layout, not the inheritance.
Enables code examples/end user applications to override if necessary
Add BSP_DESIGN_MODUS component by default to all PSOC6 boards. Applications can remove this if necessary.
This avoids a stack overflow if sleep is called for the first time from
the idle thread (which by default has a fairly small stack, and which is
already fairly deep by the time it calls into the usticker adapter)
These provide information to allow Cypress graphical configuration tools
to avoid conflicting usage of hardware resources which are managed by
firware included with the BSP.
static_memory_defines controls the macro MBED_RAM_START AND MBED_RAM_SIZE
when nrf52832 to use softdevice, it need MBED_RAM_START to set the true application ram start
[Warning] tcm_heap.c@70,18: format '%x' expects argument of type 'unsigned int', but argument 2 has type 'MemChunk * {aka struct _MemChunk *}' [-Wformat=]
[Warning] tcm_heap.c@70,28: format '%x' expects argument of type 'unsigned int', but argument 3 has type 'MemChunk * {aka struct _MemChunk *}' [-Wformat=]
Signed-off-by: Tony Wu <tonywu@realtek.com>
Keep former behaviour for I2C V1.
For I2C V2:
Use only I2C_FIRST_FRAME, I2C_FIRST_AND_LAST_FRAME and I2C_LAST_FRAME,
thus we avoid using reload bit.
Reload suppose the next frame would be in the same direction,
but we have no guarranty about this. So we cannot use reload bit.
Note: in case of 2 consecutive I2C_FIRST_FRAME,
a restart is automatically generated only if there is direction change in the direction.
For STM32 platforms that embed an OSPI IP, we're offering
a QSPI fallback support with this commit.
When OSPI is supported in mbed, we can consider adding full
OSPI support
1. FPGA test shield requires at least half sclk period delay between
CS assertion and first sclk edge
2. Update Kinetis SPI drivers to match what is already done for K64F
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
- Added dummy data setup API to allow users to configure
the dummy data to be transferred.
- Added new APIs for half-duplex transfer function. Users
can send and receive data by one API in the polling/interrupt/EDMA way,
and they can choose either to transmit first or to receive first.
Additionally, the PCS pin can be configured as assert status in
transmission (between transmit and receive) by setting the
isPcsAssertInTransfer to true.
- Fix for MISRA issues
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This allows to specify which hal version to use for each family.
It can also be used to modify the thread stack size.
Signed-off-by: Vincent Veron <vincent.veron@st.com>
This port is based on :
* CurryGuy ethernet branch :
https://github.com/CurryGuy/mbed-os/tree/feature-stm32h7-emac
* STM32 Cube example :
Applications/LwIP/LwIP_HTTP_Server_Netconn_RTOS example
Signed-off-by: Vincent Veron <vincent.veron@st.com>
Fix SPI module index error in modidx_ns_tab table in CLK_SetModuleClock_S().
Need to update secure image for this bugfix.
This is also to fix FPGA CI test mbed_hal_fpga_ci_test_shield-spi/
SPI - init/free test all pins.
M451 series can classify by M45xD/M45xC and M45xG/M45xE. To support this
classification:
1. Create TARGET_M45xD_M45xC and TARGET_M45xG_M45xE targets.
2. Mark NUMAKER_PFM_M453 belongs to TARGET_M45xG_M45xE by 'extra_labels_add'
in targets.json.
3. Fix pin name table according to the classification.
4. Fix pinmap table according to the classification.
MOSI1/MISO1 are used in second bit of 2-bit transfer mode and cannot be used
for normal MOSI/MISO. Remove them from pinmap.
This is also to fix FPGA CI test mbed_hal_fpga_ci_test_shield-spi/
SPI - basic test.
Without free-up of peripheral pins, peripheral pins of the same peripheral may
share by multiple ports after port iteration, and this peripheral may fail with
pin interference.
In Nuvoton, only new-design chips support GPIO input pull-high/pull-low modes.
Targets not supporting this feature are listed below:
- NUMAKER_PFM_NANO130
- NUMAKER_PFM_NUC472
- NUMAKER_PFM_M453
Fix logic error on replying NACK at the end of transfer.
This is also to fix FPGA CI test mbed_hal_fpga_ci_test_shield-i2c/
i2c - test single byte read i2c API.
Better IP initialization sequence:
1. Configure IP pins
2. Select IP clock source and then enable it
3. Reset the IP (SYS_ResetModule)
NOTE1: IP reset takes effect regardless of IP clock. So it doesn't matter if
IP clock enable is before IP reset.
NOTE2: Non-configured pins may disturb IP's state, so IP pinout first and then
IP reset.
NOTE3: IP reset at the end of IP initialization sequence can cover unexpected
situation.
Update includes allocating RAM region for code to enter
stop modes and execute this code in RAM, thus the flash
is idle and no prefetch is performed while entering stop
mode.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
1. Use the updated API's provided by the SMC driver
2. Wait till debug UART has finished transmitting data
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
1. Update to handle 12-bit resolution
2. Properly handle the pin configuration
3. Update the pin setup to handle the ADC B channel
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Originally, nu_delay_cycle_x4(...) is borrowed from mbed test code for delay
cycle. Currently, it is not used on Nuvoton targets. If delay cycle is needed,
use wait_ns(...) instead which has strict implementation and has passed tests.
The use of `gpio_irq_event` & `gpio_irq_handler` in `gpio_irq_s` creates
a circular dependency.
hal/gpio_irq_api.h needs
targets/TARGET_Cypress/TARGET_PSOC6_FUTURE/TARGET_CY8C63XX/device.h, that needs
targets/TARGET_Cypress/TARGET_PSOC6_FUTURE/objects.h, that again needs
hal/gpio_irq_api.h, before the types are defined.
Remove `#include "gpio_irq_api.h"` directive from objects.h and change
the types of `gpio_irq_s` members.
When STM32F746-DISCO board was being used in (unsupported) USBHost mode,
the communication was unreliable. Our investigation revealed that the
problem lied in redundant IN tokens that the host generated even though
it shouldn't. This could lead to endless high-frequency NAKs being
received from device, which caused watchdog reset as USBHost spent all
time in interrupt handlers.
In our application the clocks frequencies are:
* HCLK = 48 MHz
* APB1 = 6 MHz
* APB2 = 12 MHz
We have captured the raw USB High-Speed traffic using OpenVizsla.
Without this change, when USB MSD device connected to the system
responded to IN with NAK, there were excessive IN tokens generated about
667 ns after the NAK. With this commit the IN tokens are generated no
sooner than 10 us after the NAK.
The high frequency of the IN/NAK pairs is not the biggest problem.
The biggest problem is that the USB Host did continue to send the IN token
after DATA and ACK packets were received from device - *without* any request
from upper layer (USB MSD).
The USB MSD devices won't have extra data available on Bulk IN endpoint
after the expected data was received by Host. In such case IN/NAK cycle
time is only houndreds of nanoseconds, the MCU has no time for anything else.
The problem manifested not only on Bulk endpoints, but also during
Control transfers. Example correct scenario (when this fix is applied):
* SETUP stage
* SETUP [host -> address 0 endpoint 0]
* DATA0 [80 06 00 01 00 00 08 00] [CRC16: EB 94]
* ACK
* DATA stage
* IN
* NAK
... the IN/NAK repeated multiple time until device was ready
* IN
* DATA1 [12 01 10 02 00 00 00 40] [CRC16: 55 41]
* ACK
* STATUS stage
* OUT
* DATA1 ZLP
* ACK
Without this commit, in DATA stage, after the ACK was received, the host
did send extra IN to which device responded with STALL. On bus it was:
* DATA stage
...
* IN
* DATA1 [12 01 10 02 00 00 00 40] [CRC16: 55 41]
* IN
* STALL
* IN
* STALL
* STATUS stage
* OUT
* DATA1 ZLP
* STALL
In the fault case the next SETUP was sent only after 510 ms, which
indicates timeout in upper layer.
With this commit the next SETUP is sent 120 us after the STATUS stage ACK.
- Fix assert when spi_master_block_write called with 0 size
- Fix assert when spi_format called before spi_frequency
- Simplify implementation of spi_master_write
- Simplify pointer arithmetic expressions in cyhal_spi_transfer and
cyhal_spi_transfer_async
- Fix I2C driver not honoring the frequency specified during init.
mahanthgouda
Martin Kojtal
Chun-Chieh Li
jeromecoutant
Kostiantyn Tkachov
Michal Paszta
Mahesh Mahadevan
Lin Gao
Leszek Rusinowicz
Andreas Terstegge
dolphin\gena
Jaeden Amero
int_szyk
Ryan Morse
Roman Okhrimenko
Hennadiy Kytsun
Laurent Meunier
aqib-ublox
Kyle Kearney
Orest Akymyshyn
Leon Lindenfelser
Marcelo Salazar
Malavika Sajikumar
Shuopeng Deng
James Wang
Tony Wu
Alexandre Bourdiol
cyliangtw
Anna Bridge
Vincent Veron
Chris Snow
Vairamuthu Ramasamy
Hugues Kamba
Ganesh Ramachandran
Martino Facchin
Seppo Takalo
Maciej Bocianski
Reda Maher
Seth Itow
Szymon Szantula
maclobdell
desmond.chen
David Rauschenbach
Chris Trowbridge
Filip Jagodzinski
Ireneusz Gaicki
Neil Tuttle