mirror of https://github.com/ARMmbed/mbed-os.git
MCUXpresso: Update Kinetis DSPI SDK drivers
- Added dummy data setup API to allow users to configure the dummy data to be transferred. - Added new APIs for half-duplex transfer function. Users can send and receive data by one API in the polling/interrupt/EDMA way, and they can choose either to transmit first or to receive first. Additionally, the PCS pin can be configured as assert status in transmission (between transmit and receive) by setting the isPcsAssertInTransfer to true. - Fix for MISRA issues Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>pull/11268/head
Mahesh Mahadevan
parent
1182d1e9bb
commit
4102114a72
File diff suppressed because it is too large
Load Diff
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@ -1,31 +1,9 @@
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/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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* Copyright 2016-2019 NXP
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _FSL_DSPI_H_
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#define _FSL_DSPI_H_
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@ -43,8 +21,8 @@
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/*! @name Driver version */
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/*@{*/
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/*! @brief DSPI driver version 2.2.0. */
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#define FSL_DSPI_DRIVER_VERSION (MAKE_VERSION(2, 2, 0))
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/*! @brief DSPI driver version 2.2.2. */
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#define FSL_DSPI_DRIVER_VERSION (MAKE_VERSION(2, 2, 2))
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/*@}*/
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#ifndef DSPI_DUMMY_DATA
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@ -55,37 +33,37 @@
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/*! @brief Status for the DSPI driver.*/
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enum _dspi_status
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{
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kStatus_DSPI_Busy = MAKE_STATUS(kStatusGroup_DSPI, 0), /*!< DSPI transfer is busy.*/
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kStatus_DSPI_Error = MAKE_STATUS(kStatusGroup_DSPI, 1), /*!< DSPI driver error. */
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kStatus_DSPI_Idle = MAKE_STATUS(kStatusGroup_DSPI, 2), /*!< DSPI is idle.*/
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kStatus_DSPI_OutOfRange = MAKE_STATUS(kStatusGroup_DSPI, 3) /*!< DSPI transfer out of range. */
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kStatus_DSPI_Busy = MAKE_STATUS(kStatusGroup_DSPI, 0), /*!< DSPI transfer is busy.*/
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kStatus_DSPI_Error = MAKE_STATUS(kStatusGroup_DSPI, 1), /*!< DSPI driver error. */
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kStatus_DSPI_Idle = MAKE_STATUS(kStatusGroup_DSPI, 2), /*!< DSPI is idle.*/
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kStatus_DSPI_OutOfRange = MAKE_STATUS(kStatusGroup_DSPI, 3) /*!< DSPI transfer out of range. */
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};
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/*! @brief DSPI status flags in SPIx_SR register.*/
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enum _dspi_flags
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{
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kDSPI_TxCompleteFlag = SPI_SR_TCF_MASK, /*!< Transfer Complete Flag. */
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kDSPI_EndOfQueueFlag = SPI_SR_EOQF_MASK, /*!< End of Queue Flag.*/
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kDSPI_TxFifoUnderflowFlag = SPI_SR_TFUF_MASK, /*!< Transmit FIFO Underflow Flag.*/
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kDSPI_TxFifoFillRequestFlag = SPI_SR_TFFF_MASK, /*!< Transmit FIFO Fill Flag.*/
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kDSPI_RxFifoOverflowFlag = SPI_SR_RFOF_MASK, /*!< Receive FIFO Overflow Flag.*/
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kDSPI_RxFifoDrainRequestFlag = SPI_SR_RFDF_MASK, /*!< Receive FIFO Drain Flag.*/
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kDSPI_TxAndRxStatusFlag = SPI_SR_TXRXS_MASK, /*!< The module is in Stopped/Running state.*/
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kDSPI_AllStatusFlag = SPI_SR_TCF_MASK | SPI_SR_EOQF_MASK | SPI_SR_TFUF_MASK | SPI_SR_TFFF_MASK | SPI_SR_RFOF_MASK |
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SPI_SR_RFDF_MASK | SPI_SR_TXRXS_MASK /*!< All statuses above.*/
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kDSPI_TxCompleteFlag = (int)SPI_SR_TCF_MASK, /*!< Transfer Complete Flag. */
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kDSPI_EndOfQueueFlag = SPI_SR_EOQF_MASK, /*!< End of Queue Flag.*/
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kDSPI_TxFifoUnderflowFlag = SPI_SR_TFUF_MASK, /*!< Transmit FIFO Underflow Flag.*/
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kDSPI_TxFifoFillRequestFlag = SPI_SR_TFFF_MASK, /*!< Transmit FIFO Fill Flag.*/
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kDSPI_RxFifoOverflowFlag = SPI_SR_RFOF_MASK, /*!< Receive FIFO Overflow Flag.*/
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kDSPI_RxFifoDrainRequestFlag = SPI_SR_RFDF_MASK, /*!< Receive FIFO Drain Flag.*/
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kDSPI_TxAndRxStatusFlag = SPI_SR_TXRXS_MASK, /*!< The module is in Stopped/Running state.*/
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kDSPI_AllStatusFlag = (int)(SPI_SR_TCF_MASK | SPI_SR_EOQF_MASK | SPI_SR_TFUF_MASK | SPI_SR_TFFF_MASK |
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SPI_SR_RFOF_MASK | SPI_SR_RFDF_MASK | SPI_SR_TXRXS_MASK) /*!< All statuses above.*/
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};
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/*! @brief DSPI interrupt source.*/
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enum _dspi_interrupt_enable
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{
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kDSPI_TxCompleteInterruptEnable = SPI_RSER_TCF_RE_MASK, /*!< TCF interrupt enable.*/
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kDSPI_EndOfQueueInterruptEnable = SPI_RSER_EOQF_RE_MASK, /*!< EOQF interrupt enable.*/
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kDSPI_TxFifoUnderflowInterruptEnable = SPI_RSER_TFUF_RE_MASK, /*!< TFUF interrupt enable.*/
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kDSPI_TxFifoFillRequestInterruptEnable = SPI_RSER_TFFF_RE_MASK, /*!< TFFF interrupt enable, DMA disable.*/
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kDSPI_RxFifoOverflowInterruptEnable = SPI_RSER_RFOF_RE_MASK, /*!< RFOF interrupt enable.*/
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kDSPI_RxFifoDrainRequestInterruptEnable = SPI_RSER_RFDF_RE_MASK, /*!< RFDF interrupt enable, DMA disable.*/
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kDSPI_AllInterruptEnable = SPI_RSER_TCF_RE_MASK | SPI_RSER_EOQF_RE_MASK | SPI_RSER_TFUF_RE_MASK |
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SPI_RSER_TFFF_RE_MASK | SPI_RSER_RFOF_RE_MASK | SPI_RSER_RFDF_RE_MASK
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kDSPI_TxCompleteInterruptEnable = (int)SPI_RSER_TCF_RE_MASK, /*!< TCF interrupt enable.*/
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kDSPI_EndOfQueueInterruptEnable = SPI_RSER_EOQF_RE_MASK, /*!< EOQF interrupt enable.*/
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kDSPI_TxFifoUnderflowInterruptEnable = SPI_RSER_TFUF_RE_MASK, /*!< TFUF interrupt enable.*/
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kDSPI_TxFifoFillRequestInterruptEnable = SPI_RSER_TFFF_RE_MASK, /*!< TFFF interrupt enable, DMA disable.*/
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kDSPI_RxFifoOverflowInterruptEnable = SPI_RSER_RFOF_RE_MASK, /*!< RFOF interrupt enable.*/
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kDSPI_RxFifoDrainRequestInterruptEnable = SPI_RSER_RFDF_RE_MASK, /*!< RFDF interrupt enable, DMA disable.*/
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kDSPI_AllInterruptEnable = (int)(SPI_RSER_TCF_RE_MASK | SPI_RSER_EOQF_RE_MASK | SPI_RSER_TFUF_RE_MASK |
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SPI_RSER_TFFF_RE_MASK | SPI_RSER_RFOF_RE_MASK | SPI_RSER_RFDF_RE_MASK)
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/*!< All above interrupts enable.*/
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};
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@ -102,7 +80,7 @@ enum _dspi_dma_enable
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typedef enum _dspi_master_slave_mode
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{
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kDSPI_Master = 1U, /*!< DSPI peripheral operates in master mode.*/
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kDSPI_Slave = 0U /*!< DSPI peripheral operates in slave mode.*/
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kDSPI_Slave = 0U /*!< DSPI peripheral operates in slave mode.*/
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} dspi_master_slave_mode_t;
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/*!
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@ -132,26 +110,26 @@ typedef enum _dspi_which_pcs_config
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typedef enum _dspi_pcs_polarity_config
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{
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kDSPI_PcsActiveHigh = 0U, /*!< Pcs Active High (idles low). */
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kDSPI_PcsActiveLow = 1U /*!< Pcs Active Low (idles high). */
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kDSPI_PcsActiveLow = 1U /*!< Pcs Active Low (idles high). */
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} dspi_pcs_polarity_config_t;
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/*! @brief DSPI Peripheral Chip Select (Pcs) Polarity.*/
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enum _dspi_pcs_polarity
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{
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kDSPI_Pcs0ActiveLow = 1U << 0, /*!< Pcs0 Active Low (idles high). */
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kDSPI_Pcs1ActiveLow = 1U << 1, /*!< Pcs1 Active Low (idles high). */
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kDSPI_Pcs2ActiveLow = 1U << 2, /*!< Pcs2 Active Low (idles high). */
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kDSPI_Pcs3ActiveLow = 1U << 3, /*!< Pcs3 Active Low (idles high). */
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kDSPI_Pcs4ActiveLow = 1U << 4, /*!< Pcs4 Active Low (idles high). */
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kDSPI_Pcs5ActiveLow = 1U << 5, /*!< Pcs5 Active Low (idles high). */
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kDSPI_PcsAllActiveLow = 0xFFU /*!< Pcs0 to Pcs5 Active Low (idles high). */
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kDSPI_Pcs0ActiveLow = 1U << 0, /*!< Pcs0 Active Low (idles high). */
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kDSPI_Pcs1ActiveLow = 1U << 1, /*!< Pcs1 Active Low (idles high). */
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kDSPI_Pcs2ActiveLow = 1U << 2, /*!< Pcs2 Active Low (idles high). */
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kDSPI_Pcs3ActiveLow = 1U << 3, /*!< Pcs3 Active Low (idles high). */
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kDSPI_Pcs4ActiveLow = 1U << 4, /*!< Pcs4 Active Low (idles high). */
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kDSPI_Pcs5ActiveLow = 1U << 5, /*!< Pcs5 Active Low (idles high). */
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kDSPI_PcsAllActiveLow = 0xFFU /*!< Pcs0 to Pcs5 Active Low (idles high). */
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};
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/*! @brief DSPI clock polarity configuration for a given CTAR.*/
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typedef enum _dspi_clock_polarity
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{
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kDSPI_ClockPolarityActiveHigh = 0U, /*!< CPOL=0. Active-high DSPI clock (idles low).*/
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kDSPI_ClockPolarityActiveLow = 1U /*!< CPOL=1. Active-low DSPI clock (idles high).*/
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kDSPI_ClockPolarityActiveLow = 1U /*!< CPOL=1. Active-low DSPI clock (idles high).*/
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} dspi_clock_polarity_t;
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/*! @brief DSPI clock phase configuration for a given CTAR.*/
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@ -216,7 +194,7 @@ enum _dspi_transfer_config_flag_for_master
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kDSPI_MasterPcs4 = 4U << DSPI_MASTER_PCS_SHIFT, /*!< DSPI master transfer use PCS4 signal. */
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kDSPI_MasterPcs5 = 5U << DSPI_MASTER_PCS_SHIFT, /*!< DSPI master transfer use PCS5 signal. */
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kDSPI_MasterPcsContinuous = 1U << 20, /*!< Indicates whether the PCS signal is continuous. */
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kDSPI_MasterPcsContinuous = 1U << 20, /*!< Indicates whether the PCS signal is continuous. */
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kDSPI_MasterActiveAfterTransfer =
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1U << 21, /*!< Indicates whether the PCS signal is active after the last frame transfer.*/
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};
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@ -241,7 +219,7 @@ enum _dspi_transfer_state
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/*! @brief DSPI master command date configuration used for the SPIx_PUSHR.*/
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typedef struct _dspi_command_data_config
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{
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bool isPcsContinuous; /*!< Option to enable the continuous assertion of the chip select between transfers.*/
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bool isPcsContinuous; /*!< Option to enable the continuous assertion of the chip select between transfers.*/
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dspi_ctar_selection_t whichCtar; /*!< The desired Clock and Transfer Attributes
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Register (CTAR) to use for CTAS.*/
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dspi_which_pcs_t whichPcs; /*!< The desired PCS signal to use for the data transfer.*/
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@ -258,10 +236,10 @@ typedef struct _dspi_master_ctar_config
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dspi_clock_phase_t cpha; /*!< Clock phase. */
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dspi_shift_direction_t direction; /*!< MSB or LSB data shift direction. */
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uint32_t pcsToSckDelayInNanoSec; /*!< PCS to SCK delay time in nanoseconds; setting to 0 sets the minimum
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delay. It also sets the boundary value if out of range.*/
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uint32_t lastSckToPcsDelayInNanoSec; /*!< The last SCK to PCS delay time in nanoseconds; setting to 0 sets the
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minimum delay. It also sets the boundary value if out of range.*/
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uint32_t pcsToSckDelayInNanoSec; /*!< PCS to SCK delay time in nanoseconds; setting to 0 sets the minimum
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delay. It also sets the boundary value if out of range.*/
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uint32_t lastSckToPcsDelayInNanoSec; /*!< The last SCK to PCS delay time in nanoseconds; setting to 0 sets the
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minimum delay. It also sets the boundary value if out of range.*/
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uint32_t betweenTransferDelayInNanoSec; /*!< After the SCK delay time in nanoseconds; setting to 0 sets the minimum
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delay. It also sets the boundary value if out of range.*/
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@ -315,13 +293,13 @@ typedef struct _dspi_slave_config
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} dspi_slave_config_t;
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/*!
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* @brief Forward declaration of the _dspi_master_handle typedefs.
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*/
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* @brief Forward declaration of the _dspi_master_handle typedefs.
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*/
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typedef struct _dspi_master_handle dspi_master_handle_t;
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/*!
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* @brief Forward declaration of the _dspi_slave_handle typedefs.
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*/
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* @brief Forward declaration of the _dspi_slave_handle typedefs.
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*/
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typedef struct _dspi_slave_handle dspi_slave_handle_t;
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/*!
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@ -356,12 +334,24 @@ typedef struct _dspi_transfer
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uint8_t *rxData; /*!< Receive buffer. */
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volatile size_t dataSize; /*!< Transfer bytes. */
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uint32_t
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configFlags; /*!< Transfer transfer configuration flags; set from _dspi_transfer_config_flag_for_master if the
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transfer is used for master or _dspi_transfer_config_flag_for_slave enumeration if the transfer
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is used for slave.*/
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uint32_t configFlags; /*!< Transfer transfer configuration flags; set from _dspi_transfer_config_flag_for_master if
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the transfer is used for master or _dspi_transfer_config_flag_for_slave enumeration if the
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transfer is used for slave.*/
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} dspi_transfer_t;
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/*! @brief DSPI half-duplex(master) transfer structure */
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typedef struct _dspi_half_duplex_transfer
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{
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uint8_t *txData; /*!< Send buffer */
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uint8_t *rxData; /*!< Receive buffer */
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size_t txDataSize; /*!< Transfer bytes for transmit */
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size_t rxDataSize; /*!< Transfer bytes */
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uint32_t configFlags; /*!< Transfer configuration flags; set from _dspi_transfer_config_flag_for_master. */
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bool isPcsAssertInTransfer; /*!< If Pcs pin keep assert between transmit and receive. true for assert and false for
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deassert. */
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bool isTransmitFirst; /*!< True for transmit first and false for receive first. */
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} dspi_half_duplex_transfer_t;
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/*! @brief DSPI master transfer handle structure used for transactional API. */
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struct _dspi_master_handle
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{
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@ -373,7 +363,7 @@ struct _dspi_master_handle
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volatile bool
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isPcsActiveAfterTransfer; /*!< Indicates whether the PCS signal is active after the last frame transfer.*/
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volatile bool isThereExtraByte; /*!< Indicates whether there are extra bytes.*/
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volatile bool isThereExtraByte; /*!< Indicates whether there are extra bytes.*/
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uint8_t *volatile txData; /*!< Send buffer. */
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uint8_t *volatile rxData; /*!< Receive buffer. */
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@ -527,7 +517,7 @@ static inline void DSPI_Enable(SPI_Type *base, bool enable)
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/*!
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*@}
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*/
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*/
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/*!
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* @name Status
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@ -565,7 +555,7 @@ static inline void DSPI_ClearStatusFlags(SPI_Type *base, uint32_t statusFlags)
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/*!
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*@}
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*/
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*/
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/*!
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* @name Interrupts
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@ -605,7 +595,7 @@ static inline void DSPI_DisableInterrupts(SPI_Type *base, uint32_t mask)
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/*!
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*@}
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*/
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*/
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/*!
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* @name DMA Control
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@ -685,12 +675,18 @@ static inline uint32_t DSPI_GetRxRegisterAddress(SPI_Type *base)
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/*!
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*@}
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*/
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*/
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/*!
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* @name Bus Operations
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* @{
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*/
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/*!
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* @brief Get instance number for DSPI module.
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*
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* @param base DSPI peripheral base address.
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*/
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uint32_t DSPI_GetInstance(SPI_Type *base);
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/*!
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* @brief Configures the DSPI for master or slave.
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@ -711,7 +707,14 @@ static inline void DSPI_SetMasterSlaveMode(SPI_Type *base, dspi_master_slave_mod
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*/
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static inline bool DSPI_IsMaster(SPI_Type *base)
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{
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return (bool)((base->MCR) & SPI_MCR_MSTR_MASK);
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if (0U != ((base->MCR) & SPI_MCR_MSTR_MASK))
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{
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return true;
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}
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else
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{
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return false;
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}
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}
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/*!
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* @brief Starts the DSPI transfers and clears HALT bit in MCR.
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@ -749,8 +752,8 @@ static inline void DSPI_StopTransfer(SPI_Type *base)
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*/
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static inline void DSPI_SetFifoEnable(SPI_Type *base, bool enableTxFifo, bool enableRxFifo)
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{
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base->MCR = (base->MCR & (~(SPI_MCR_DIS_RXF_MASK | SPI_MCR_DIS_TXF_MASK))) | SPI_MCR_DIS_TXF(!enableTxFifo) |
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SPI_MCR_DIS_RXF(!enableRxFifo);
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base->MCR = (base->MCR & (~(SPI_MCR_DIS_RXF_MASK | SPI_MCR_DIS_TXF_MASK))) |
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SPI_MCR_DIS_TXF((false == enableTxFifo ? 1U : 0U)) | SPI_MCR_DIS_RXF((false == enableRxFifo ? 1U : 0U));
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}
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/*!
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@ -762,8 +765,8 @@ static inline void DSPI_SetFifoEnable(SPI_Type *base, bool enableTxFifo, bool en
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*/
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static inline void DSPI_FlushFifo(SPI_Type *base, bool flushTxFifo, bool flushRxFifo)
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{
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base->MCR = (base->MCR & (~(SPI_MCR_CLR_TXF_MASK | SPI_MCR_CLR_RXF_MASK))) | SPI_MCR_CLR_TXF(flushTxFifo) |
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SPI_MCR_CLR_RXF(flushRxFifo);
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base->MCR = (base->MCR & (~(SPI_MCR_CLR_TXF_MASK | SPI_MCR_CLR_RXF_MASK))) |
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SPI_MCR_CLR_TXF((true == flushTxFifo ? 1U : 0U)) | SPI_MCR_CLR_RXF((true == flushRxFifo ? 1U : 0U));
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}
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/*!
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@ -954,11 +957,11 @@ static inline uint32_t DSPI_MasterGetFormattedCommand(dspi_command_data_config_t
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* buffer master mode and waits till complete to return.
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*
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* In this function, the user must append the 16-bit data to the 16-bit command information and then provide the total
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* 32-bit word
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* 32-bit word
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* as the data to send.
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* The command portion provides characteristics of the data, such as the optional continuous chip select operation
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* between transfers, the desired Clock and Transfer Attributes register to use for the associated SPI frame, the
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* desired PCS
|
||||
* desired PCS
|
||||
* signal to use for the data transfer, whether the current transfer is the last in the queue, and whether to clear the
|
||||
* transfer count (normally needed when sending the first frame of a data packet). The user is responsible for
|
||||
* appending this command with the data to send. This is an example:
|
||||
|
|
@ -973,20 +976,20 @@ static inline uint32_t DSPI_MasterGetFormattedCommand(dspi_command_data_config_t
|
|||
*
|
||||
* For a blocking polling transfer, see methods below.
|
||||
* Option 1:
|
||||
* uint32_t command_to_send = DSPI_MasterGetFormattedCommand(&command);
|
||||
* uint32_t data0 = command_to_send | data_need_to_send_0;
|
||||
* uint32_t data1 = command_to_send | data_need_to_send_1;
|
||||
* uint32_t data2 = command_to_send | data_need_to_send_2;
|
||||
*
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data0);
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data1);
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data2);
|
||||
*
|
||||
* Option 2:
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_0);
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_1);
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_2);
|
||||
*
|
||||
* uint32_t command_to_send = DSPI_MasterGetFormattedCommand(&command);
|
||||
* uint32_t data0 = command_to_send | data_need_to_send_0;
|
||||
* uint32_t data1 = command_to_send | data_need_to_send_1;
|
||||
* uint32_t data2 = command_to_send | data_need_to_send_2;
|
||||
*
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data0);
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data1);
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data2);
|
||||
*
|
||||
* Option 2:
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_0);
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_1);
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_2);
|
||||
*
|
||||
* @param base DSPI peripheral address.
|
||||
* @param data The data word (command and data combined) to be sent.
|
||||
*/
|
||||
|
|
@ -1037,7 +1040,7 @@ void DSPI_SetDummyData(SPI_Type *base, uint8_t dummyData);
|
|||
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @name Transactional
|
||||
|
|
@ -1086,6 +1089,35 @@ status_t DSPI_MasterTransferBlocking(SPI_Type *base, dspi_transfer_t *transfer);
|
|||
*/
|
||||
status_t DSPI_MasterTransferNonBlocking(SPI_Type *base, dspi_master_handle_t *handle, dspi_transfer_t *transfer);
|
||||
|
||||
/*!
|
||||
* @brief Transfers a block of data using a polling method.
|
||||
*
|
||||
* This function will do a half-duplex transfer for DSPI master, This is a blocking function,
|
||||
* which does not retuen until all transfer have been completed. And data transfer will be half-duplex,
|
||||
* users can set transmit first or receive first.
|
||||
*
|
||||
* @param base DSPI base pointer
|
||||
* @param xfer pointer to dspi_half_duplex_transfer_t structure
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterHalfDuplexTransferBlocking(SPI_Type *base, dspi_half_duplex_transfer_t *xfer);
|
||||
|
||||
/*!
|
||||
* @brief Performs a non-blocking DSPI interrupt transfer.
|
||||
*
|
||||
* This function transfers data using interrupts, the transfer mechanism is half-duplex. This is a non-blocking
|
||||
* function,
|
||||
* which returns right away. When all data is transferred, the callback function is called.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_master_handle_t structure which stores the transfer state
|
||||
* @param xfer pointer to dspi_half_duplex_transfer_t structure
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterHalfDuplexTransferNonBlocking(SPI_Type *base,
|
||||
dspi_master_handle_t *handle,
|
||||
dspi_half_duplex_transfer_t *xfer);
|
||||
|
||||
/*!
|
||||
* @brief Gets the master transfer count.
|
||||
*
|
||||
|
|
@ -1179,15 +1211,25 @@ void DSPI_SlaveTransferAbort(SPI_Type *base, dspi_slave_handle_t *handle);
|
|||
*/
|
||||
void DSPI_SlaveTransferHandleIRQ(SPI_Type *base, dspi_slave_handle_t *handle);
|
||||
|
||||
/*!
|
||||
* brief Dummy data for each instance.
|
||||
*
|
||||
* The purpose of this API is to avoid MISRA rule8.5 : Multiple declarations of
|
||||
* externally-linked object or function g_dspiDummyData.
|
||||
*
|
||||
* param base DSPI peripheral base address.
|
||||
*/
|
||||
uint8_t DSPI_GetDummyDataInstance(SPI_Type *base);
|
||||
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif /*_cplusplus*/
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
#endif /*_FSL_DSPI_H_*/
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,31 +1,9 @@
|
|||
/*
|
||||
* Copyright (c) 2015, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2017 NXP
|
||||
* Copyright 2016-2018 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
#ifndef _FSL_DSPI_EDMA_H_
|
||||
#define _FSL_DSPI_EDMA_H_
|
||||
|
|
@ -41,14 +19,20 @@
|
|||
* Definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief DSPI EDMA driver version 2.2.2. */
|
||||
#define FSL_DSPI_EDMA_DRIVER_VERSION (MAKE_VERSION(2, 2, 2))
|
||||
/*@}*/
|
||||
|
||||
/*!
|
||||
* @brief Forward declaration of the DSPI eDMA master handle typedefs.
|
||||
*/
|
||||
* @brief Forward declaration of the DSPI eDMA master handle typedefs.
|
||||
*/
|
||||
typedef struct _dspi_master_edma_handle dspi_master_edma_handle_t;
|
||||
|
||||
/*!
|
||||
* @brief Forward declaration of the DSPI eDMA slave handle typedefs.
|
||||
*/
|
||||
* @brief Forward declaration of the DSPI eDMA slave handle typedefs.
|
||||
*/
|
||||
typedef struct _dspi_slave_edma_handle dspi_slave_edma_handle_t;
|
||||
|
||||
/*!
|
||||
|
|
@ -186,6 +170,21 @@ void DSPI_MasterTransferCreateHandleEDMA(SPI_Type *base,
|
|||
*/
|
||||
status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *handle, dspi_transfer_t *transfer);
|
||||
|
||||
/*!
|
||||
* @brief Transfers a block of data using a eDMA method.
|
||||
*
|
||||
* This function transfers data using eDNA, the transfer mechanism is half-duplex. This is a non-blocking function,
|
||||
* which returns right away. When all data is transferred, the callback function is called.
|
||||
*
|
||||
* @param base DSPI base pointer
|
||||
* @param handle A pointer to the dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer A pointer to the dspi_half_duplex_transfer_t structure.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterHalfDuplexTransferEDMA(SPI_Type *base,
|
||||
dspi_master_edma_handle_t *handle,
|
||||
dspi_half_duplex_transfer_t *xfer);
|
||||
|
||||
/*!
|
||||
* @brief DSPI master aborts a transfer which is using eDMA.
|
||||
*
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,31 +1,9 @@
|
|||
/*
|
||||
* Copyright (c) 2015, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2019 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
#ifndef _FSL_DSPI_H_
|
||||
#define _FSL_DSPI_H_
|
||||
|
|
@ -37,15 +15,14 @@
|
|||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* Definitions
|
||||
*********************************************************************************************************************/
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief DSPI driver version 2.1.3. */
|
||||
#define FSL_DSPI_DRIVER_VERSION (MAKE_VERSION(2, 1, 3))
|
||||
/*! @brief DSPI driver version 2.2.2. */
|
||||
#define FSL_DSPI_DRIVER_VERSION (MAKE_VERSION(2, 2, 2))
|
||||
/*@}*/
|
||||
|
||||
#ifndef DSPI_DUMMY_DATA
|
||||
|
|
@ -56,37 +33,37 @@
|
|||
/*! @brief Status for the DSPI driver.*/
|
||||
enum _dspi_status
|
||||
{
|
||||
kStatus_DSPI_Busy = MAKE_STATUS(kStatusGroup_DSPI, 0), /*!< DSPI transfer is busy.*/
|
||||
kStatus_DSPI_Error = MAKE_STATUS(kStatusGroup_DSPI, 1), /*!< DSPI driver error. */
|
||||
kStatus_DSPI_Idle = MAKE_STATUS(kStatusGroup_DSPI, 2), /*!< DSPI is idle.*/
|
||||
kStatus_DSPI_OutOfRange = MAKE_STATUS(kStatusGroup_DSPI, 3) /*!< DSPI transfer out of range. */
|
||||
kStatus_DSPI_Busy = MAKE_STATUS(kStatusGroup_DSPI, 0), /*!< DSPI transfer is busy.*/
|
||||
kStatus_DSPI_Error = MAKE_STATUS(kStatusGroup_DSPI, 1), /*!< DSPI driver error. */
|
||||
kStatus_DSPI_Idle = MAKE_STATUS(kStatusGroup_DSPI, 2), /*!< DSPI is idle.*/
|
||||
kStatus_DSPI_OutOfRange = MAKE_STATUS(kStatusGroup_DSPI, 3) /*!< DSPI transfer out of range. */
|
||||
};
|
||||
|
||||
/*! @brief DSPI status flags in SPIx_SR register.*/
|
||||
enum _dspi_flags
|
||||
{
|
||||
kDSPI_TxCompleteFlag = SPI_SR_TCF_MASK, /*!< Transfer Complete Flag. */
|
||||
kDSPI_EndOfQueueFlag = SPI_SR_EOQF_MASK, /*!< End of Queue Flag.*/
|
||||
kDSPI_TxFifoUnderflowFlag = SPI_SR_TFUF_MASK, /*!< Transmit FIFO Underflow Flag.*/
|
||||
kDSPI_TxFifoFillRequestFlag = SPI_SR_TFFF_MASK, /*!< Transmit FIFO Fill Flag.*/
|
||||
kDSPI_RxFifoOverflowFlag = SPI_SR_RFOF_MASK, /*!< Receive FIFO Overflow Flag.*/
|
||||
kDSPI_RxFifoDrainRequestFlag = SPI_SR_RFDF_MASK, /*!< Receive FIFO Drain Flag.*/
|
||||
kDSPI_TxAndRxStatusFlag = SPI_SR_TXRXS_MASK, /*!< The module is in Stopped/Running state.*/
|
||||
kDSPI_AllStatusFlag = SPI_SR_TCF_MASK | SPI_SR_EOQF_MASK | SPI_SR_TFUF_MASK | SPI_SR_TFFF_MASK | SPI_SR_RFOF_MASK |
|
||||
SPI_SR_RFDF_MASK | SPI_SR_TXRXS_MASK /*!< All statuses above.*/
|
||||
kDSPI_TxCompleteFlag = (int)SPI_SR_TCF_MASK, /*!< Transfer Complete Flag. */
|
||||
kDSPI_EndOfQueueFlag = SPI_SR_EOQF_MASK, /*!< End of Queue Flag.*/
|
||||
kDSPI_TxFifoUnderflowFlag = SPI_SR_TFUF_MASK, /*!< Transmit FIFO Underflow Flag.*/
|
||||
kDSPI_TxFifoFillRequestFlag = SPI_SR_TFFF_MASK, /*!< Transmit FIFO Fill Flag.*/
|
||||
kDSPI_RxFifoOverflowFlag = SPI_SR_RFOF_MASK, /*!< Receive FIFO Overflow Flag.*/
|
||||
kDSPI_RxFifoDrainRequestFlag = SPI_SR_RFDF_MASK, /*!< Receive FIFO Drain Flag.*/
|
||||
kDSPI_TxAndRxStatusFlag = SPI_SR_TXRXS_MASK, /*!< The module is in Stopped/Running state.*/
|
||||
kDSPI_AllStatusFlag = (int)(SPI_SR_TCF_MASK | SPI_SR_EOQF_MASK | SPI_SR_TFUF_MASK | SPI_SR_TFFF_MASK |
|
||||
SPI_SR_RFOF_MASK | SPI_SR_RFDF_MASK | SPI_SR_TXRXS_MASK) /*!< All statuses above.*/
|
||||
};
|
||||
|
||||
/*! @brief DSPI interrupt source.*/
|
||||
enum _dspi_interrupt_enable
|
||||
{
|
||||
kDSPI_TxCompleteInterruptEnable = SPI_RSER_TCF_RE_MASK, /*!< TCF interrupt enable.*/
|
||||
kDSPI_EndOfQueueInterruptEnable = SPI_RSER_EOQF_RE_MASK, /*!< EOQF interrupt enable.*/
|
||||
kDSPI_TxFifoUnderflowInterruptEnable = SPI_RSER_TFUF_RE_MASK, /*!< TFUF interrupt enable.*/
|
||||
kDSPI_TxFifoFillRequestInterruptEnable = SPI_RSER_TFFF_RE_MASK, /*!< TFFF interrupt enable, DMA disable.*/
|
||||
kDSPI_RxFifoOverflowInterruptEnable = SPI_RSER_RFOF_RE_MASK, /*!< RFOF interrupt enable.*/
|
||||
kDSPI_RxFifoDrainRequestInterruptEnable = SPI_RSER_RFDF_RE_MASK, /*!< RFDF interrupt enable, DMA disable.*/
|
||||
kDSPI_AllInterruptEnable = SPI_RSER_TCF_RE_MASK | SPI_RSER_EOQF_RE_MASK | SPI_RSER_TFUF_RE_MASK |
|
||||
SPI_RSER_TFFF_RE_MASK | SPI_RSER_RFOF_RE_MASK | SPI_RSER_RFDF_RE_MASK
|
||||
kDSPI_TxCompleteInterruptEnable = (int)SPI_RSER_TCF_RE_MASK, /*!< TCF interrupt enable.*/
|
||||
kDSPI_EndOfQueueInterruptEnable = SPI_RSER_EOQF_RE_MASK, /*!< EOQF interrupt enable.*/
|
||||
kDSPI_TxFifoUnderflowInterruptEnable = SPI_RSER_TFUF_RE_MASK, /*!< TFUF interrupt enable.*/
|
||||
kDSPI_TxFifoFillRequestInterruptEnable = SPI_RSER_TFFF_RE_MASK, /*!< TFFF interrupt enable, DMA disable.*/
|
||||
kDSPI_RxFifoOverflowInterruptEnable = SPI_RSER_RFOF_RE_MASK, /*!< RFOF interrupt enable.*/
|
||||
kDSPI_RxFifoDrainRequestInterruptEnable = SPI_RSER_RFDF_RE_MASK, /*!< RFDF interrupt enable, DMA disable.*/
|
||||
kDSPI_AllInterruptEnable = (int)(SPI_RSER_TCF_RE_MASK | SPI_RSER_EOQF_RE_MASK | SPI_RSER_TFUF_RE_MASK |
|
||||
SPI_RSER_TFFF_RE_MASK | SPI_RSER_RFOF_RE_MASK | SPI_RSER_RFDF_RE_MASK)
|
||||
/*!< All above interrupts enable.*/
|
||||
};
|
||||
|
||||
|
|
@ -103,11 +80,12 @@ enum _dspi_dma_enable
|
|||
typedef enum _dspi_master_slave_mode
|
||||
{
|
||||
kDSPI_Master = 1U, /*!< DSPI peripheral operates in master mode.*/
|
||||
kDSPI_Slave = 0U /*!< DSPI peripheral operates in slave mode.*/
|
||||
kDSPI_Slave = 0U /*!< DSPI peripheral operates in slave mode.*/
|
||||
} dspi_master_slave_mode_t;
|
||||
|
||||
/*!
|
||||
* @brief DSPI Sample Point: Controls when the DSPI master samples SIN in the Modified Transfer Format. This field is valid
|
||||
* @brief DSPI Sample Point: Controls when the DSPI master samples SIN in the Modified Transfer Format. This field is
|
||||
* valid
|
||||
* only when the CPHA bit in the CTAR register is 0.
|
||||
*/
|
||||
typedef enum _dspi_master_sample_point
|
||||
|
|
@ -132,26 +110,26 @@ typedef enum _dspi_which_pcs_config
|
|||
typedef enum _dspi_pcs_polarity_config
|
||||
{
|
||||
kDSPI_PcsActiveHigh = 0U, /*!< Pcs Active High (idles low). */
|
||||
kDSPI_PcsActiveLow = 1U /*!< Pcs Active Low (idles high). */
|
||||
kDSPI_PcsActiveLow = 1U /*!< Pcs Active Low (idles high). */
|
||||
} dspi_pcs_polarity_config_t;
|
||||
|
||||
/*! @brief DSPI Peripheral Chip Select (Pcs) Polarity.*/
|
||||
enum _dspi_pcs_polarity
|
||||
{
|
||||
kDSPI_Pcs0ActiveLow = 1U << 0, /*!< Pcs0 Active Low (idles high). */
|
||||
kDSPI_Pcs1ActiveLow = 1U << 1, /*!< Pcs1 Active Low (idles high). */
|
||||
kDSPI_Pcs2ActiveLow = 1U << 2, /*!< Pcs2 Active Low (idles high). */
|
||||
kDSPI_Pcs3ActiveLow = 1U << 3, /*!< Pcs3 Active Low (idles high). */
|
||||
kDSPI_Pcs4ActiveLow = 1U << 4, /*!< Pcs4 Active Low (idles high). */
|
||||
kDSPI_Pcs5ActiveLow = 1U << 5, /*!< Pcs5 Active Low (idles high). */
|
||||
kDSPI_PcsAllActiveLow = 0xFFU /*!< Pcs0 to Pcs5 Active Low (idles high). */
|
||||
kDSPI_Pcs0ActiveLow = 1U << 0, /*!< Pcs0 Active Low (idles high). */
|
||||
kDSPI_Pcs1ActiveLow = 1U << 1, /*!< Pcs1 Active Low (idles high). */
|
||||
kDSPI_Pcs2ActiveLow = 1U << 2, /*!< Pcs2 Active Low (idles high). */
|
||||
kDSPI_Pcs3ActiveLow = 1U << 3, /*!< Pcs3 Active Low (idles high). */
|
||||
kDSPI_Pcs4ActiveLow = 1U << 4, /*!< Pcs4 Active Low (idles high). */
|
||||
kDSPI_Pcs5ActiveLow = 1U << 5, /*!< Pcs5 Active Low (idles high). */
|
||||
kDSPI_PcsAllActiveLow = 0xFFU /*!< Pcs0 to Pcs5 Active Low (idles high). */
|
||||
};
|
||||
|
||||
/*! @brief DSPI clock polarity configuration for a given CTAR.*/
|
||||
typedef enum _dspi_clock_polarity
|
||||
{
|
||||
kDSPI_ClockPolarityActiveHigh = 0U, /*!< CPOL=0. Active-high DSPI clock (idles low).*/
|
||||
kDSPI_ClockPolarityActiveLow = 1U /*!< CPOL=1. Active-low DSPI clock (idles high).*/
|
||||
kDSPI_ClockPolarityActiveLow = 1U /*!< CPOL=1. Active-low DSPI clock (idles high).*/
|
||||
} dspi_clock_polarity_t;
|
||||
|
||||
/*! @brief DSPI clock phase configuration for a given CTAR.*/
|
||||
|
|
@ -216,8 +194,9 @@ enum _dspi_transfer_config_flag_for_master
|
|||
kDSPI_MasterPcs4 = 4U << DSPI_MASTER_PCS_SHIFT, /*!< DSPI master transfer use PCS4 signal. */
|
||||
kDSPI_MasterPcs5 = 5U << DSPI_MASTER_PCS_SHIFT, /*!< DSPI master transfer use PCS5 signal. */
|
||||
|
||||
kDSPI_MasterPcsContinuous = 1U << 20, /*!< Indicates whether the PCS signal is continuous. */
|
||||
kDSPI_MasterActiveAfterTransfer = 1U << 21, /*!< Indicates whether the PCS signal is active after the last frame transfer.*/
|
||||
kDSPI_MasterPcsContinuous = 1U << 20, /*!< Indicates whether the PCS signal is continuous. */
|
||||
kDSPI_MasterActiveAfterTransfer =
|
||||
1U << 21, /*!< Indicates whether the PCS signal is active after the last frame transfer.*/
|
||||
};
|
||||
|
||||
#define DSPI_SLAVE_CTAR_SHIFT (0U) /*!< DSPI slave CTAR shift macro; used internally. */
|
||||
|
|
@ -240,7 +219,7 @@ enum _dspi_transfer_state
|
|||
/*! @brief DSPI master command date configuration used for the SPIx_PUSHR.*/
|
||||
typedef struct _dspi_command_data_config
|
||||
{
|
||||
bool isPcsContinuous; /*!< Option to enable the continuous assertion of the chip select between transfers.*/
|
||||
bool isPcsContinuous; /*!< Option to enable the continuous assertion of the chip select between transfers.*/
|
||||
dspi_ctar_selection_t whichCtar; /*!< The desired Clock and Transfer Attributes
|
||||
Register (CTAR) to use for CTAS.*/
|
||||
dspi_which_pcs_t whichPcs; /*!< The desired PCS signal to use for the data transfer.*/
|
||||
|
|
@ -257,10 +236,10 @@ typedef struct _dspi_master_ctar_config
|
|||
dspi_clock_phase_t cpha; /*!< Clock phase. */
|
||||
dspi_shift_direction_t direction; /*!< MSB or LSB data shift direction. */
|
||||
|
||||
uint32_t pcsToSckDelayInNanoSec; /*!< PCS to SCK delay time in nanoseconds; setting to 0 sets the minimum
|
||||
delay. It also sets the boundary value if out of range.*/
|
||||
uint32_t lastSckToPcsDelayInNanoSec; /*!< The last SCK to PCS delay time in nanoseconds; setting to 0 sets the
|
||||
minimum delay. It also sets the boundary value if out of range.*/
|
||||
uint32_t pcsToSckDelayInNanoSec; /*!< PCS to SCK delay time in nanoseconds; setting to 0 sets the minimum
|
||||
delay. It also sets the boundary value if out of range.*/
|
||||
uint32_t lastSckToPcsDelayInNanoSec; /*!< The last SCK to PCS delay time in nanoseconds; setting to 0 sets the
|
||||
minimum delay. It also sets the boundary value if out of range.*/
|
||||
|
||||
uint32_t betweenTransferDelayInNanoSec; /*!< After the SCK delay time in nanoseconds; setting to 0 sets the minimum
|
||||
delay. It also sets the boundary value if out of range.*/
|
||||
|
|
@ -314,13 +293,13 @@ typedef struct _dspi_slave_config
|
|||
} dspi_slave_config_t;
|
||||
|
||||
/*!
|
||||
* @brief Forward declaration of the _dspi_master_handle typedefs.
|
||||
*/
|
||||
* @brief Forward declaration of the _dspi_master_handle typedefs.
|
||||
*/
|
||||
typedef struct _dspi_master_handle dspi_master_handle_t;
|
||||
|
||||
/*!
|
||||
* @brief Forward declaration of the _dspi_slave_handle typedefs.
|
||||
*/
|
||||
* @brief Forward declaration of the _dspi_slave_handle typedefs.
|
||||
*/
|
||||
typedef struct _dspi_slave_handle dspi_slave_handle_t;
|
||||
|
||||
/*!
|
||||
|
|
@ -355,12 +334,24 @@ typedef struct _dspi_transfer
|
|||
uint8_t *rxData; /*!< Receive buffer. */
|
||||
volatile size_t dataSize; /*!< Transfer bytes. */
|
||||
|
||||
uint32_t
|
||||
configFlags; /*!< Transfer transfer configuration flags; set from _dspi_transfer_config_flag_for_master if the
|
||||
transfer is used for master or _dspi_transfer_config_flag_for_slave enumeration if the transfer
|
||||
is used for slave.*/
|
||||
uint32_t configFlags; /*!< Transfer transfer configuration flags; set from _dspi_transfer_config_flag_for_master if
|
||||
the transfer is used for master or _dspi_transfer_config_flag_for_slave enumeration if the
|
||||
transfer is used for slave.*/
|
||||
} dspi_transfer_t;
|
||||
|
||||
/*! @brief DSPI half-duplex(master) transfer structure */
|
||||
typedef struct _dspi_half_duplex_transfer
|
||||
{
|
||||
uint8_t *txData; /*!< Send buffer */
|
||||
uint8_t *rxData; /*!< Receive buffer */
|
||||
size_t txDataSize; /*!< Transfer bytes for transmit */
|
||||
size_t rxDataSize; /*!< Transfer bytes */
|
||||
uint32_t configFlags; /*!< Transfer configuration flags; set from _dspi_transfer_config_flag_for_master. */
|
||||
bool isPcsAssertInTransfer; /*!< If Pcs pin keep assert between transmit and receive. true for assert and false for
|
||||
deassert. */
|
||||
bool isTransmitFirst; /*!< True for transmit first and false for receive first. */
|
||||
} dspi_half_duplex_transfer_t;
|
||||
|
||||
/*! @brief DSPI master transfer handle structure used for transactional API. */
|
||||
struct _dspi_master_handle
|
||||
{
|
||||
|
|
@ -370,8 +361,9 @@ struct _dspi_master_handle
|
|||
|
||||
uint8_t fifoSize; /*!< FIFO dataSize. */
|
||||
|
||||
volatile bool isPcsActiveAfterTransfer; /*!< Indicates whether the PCS signal is active after the last frame transfer.*/
|
||||
volatile bool isThereExtraByte; /*!< Indicates whether there are extra bytes.*/
|
||||
volatile bool
|
||||
isPcsActiveAfterTransfer; /*!< Indicates whether the PCS signal is active after the last frame transfer.*/
|
||||
volatile bool isThereExtraByte; /*!< Indicates whether there are extra bytes.*/
|
||||
|
||||
uint8_t *volatile txData; /*!< Send buffer. */
|
||||
uint8_t *volatile rxData; /*!< Receive buffer. */
|
||||
|
|
@ -525,7 +517,7 @@ static inline void DSPI_Enable(SPI_Type *base, bool enable)
|
|||
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @name Status
|
||||
|
|
@ -563,7 +555,7 @@ static inline void DSPI_ClearStatusFlags(SPI_Type *base, uint32_t statusFlags)
|
|||
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @name Interrupts
|
||||
|
|
@ -575,6 +567,7 @@ static inline void DSPI_ClearStatusFlags(SPI_Type *base, uint32_t statusFlags)
|
|||
*
|
||||
* This function configures the various interrupt masks of the DSPI. The parameters are a base and an interrupt mask.
|
||||
* Note, for Tx Fill and Rx FIFO drain requests, enable the interrupt request and disable the DMA request.
|
||||
* Do not use this API(write to RSER register) while DSPI is in running state.
|
||||
*
|
||||
* @code
|
||||
* DSPI_EnableInterrupts(base, kDSPI_TxCompleteInterruptEnable | kDSPI_EndOfQueueInterruptEnable );
|
||||
|
|
@ -602,7 +595,7 @@ static inline void DSPI_DisableInterrupts(SPI_Type *base, uint32_t mask)
|
|||
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @name DMA Control
|
||||
|
|
@ -682,12 +675,18 @@ static inline uint32_t DSPI_GetRxRegisterAddress(SPI_Type *base)
|
|||
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @name Bus Operations
|
||||
* @{
|
||||
*/
|
||||
/*!
|
||||
* @brief Get instance number for DSPI module.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
*/
|
||||
uint32_t DSPI_GetInstance(SPI_Type *base);
|
||||
|
||||
/*!
|
||||
* @brief Configures the DSPI for master or slave.
|
||||
|
|
@ -708,7 +707,14 @@ static inline void DSPI_SetMasterSlaveMode(SPI_Type *base, dspi_master_slave_mod
|
|||
*/
|
||||
static inline bool DSPI_IsMaster(SPI_Type *base)
|
||||
{
|
||||
return (bool)((base->MCR) & SPI_MCR_MSTR_MASK);
|
||||
if (0U != ((base->MCR) & SPI_MCR_MSTR_MASK))
|
||||
{
|
||||
return true;
|
||||
}
|
||||
else
|
||||
{
|
||||
return false;
|
||||
}
|
||||
}
|
||||
/*!
|
||||
* @brief Starts the DSPI transfers and clears HALT bit in MCR.
|
||||
|
|
@ -746,8 +752,8 @@ static inline void DSPI_StopTransfer(SPI_Type *base)
|
|||
*/
|
||||
static inline void DSPI_SetFifoEnable(SPI_Type *base, bool enableTxFifo, bool enableRxFifo)
|
||||
{
|
||||
base->MCR = (base->MCR & (~(SPI_MCR_DIS_RXF_MASK | SPI_MCR_DIS_TXF_MASK))) | SPI_MCR_DIS_TXF(!enableTxFifo) |
|
||||
SPI_MCR_DIS_RXF(!enableRxFifo);
|
||||
base->MCR = (base->MCR & (~(SPI_MCR_DIS_RXF_MASK | SPI_MCR_DIS_TXF_MASK))) |
|
||||
SPI_MCR_DIS_TXF((false == enableTxFifo ? 1U : 0U)) | SPI_MCR_DIS_RXF((false == enableRxFifo ? 1U : 0U));
|
||||
}
|
||||
|
||||
/*!
|
||||
|
|
@ -759,8 +765,8 @@ static inline void DSPI_SetFifoEnable(SPI_Type *base, bool enableTxFifo, bool en
|
|||
*/
|
||||
static inline void DSPI_FlushFifo(SPI_Type *base, bool flushTxFifo, bool flushRxFifo)
|
||||
{
|
||||
base->MCR = (base->MCR & (~(SPI_MCR_CLR_TXF_MASK | SPI_MCR_CLR_RXF_MASK))) | SPI_MCR_CLR_TXF(flushTxFifo) |
|
||||
SPI_MCR_CLR_RXF(flushRxFifo);
|
||||
base->MCR = (base->MCR & (~(SPI_MCR_CLR_TXF_MASK | SPI_MCR_CLR_RXF_MASK))) |
|
||||
SPI_MCR_CLR_TXF((true == flushTxFifo ? 1U : 0U)) | SPI_MCR_CLR_RXF((true == flushRxFifo ? 1U : 0U));
|
||||
}
|
||||
|
||||
/*!
|
||||
|
|
@ -950,10 +956,12 @@ static inline uint32_t DSPI_MasterGetFormattedCommand(dspi_command_data_config_t
|
|||
* @brief Writes a 32-bit data word (16-bit command appended with 16-bit data) into the data
|
||||
* buffer master mode and waits till complete to return.
|
||||
*
|
||||
* In this function, the user must append the 16-bit data to the 16-bit command information and then provide the total 32-bit word
|
||||
* In this function, the user must append the 16-bit data to the 16-bit command information and then provide the total
|
||||
* 32-bit word
|
||||
* as the data to send.
|
||||
* The command portion provides characteristics of the data, such as the optional continuous chip select operation
|
||||
* between transfers, the desired Clock and Transfer Attributes register to use for the associated SPI frame, the desired PCS
|
||||
* between transfers, the desired Clock and Transfer Attributes register to use for the associated SPI frame, the
|
||||
* desired PCS
|
||||
* signal to use for the data transfer, whether the current transfer is the last in the queue, and whether to clear the
|
||||
* transfer count (normally needed when sending the first frame of a data packet). The user is responsible for
|
||||
* appending this command with the data to send. This is an example:
|
||||
|
|
@ -968,20 +976,20 @@ static inline uint32_t DSPI_MasterGetFormattedCommand(dspi_command_data_config_t
|
|||
*
|
||||
* For a blocking polling transfer, see methods below.
|
||||
* Option 1:
|
||||
* uint32_t command_to_send = DSPI_MasterGetFormattedCommand(&command);
|
||||
* uint32_t data0 = command_to_send | data_need_to_send_0;
|
||||
* uint32_t data1 = command_to_send | data_need_to_send_1;
|
||||
* uint32_t data2 = command_to_send | data_need_to_send_2;
|
||||
*
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data0);
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data1);
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data2);
|
||||
*
|
||||
* Option 2:
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_0);
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_1);
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_2);
|
||||
*
|
||||
* uint32_t command_to_send = DSPI_MasterGetFormattedCommand(&command);
|
||||
* uint32_t data0 = command_to_send | data_need_to_send_0;
|
||||
* uint32_t data1 = command_to_send | data_need_to_send_1;
|
||||
* uint32_t data2 = command_to_send | data_need_to_send_2;
|
||||
*
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data0);
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data1);
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data2);
|
||||
*
|
||||
* Option 2:
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_0);
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_1);
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_2);
|
||||
*
|
||||
* @param base DSPI peripheral address.
|
||||
* @param data The data word (command and data combined) to be sent.
|
||||
*/
|
||||
|
|
@ -1022,9 +1030,17 @@ static inline uint32_t DSPI_ReadData(SPI_Type *base)
|
|||
return (base->POPR);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Set up the dummy data.
|
||||
*
|
||||
* @param base DSPI peripheral address.
|
||||
* @param dummyData Data to be transferred when tx buffer is NULL.
|
||||
*/
|
||||
void DSPI_SetDummyData(SPI_Type *base, uint8_t dummyData);
|
||||
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @name Transactional
|
||||
|
|
@ -1073,6 +1089,35 @@ status_t DSPI_MasterTransferBlocking(SPI_Type *base, dspi_transfer_t *transfer);
|
|||
*/
|
||||
status_t DSPI_MasterTransferNonBlocking(SPI_Type *base, dspi_master_handle_t *handle, dspi_transfer_t *transfer);
|
||||
|
||||
/*!
|
||||
* @brief Transfers a block of data using a polling method.
|
||||
*
|
||||
* This function will do a half-duplex transfer for DSPI master, This is a blocking function,
|
||||
* which does not retuen until all transfer have been completed. And data transfer will be half-duplex,
|
||||
* users can set transmit first or receive first.
|
||||
*
|
||||
* @param base DSPI base pointer
|
||||
* @param xfer pointer to dspi_half_duplex_transfer_t structure
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterHalfDuplexTransferBlocking(SPI_Type *base, dspi_half_duplex_transfer_t *xfer);
|
||||
|
||||
/*!
|
||||
* @brief Performs a non-blocking DSPI interrupt transfer.
|
||||
*
|
||||
* This function transfers data using interrupts, the transfer mechanism is half-duplex. This is a non-blocking
|
||||
* function,
|
||||
* which returns right away. When all data is transferred, the callback function is called.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_master_handle_t structure which stores the transfer state
|
||||
* @param xfer pointer to dspi_half_duplex_transfer_t structure
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterHalfDuplexTransferNonBlocking(SPI_Type *base,
|
||||
dspi_master_handle_t *handle,
|
||||
dspi_half_duplex_transfer_t *xfer);
|
||||
|
||||
/*!
|
||||
* @brief Gets the master transfer count.
|
||||
*
|
||||
|
|
@ -1166,15 +1211,25 @@ void DSPI_SlaveTransferAbort(SPI_Type *base, dspi_slave_handle_t *handle);
|
|||
*/
|
||||
void DSPI_SlaveTransferHandleIRQ(SPI_Type *base, dspi_slave_handle_t *handle);
|
||||
|
||||
/*!
|
||||
* brief Dummy data for each instance.
|
||||
*
|
||||
* The purpose of this API is to avoid MISRA rule8.5 : Multiple declarations of
|
||||
* externally-linked object or function g_dspiDummyData.
|
||||
*
|
||||
* param base DSPI peripheral base address.
|
||||
*/
|
||||
uint8_t DSPI_GetDummyDataInstance(SPI_Type *base);
|
||||
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif /*_cplusplus*/
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
#endif /*_FSL_DSPI_H_*/
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,31 +1,9 @@
|
|||
/*
|
||||
* Copyright (c) 2015, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2018 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
#ifndef _FSL_DSPI_EDMA_H_
|
||||
#define _FSL_DSPI_EDMA_H_
|
||||
|
|
@ -41,14 +19,20 @@
|
|||
* Definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief DSPI EDMA driver version 2.2.2. */
|
||||
#define FSL_DSPI_EDMA_DRIVER_VERSION (MAKE_VERSION(2, 2, 2))
|
||||
/*@}*/
|
||||
|
||||
/*!
|
||||
* @brief Forward declaration of the DSPI eDMA master handle typedefs.
|
||||
*/
|
||||
* @brief Forward declaration of the DSPI eDMA master handle typedefs.
|
||||
*/
|
||||
typedef struct _dspi_master_edma_handle dspi_master_edma_handle_t;
|
||||
|
||||
/*!
|
||||
* @brief Forward declaration of the DSPI eDMA slave handle typedefs.
|
||||
*/
|
||||
* @brief Forward declaration of the DSPI eDMA slave handle typedefs.
|
||||
*/
|
||||
typedef struct _dspi_slave_edma_handle dspi_slave_edma_handle_t;
|
||||
|
||||
/*!
|
||||
|
|
@ -186,6 +170,21 @@ void DSPI_MasterTransferCreateHandleEDMA(SPI_Type *base,
|
|||
*/
|
||||
status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *handle, dspi_transfer_t *transfer);
|
||||
|
||||
/*!
|
||||
* @brief Transfers a block of data using a eDMA method.
|
||||
*
|
||||
* This function transfers data using eDNA, the transfer mechanism is half-duplex. This is a non-blocking function,
|
||||
* which returns right away. When all data is transferred, the callback function is called.
|
||||
*
|
||||
* @param base DSPI base pointer
|
||||
* @param handle A pointer to the dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer A pointer to the dspi_half_duplex_transfer_t structure.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterHalfDuplexTransferEDMA(SPI_Type *base,
|
||||
dspi_master_edma_handle_t *handle,
|
||||
dspi_half_duplex_transfer_t *xfer);
|
||||
|
||||
/*!
|
||||
* @brief DSPI master aborts a transfer which is using eDMA.
|
||||
*
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -1,31 +1,9 @@
|
|||
/*
|
||||
* Copyright (c) 2015, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2018 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
#ifndef _FSL_DSPI_EDMA_H_
|
||||
#define _FSL_DSPI_EDMA_H_
|
||||
|
|
@ -37,28 +15,33 @@
|
|||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief DSPI EDMA driver version 2.2.2. */
|
||||
#define FSL_DSPI_EDMA_DRIVER_VERSION (MAKE_VERSION(2, 2, 2))
|
||||
/*@}*/
|
||||
|
||||
/*!
|
||||
* @brief Forward declaration of the DSPI eDMA master handle typedefs.
|
||||
*/
|
||||
* @brief Forward declaration of the DSPI eDMA master handle typedefs.
|
||||
*/
|
||||
typedef struct _dspi_master_edma_handle dspi_master_edma_handle_t;
|
||||
|
||||
/*!
|
||||
* @brief Forward declaration of the DSPI eDMA slave handle typedefs.
|
||||
*/
|
||||
* @brief Forward declaration of the DSPI eDMA slave handle typedefs.
|
||||
*/
|
||||
typedef struct _dspi_slave_edma_handle dspi_slave_edma_handle_t;
|
||||
|
||||
/*!
|
||||
* @brief Completion callback function pointer type.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle Pointer to the handle for the DSPI master.
|
||||
* @param handle A pointer to the handle for the DSPI master.
|
||||
* @param status Success or error code describing whether the transfer completed.
|
||||
* @param userData Arbitrary pointer-dataSized value passed from the application.
|
||||
* @param userData An arbitrary pointer-dataSized value passed from the application.
|
||||
*/
|
||||
typedef void (*dspi_master_edma_transfer_callback_t)(SPI_Type *base,
|
||||
dspi_master_edma_handle_t *handle,
|
||||
|
|
@ -68,38 +51,39 @@ typedef void (*dspi_master_edma_transfer_callback_t)(SPI_Type *base,
|
|||
* @brief Completion callback function pointer type.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle Pointer to the handle for the DSPI slave.
|
||||
* @param handle A pointer to the handle for the DSPI slave.
|
||||
* @param status Success or error code describing whether the transfer completed.
|
||||
* @param userData Arbitrary pointer-dataSized value passed from the application.
|
||||
* @param userData An arbitrary pointer-dataSized value passed from the application.
|
||||
*/
|
||||
typedef void (*dspi_slave_edma_transfer_callback_t)(SPI_Type *base,
|
||||
dspi_slave_edma_handle_t *handle,
|
||||
status_t status,
|
||||
void *userData);
|
||||
|
||||
/*! @brief DSPI master eDMA transfer handle structure used for transactional API. */
|
||||
/*! @brief DSPI master eDMA transfer handle structure used for the transactional API. */
|
||||
struct _dspi_master_edma_handle
|
||||
{
|
||||
uint32_t bitsPerFrame; /*!< Desired number of bits per frame. */
|
||||
volatile uint32_t command; /*!< Desired data command. */
|
||||
volatile uint32_t lastCommand; /*!< Desired last data command. */
|
||||
uint32_t bitsPerFrame; /*!< The desired number of bits per frame. */
|
||||
volatile uint32_t command; /*!< The desired data command. */
|
||||
volatile uint32_t lastCommand; /*!< The desired last data command. */
|
||||
|
||||
uint8_t fifoSize; /*!< FIFO dataSize. */
|
||||
|
||||
volatile bool isPcsActiveAfterTransfer; /*!< Is PCS signal keep active after the last frame transfer.*/
|
||||
volatile bool isThereExtraByte; /*!< Is there extra byte.*/
|
||||
volatile bool
|
||||
isPcsActiveAfterTransfer; /*!< Indicates whether the PCS signal keeps active after the last frame transfer.*/
|
||||
|
||||
uint8_t nbytes; /*!< eDMA minor byte transfer count initially configured. */
|
||||
volatile uint8_t state; /*!< DSPI transfer state , _dspi_transfer_state.*/
|
||||
|
||||
uint8_t *volatile txData; /*!< Send buffer. */
|
||||
uint8_t *volatile rxData; /*!< Receive buffer. */
|
||||
volatile size_t remainingSendByteCount; /*!< Number of bytes remaining to send.*/
|
||||
volatile size_t remainingReceiveByteCount; /*!< Number of bytes remaining to receive.*/
|
||||
size_t totalByteCount; /*!< Number of transfer bytes*/
|
||||
volatile size_t remainingSendByteCount; /*!< A number of bytes remaining to send.*/
|
||||
volatile size_t remainingReceiveByteCount; /*!< A number of bytes remaining to receive.*/
|
||||
size_t totalByteCount; /*!< A number of transfer bytes*/
|
||||
|
||||
uint32_t rxBuffIfNull; /*!< Used if there is not rxData for DMA purpose.*/
|
||||
uint32_t txBuffIfNull; /*!< Used if there is not txData for DMA purpose.*/
|
||||
|
||||
volatile uint8_t state; /*!< DSPI transfer state , _dspi_transfer_state.*/
|
||||
|
||||
dspi_master_edma_transfer_callback_t callback; /*!< Completion callback. */
|
||||
void *userData; /*!< Callback user data. */
|
||||
|
||||
|
|
@ -110,33 +94,30 @@ struct _dspi_master_edma_handle
|
|||
edma_tcd_t dspiSoftwareTCD[2]; /*!<SoftwareTCD , internal used*/
|
||||
};
|
||||
|
||||
/*! @brief DSPI slave eDMA transfer handle structure used for transactional API.*/
|
||||
/*! @brief DSPI slave eDMA transfer handle structure used for the transactional API.*/
|
||||
struct _dspi_slave_edma_handle
|
||||
{
|
||||
uint32_t bitsPerFrame; /*!< Desired number of bits per frame. */
|
||||
volatile bool isThereExtraByte; /*!< Is there extra byte.*/
|
||||
uint32_t bitsPerFrame; /*!< The desired number of bits per frame. */
|
||||
|
||||
uint8_t *volatile txData; /*!< Send buffer. */
|
||||
uint8_t *volatile rxData; /*!< Receive buffer. */
|
||||
volatile size_t remainingSendByteCount; /*!< Number of bytes remaining to send.*/
|
||||
volatile size_t remainingReceiveByteCount; /*!< Number of bytes remaining to receive.*/
|
||||
size_t totalByteCount; /*!< Number of transfer bytes*/
|
||||
volatile size_t remainingSendByteCount; /*!< A number of bytes remaining to send.*/
|
||||
volatile size_t remainingReceiveByteCount; /*!< A number of bytes remaining to receive.*/
|
||||
size_t totalByteCount; /*!< A number of transfer bytes*/
|
||||
|
||||
uint32_t rxBuffIfNull; /*!< Used if there is not rxData for DMA purpose.*/
|
||||
uint32_t txBuffIfNull; /*!< Used if there is not txData for DMA purpose.*/
|
||||
uint32_t txLastData; /*!< Used if there is an extra byte when 16bits per frame for DMA purpose.*/
|
||||
|
||||
volatile uint8_t state; /*!< DSPI transfer state.*/
|
||||
uint8_t nbytes; /*!< eDMA minor byte transfer count initially configured. */
|
||||
|
||||
uint32_t errorCount; /*!< Error count for slave transfer.*/
|
||||
volatile uint8_t state; /*!< DSPI transfer state.*/
|
||||
|
||||
dspi_slave_edma_transfer_callback_t callback; /*!< Completion callback. */
|
||||
void *userData; /*!< Callback user data. */
|
||||
|
||||
edma_handle_t *edmaRxRegToRxDataHandle; /*!<edma_handle_t handle point used for RxReg to RxData buff*/
|
||||
edma_handle_t *edmaTxDataToTxRegHandle; /*!<edma_handle_t handle point used for TxData to TxReg*/
|
||||
|
||||
edma_tcd_t dspiSoftwareTCD[2]; /*!<SoftwareTCD , internal used*/
|
||||
};
|
||||
|
||||
/***********************************************************************************************************************
|
||||
|
|
@ -152,17 +133,18 @@ extern "C" {
|
|||
* @brief Initializes the DSPI master eDMA handle.
|
||||
*
|
||||
* This function initializes the DSPI eDMA handle which can be used for other DSPI transactional APIs. Usually, for a
|
||||
* specified DSPI instance, user need only call this API once to get the initialized handle.
|
||||
* specified DSPI instance, call this API once to get the initialized handle.
|
||||
*
|
||||
* Note that DSPI eDMA has separated (RX and TX as two sources) or shared (RX and TX are the same source) DMA request source.
|
||||
* (1)For the separated DMA request source, enable and set the RX DMAMUX source for edmaRxRegToRxDataHandle and
|
||||
* Note that DSPI eDMA has separated (RX and TX as two sources) or shared (RX and TX are the same source) DMA request
|
||||
* source.
|
||||
* (1) For the separated DMA request source, enable and set the RX DMAMUX source for edmaRxRegToRxDataHandle and
|
||||
* TX DMAMUX source for edmaIntermediaryToTxRegHandle.
|
||||
* (2)For the shared DMA request source, enable and set the RX/RX DMAMUX source for the edmaRxRegToRxDataHandle.
|
||||
* (2) For the shared DMA request source, enable and set the RX/RX DMAMUX source for the edmaRxRegToRxDataHandle.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle DSPI handle pointer to dspi_master_edma_handle_t.
|
||||
* @param callback DSPI callback.
|
||||
* @param userData callback function parameter.
|
||||
* @param userData A callback function parameter.
|
||||
* @param edmaRxRegToRxDataHandle edmaRxRegToRxDataHandle pointer to edma_handle_t.
|
||||
* @param edmaTxDataToIntermediaryHandle edmaTxDataToIntermediaryHandle pointer to edma_handle_t.
|
||||
* @param edmaIntermediaryToTxRegHandle edmaIntermediaryToTxRegHandle pointer to edma_handle_t.
|
||||
|
|
@ -178,34 +160,49 @@ void DSPI_MasterTransferCreateHandleEDMA(SPI_Type *base,
|
|||
/*!
|
||||
* @brief DSPI master transfer data using eDMA.
|
||||
*
|
||||
* This function transfer data using eDMA. This is non-blocking function, which returns right away. When all data
|
||||
* have been transfer, the callback function is called.
|
||||
* This function transfers data using eDMA. This is a non-blocking function, which returns right away. When all data
|
||||
* is transferred, the callback function is called.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer pointer to dspi_transfer_t structure.
|
||||
* @param handle A pointer to the dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer A pointer to the dspi_transfer_t structure.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *handle, dspi_transfer_t *transfer);
|
||||
|
||||
/*!
|
||||
* @brief DSPI master aborts a transfer which using eDMA.
|
||||
* @brief Transfers a block of data using a eDMA method.
|
||||
*
|
||||
* This function aborts a transfer which using eDMA.
|
||||
* This function transfers data using eDNA, the transfer mechanism is half-duplex. This is a non-blocking function,
|
||||
* which returns right away. When all data is transferred, the callback function is called.
|
||||
*
|
||||
* @param base DSPI base pointer
|
||||
* @param handle A pointer to the dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer A pointer to the dspi_half_duplex_transfer_t structure.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterHalfDuplexTransferEDMA(SPI_Type *base,
|
||||
dspi_master_edma_handle_t *handle,
|
||||
dspi_half_duplex_transfer_t *xfer);
|
||||
|
||||
/*!
|
||||
* @brief DSPI master aborts a transfer which is using eDMA.
|
||||
*
|
||||
* This function aborts a transfer which is using eDMA.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param handle A pointer to the dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
*/
|
||||
void DSPI_MasterTransferAbortEDMA(SPI_Type *base, dspi_master_edma_handle_t *handle);
|
||||
|
||||
/*!
|
||||
* @brief Gets the master eDMA transfer count.
|
||||
*
|
||||
* This function get the master eDMA transfer count.
|
||||
* This function gets the master eDMA transfer count.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param count Number of bytes transferred so far by the non-blocking transaction.
|
||||
* @param handle A pointer to the dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param count A number of bytes transferred by the non-blocking transaction.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterTransferGetCountEDMA(SPI_Type *base, dspi_master_edma_handle_t *handle, size_t *count);
|
||||
|
|
@ -216,7 +213,8 @@ status_t DSPI_MasterTransferGetCountEDMA(SPI_Type *base, dspi_master_edma_handle
|
|||
* This function initializes the DSPI eDMA handle which can be used for other DSPI transactional APIs. Usually, for a
|
||||
* specified DSPI instance, call this API once to get the initialized handle.
|
||||
*
|
||||
* Note that DSPI eDMA has separated (RN and TX in 2 sources) or shared (RX and TX are the same source) DMA request source.
|
||||
* Note that DSPI eDMA has separated (RN and TX in 2 sources) or shared (RX and TX are the same source) DMA request
|
||||
* source.
|
||||
* (1)For the separated DMA request source, enable and set the RX DMAMUX source for edmaRxRegToRxDataHandle and
|
||||
* TX DMAMUX source for edmaTxDataToTxRegHandle.
|
||||
* (2)For the shared DMA request source, enable and set the RX/RX DMAMUX source for the edmaRxRegToRxDataHandle.
|
||||
|
|
@ -224,7 +222,7 @@ status_t DSPI_MasterTransferGetCountEDMA(SPI_Type *base, dspi_master_edma_handle
|
|||
* @param base DSPI peripheral base address.
|
||||
* @param handle DSPI handle pointer to dspi_slave_edma_handle_t.
|
||||
* @param callback DSPI callback.
|
||||
* @param userData callback function parameter.
|
||||
* @param userData A callback function parameter.
|
||||
* @param edmaRxRegToRxDataHandle edmaRxRegToRxDataHandle pointer to edma_handle_t.
|
||||
* @param edmaTxDataToTxRegHandle edmaTxDataToTxRegHandle pointer to edma_handle_t.
|
||||
*/
|
||||
|
|
@ -238,25 +236,25 @@ void DSPI_SlaveTransferCreateHandleEDMA(SPI_Type *base,
|
|||
/*!
|
||||
* @brief DSPI slave transfer data using eDMA.
|
||||
*
|
||||
* This function transfer data using eDMA. This is non-blocking function, which returns right away. When all data
|
||||
* have been transfer, the callback function is called.
|
||||
* Note that slave EDMA transfer cannot support the situation that transfer_size is 1 when the bitsPerFrame is greater
|
||||
* than 8 .
|
||||
* This function transfers data using eDMA. This is a non-blocking function, which returns right away. When all data
|
||||
* is transferred, the callback function is called.
|
||||
* Note that the slave eDMA transfer doesn't support transfer_size is 1 when the bitsPerFrame is greater
|
||||
* than eight.
|
||||
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer pointer to dspi_transfer_t structure.
|
||||
* @param handle A pointer to the dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer A pointer to the dspi_transfer_t structure.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_SlaveTransferEDMA(SPI_Type *base, dspi_slave_edma_handle_t *handle, dspi_transfer_t *transfer);
|
||||
|
||||
/*!
|
||||
* @brief DSPI slave aborts a transfer which using eDMA.
|
||||
* @brief DSPI slave aborts a transfer which is using eDMA.
|
||||
*
|
||||
* This function aborts a transfer which using eDMA.
|
||||
* This function aborts a transfer which is using eDMA.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
* @param handle A pointer to the dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
*/
|
||||
void DSPI_SlaveTransferAbortEDMA(SPI_Type *base, dspi_slave_edma_handle_t *handle);
|
||||
|
||||
|
|
@ -266,8 +264,8 @@ void DSPI_SlaveTransferAbortEDMA(SPI_Type *base, dspi_slave_edma_handle_t *handl
|
|||
* This function gets the slave eDMA transfer count.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
* @param count Number of bytes transferred so far by the non-blocking transaction.
|
||||
* @param handle A pointer to the dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
* @param count A number of bytes transferred so far by the non-blocking transaction.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_SlaveTransferGetCountEDMA(SPI_Type *base, dspi_slave_edma_handle_t *handle, size_t *count);
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -1,31 +1,9 @@
|
|||
/*
|
||||
* Copyright (c) 2015, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2018 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
#ifndef _FSL_DSPI_EDMA_H_
|
||||
#define _FSL_DSPI_EDMA_H_
|
||||
|
|
@ -37,28 +15,33 @@
|
|||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief DSPI EDMA driver version 2.2.2. */
|
||||
#define FSL_DSPI_EDMA_DRIVER_VERSION (MAKE_VERSION(2, 2, 2))
|
||||
/*@}*/
|
||||
|
||||
/*!
|
||||
* @brief Forward declaration of the DSPI eDMA master handle typedefs.
|
||||
*/
|
||||
* @brief Forward declaration of the DSPI eDMA master handle typedefs.
|
||||
*/
|
||||
typedef struct _dspi_master_edma_handle dspi_master_edma_handle_t;
|
||||
|
||||
/*!
|
||||
* @brief Forward declaration of the DSPI eDMA slave handle typedefs.
|
||||
*/
|
||||
* @brief Forward declaration of the DSPI eDMA slave handle typedefs.
|
||||
*/
|
||||
typedef struct _dspi_slave_edma_handle dspi_slave_edma_handle_t;
|
||||
|
||||
/*!
|
||||
* @brief Completion callback function pointer type.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle Pointer to the handle for the DSPI master.
|
||||
* @param handle A pointer to the handle for the DSPI master.
|
||||
* @param status Success or error code describing whether the transfer completed.
|
||||
* @param userData Arbitrary pointer-dataSized value passed from the application.
|
||||
* @param userData An arbitrary pointer-dataSized value passed from the application.
|
||||
*/
|
||||
typedef void (*dspi_master_edma_transfer_callback_t)(SPI_Type *base,
|
||||
dspi_master_edma_handle_t *handle,
|
||||
|
|
@ -68,38 +51,39 @@ typedef void (*dspi_master_edma_transfer_callback_t)(SPI_Type *base,
|
|||
* @brief Completion callback function pointer type.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle Pointer to the handle for the DSPI slave.
|
||||
* @param handle A pointer to the handle for the DSPI slave.
|
||||
* @param status Success or error code describing whether the transfer completed.
|
||||
* @param userData Arbitrary pointer-dataSized value passed from the application.
|
||||
* @param userData An arbitrary pointer-dataSized value passed from the application.
|
||||
*/
|
||||
typedef void (*dspi_slave_edma_transfer_callback_t)(SPI_Type *base,
|
||||
dspi_slave_edma_handle_t *handle,
|
||||
status_t status,
|
||||
void *userData);
|
||||
|
||||
/*! @brief DSPI master eDMA transfer handle structure used for transactional API. */
|
||||
/*! @brief DSPI master eDMA transfer handle structure used for the transactional API. */
|
||||
struct _dspi_master_edma_handle
|
||||
{
|
||||
uint32_t bitsPerFrame; /*!< Desired number of bits per frame. */
|
||||
volatile uint32_t command; /*!< Desired data command. */
|
||||
volatile uint32_t lastCommand; /*!< Desired last data command. */
|
||||
uint32_t bitsPerFrame; /*!< The desired number of bits per frame. */
|
||||
volatile uint32_t command; /*!< The desired data command. */
|
||||
volatile uint32_t lastCommand; /*!< The desired last data command. */
|
||||
|
||||
uint8_t fifoSize; /*!< FIFO dataSize. */
|
||||
|
||||
volatile bool isPcsActiveAfterTransfer; /*!< Is PCS signal keep active after the last frame transfer.*/
|
||||
volatile bool isThereExtraByte; /*!< Is there extra byte.*/
|
||||
volatile bool
|
||||
isPcsActiveAfterTransfer; /*!< Indicates whether the PCS signal keeps active after the last frame transfer.*/
|
||||
|
||||
uint8_t nbytes; /*!< eDMA minor byte transfer count initially configured. */
|
||||
volatile uint8_t state; /*!< DSPI transfer state , _dspi_transfer_state.*/
|
||||
|
||||
uint8_t *volatile txData; /*!< Send buffer. */
|
||||
uint8_t *volatile rxData; /*!< Receive buffer. */
|
||||
volatile size_t remainingSendByteCount; /*!< Number of bytes remaining to send.*/
|
||||
volatile size_t remainingReceiveByteCount; /*!< Number of bytes remaining to receive.*/
|
||||
size_t totalByteCount; /*!< Number of transfer bytes*/
|
||||
volatile size_t remainingSendByteCount; /*!< A number of bytes remaining to send.*/
|
||||
volatile size_t remainingReceiveByteCount; /*!< A number of bytes remaining to receive.*/
|
||||
size_t totalByteCount; /*!< A number of transfer bytes*/
|
||||
|
||||
uint32_t rxBuffIfNull; /*!< Used if there is not rxData for DMA purpose.*/
|
||||
uint32_t txBuffIfNull; /*!< Used if there is not txData for DMA purpose.*/
|
||||
|
||||
volatile uint8_t state; /*!< DSPI transfer state , _dspi_transfer_state.*/
|
||||
|
||||
dspi_master_edma_transfer_callback_t callback; /*!< Completion callback. */
|
||||
void *userData; /*!< Callback user data. */
|
||||
|
||||
|
|
@ -110,33 +94,30 @@ struct _dspi_master_edma_handle
|
|||
edma_tcd_t dspiSoftwareTCD[2]; /*!<SoftwareTCD , internal used*/
|
||||
};
|
||||
|
||||
/*! @brief DSPI slave eDMA transfer handle structure used for transactional API.*/
|
||||
/*! @brief DSPI slave eDMA transfer handle structure used for the transactional API.*/
|
||||
struct _dspi_slave_edma_handle
|
||||
{
|
||||
uint32_t bitsPerFrame; /*!< Desired number of bits per frame. */
|
||||
volatile bool isThereExtraByte; /*!< Is there extra byte.*/
|
||||
uint32_t bitsPerFrame; /*!< The desired number of bits per frame. */
|
||||
|
||||
uint8_t *volatile txData; /*!< Send buffer. */
|
||||
uint8_t *volatile rxData; /*!< Receive buffer. */
|
||||
volatile size_t remainingSendByteCount; /*!< Number of bytes remaining to send.*/
|
||||
volatile size_t remainingReceiveByteCount; /*!< Number of bytes remaining to receive.*/
|
||||
size_t totalByteCount; /*!< Number of transfer bytes*/
|
||||
volatile size_t remainingSendByteCount; /*!< A number of bytes remaining to send.*/
|
||||
volatile size_t remainingReceiveByteCount; /*!< A number of bytes remaining to receive.*/
|
||||
size_t totalByteCount; /*!< A number of transfer bytes*/
|
||||
|
||||
uint32_t rxBuffIfNull; /*!< Used if there is not rxData for DMA purpose.*/
|
||||
uint32_t txBuffIfNull; /*!< Used if there is not txData for DMA purpose.*/
|
||||
uint32_t txLastData; /*!< Used if there is an extra byte when 16bits per frame for DMA purpose.*/
|
||||
|
||||
volatile uint8_t state; /*!< DSPI transfer state.*/
|
||||
uint8_t nbytes; /*!< eDMA minor byte transfer count initially configured. */
|
||||
|
||||
uint32_t errorCount; /*!< Error count for slave transfer.*/
|
||||
volatile uint8_t state; /*!< DSPI transfer state.*/
|
||||
|
||||
dspi_slave_edma_transfer_callback_t callback; /*!< Completion callback. */
|
||||
void *userData; /*!< Callback user data. */
|
||||
|
||||
edma_handle_t *edmaRxRegToRxDataHandle; /*!<edma_handle_t handle point used for RxReg to RxData buff*/
|
||||
edma_handle_t *edmaTxDataToTxRegHandle; /*!<edma_handle_t handle point used for TxData to TxReg*/
|
||||
|
||||
edma_tcd_t dspiSoftwareTCD[2]; /*!<SoftwareTCD , internal used*/
|
||||
};
|
||||
|
||||
/***********************************************************************************************************************
|
||||
|
|
@ -152,17 +133,18 @@ extern "C" {
|
|||
* @brief Initializes the DSPI master eDMA handle.
|
||||
*
|
||||
* This function initializes the DSPI eDMA handle which can be used for other DSPI transactional APIs. Usually, for a
|
||||
* specified DSPI instance, user need only call this API once to get the initialized handle.
|
||||
* specified DSPI instance, call this API once to get the initialized handle.
|
||||
*
|
||||
* Note that DSPI eDMA has separated (RX and TX as two sources) or shared (RX and TX are the same source) DMA request source.
|
||||
* (1)For the separated DMA request source, enable and set the RX DMAMUX source for edmaRxRegToRxDataHandle and
|
||||
* Note that DSPI eDMA has separated (RX and TX as two sources) or shared (RX and TX are the same source) DMA request
|
||||
* source.
|
||||
* (1) For the separated DMA request source, enable and set the RX DMAMUX source for edmaRxRegToRxDataHandle and
|
||||
* TX DMAMUX source for edmaIntermediaryToTxRegHandle.
|
||||
* (2)For the shared DMA request source, enable and set the RX/RX DMAMUX source for the edmaRxRegToRxDataHandle.
|
||||
* (2) For the shared DMA request source, enable and set the RX/RX DMAMUX source for the edmaRxRegToRxDataHandle.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle DSPI handle pointer to dspi_master_edma_handle_t.
|
||||
* @param callback DSPI callback.
|
||||
* @param userData callback function parameter.
|
||||
* @param userData A callback function parameter.
|
||||
* @param edmaRxRegToRxDataHandle edmaRxRegToRxDataHandle pointer to edma_handle_t.
|
||||
* @param edmaTxDataToIntermediaryHandle edmaTxDataToIntermediaryHandle pointer to edma_handle_t.
|
||||
* @param edmaIntermediaryToTxRegHandle edmaIntermediaryToTxRegHandle pointer to edma_handle_t.
|
||||
|
|
@ -178,34 +160,49 @@ void DSPI_MasterTransferCreateHandleEDMA(SPI_Type *base,
|
|||
/*!
|
||||
* @brief DSPI master transfer data using eDMA.
|
||||
*
|
||||
* This function transfer data using eDMA. This is non-blocking function, which returns right away. When all data
|
||||
* have been transfer, the callback function is called.
|
||||
* This function transfers data using eDMA. This is a non-blocking function, which returns right away. When all data
|
||||
* is transferred, the callback function is called.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer pointer to dspi_transfer_t structure.
|
||||
* @param handle A pointer to the dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer A pointer to the dspi_transfer_t structure.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *handle, dspi_transfer_t *transfer);
|
||||
|
||||
/*!
|
||||
* @brief DSPI master aborts a transfer which using eDMA.
|
||||
* @brief Transfers a block of data using a eDMA method.
|
||||
*
|
||||
* This function aborts a transfer which using eDMA.
|
||||
* This function transfers data using eDNA, the transfer mechanism is half-duplex. This is a non-blocking function,
|
||||
* which returns right away. When all data is transferred, the callback function is called.
|
||||
*
|
||||
* @param base DSPI base pointer
|
||||
* @param handle A pointer to the dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer A pointer to the dspi_half_duplex_transfer_t structure.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterHalfDuplexTransferEDMA(SPI_Type *base,
|
||||
dspi_master_edma_handle_t *handle,
|
||||
dspi_half_duplex_transfer_t *xfer);
|
||||
|
||||
/*!
|
||||
* @brief DSPI master aborts a transfer which is using eDMA.
|
||||
*
|
||||
* This function aborts a transfer which is using eDMA.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param handle A pointer to the dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
*/
|
||||
void DSPI_MasterTransferAbortEDMA(SPI_Type *base, dspi_master_edma_handle_t *handle);
|
||||
|
||||
/*!
|
||||
* @brief Gets the master eDMA transfer count.
|
||||
*
|
||||
* This function get the master eDMA transfer count.
|
||||
* This function gets the master eDMA transfer count.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param count Number of bytes transferred so far by the non-blocking transaction.
|
||||
* @param handle A pointer to the dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param count A number of bytes transferred by the non-blocking transaction.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterTransferGetCountEDMA(SPI_Type *base, dspi_master_edma_handle_t *handle, size_t *count);
|
||||
|
|
@ -216,7 +213,8 @@ status_t DSPI_MasterTransferGetCountEDMA(SPI_Type *base, dspi_master_edma_handle
|
|||
* This function initializes the DSPI eDMA handle which can be used for other DSPI transactional APIs. Usually, for a
|
||||
* specified DSPI instance, call this API once to get the initialized handle.
|
||||
*
|
||||
* Note that DSPI eDMA has separated (RN and TX in 2 sources) or shared (RX and TX are the same source) DMA request source.
|
||||
* Note that DSPI eDMA has separated (RN and TX in 2 sources) or shared (RX and TX are the same source) DMA request
|
||||
* source.
|
||||
* (1)For the separated DMA request source, enable and set the RX DMAMUX source for edmaRxRegToRxDataHandle and
|
||||
* TX DMAMUX source for edmaTxDataToTxRegHandle.
|
||||
* (2)For the shared DMA request source, enable and set the RX/RX DMAMUX source for the edmaRxRegToRxDataHandle.
|
||||
|
|
@ -224,7 +222,7 @@ status_t DSPI_MasterTransferGetCountEDMA(SPI_Type *base, dspi_master_edma_handle
|
|||
* @param base DSPI peripheral base address.
|
||||
* @param handle DSPI handle pointer to dspi_slave_edma_handle_t.
|
||||
* @param callback DSPI callback.
|
||||
* @param userData callback function parameter.
|
||||
* @param userData A callback function parameter.
|
||||
* @param edmaRxRegToRxDataHandle edmaRxRegToRxDataHandle pointer to edma_handle_t.
|
||||
* @param edmaTxDataToTxRegHandle edmaTxDataToTxRegHandle pointer to edma_handle_t.
|
||||
*/
|
||||
|
|
@ -238,25 +236,25 @@ void DSPI_SlaveTransferCreateHandleEDMA(SPI_Type *base,
|
|||
/*!
|
||||
* @brief DSPI slave transfer data using eDMA.
|
||||
*
|
||||
* This function transfer data using eDMA. This is non-blocking function, which returns right away. When all data
|
||||
* have been transfer, the callback function is called.
|
||||
* Note that slave EDMA transfer cannot support the situation that transfer_size is 1 when the bitsPerFrame is greater
|
||||
* than 8 .
|
||||
* This function transfers data using eDMA. This is a non-blocking function, which returns right away. When all data
|
||||
* is transferred, the callback function is called.
|
||||
* Note that the slave eDMA transfer doesn't support transfer_size is 1 when the bitsPerFrame is greater
|
||||
* than eight.
|
||||
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer pointer to dspi_transfer_t structure.
|
||||
* @param handle A pointer to the dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer A pointer to the dspi_transfer_t structure.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_SlaveTransferEDMA(SPI_Type *base, dspi_slave_edma_handle_t *handle, dspi_transfer_t *transfer);
|
||||
|
||||
/*!
|
||||
* @brief DSPI slave aborts a transfer which using eDMA.
|
||||
* @brief DSPI slave aborts a transfer which is using eDMA.
|
||||
*
|
||||
* This function aborts a transfer which using eDMA.
|
||||
* This function aborts a transfer which is using eDMA.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
* @param handle A pointer to the dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
*/
|
||||
void DSPI_SlaveTransferAbortEDMA(SPI_Type *base, dspi_slave_edma_handle_t *handle);
|
||||
|
||||
|
|
@ -266,8 +264,8 @@ void DSPI_SlaveTransferAbortEDMA(SPI_Type *base, dspi_slave_edma_handle_t *handl
|
|||
* This function gets the slave eDMA transfer count.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
* @param count Number of bytes transferred so far by the non-blocking transaction.
|
||||
* @param handle A pointer to the dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
* @param count A number of bytes transferred so far by the non-blocking transaction.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_SlaveTransferGetCountEDMA(SPI_Type *base, dspi_slave_edma_handle_t *handle, size_t *count);
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -1,31 +1,9 @@
|
|||
/*
|
||||
* Copyright (c) 2015, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2018 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
#ifndef _FSL_DSPI_EDMA_H_
|
||||
#define _FSL_DSPI_EDMA_H_
|
||||
|
|
@ -37,28 +15,33 @@
|
|||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief DSPI EDMA driver version 2.2.2. */
|
||||
#define FSL_DSPI_EDMA_DRIVER_VERSION (MAKE_VERSION(2, 2, 2))
|
||||
/*@}*/
|
||||
|
||||
/*!
|
||||
* @brief Forward declaration of the DSPI eDMA master handle typedefs.
|
||||
*/
|
||||
* @brief Forward declaration of the DSPI eDMA master handle typedefs.
|
||||
*/
|
||||
typedef struct _dspi_master_edma_handle dspi_master_edma_handle_t;
|
||||
|
||||
/*!
|
||||
* @brief Forward declaration of the DSPI eDMA slave handle typedefs.
|
||||
*/
|
||||
* @brief Forward declaration of the DSPI eDMA slave handle typedefs.
|
||||
*/
|
||||
typedef struct _dspi_slave_edma_handle dspi_slave_edma_handle_t;
|
||||
|
||||
/*!
|
||||
* @brief Completion callback function pointer type.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle Pointer to the handle for the DSPI master.
|
||||
* @param handle A pointer to the handle for the DSPI master.
|
||||
* @param status Success or error code describing whether the transfer completed.
|
||||
* @param userData Arbitrary pointer-dataSized value passed from the application.
|
||||
* @param userData An arbitrary pointer-dataSized value passed from the application.
|
||||
*/
|
||||
typedef void (*dspi_master_edma_transfer_callback_t)(SPI_Type *base,
|
||||
dspi_master_edma_handle_t *handle,
|
||||
|
|
@ -68,38 +51,39 @@ typedef void (*dspi_master_edma_transfer_callback_t)(SPI_Type *base,
|
|||
* @brief Completion callback function pointer type.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle Pointer to the handle for the DSPI slave.
|
||||
* @param handle A pointer to the handle for the DSPI slave.
|
||||
* @param status Success or error code describing whether the transfer completed.
|
||||
* @param userData Arbitrary pointer-dataSized value passed from the application.
|
||||
* @param userData An arbitrary pointer-dataSized value passed from the application.
|
||||
*/
|
||||
typedef void (*dspi_slave_edma_transfer_callback_t)(SPI_Type *base,
|
||||
dspi_slave_edma_handle_t *handle,
|
||||
status_t status,
|
||||
void *userData);
|
||||
|
||||
/*! @brief DSPI master eDMA transfer handle structure used for transactional API. */
|
||||
/*! @brief DSPI master eDMA transfer handle structure used for the transactional API. */
|
||||
struct _dspi_master_edma_handle
|
||||
{
|
||||
uint32_t bitsPerFrame; /*!< Desired number of bits per frame. */
|
||||
volatile uint32_t command; /*!< Desired data command. */
|
||||
volatile uint32_t lastCommand; /*!< Desired last data command. */
|
||||
uint32_t bitsPerFrame; /*!< The desired number of bits per frame. */
|
||||
volatile uint32_t command; /*!< The desired data command. */
|
||||
volatile uint32_t lastCommand; /*!< The desired last data command. */
|
||||
|
||||
uint8_t fifoSize; /*!< FIFO dataSize. */
|
||||
|
||||
volatile bool isPcsActiveAfterTransfer; /*!< Is PCS signal keep active after the last frame transfer.*/
|
||||
volatile bool isThereExtraByte; /*!< Is there extra byte.*/
|
||||
volatile bool
|
||||
isPcsActiveAfterTransfer; /*!< Indicates whether the PCS signal keeps active after the last frame transfer.*/
|
||||
|
||||
uint8_t nbytes; /*!< eDMA minor byte transfer count initially configured. */
|
||||
volatile uint8_t state; /*!< DSPI transfer state , _dspi_transfer_state.*/
|
||||
|
||||
uint8_t *volatile txData; /*!< Send buffer. */
|
||||
uint8_t *volatile rxData; /*!< Receive buffer. */
|
||||
volatile size_t remainingSendByteCount; /*!< Number of bytes remaining to send.*/
|
||||
volatile size_t remainingReceiveByteCount; /*!< Number of bytes remaining to receive.*/
|
||||
size_t totalByteCount; /*!< Number of transfer bytes*/
|
||||
volatile size_t remainingSendByteCount; /*!< A number of bytes remaining to send.*/
|
||||
volatile size_t remainingReceiveByteCount; /*!< A number of bytes remaining to receive.*/
|
||||
size_t totalByteCount; /*!< A number of transfer bytes*/
|
||||
|
||||
uint32_t rxBuffIfNull; /*!< Used if there is not rxData for DMA purpose.*/
|
||||
uint32_t txBuffIfNull; /*!< Used if there is not txData for DMA purpose.*/
|
||||
|
||||
volatile uint8_t state; /*!< DSPI transfer state , _dspi_transfer_state.*/
|
||||
|
||||
dspi_master_edma_transfer_callback_t callback; /*!< Completion callback. */
|
||||
void *userData; /*!< Callback user data. */
|
||||
|
||||
|
|
@ -110,33 +94,30 @@ struct _dspi_master_edma_handle
|
|||
edma_tcd_t dspiSoftwareTCD[2]; /*!<SoftwareTCD , internal used*/
|
||||
};
|
||||
|
||||
/*! @brief DSPI slave eDMA transfer handle structure used for transactional API.*/
|
||||
/*! @brief DSPI slave eDMA transfer handle structure used for the transactional API.*/
|
||||
struct _dspi_slave_edma_handle
|
||||
{
|
||||
uint32_t bitsPerFrame; /*!< Desired number of bits per frame. */
|
||||
volatile bool isThereExtraByte; /*!< Is there extra byte.*/
|
||||
uint32_t bitsPerFrame; /*!< The desired number of bits per frame. */
|
||||
|
||||
uint8_t *volatile txData; /*!< Send buffer. */
|
||||
uint8_t *volatile rxData; /*!< Receive buffer. */
|
||||
volatile size_t remainingSendByteCount; /*!< Number of bytes remaining to send.*/
|
||||
volatile size_t remainingReceiveByteCount; /*!< Number of bytes remaining to receive.*/
|
||||
size_t totalByteCount; /*!< Number of transfer bytes*/
|
||||
volatile size_t remainingSendByteCount; /*!< A number of bytes remaining to send.*/
|
||||
volatile size_t remainingReceiveByteCount; /*!< A number of bytes remaining to receive.*/
|
||||
size_t totalByteCount; /*!< A number of transfer bytes*/
|
||||
|
||||
uint32_t rxBuffIfNull; /*!< Used if there is not rxData for DMA purpose.*/
|
||||
uint32_t txBuffIfNull; /*!< Used if there is not txData for DMA purpose.*/
|
||||
uint32_t txLastData; /*!< Used if there is an extra byte when 16bits per frame for DMA purpose.*/
|
||||
|
||||
volatile uint8_t state; /*!< DSPI transfer state.*/
|
||||
uint8_t nbytes; /*!< eDMA minor byte transfer count initially configured. */
|
||||
|
||||
uint32_t errorCount; /*!< Error count for slave transfer.*/
|
||||
volatile uint8_t state; /*!< DSPI transfer state.*/
|
||||
|
||||
dspi_slave_edma_transfer_callback_t callback; /*!< Completion callback. */
|
||||
void *userData; /*!< Callback user data. */
|
||||
|
||||
edma_handle_t *edmaRxRegToRxDataHandle; /*!<edma_handle_t handle point used for RxReg to RxData buff*/
|
||||
edma_handle_t *edmaTxDataToTxRegHandle; /*!<edma_handle_t handle point used for TxData to TxReg*/
|
||||
|
||||
edma_tcd_t dspiSoftwareTCD[2]; /*!<SoftwareTCD , internal used*/
|
||||
};
|
||||
|
||||
/***********************************************************************************************************************
|
||||
|
|
@ -152,17 +133,18 @@ extern "C" {
|
|||
* @brief Initializes the DSPI master eDMA handle.
|
||||
*
|
||||
* This function initializes the DSPI eDMA handle which can be used for other DSPI transactional APIs. Usually, for a
|
||||
* specified DSPI instance, user need only call this API once to get the initialized handle.
|
||||
* specified DSPI instance, call this API once to get the initialized handle.
|
||||
*
|
||||
* Note that DSPI eDMA has separated (RX and TX as two sources) or shared (RX and TX are the same source) DMA request source.
|
||||
* (1)For the separated DMA request source, enable and set the RX DMAMUX source for edmaRxRegToRxDataHandle and
|
||||
* Note that DSPI eDMA has separated (RX and TX as two sources) or shared (RX and TX are the same source) DMA request
|
||||
* source.
|
||||
* (1) For the separated DMA request source, enable and set the RX DMAMUX source for edmaRxRegToRxDataHandle and
|
||||
* TX DMAMUX source for edmaIntermediaryToTxRegHandle.
|
||||
* (2)For the shared DMA request source, enable and set the RX/RX DMAMUX source for the edmaRxRegToRxDataHandle.
|
||||
* (2) For the shared DMA request source, enable and set the RX/RX DMAMUX source for the edmaRxRegToRxDataHandle.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle DSPI handle pointer to dspi_master_edma_handle_t.
|
||||
* @param callback DSPI callback.
|
||||
* @param userData callback function parameter.
|
||||
* @param userData A callback function parameter.
|
||||
* @param edmaRxRegToRxDataHandle edmaRxRegToRxDataHandle pointer to edma_handle_t.
|
||||
* @param edmaTxDataToIntermediaryHandle edmaTxDataToIntermediaryHandle pointer to edma_handle_t.
|
||||
* @param edmaIntermediaryToTxRegHandle edmaIntermediaryToTxRegHandle pointer to edma_handle_t.
|
||||
|
|
@ -178,34 +160,49 @@ void DSPI_MasterTransferCreateHandleEDMA(SPI_Type *base,
|
|||
/*!
|
||||
* @brief DSPI master transfer data using eDMA.
|
||||
*
|
||||
* This function transfer data using eDMA. This is non-blocking function, which returns right away. When all data
|
||||
* have been transfer, the callback function is called.
|
||||
* This function transfers data using eDMA. This is a non-blocking function, which returns right away. When all data
|
||||
* is transferred, the callback function is called.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer pointer to dspi_transfer_t structure.
|
||||
* @param handle A pointer to the dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer A pointer to the dspi_transfer_t structure.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *handle, dspi_transfer_t *transfer);
|
||||
|
||||
/*!
|
||||
* @brief DSPI master aborts a transfer which using eDMA.
|
||||
* @brief Transfers a block of data using a eDMA method.
|
||||
*
|
||||
* This function aborts a transfer which using eDMA.
|
||||
* This function transfers data using eDNA, the transfer mechanism is half-duplex. This is a non-blocking function,
|
||||
* which returns right away. When all data is transferred, the callback function is called.
|
||||
*
|
||||
* @param base DSPI base pointer
|
||||
* @param handle A pointer to the dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer A pointer to the dspi_half_duplex_transfer_t structure.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterHalfDuplexTransferEDMA(SPI_Type *base,
|
||||
dspi_master_edma_handle_t *handle,
|
||||
dspi_half_duplex_transfer_t *xfer);
|
||||
|
||||
/*!
|
||||
* @brief DSPI master aborts a transfer which is using eDMA.
|
||||
*
|
||||
* This function aborts a transfer which is using eDMA.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param handle A pointer to the dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
*/
|
||||
void DSPI_MasterTransferAbortEDMA(SPI_Type *base, dspi_master_edma_handle_t *handle);
|
||||
|
||||
/*!
|
||||
* @brief Gets the master eDMA transfer count.
|
||||
*
|
||||
* This function get the master eDMA transfer count.
|
||||
* This function gets the master eDMA transfer count.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param count Number of bytes transferred so far by the non-blocking transaction.
|
||||
* @param handle A pointer to the dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param count A number of bytes transferred by the non-blocking transaction.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterTransferGetCountEDMA(SPI_Type *base, dspi_master_edma_handle_t *handle, size_t *count);
|
||||
|
|
@ -216,7 +213,8 @@ status_t DSPI_MasterTransferGetCountEDMA(SPI_Type *base, dspi_master_edma_handle
|
|||
* This function initializes the DSPI eDMA handle which can be used for other DSPI transactional APIs. Usually, for a
|
||||
* specified DSPI instance, call this API once to get the initialized handle.
|
||||
*
|
||||
* Note that DSPI eDMA has separated (RN and TX in 2 sources) or shared (RX and TX are the same source) DMA request source.
|
||||
* Note that DSPI eDMA has separated (RN and TX in 2 sources) or shared (RX and TX are the same source) DMA request
|
||||
* source.
|
||||
* (1)For the separated DMA request source, enable and set the RX DMAMUX source for edmaRxRegToRxDataHandle and
|
||||
* TX DMAMUX source for edmaTxDataToTxRegHandle.
|
||||
* (2)For the shared DMA request source, enable and set the RX/RX DMAMUX source for the edmaRxRegToRxDataHandle.
|
||||
|
|
@ -224,7 +222,7 @@ status_t DSPI_MasterTransferGetCountEDMA(SPI_Type *base, dspi_master_edma_handle
|
|||
* @param base DSPI peripheral base address.
|
||||
* @param handle DSPI handle pointer to dspi_slave_edma_handle_t.
|
||||
* @param callback DSPI callback.
|
||||
* @param userData callback function parameter.
|
||||
* @param userData A callback function parameter.
|
||||
* @param edmaRxRegToRxDataHandle edmaRxRegToRxDataHandle pointer to edma_handle_t.
|
||||
* @param edmaTxDataToTxRegHandle edmaTxDataToTxRegHandle pointer to edma_handle_t.
|
||||
*/
|
||||
|
|
@ -238,25 +236,25 @@ void DSPI_SlaveTransferCreateHandleEDMA(SPI_Type *base,
|
|||
/*!
|
||||
* @brief DSPI slave transfer data using eDMA.
|
||||
*
|
||||
* This function transfer data using eDMA. This is non-blocking function, which returns right away. When all data
|
||||
* have been transfer, the callback function is called.
|
||||
* Note that slave EDMA transfer cannot support the situation that transfer_size is 1 when the bitsPerFrame is greater
|
||||
* than 8 .
|
||||
* This function transfers data using eDMA. This is a non-blocking function, which returns right away. When all data
|
||||
* is transferred, the callback function is called.
|
||||
* Note that the slave eDMA transfer doesn't support transfer_size is 1 when the bitsPerFrame is greater
|
||||
* than eight.
|
||||
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer pointer to dspi_transfer_t structure.
|
||||
* @param handle A pointer to the dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer A pointer to the dspi_transfer_t structure.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_SlaveTransferEDMA(SPI_Type *base, dspi_slave_edma_handle_t *handle, dspi_transfer_t *transfer);
|
||||
|
||||
/*!
|
||||
* @brief DSPI slave aborts a transfer which using eDMA.
|
||||
* @brief DSPI slave aborts a transfer which is using eDMA.
|
||||
*
|
||||
* This function aborts a transfer which using eDMA.
|
||||
* This function aborts a transfer which is using eDMA.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
* @param handle A pointer to the dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
*/
|
||||
void DSPI_SlaveTransferAbortEDMA(SPI_Type *base, dspi_slave_edma_handle_t *handle);
|
||||
|
||||
|
|
@ -266,8 +264,8 @@ void DSPI_SlaveTransferAbortEDMA(SPI_Type *base, dspi_slave_edma_handle_t *handl
|
|||
* This function gets the slave eDMA transfer count.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
* @param count Number of bytes transferred so far by the non-blocking transaction.
|
||||
* @param handle A pointer to the dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
* @param count A number of bytes transferred so far by the non-blocking transaction.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_SlaveTransferGetCountEDMA(SPI_Type *base, dspi_slave_edma_handle_t *handle, size_t *count);
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -1,31 +1,9 @@
|
|||
/*
|
||||
* Copyright (c) 2015, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2018 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
#ifndef _FSL_DSPI_EDMA_H_
|
||||
#define _FSL_DSPI_EDMA_H_
|
||||
|
|
@ -37,29 +15,33 @@
|
|||
* @{
|
||||
*/
|
||||
|
||||
/*! @file */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief DSPI EDMA driver version 2.2.2. */
|
||||
#define FSL_DSPI_EDMA_DRIVER_VERSION (MAKE_VERSION(2, 2, 2))
|
||||
/*@}*/
|
||||
|
||||
/*!
|
||||
* @brief Forward declaration of the DSPI eDMA master handle typedefs.
|
||||
*/
|
||||
* @brief Forward declaration of the DSPI eDMA master handle typedefs.
|
||||
*/
|
||||
typedef struct _dspi_master_edma_handle dspi_master_edma_handle_t;
|
||||
|
||||
/*!
|
||||
* @brief Forward declaration of the DSPI eDMA slave handle typedefs.
|
||||
*/
|
||||
* @brief Forward declaration of the DSPI eDMA slave handle typedefs.
|
||||
*/
|
||||
typedef struct _dspi_slave_edma_handle dspi_slave_edma_handle_t;
|
||||
|
||||
/*!
|
||||
* @brief Completion callback function pointer type.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle Pointer to the handle for the DSPI master.
|
||||
* @param handle A pointer to the handle for the DSPI master.
|
||||
* @param status Success or error code describing whether the transfer completed.
|
||||
* @param userData Arbitrary pointer-dataSized value passed from the application.
|
||||
* @param userData An arbitrary pointer-dataSized value passed from the application.
|
||||
*/
|
||||
typedef void (*dspi_master_edma_transfer_callback_t)(SPI_Type *base,
|
||||
dspi_master_edma_handle_t *handle,
|
||||
|
|
@ -69,38 +51,39 @@ typedef void (*dspi_master_edma_transfer_callback_t)(SPI_Type *base,
|
|||
* @brief Completion callback function pointer type.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle Pointer to the handle for the DSPI slave.
|
||||
* @param handle A pointer to the handle for the DSPI slave.
|
||||
* @param status Success or error code describing whether the transfer completed.
|
||||
* @param userData Arbitrary pointer-dataSized value passed from the application.
|
||||
* @param userData An arbitrary pointer-dataSized value passed from the application.
|
||||
*/
|
||||
typedef void (*dspi_slave_edma_transfer_callback_t)(SPI_Type *base,
|
||||
dspi_slave_edma_handle_t *handle,
|
||||
status_t status,
|
||||
void *userData);
|
||||
|
||||
/*! @brief DSPI master eDMA transfer handle structure used for transactional API. */
|
||||
/*! @brief DSPI master eDMA transfer handle structure used for the transactional API. */
|
||||
struct _dspi_master_edma_handle
|
||||
{
|
||||
uint32_t bitsPerFrame; /*!< Desired number of bits per frame. */
|
||||
volatile uint32_t command; /*!< Desired data command. */
|
||||
volatile uint32_t lastCommand; /*!< Desired last data command. */
|
||||
uint32_t bitsPerFrame; /*!< The desired number of bits per frame. */
|
||||
volatile uint32_t command; /*!< The desired data command. */
|
||||
volatile uint32_t lastCommand; /*!< The desired last data command. */
|
||||
|
||||
uint8_t fifoSize; /*!< FIFO dataSize. */
|
||||
|
||||
volatile bool isPcsActiveAfterTransfer; /*!< Is PCS signal keep active after the last frame transfer.*/
|
||||
volatile bool isThereExtraByte; /*!< Is there extra byte.*/
|
||||
volatile bool
|
||||
isPcsActiveAfterTransfer; /*!< Indicates whether the PCS signal keeps active after the last frame transfer.*/
|
||||
|
||||
uint8_t nbytes; /*!< eDMA minor byte transfer count initially configured. */
|
||||
volatile uint8_t state; /*!< DSPI transfer state , _dspi_transfer_state.*/
|
||||
|
||||
uint8_t *volatile txData; /*!< Send buffer. */
|
||||
uint8_t *volatile rxData; /*!< Receive buffer. */
|
||||
volatile size_t remainingSendByteCount; /*!< Number of bytes remaining to send.*/
|
||||
volatile size_t remainingReceiveByteCount; /*!< Number of bytes remaining to receive.*/
|
||||
size_t totalByteCount; /*!< Number of transfer bytes*/
|
||||
volatile size_t remainingSendByteCount; /*!< A number of bytes remaining to send.*/
|
||||
volatile size_t remainingReceiveByteCount; /*!< A number of bytes remaining to receive.*/
|
||||
size_t totalByteCount; /*!< A number of transfer bytes*/
|
||||
|
||||
uint32_t rxBuffIfNull; /*!< Used if there is not rxData for DMA purpose.*/
|
||||
uint32_t txBuffIfNull; /*!< Used if there is not txData for DMA purpose.*/
|
||||
|
||||
volatile uint8_t state; /*!< DSPI transfer state , _dspi_transfer_state.*/
|
||||
|
||||
dspi_master_edma_transfer_callback_t callback; /*!< Completion callback. */
|
||||
void *userData; /*!< Callback user data. */
|
||||
|
||||
|
|
@ -111,33 +94,30 @@ struct _dspi_master_edma_handle
|
|||
edma_tcd_t dspiSoftwareTCD[2]; /*!<SoftwareTCD , internal used*/
|
||||
};
|
||||
|
||||
/*! @brief DSPI slave eDMA transfer handle structure used for transactional API.*/
|
||||
/*! @brief DSPI slave eDMA transfer handle structure used for the transactional API.*/
|
||||
struct _dspi_slave_edma_handle
|
||||
{
|
||||
uint32_t bitsPerFrame; /*!< Desired number of bits per frame. */
|
||||
volatile bool isThereExtraByte; /*!< Is there extra byte.*/
|
||||
uint32_t bitsPerFrame; /*!< The desired number of bits per frame. */
|
||||
|
||||
uint8_t *volatile txData; /*!< Send buffer. */
|
||||
uint8_t *volatile rxData; /*!< Receive buffer. */
|
||||
volatile size_t remainingSendByteCount; /*!< Number of bytes remaining to send.*/
|
||||
volatile size_t remainingReceiveByteCount; /*!< Number of bytes remaining to receive.*/
|
||||
size_t totalByteCount; /*!< Number of transfer bytes*/
|
||||
volatile size_t remainingSendByteCount; /*!< A number of bytes remaining to send.*/
|
||||
volatile size_t remainingReceiveByteCount; /*!< A number of bytes remaining to receive.*/
|
||||
size_t totalByteCount; /*!< A number of transfer bytes*/
|
||||
|
||||
uint32_t rxBuffIfNull; /*!< Used if there is not rxData for DMA purpose.*/
|
||||
uint32_t txBuffIfNull; /*!< Used if there is not txData for DMA purpose.*/
|
||||
uint32_t txLastData; /*!< Used if there is an extra byte when 16bits per frame for DMA purpose.*/
|
||||
|
||||
volatile uint8_t state; /*!< DSPI transfer state.*/
|
||||
uint8_t nbytes; /*!< eDMA minor byte transfer count initially configured. */
|
||||
|
||||
uint32_t errorCount; /*!< Error count for slave transfer.*/
|
||||
volatile uint8_t state; /*!< DSPI transfer state.*/
|
||||
|
||||
dspi_slave_edma_transfer_callback_t callback; /*!< Completion callback. */
|
||||
void *userData; /*!< Callback user data. */
|
||||
|
||||
edma_handle_t *edmaRxRegToRxDataHandle; /*!<edma_handle_t handle point used for RxReg to RxData buff*/
|
||||
edma_handle_t *edmaTxDataToTxRegHandle; /*!<edma_handle_t handle point used for TxData to TxReg*/
|
||||
|
||||
edma_tcd_t dspiSoftwareTCD[2]; /*!<SoftwareTCD , internal used*/
|
||||
};
|
||||
|
||||
/***********************************************************************************************************************
|
||||
|
|
@ -153,17 +133,18 @@ extern "C" {
|
|||
* @brief Initializes the DSPI master eDMA handle.
|
||||
*
|
||||
* This function initializes the DSPI eDMA handle which can be used for other DSPI transactional APIs. Usually, for a
|
||||
* specified DSPI instance, user need only call this API once to get the initialized handle.
|
||||
* specified DSPI instance, call this API once to get the initialized handle.
|
||||
*
|
||||
* Note that DSPI eDMA has separated (RX and TX as two sources) or shared (RX and TX are the same source) DMA request source.
|
||||
* (1)For the separated DMA request source, enable and set the RX DMAMUX source for edmaRxRegToRxDataHandle and
|
||||
* Note that DSPI eDMA has separated (RX and TX as two sources) or shared (RX and TX are the same source) DMA request
|
||||
* source.
|
||||
* (1) For the separated DMA request source, enable and set the RX DMAMUX source for edmaRxRegToRxDataHandle and
|
||||
* TX DMAMUX source for edmaIntermediaryToTxRegHandle.
|
||||
* (2)For the shared DMA request source, enable and set the RX/RX DMAMUX source for the edmaRxRegToRxDataHandle.
|
||||
* (2) For the shared DMA request source, enable and set the RX/RX DMAMUX source for the edmaRxRegToRxDataHandle.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle DSPI handle pointer to dspi_master_edma_handle_t.
|
||||
* @param callback DSPI callback.
|
||||
* @param userData callback function parameter.
|
||||
* @param userData A callback function parameter.
|
||||
* @param edmaRxRegToRxDataHandle edmaRxRegToRxDataHandle pointer to edma_handle_t.
|
||||
* @param edmaTxDataToIntermediaryHandle edmaTxDataToIntermediaryHandle pointer to edma_handle_t.
|
||||
* @param edmaIntermediaryToTxRegHandle edmaIntermediaryToTxRegHandle pointer to edma_handle_t.
|
||||
|
|
@ -179,34 +160,49 @@ void DSPI_MasterTransferCreateHandleEDMA(SPI_Type *base,
|
|||
/*!
|
||||
* @brief DSPI master transfer data using eDMA.
|
||||
*
|
||||
* This function transfer data using eDMA. This is non-blocking function, which returns right away. When all data
|
||||
* have been transfer, the callback function is called.
|
||||
* This function transfers data using eDMA. This is a non-blocking function, which returns right away. When all data
|
||||
* is transferred, the callback function is called.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer pointer to dspi_transfer_t structure.
|
||||
* @param handle A pointer to the dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer A pointer to the dspi_transfer_t structure.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *handle, dspi_transfer_t *transfer);
|
||||
|
||||
/*!
|
||||
* @brief DSPI master aborts a transfer which using eDMA.
|
||||
* @brief Transfers a block of data using a eDMA method.
|
||||
*
|
||||
* This function aborts a transfer which using eDMA.
|
||||
* This function transfers data using eDNA, the transfer mechanism is half-duplex. This is a non-blocking function,
|
||||
* which returns right away. When all data is transferred, the callback function is called.
|
||||
*
|
||||
* @param base DSPI base pointer
|
||||
* @param handle A pointer to the dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer A pointer to the dspi_half_duplex_transfer_t structure.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterHalfDuplexTransferEDMA(SPI_Type *base,
|
||||
dspi_master_edma_handle_t *handle,
|
||||
dspi_half_duplex_transfer_t *xfer);
|
||||
|
||||
/*!
|
||||
* @brief DSPI master aborts a transfer which is using eDMA.
|
||||
*
|
||||
* This function aborts a transfer which is using eDMA.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param handle A pointer to the dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
*/
|
||||
void DSPI_MasterTransferAbortEDMA(SPI_Type *base, dspi_master_edma_handle_t *handle);
|
||||
|
||||
/*!
|
||||
* @brief Gets the master eDMA transfer count.
|
||||
*
|
||||
* This function get the master eDMA transfer count.
|
||||
* This function gets the master eDMA transfer count.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param count Number of bytes transferred so far by the non-blocking transaction.
|
||||
* @param handle A pointer to the dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param count A number of bytes transferred by the non-blocking transaction.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterTransferGetCountEDMA(SPI_Type *base, dspi_master_edma_handle_t *handle, size_t *count);
|
||||
|
|
@ -217,7 +213,8 @@ status_t DSPI_MasterTransferGetCountEDMA(SPI_Type *base, dspi_master_edma_handle
|
|||
* This function initializes the DSPI eDMA handle which can be used for other DSPI transactional APIs. Usually, for a
|
||||
* specified DSPI instance, call this API once to get the initialized handle.
|
||||
*
|
||||
* Note that DSPI eDMA has separated (RN and TX in 2 sources) or shared (RX and TX are the same source) DMA request source.
|
||||
* Note that DSPI eDMA has separated (RN and TX in 2 sources) or shared (RX and TX are the same source) DMA request
|
||||
* source.
|
||||
* (1)For the separated DMA request source, enable and set the RX DMAMUX source for edmaRxRegToRxDataHandle and
|
||||
* TX DMAMUX source for edmaTxDataToTxRegHandle.
|
||||
* (2)For the shared DMA request source, enable and set the RX/RX DMAMUX source for the edmaRxRegToRxDataHandle.
|
||||
|
|
@ -225,7 +222,7 @@ status_t DSPI_MasterTransferGetCountEDMA(SPI_Type *base, dspi_master_edma_handle
|
|||
* @param base DSPI peripheral base address.
|
||||
* @param handle DSPI handle pointer to dspi_slave_edma_handle_t.
|
||||
* @param callback DSPI callback.
|
||||
* @param userData callback function parameter.
|
||||
* @param userData A callback function parameter.
|
||||
* @param edmaRxRegToRxDataHandle edmaRxRegToRxDataHandle pointer to edma_handle_t.
|
||||
* @param edmaTxDataToTxRegHandle edmaTxDataToTxRegHandle pointer to edma_handle_t.
|
||||
*/
|
||||
|
|
@ -239,25 +236,25 @@ void DSPI_SlaveTransferCreateHandleEDMA(SPI_Type *base,
|
|||
/*!
|
||||
* @brief DSPI slave transfer data using eDMA.
|
||||
*
|
||||
* This function transfer data using eDMA. This is non-blocking function, which returns right away. When all data
|
||||
* have been transfer, the callback function is called.
|
||||
* Note that slave EDMA transfer cannot support the situation that transfer_size is 1 when the bitsPerFrame is greater
|
||||
* than 8 .
|
||||
* This function transfers data using eDMA. This is a non-blocking function, which returns right away. When all data
|
||||
* is transferred, the callback function is called.
|
||||
* Note that the slave eDMA transfer doesn't support transfer_size is 1 when the bitsPerFrame is greater
|
||||
* than eight.
|
||||
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer pointer to dspi_transfer_t structure.
|
||||
* @param handle A pointer to the dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer A pointer to the dspi_transfer_t structure.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_SlaveTransferEDMA(SPI_Type *base, dspi_slave_edma_handle_t *handle, dspi_transfer_t *transfer);
|
||||
|
||||
/*!
|
||||
* @brief DSPI slave aborts a transfer which using eDMA.
|
||||
* @brief DSPI slave aborts a transfer which is using eDMA.
|
||||
*
|
||||
* This function aborts a transfer which using eDMA.
|
||||
* This function aborts a transfer which is using eDMA.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
* @param handle A pointer to the dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
*/
|
||||
void DSPI_SlaveTransferAbortEDMA(SPI_Type *base, dspi_slave_edma_handle_t *handle);
|
||||
|
||||
|
|
@ -267,8 +264,8 @@ void DSPI_SlaveTransferAbortEDMA(SPI_Type *base, dspi_slave_edma_handle_t *handl
|
|||
* This function gets the slave eDMA transfer count.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
* @param count Number of bytes transferred so far by the non-blocking transaction.
|
||||
* @param handle A pointer to the dspi_slave_edma_handle_t structure which stores the transfer state.
|
||||
* @param count A number of bytes transferred so far by the non-blocking transaction.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_SlaveTransferGetCountEDMA(SPI_Type *base, dspi_slave_edma_handle_t *handle, size_t *count);
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,31 +1,9 @@
|
|||
/*
|
||||
* Copyright (c) 2015, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2017 NXP
|
||||
* Copyright 2016-2019 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
#ifndef _FSL_DSPI_H_
|
||||
#define _FSL_DSPI_H_
|
||||
|
|
@ -37,15 +15,14 @@
|
|||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* Definitions
|
||||
*********************************************************************************************************************/
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief DSPI driver version 2.1.4. */
|
||||
#define FSL_DSPI_DRIVER_VERSION (MAKE_VERSION(2, 1, 4))
|
||||
/*! @brief DSPI driver version 2.2.2. */
|
||||
#define FSL_DSPI_DRIVER_VERSION (MAKE_VERSION(2, 2, 2))
|
||||
/*@}*/
|
||||
|
||||
#ifndef DSPI_DUMMY_DATA
|
||||
|
|
@ -56,37 +33,37 @@
|
|||
/*! @brief Status for the DSPI driver.*/
|
||||
enum _dspi_status
|
||||
{
|
||||
kStatus_DSPI_Busy = MAKE_STATUS(kStatusGroup_DSPI, 0), /*!< DSPI transfer is busy.*/
|
||||
kStatus_DSPI_Error = MAKE_STATUS(kStatusGroup_DSPI, 1), /*!< DSPI driver error. */
|
||||
kStatus_DSPI_Idle = MAKE_STATUS(kStatusGroup_DSPI, 2), /*!< DSPI is idle.*/
|
||||
kStatus_DSPI_OutOfRange = MAKE_STATUS(kStatusGroup_DSPI, 3) /*!< DSPI transfer out of range. */
|
||||
kStatus_DSPI_Busy = MAKE_STATUS(kStatusGroup_DSPI, 0), /*!< DSPI transfer is busy.*/
|
||||
kStatus_DSPI_Error = MAKE_STATUS(kStatusGroup_DSPI, 1), /*!< DSPI driver error. */
|
||||
kStatus_DSPI_Idle = MAKE_STATUS(kStatusGroup_DSPI, 2), /*!< DSPI is idle.*/
|
||||
kStatus_DSPI_OutOfRange = MAKE_STATUS(kStatusGroup_DSPI, 3) /*!< DSPI transfer out of range. */
|
||||
};
|
||||
|
||||
/*! @brief DSPI status flags in SPIx_SR register.*/
|
||||
enum _dspi_flags
|
||||
{
|
||||
kDSPI_TxCompleteFlag = SPI_SR_TCF_MASK, /*!< Transfer Complete Flag. */
|
||||
kDSPI_EndOfQueueFlag = SPI_SR_EOQF_MASK, /*!< End of Queue Flag.*/
|
||||
kDSPI_TxFifoUnderflowFlag = SPI_SR_TFUF_MASK, /*!< Transmit FIFO Underflow Flag.*/
|
||||
kDSPI_TxFifoFillRequestFlag = SPI_SR_TFFF_MASK, /*!< Transmit FIFO Fill Flag.*/
|
||||
kDSPI_RxFifoOverflowFlag = SPI_SR_RFOF_MASK, /*!< Receive FIFO Overflow Flag.*/
|
||||
kDSPI_RxFifoDrainRequestFlag = SPI_SR_RFDF_MASK, /*!< Receive FIFO Drain Flag.*/
|
||||
kDSPI_TxAndRxStatusFlag = SPI_SR_TXRXS_MASK, /*!< The module is in Stopped/Running state.*/
|
||||
kDSPI_AllStatusFlag = SPI_SR_TCF_MASK | SPI_SR_EOQF_MASK | SPI_SR_TFUF_MASK | SPI_SR_TFFF_MASK | SPI_SR_RFOF_MASK |
|
||||
SPI_SR_RFDF_MASK | SPI_SR_TXRXS_MASK /*!< All statuses above.*/
|
||||
kDSPI_TxCompleteFlag = (int)SPI_SR_TCF_MASK, /*!< Transfer Complete Flag. */
|
||||
kDSPI_EndOfQueueFlag = SPI_SR_EOQF_MASK, /*!< End of Queue Flag.*/
|
||||
kDSPI_TxFifoUnderflowFlag = SPI_SR_TFUF_MASK, /*!< Transmit FIFO Underflow Flag.*/
|
||||
kDSPI_TxFifoFillRequestFlag = SPI_SR_TFFF_MASK, /*!< Transmit FIFO Fill Flag.*/
|
||||
kDSPI_RxFifoOverflowFlag = SPI_SR_RFOF_MASK, /*!< Receive FIFO Overflow Flag.*/
|
||||
kDSPI_RxFifoDrainRequestFlag = SPI_SR_RFDF_MASK, /*!< Receive FIFO Drain Flag.*/
|
||||
kDSPI_TxAndRxStatusFlag = SPI_SR_TXRXS_MASK, /*!< The module is in Stopped/Running state.*/
|
||||
kDSPI_AllStatusFlag = (int)(SPI_SR_TCF_MASK | SPI_SR_EOQF_MASK | SPI_SR_TFUF_MASK | SPI_SR_TFFF_MASK |
|
||||
SPI_SR_RFOF_MASK | SPI_SR_RFDF_MASK | SPI_SR_TXRXS_MASK) /*!< All statuses above.*/
|
||||
};
|
||||
|
||||
/*! @brief DSPI interrupt source.*/
|
||||
enum _dspi_interrupt_enable
|
||||
{
|
||||
kDSPI_TxCompleteInterruptEnable = SPI_RSER_TCF_RE_MASK, /*!< TCF interrupt enable.*/
|
||||
kDSPI_EndOfQueueInterruptEnable = SPI_RSER_EOQF_RE_MASK, /*!< EOQF interrupt enable.*/
|
||||
kDSPI_TxFifoUnderflowInterruptEnable = SPI_RSER_TFUF_RE_MASK, /*!< TFUF interrupt enable.*/
|
||||
kDSPI_TxFifoFillRequestInterruptEnable = SPI_RSER_TFFF_RE_MASK, /*!< TFFF interrupt enable, DMA disable.*/
|
||||
kDSPI_RxFifoOverflowInterruptEnable = SPI_RSER_RFOF_RE_MASK, /*!< RFOF interrupt enable.*/
|
||||
kDSPI_RxFifoDrainRequestInterruptEnable = SPI_RSER_RFDF_RE_MASK, /*!< RFDF interrupt enable, DMA disable.*/
|
||||
kDSPI_AllInterruptEnable = SPI_RSER_TCF_RE_MASK | SPI_RSER_EOQF_RE_MASK | SPI_RSER_TFUF_RE_MASK |
|
||||
SPI_RSER_TFFF_RE_MASK | SPI_RSER_RFOF_RE_MASK | SPI_RSER_RFDF_RE_MASK
|
||||
kDSPI_TxCompleteInterruptEnable = (int)SPI_RSER_TCF_RE_MASK, /*!< TCF interrupt enable.*/
|
||||
kDSPI_EndOfQueueInterruptEnable = SPI_RSER_EOQF_RE_MASK, /*!< EOQF interrupt enable.*/
|
||||
kDSPI_TxFifoUnderflowInterruptEnable = SPI_RSER_TFUF_RE_MASK, /*!< TFUF interrupt enable.*/
|
||||
kDSPI_TxFifoFillRequestInterruptEnable = SPI_RSER_TFFF_RE_MASK, /*!< TFFF interrupt enable, DMA disable.*/
|
||||
kDSPI_RxFifoOverflowInterruptEnable = SPI_RSER_RFOF_RE_MASK, /*!< RFOF interrupt enable.*/
|
||||
kDSPI_RxFifoDrainRequestInterruptEnable = SPI_RSER_RFDF_RE_MASK, /*!< RFDF interrupt enable, DMA disable.*/
|
||||
kDSPI_AllInterruptEnable = (int)(SPI_RSER_TCF_RE_MASK | SPI_RSER_EOQF_RE_MASK | SPI_RSER_TFUF_RE_MASK |
|
||||
SPI_RSER_TFFF_RE_MASK | SPI_RSER_RFOF_RE_MASK | SPI_RSER_RFDF_RE_MASK)
|
||||
/*!< All above interrupts enable.*/
|
||||
};
|
||||
|
||||
|
|
@ -103,11 +80,12 @@ enum _dspi_dma_enable
|
|||
typedef enum _dspi_master_slave_mode
|
||||
{
|
||||
kDSPI_Master = 1U, /*!< DSPI peripheral operates in master mode.*/
|
||||
kDSPI_Slave = 0U /*!< DSPI peripheral operates in slave mode.*/
|
||||
kDSPI_Slave = 0U /*!< DSPI peripheral operates in slave mode.*/
|
||||
} dspi_master_slave_mode_t;
|
||||
|
||||
/*!
|
||||
* @brief DSPI Sample Point: Controls when the DSPI master samples SIN in the Modified Transfer Format. This field is valid
|
||||
* @brief DSPI Sample Point: Controls when the DSPI master samples SIN in the Modified Transfer Format. This field is
|
||||
* valid
|
||||
* only when the CPHA bit in the CTAR register is 0.
|
||||
*/
|
||||
typedef enum _dspi_master_sample_point
|
||||
|
|
@ -132,26 +110,26 @@ typedef enum _dspi_which_pcs_config
|
|||
typedef enum _dspi_pcs_polarity_config
|
||||
{
|
||||
kDSPI_PcsActiveHigh = 0U, /*!< Pcs Active High (idles low). */
|
||||
kDSPI_PcsActiveLow = 1U /*!< Pcs Active Low (idles high). */
|
||||
kDSPI_PcsActiveLow = 1U /*!< Pcs Active Low (idles high). */
|
||||
} dspi_pcs_polarity_config_t;
|
||||
|
||||
/*! @brief DSPI Peripheral Chip Select (Pcs) Polarity.*/
|
||||
enum _dspi_pcs_polarity
|
||||
{
|
||||
kDSPI_Pcs0ActiveLow = 1U << 0, /*!< Pcs0 Active Low (idles high). */
|
||||
kDSPI_Pcs1ActiveLow = 1U << 1, /*!< Pcs1 Active Low (idles high). */
|
||||
kDSPI_Pcs2ActiveLow = 1U << 2, /*!< Pcs2 Active Low (idles high). */
|
||||
kDSPI_Pcs3ActiveLow = 1U << 3, /*!< Pcs3 Active Low (idles high). */
|
||||
kDSPI_Pcs4ActiveLow = 1U << 4, /*!< Pcs4 Active Low (idles high). */
|
||||
kDSPI_Pcs5ActiveLow = 1U << 5, /*!< Pcs5 Active Low (idles high). */
|
||||
kDSPI_PcsAllActiveLow = 0xFFU /*!< Pcs0 to Pcs5 Active Low (idles high). */
|
||||
kDSPI_Pcs0ActiveLow = 1U << 0, /*!< Pcs0 Active Low (idles high). */
|
||||
kDSPI_Pcs1ActiveLow = 1U << 1, /*!< Pcs1 Active Low (idles high). */
|
||||
kDSPI_Pcs2ActiveLow = 1U << 2, /*!< Pcs2 Active Low (idles high). */
|
||||
kDSPI_Pcs3ActiveLow = 1U << 3, /*!< Pcs3 Active Low (idles high). */
|
||||
kDSPI_Pcs4ActiveLow = 1U << 4, /*!< Pcs4 Active Low (idles high). */
|
||||
kDSPI_Pcs5ActiveLow = 1U << 5, /*!< Pcs5 Active Low (idles high). */
|
||||
kDSPI_PcsAllActiveLow = 0xFFU /*!< Pcs0 to Pcs5 Active Low (idles high). */
|
||||
};
|
||||
|
||||
/*! @brief DSPI clock polarity configuration for a given CTAR.*/
|
||||
typedef enum _dspi_clock_polarity
|
||||
{
|
||||
kDSPI_ClockPolarityActiveHigh = 0U, /*!< CPOL=0. Active-high DSPI clock (idles low).*/
|
||||
kDSPI_ClockPolarityActiveLow = 1U /*!< CPOL=1. Active-low DSPI clock (idles high).*/
|
||||
kDSPI_ClockPolarityActiveLow = 1U /*!< CPOL=1. Active-low DSPI clock (idles high).*/
|
||||
} dspi_clock_polarity_t;
|
||||
|
||||
/*! @brief DSPI clock phase configuration for a given CTAR.*/
|
||||
|
|
@ -216,8 +194,9 @@ enum _dspi_transfer_config_flag_for_master
|
|||
kDSPI_MasterPcs4 = 4U << DSPI_MASTER_PCS_SHIFT, /*!< DSPI master transfer use PCS4 signal. */
|
||||
kDSPI_MasterPcs5 = 5U << DSPI_MASTER_PCS_SHIFT, /*!< DSPI master transfer use PCS5 signal. */
|
||||
|
||||
kDSPI_MasterPcsContinuous = 1U << 20, /*!< Indicates whether the PCS signal is continuous. */
|
||||
kDSPI_MasterActiveAfterTransfer = 1U << 21, /*!< Indicates whether the PCS signal is active after the last frame transfer.*/
|
||||
kDSPI_MasterPcsContinuous = 1U << 20, /*!< Indicates whether the PCS signal is continuous. */
|
||||
kDSPI_MasterActiveAfterTransfer =
|
||||
1U << 21, /*!< Indicates whether the PCS signal is active after the last frame transfer.*/
|
||||
};
|
||||
|
||||
#define DSPI_SLAVE_CTAR_SHIFT (0U) /*!< DSPI slave CTAR shift macro; used internally. */
|
||||
|
|
@ -240,7 +219,7 @@ enum _dspi_transfer_state
|
|||
/*! @brief DSPI master command date configuration used for the SPIx_PUSHR.*/
|
||||
typedef struct _dspi_command_data_config
|
||||
{
|
||||
bool isPcsContinuous; /*!< Option to enable the continuous assertion of the chip select between transfers.*/
|
||||
bool isPcsContinuous; /*!< Option to enable the continuous assertion of the chip select between transfers.*/
|
||||
dspi_ctar_selection_t whichCtar; /*!< The desired Clock and Transfer Attributes
|
||||
Register (CTAR) to use for CTAS.*/
|
||||
dspi_which_pcs_t whichPcs; /*!< The desired PCS signal to use for the data transfer.*/
|
||||
|
|
@ -257,10 +236,10 @@ typedef struct _dspi_master_ctar_config
|
|||
dspi_clock_phase_t cpha; /*!< Clock phase. */
|
||||
dspi_shift_direction_t direction; /*!< MSB or LSB data shift direction. */
|
||||
|
||||
uint32_t pcsToSckDelayInNanoSec; /*!< PCS to SCK delay time in nanoseconds; setting to 0 sets the minimum
|
||||
delay. It also sets the boundary value if out of range.*/
|
||||
uint32_t lastSckToPcsDelayInNanoSec; /*!< The last SCK to PCS delay time in nanoseconds; setting to 0 sets the
|
||||
minimum delay. It also sets the boundary value if out of range.*/
|
||||
uint32_t pcsToSckDelayInNanoSec; /*!< PCS to SCK delay time in nanoseconds; setting to 0 sets the minimum
|
||||
delay. It also sets the boundary value if out of range.*/
|
||||
uint32_t lastSckToPcsDelayInNanoSec; /*!< The last SCK to PCS delay time in nanoseconds; setting to 0 sets the
|
||||
minimum delay. It also sets the boundary value if out of range.*/
|
||||
|
||||
uint32_t betweenTransferDelayInNanoSec; /*!< After the SCK delay time in nanoseconds; setting to 0 sets the minimum
|
||||
delay. It also sets the boundary value if out of range.*/
|
||||
|
|
@ -314,13 +293,13 @@ typedef struct _dspi_slave_config
|
|||
} dspi_slave_config_t;
|
||||
|
||||
/*!
|
||||
* @brief Forward declaration of the _dspi_master_handle typedefs.
|
||||
*/
|
||||
* @brief Forward declaration of the _dspi_master_handle typedefs.
|
||||
*/
|
||||
typedef struct _dspi_master_handle dspi_master_handle_t;
|
||||
|
||||
/*!
|
||||
* @brief Forward declaration of the _dspi_slave_handle typedefs.
|
||||
*/
|
||||
* @brief Forward declaration of the _dspi_slave_handle typedefs.
|
||||
*/
|
||||
typedef struct _dspi_slave_handle dspi_slave_handle_t;
|
||||
|
||||
/*!
|
||||
|
|
@ -355,12 +334,24 @@ typedef struct _dspi_transfer
|
|||
uint8_t *rxData; /*!< Receive buffer. */
|
||||
volatile size_t dataSize; /*!< Transfer bytes. */
|
||||
|
||||
uint32_t
|
||||
configFlags; /*!< Transfer transfer configuration flags; set from _dspi_transfer_config_flag_for_master if the
|
||||
transfer is used for master or _dspi_transfer_config_flag_for_slave enumeration if the transfer
|
||||
is used for slave.*/
|
||||
uint32_t configFlags; /*!< Transfer transfer configuration flags; set from _dspi_transfer_config_flag_for_master if
|
||||
the transfer is used for master or _dspi_transfer_config_flag_for_slave enumeration if the
|
||||
transfer is used for slave.*/
|
||||
} dspi_transfer_t;
|
||||
|
||||
/*! @brief DSPI half-duplex(master) transfer structure */
|
||||
typedef struct _dspi_half_duplex_transfer
|
||||
{
|
||||
uint8_t *txData; /*!< Send buffer */
|
||||
uint8_t *rxData; /*!< Receive buffer */
|
||||
size_t txDataSize; /*!< Transfer bytes for transmit */
|
||||
size_t rxDataSize; /*!< Transfer bytes */
|
||||
uint32_t configFlags; /*!< Transfer configuration flags; set from _dspi_transfer_config_flag_for_master. */
|
||||
bool isPcsAssertInTransfer; /*!< If Pcs pin keep assert between transmit and receive. true for assert and false for
|
||||
deassert. */
|
||||
bool isTransmitFirst; /*!< True for transmit first and false for receive first. */
|
||||
} dspi_half_duplex_transfer_t;
|
||||
|
||||
/*! @brief DSPI master transfer handle structure used for transactional API. */
|
||||
struct _dspi_master_handle
|
||||
{
|
||||
|
|
@ -370,8 +361,9 @@ struct _dspi_master_handle
|
|||
|
||||
uint8_t fifoSize; /*!< FIFO dataSize. */
|
||||
|
||||
volatile bool isPcsActiveAfterTransfer; /*!< Indicates whether the PCS signal is active after the last frame transfer.*/
|
||||
volatile bool isThereExtraByte; /*!< Indicates whether there are extra bytes.*/
|
||||
volatile bool
|
||||
isPcsActiveAfterTransfer; /*!< Indicates whether the PCS signal is active after the last frame transfer.*/
|
||||
volatile bool isThereExtraByte; /*!< Indicates whether there are extra bytes.*/
|
||||
|
||||
uint8_t *volatile txData; /*!< Send buffer. */
|
||||
uint8_t *volatile rxData; /*!< Receive buffer. */
|
||||
|
|
@ -525,7 +517,7 @@ static inline void DSPI_Enable(SPI_Type *base, bool enable)
|
|||
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @name Status
|
||||
|
|
@ -563,7 +555,7 @@ static inline void DSPI_ClearStatusFlags(SPI_Type *base, uint32_t statusFlags)
|
|||
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @name Interrupts
|
||||
|
|
@ -575,6 +567,7 @@ static inline void DSPI_ClearStatusFlags(SPI_Type *base, uint32_t statusFlags)
|
|||
*
|
||||
* This function configures the various interrupt masks of the DSPI. The parameters are a base and an interrupt mask.
|
||||
* Note, for Tx Fill and Rx FIFO drain requests, enable the interrupt request and disable the DMA request.
|
||||
* Do not use this API(write to RSER register) while DSPI is in running state.
|
||||
*
|
||||
* @code
|
||||
* DSPI_EnableInterrupts(base, kDSPI_TxCompleteInterruptEnable | kDSPI_EndOfQueueInterruptEnable );
|
||||
|
|
@ -602,7 +595,7 @@ static inline void DSPI_DisableInterrupts(SPI_Type *base, uint32_t mask)
|
|||
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @name DMA Control
|
||||
|
|
@ -682,12 +675,18 @@ static inline uint32_t DSPI_GetRxRegisterAddress(SPI_Type *base)
|
|||
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @name Bus Operations
|
||||
* @{
|
||||
*/
|
||||
/*!
|
||||
* @brief Get instance number for DSPI module.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
*/
|
||||
uint32_t DSPI_GetInstance(SPI_Type *base);
|
||||
|
||||
/*!
|
||||
* @brief Configures the DSPI for master or slave.
|
||||
|
|
@ -708,7 +707,14 @@ static inline void DSPI_SetMasterSlaveMode(SPI_Type *base, dspi_master_slave_mod
|
|||
*/
|
||||
static inline bool DSPI_IsMaster(SPI_Type *base)
|
||||
{
|
||||
return (bool)((base->MCR) & SPI_MCR_MSTR_MASK);
|
||||
if (0U != ((base->MCR) & SPI_MCR_MSTR_MASK))
|
||||
{
|
||||
return true;
|
||||
}
|
||||
else
|
||||
{
|
||||
return false;
|
||||
}
|
||||
}
|
||||
/*!
|
||||
* @brief Starts the DSPI transfers and clears HALT bit in MCR.
|
||||
|
|
@ -746,8 +752,8 @@ static inline void DSPI_StopTransfer(SPI_Type *base)
|
|||
*/
|
||||
static inline void DSPI_SetFifoEnable(SPI_Type *base, bool enableTxFifo, bool enableRxFifo)
|
||||
{
|
||||
base->MCR = (base->MCR & (~(SPI_MCR_DIS_RXF_MASK | SPI_MCR_DIS_TXF_MASK))) | SPI_MCR_DIS_TXF(!enableTxFifo) |
|
||||
SPI_MCR_DIS_RXF(!enableRxFifo);
|
||||
base->MCR = (base->MCR & (~(SPI_MCR_DIS_RXF_MASK | SPI_MCR_DIS_TXF_MASK))) |
|
||||
SPI_MCR_DIS_TXF((false == enableTxFifo ? 1U : 0U)) | SPI_MCR_DIS_RXF((false == enableRxFifo ? 1U : 0U));
|
||||
}
|
||||
|
||||
/*!
|
||||
|
|
@ -759,8 +765,8 @@ static inline void DSPI_SetFifoEnable(SPI_Type *base, bool enableTxFifo, bool en
|
|||
*/
|
||||
static inline void DSPI_FlushFifo(SPI_Type *base, bool flushTxFifo, bool flushRxFifo)
|
||||
{
|
||||
base->MCR = (base->MCR & (~(SPI_MCR_CLR_TXF_MASK | SPI_MCR_CLR_RXF_MASK))) | SPI_MCR_CLR_TXF(flushTxFifo) |
|
||||
SPI_MCR_CLR_RXF(flushRxFifo);
|
||||
base->MCR = (base->MCR & (~(SPI_MCR_CLR_TXF_MASK | SPI_MCR_CLR_RXF_MASK))) |
|
||||
SPI_MCR_CLR_TXF((true == flushTxFifo ? 1U : 0U)) | SPI_MCR_CLR_RXF((true == flushRxFifo ? 1U : 0U));
|
||||
}
|
||||
|
||||
/*!
|
||||
|
|
@ -950,10 +956,12 @@ static inline uint32_t DSPI_MasterGetFormattedCommand(dspi_command_data_config_t
|
|||
* @brief Writes a 32-bit data word (16-bit command appended with 16-bit data) into the data
|
||||
* buffer master mode and waits till complete to return.
|
||||
*
|
||||
* In this function, the user must append the 16-bit data to the 16-bit command information and then provide the total 32-bit word
|
||||
* In this function, the user must append the 16-bit data to the 16-bit command information and then provide the total
|
||||
* 32-bit word
|
||||
* as the data to send.
|
||||
* The command portion provides characteristics of the data, such as the optional continuous chip select operation
|
||||
* between transfers, the desired Clock and Transfer Attributes register to use for the associated SPI frame, the desired PCS
|
||||
* between transfers, the desired Clock and Transfer Attributes register to use for the associated SPI frame, the
|
||||
* desired PCS
|
||||
* signal to use for the data transfer, whether the current transfer is the last in the queue, and whether to clear the
|
||||
* transfer count (normally needed when sending the first frame of a data packet). The user is responsible for
|
||||
* appending this command with the data to send. This is an example:
|
||||
|
|
@ -968,20 +976,20 @@ static inline uint32_t DSPI_MasterGetFormattedCommand(dspi_command_data_config_t
|
|||
*
|
||||
* For a blocking polling transfer, see methods below.
|
||||
* Option 1:
|
||||
* uint32_t command_to_send = DSPI_MasterGetFormattedCommand(&command);
|
||||
* uint32_t data0 = command_to_send | data_need_to_send_0;
|
||||
* uint32_t data1 = command_to_send | data_need_to_send_1;
|
||||
* uint32_t data2 = command_to_send | data_need_to_send_2;
|
||||
*
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data0);
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data1);
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data2);
|
||||
*
|
||||
* Option 2:
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_0);
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_1);
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_2);
|
||||
*
|
||||
* uint32_t command_to_send = DSPI_MasterGetFormattedCommand(&command);
|
||||
* uint32_t data0 = command_to_send | data_need_to_send_0;
|
||||
* uint32_t data1 = command_to_send | data_need_to_send_1;
|
||||
* uint32_t data2 = command_to_send | data_need_to_send_2;
|
||||
*
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data0);
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data1);
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data2);
|
||||
*
|
||||
* Option 2:
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_0);
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_1);
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_2);
|
||||
*
|
||||
* @param base DSPI peripheral address.
|
||||
* @param data The data word (command and data combined) to be sent.
|
||||
*/
|
||||
|
|
@ -1022,9 +1030,17 @@ static inline uint32_t DSPI_ReadData(SPI_Type *base)
|
|||
return (base->POPR);
|
||||
}
|
||||
|
||||
/*!
|
||||
* @brief Set up the dummy data.
|
||||
*
|
||||
* @param base DSPI peripheral address.
|
||||
* @param dummyData Data to be transferred when tx buffer is NULL.
|
||||
*/
|
||||
void DSPI_SetDummyData(SPI_Type *base, uint8_t dummyData);
|
||||
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @name Transactional
|
||||
|
|
@ -1073,6 +1089,35 @@ status_t DSPI_MasterTransferBlocking(SPI_Type *base, dspi_transfer_t *transfer);
|
|||
*/
|
||||
status_t DSPI_MasterTransferNonBlocking(SPI_Type *base, dspi_master_handle_t *handle, dspi_transfer_t *transfer);
|
||||
|
||||
/*!
|
||||
* @brief Transfers a block of data using a polling method.
|
||||
*
|
||||
* This function will do a half-duplex transfer for DSPI master, This is a blocking function,
|
||||
* which does not retuen until all transfer have been completed. And data transfer will be half-duplex,
|
||||
* users can set transmit first or receive first.
|
||||
*
|
||||
* @param base DSPI base pointer
|
||||
* @param xfer pointer to dspi_half_duplex_transfer_t structure
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterHalfDuplexTransferBlocking(SPI_Type *base, dspi_half_duplex_transfer_t *xfer);
|
||||
|
||||
/*!
|
||||
* @brief Performs a non-blocking DSPI interrupt transfer.
|
||||
*
|
||||
* This function transfers data using interrupts, the transfer mechanism is half-duplex. This is a non-blocking
|
||||
* function,
|
||||
* which returns right away. When all data is transferred, the callback function is called.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_master_handle_t structure which stores the transfer state
|
||||
* @param xfer pointer to dspi_half_duplex_transfer_t structure
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterHalfDuplexTransferNonBlocking(SPI_Type *base,
|
||||
dspi_master_handle_t *handle,
|
||||
dspi_half_duplex_transfer_t *xfer);
|
||||
|
||||
/*!
|
||||
* @brief Gets the master transfer count.
|
||||
*
|
||||
|
|
@ -1166,15 +1211,25 @@ void DSPI_SlaveTransferAbort(SPI_Type *base, dspi_slave_handle_t *handle);
|
|||
*/
|
||||
void DSPI_SlaveTransferHandleIRQ(SPI_Type *base, dspi_slave_handle_t *handle);
|
||||
|
||||
/*!
|
||||
* brief Dummy data for each instance.
|
||||
*
|
||||
* The purpose of this API is to avoid MISRA rule8.5 : Multiple declarations of
|
||||
* externally-linked object or function g_dspiDummyData.
|
||||
*
|
||||
* param base DSPI peripheral base address.
|
||||
*/
|
||||
uint8_t DSPI_GetDummyDataInstance(SPI_Type *base);
|
||||
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif /*_cplusplus*/
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
#endif /*_FSL_DSPI_H_*/
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,31 +1,9 @@
|
|||
/*
|
||||
* Copyright (c) 2015, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2017 NXP
|
||||
* Copyright 2016-2018 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
#ifndef _FSL_DSPI_EDMA_H_
|
||||
#define _FSL_DSPI_EDMA_H_
|
||||
|
|
@ -41,14 +19,20 @@
|
|||
* Definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief DSPI EDMA driver version 2.2.2. */
|
||||
#define FSL_DSPI_EDMA_DRIVER_VERSION (MAKE_VERSION(2, 2, 2))
|
||||
/*@}*/
|
||||
|
||||
/*!
|
||||
* @brief Forward declaration of the DSPI eDMA master handle typedefs.
|
||||
*/
|
||||
* @brief Forward declaration of the DSPI eDMA master handle typedefs.
|
||||
*/
|
||||
typedef struct _dspi_master_edma_handle dspi_master_edma_handle_t;
|
||||
|
||||
/*!
|
||||
* @brief Forward declaration of the DSPI eDMA slave handle typedefs.
|
||||
*/
|
||||
* @brief Forward declaration of the DSPI eDMA slave handle typedefs.
|
||||
*/
|
||||
typedef struct _dspi_slave_edma_handle dspi_slave_edma_handle_t;
|
||||
|
||||
/*!
|
||||
|
|
@ -186,6 +170,21 @@ void DSPI_MasterTransferCreateHandleEDMA(SPI_Type *base,
|
|||
*/
|
||||
status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *handle, dspi_transfer_t *transfer);
|
||||
|
||||
/*!
|
||||
* @brief Transfers a block of data using a eDMA method.
|
||||
*
|
||||
* This function transfers data using eDNA, the transfer mechanism is half-duplex. This is a non-blocking function,
|
||||
* which returns right away. When all data is transferred, the callback function is called.
|
||||
*
|
||||
* @param base DSPI base pointer
|
||||
* @param handle A pointer to the dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer A pointer to the dspi_half_duplex_transfer_t structure.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterHalfDuplexTransferEDMA(SPI_Type *base,
|
||||
dspi_master_edma_handle_t *handle,
|
||||
dspi_half_duplex_transfer_t *xfer);
|
||||
|
||||
/*!
|
||||
* @brief DSPI master aborts a transfer which is using eDMA.
|
||||
*
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,31 +1,9 @@
|
|||
/*
|
||||
* Copyright (c) 2015, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2017 NXP
|
||||
* Copyright 2016-2019 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
#ifndef _FSL_DSPI_H_
|
||||
#define _FSL_DSPI_H_
|
||||
|
|
@ -43,8 +21,8 @@
|
|||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief DSPI driver version 2.2.0. */
|
||||
#define FSL_DSPI_DRIVER_VERSION (MAKE_VERSION(2, 2, 0))
|
||||
/*! @brief DSPI driver version 2.2.2. */
|
||||
#define FSL_DSPI_DRIVER_VERSION (MAKE_VERSION(2, 2, 2))
|
||||
/*@}*/
|
||||
|
||||
#ifndef DSPI_DUMMY_DATA
|
||||
|
|
@ -55,37 +33,37 @@
|
|||
/*! @brief Status for the DSPI driver.*/
|
||||
enum _dspi_status
|
||||
{
|
||||
kStatus_DSPI_Busy = MAKE_STATUS(kStatusGroup_DSPI, 0), /*!< DSPI transfer is busy.*/
|
||||
kStatus_DSPI_Error = MAKE_STATUS(kStatusGroup_DSPI, 1), /*!< DSPI driver error. */
|
||||
kStatus_DSPI_Idle = MAKE_STATUS(kStatusGroup_DSPI, 2), /*!< DSPI is idle.*/
|
||||
kStatus_DSPI_OutOfRange = MAKE_STATUS(kStatusGroup_DSPI, 3) /*!< DSPI transfer out of range. */
|
||||
kStatus_DSPI_Busy = MAKE_STATUS(kStatusGroup_DSPI, 0), /*!< DSPI transfer is busy.*/
|
||||
kStatus_DSPI_Error = MAKE_STATUS(kStatusGroup_DSPI, 1), /*!< DSPI driver error. */
|
||||
kStatus_DSPI_Idle = MAKE_STATUS(kStatusGroup_DSPI, 2), /*!< DSPI is idle.*/
|
||||
kStatus_DSPI_OutOfRange = MAKE_STATUS(kStatusGroup_DSPI, 3) /*!< DSPI transfer out of range. */
|
||||
};
|
||||
|
||||
/*! @brief DSPI status flags in SPIx_SR register.*/
|
||||
enum _dspi_flags
|
||||
{
|
||||
kDSPI_TxCompleteFlag = SPI_SR_TCF_MASK, /*!< Transfer Complete Flag. */
|
||||
kDSPI_EndOfQueueFlag = SPI_SR_EOQF_MASK, /*!< End of Queue Flag.*/
|
||||
kDSPI_TxFifoUnderflowFlag = SPI_SR_TFUF_MASK, /*!< Transmit FIFO Underflow Flag.*/
|
||||
kDSPI_TxFifoFillRequestFlag = SPI_SR_TFFF_MASK, /*!< Transmit FIFO Fill Flag.*/
|
||||
kDSPI_RxFifoOverflowFlag = SPI_SR_RFOF_MASK, /*!< Receive FIFO Overflow Flag.*/
|
||||
kDSPI_RxFifoDrainRequestFlag = SPI_SR_RFDF_MASK, /*!< Receive FIFO Drain Flag.*/
|
||||
kDSPI_TxAndRxStatusFlag = SPI_SR_TXRXS_MASK, /*!< The module is in Stopped/Running state.*/
|
||||
kDSPI_AllStatusFlag = SPI_SR_TCF_MASK | SPI_SR_EOQF_MASK | SPI_SR_TFUF_MASK | SPI_SR_TFFF_MASK | SPI_SR_RFOF_MASK |
|
||||
SPI_SR_RFDF_MASK | SPI_SR_TXRXS_MASK /*!< All statuses above.*/
|
||||
kDSPI_TxCompleteFlag = (int)SPI_SR_TCF_MASK, /*!< Transfer Complete Flag. */
|
||||
kDSPI_EndOfQueueFlag = SPI_SR_EOQF_MASK, /*!< End of Queue Flag.*/
|
||||
kDSPI_TxFifoUnderflowFlag = SPI_SR_TFUF_MASK, /*!< Transmit FIFO Underflow Flag.*/
|
||||
kDSPI_TxFifoFillRequestFlag = SPI_SR_TFFF_MASK, /*!< Transmit FIFO Fill Flag.*/
|
||||
kDSPI_RxFifoOverflowFlag = SPI_SR_RFOF_MASK, /*!< Receive FIFO Overflow Flag.*/
|
||||
kDSPI_RxFifoDrainRequestFlag = SPI_SR_RFDF_MASK, /*!< Receive FIFO Drain Flag.*/
|
||||
kDSPI_TxAndRxStatusFlag = SPI_SR_TXRXS_MASK, /*!< The module is in Stopped/Running state.*/
|
||||
kDSPI_AllStatusFlag = (int)(SPI_SR_TCF_MASK | SPI_SR_EOQF_MASK | SPI_SR_TFUF_MASK | SPI_SR_TFFF_MASK |
|
||||
SPI_SR_RFOF_MASK | SPI_SR_RFDF_MASK | SPI_SR_TXRXS_MASK) /*!< All statuses above.*/
|
||||
};
|
||||
|
||||
/*! @brief DSPI interrupt source.*/
|
||||
enum _dspi_interrupt_enable
|
||||
{
|
||||
kDSPI_TxCompleteInterruptEnable = SPI_RSER_TCF_RE_MASK, /*!< TCF interrupt enable.*/
|
||||
kDSPI_EndOfQueueInterruptEnable = SPI_RSER_EOQF_RE_MASK, /*!< EOQF interrupt enable.*/
|
||||
kDSPI_TxFifoUnderflowInterruptEnable = SPI_RSER_TFUF_RE_MASK, /*!< TFUF interrupt enable.*/
|
||||
kDSPI_TxFifoFillRequestInterruptEnable = SPI_RSER_TFFF_RE_MASK, /*!< TFFF interrupt enable, DMA disable.*/
|
||||
kDSPI_RxFifoOverflowInterruptEnable = SPI_RSER_RFOF_RE_MASK, /*!< RFOF interrupt enable.*/
|
||||
kDSPI_RxFifoDrainRequestInterruptEnable = SPI_RSER_RFDF_RE_MASK, /*!< RFDF interrupt enable, DMA disable.*/
|
||||
kDSPI_AllInterruptEnable = SPI_RSER_TCF_RE_MASK | SPI_RSER_EOQF_RE_MASK | SPI_RSER_TFUF_RE_MASK |
|
||||
SPI_RSER_TFFF_RE_MASK | SPI_RSER_RFOF_RE_MASK | SPI_RSER_RFDF_RE_MASK
|
||||
kDSPI_TxCompleteInterruptEnable = (int)SPI_RSER_TCF_RE_MASK, /*!< TCF interrupt enable.*/
|
||||
kDSPI_EndOfQueueInterruptEnable = SPI_RSER_EOQF_RE_MASK, /*!< EOQF interrupt enable.*/
|
||||
kDSPI_TxFifoUnderflowInterruptEnable = SPI_RSER_TFUF_RE_MASK, /*!< TFUF interrupt enable.*/
|
||||
kDSPI_TxFifoFillRequestInterruptEnable = SPI_RSER_TFFF_RE_MASK, /*!< TFFF interrupt enable, DMA disable.*/
|
||||
kDSPI_RxFifoOverflowInterruptEnable = SPI_RSER_RFOF_RE_MASK, /*!< RFOF interrupt enable.*/
|
||||
kDSPI_RxFifoDrainRequestInterruptEnable = SPI_RSER_RFDF_RE_MASK, /*!< RFDF interrupt enable, DMA disable.*/
|
||||
kDSPI_AllInterruptEnable = (int)(SPI_RSER_TCF_RE_MASK | SPI_RSER_EOQF_RE_MASK | SPI_RSER_TFUF_RE_MASK |
|
||||
SPI_RSER_TFFF_RE_MASK | SPI_RSER_RFOF_RE_MASK | SPI_RSER_RFDF_RE_MASK)
|
||||
/*!< All above interrupts enable.*/
|
||||
};
|
||||
|
||||
|
|
@ -102,7 +80,7 @@ enum _dspi_dma_enable
|
|||
typedef enum _dspi_master_slave_mode
|
||||
{
|
||||
kDSPI_Master = 1U, /*!< DSPI peripheral operates in master mode.*/
|
||||
kDSPI_Slave = 0U /*!< DSPI peripheral operates in slave mode.*/
|
||||
kDSPI_Slave = 0U /*!< DSPI peripheral operates in slave mode.*/
|
||||
} dspi_master_slave_mode_t;
|
||||
|
||||
/*!
|
||||
|
|
@ -132,26 +110,26 @@ typedef enum _dspi_which_pcs_config
|
|||
typedef enum _dspi_pcs_polarity_config
|
||||
{
|
||||
kDSPI_PcsActiveHigh = 0U, /*!< Pcs Active High (idles low). */
|
||||
kDSPI_PcsActiveLow = 1U /*!< Pcs Active Low (idles high). */
|
||||
kDSPI_PcsActiveLow = 1U /*!< Pcs Active Low (idles high). */
|
||||
} dspi_pcs_polarity_config_t;
|
||||
|
||||
/*! @brief DSPI Peripheral Chip Select (Pcs) Polarity.*/
|
||||
enum _dspi_pcs_polarity
|
||||
{
|
||||
kDSPI_Pcs0ActiveLow = 1U << 0, /*!< Pcs0 Active Low (idles high). */
|
||||
kDSPI_Pcs1ActiveLow = 1U << 1, /*!< Pcs1 Active Low (idles high). */
|
||||
kDSPI_Pcs2ActiveLow = 1U << 2, /*!< Pcs2 Active Low (idles high). */
|
||||
kDSPI_Pcs3ActiveLow = 1U << 3, /*!< Pcs3 Active Low (idles high). */
|
||||
kDSPI_Pcs4ActiveLow = 1U << 4, /*!< Pcs4 Active Low (idles high). */
|
||||
kDSPI_Pcs5ActiveLow = 1U << 5, /*!< Pcs5 Active Low (idles high). */
|
||||
kDSPI_PcsAllActiveLow = 0xFFU /*!< Pcs0 to Pcs5 Active Low (idles high). */
|
||||
kDSPI_Pcs0ActiveLow = 1U << 0, /*!< Pcs0 Active Low (idles high). */
|
||||
kDSPI_Pcs1ActiveLow = 1U << 1, /*!< Pcs1 Active Low (idles high). */
|
||||
kDSPI_Pcs2ActiveLow = 1U << 2, /*!< Pcs2 Active Low (idles high). */
|
||||
kDSPI_Pcs3ActiveLow = 1U << 3, /*!< Pcs3 Active Low (idles high). */
|
||||
kDSPI_Pcs4ActiveLow = 1U << 4, /*!< Pcs4 Active Low (idles high). */
|
||||
kDSPI_Pcs5ActiveLow = 1U << 5, /*!< Pcs5 Active Low (idles high). */
|
||||
kDSPI_PcsAllActiveLow = 0xFFU /*!< Pcs0 to Pcs5 Active Low (idles high). */
|
||||
};
|
||||
|
||||
/*! @brief DSPI clock polarity configuration for a given CTAR.*/
|
||||
typedef enum _dspi_clock_polarity
|
||||
{
|
||||
kDSPI_ClockPolarityActiveHigh = 0U, /*!< CPOL=0. Active-high DSPI clock (idles low).*/
|
||||
kDSPI_ClockPolarityActiveLow = 1U /*!< CPOL=1. Active-low DSPI clock (idles high).*/
|
||||
kDSPI_ClockPolarityActiveLow = 1U /*!< CPOL=1. Active-low DSPI clock (idles high).*/
|
||||
} dspi_clock_polarity_t;
|
||||
|
||||
/*! @brief DSPI clock phase configuration for a given CTAR.*/
|
||||
|
|
@ -315,13 +293,13 @@ typedef struct _dspi_slave_config
|
|||
} dspi_slave_config_t;
|
||||
|
||||
/*!
|
||||
* @brief Forward declaration of the _dspi_master_handle typedefs.
|
||||
*/
|
||||
* @brief Forward declaration of the _dspi_master_handle typedefs.
|
||||
*/
|
||||
typedef struct _dspi_master_handle dspi_master_handle_t;
|
||||
|
||||
/*!
|
||||
* @brief Forward declaration of the _dspi_slave_handle typedefs.
|
||||
*/
|
||||
* @brief Forward declaration of the _dspi_slave_handle typedefs.
|
||||
*/
|
||||
typedef struct _dspi_slave_handle dspi_slave_handle_t;
|
||||
|
||||
/*!
|
||||
|
|
@ -356,12 +334,24 @@ typedef struct _dspi_transfer
|
|||
uint8_t *rxData; /*!< Receive buffer. */
|
||||
volatile size_t dataSize; /*!< Transfer bytes. */
|
||||
|
||||
uint32_t
|
||||
configFlags; /*!< Transfer transfer configuration flags; set from _dspi_transfer_config_flag_for_master if the
|
||||
transfer is used for master or _dspi_transfer_config_flag_for_slave enumeration if the transfer
|
||||
is used for slave.*/
|
||||
uint32_t configFlags; /*!< Transfer transfer configuration flags; set from _dspi_transfer_config_flag_for_master if
|
||||
the transfer is used for master or _dspi_transfer_config_flag_for_slave enumeration if the
|
||||
transfer is used for slave.*/
|
||||
} dspi_transfer_t;
|
||||
|
||||
/*! @brief DSPI half-duplex(master) transfer structure */
|
||||
typedef struct _dspi_half_duplex_transfer
|
||||
{
|
||||
uint8_t *txData; /*!< Send buffer */
|
||||
uint8_t *rxData; /*!< Receive buffer */
|
||||
size_t txDataSize; /*!< Transfer bytes for transmit */
|
||||
size_t rxDataSize; /*!< Transfer bytes */
|
||||
uint32_t configFlags; /*!< Transfer configuration flags; set from _dspi_transfer_config_flag_for_master. */
|
||||
bool isPcsAssertInTransfer; /*!< If Pcs pin keep assert between transmit and receive. true for assert and false for
|
||||
deassert. */
|
||||
bool isTransmitFirst; /*!< True for transmit first and false for receive first. */
|
||||
} dspi_half_duplex_transfer_t;
|
||||
|
||||
/*! @brief DSPI master transfer handle structure used for transactional API. */
|
||||
struct _dspi_master_handle
|
||||
{
|
||||
|
|
@ -527,7 +517,7 @@ static inline void DSPI_Enable(SPI_Type *base, bool enable)
|
|||
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @name Status
|
||||
|
|
@ -565,7 +555,7 @@ static inline void DSPI_ClearStatusFlags(SPI_Type *base, uint32_t statusFlags)
|
|||
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @name Interrupts
|
||||
|
|
@ -605,7 +595,7 @@ static inline void DSPI_DisableInterrupts(SPI_Type *base, uint32_t mask)
|
|||
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @name DMA Control
|
||||
|
|
@ -685,12 +675,18 @@ static inline uint32_t DSPI_GetRxRegisterAddress(SPI_Type *base)
|
|||
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @name Bus Operations
|
||||
* @{
|
||||
*/
|
||||
/*!
|
||||
* @brief Get instance number for DSPI module.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
*/
|
||||
uint32_t DSPI_GetInstance(SPI_Type *base);
|
||||
|
||||
/*!
|
||||
* @brief Configures the DSPI for master or slave.
|
||||
|
|
@ -711,7 +707,14 @@ static inline void DSPI_SetMasterSlaveMode(SPI_Type *base, dspi_master_slave_mod
|
|||
*/
|
||||
static inline bool DSPI_IsMaster(SPI_Type *base)
|
||||
{
|
||||
return (bool)((base->MCR) & SPI_MCR_MSTR_MASK);
|
||||
if (0U != ((base->MCR) & SPI_MCR_MSTR_MASK))
|
||||
{
|
||||
return true;
|
||||
}
|
||||
else
|
||||
{
|
||||
return false;
|
||||
}
|
||||
}
|
||||
/*!
|
||||
* @brief Starts the DSPI transfers and clears HALT bit in MCR.
|
||||
|
|
@ -749,8 +752,8 @@ static inline void DSPI_StopTransfer(SPI_Type *base)
|
|||
*/
|
||||
static inline void DSPI_SetFifoEnable(SPI_Type *base, bool enableTxFifo, bool enableRxFifo)
|
||||
{
|
||||
base->MCR = (base->MCR & (~(SPI_MCR_DIS_RXF_MASK | SPI_MCR_DIS_TXF_MASK))) | SPI_MCR_DIS_TXF(!enableTxFifo) |
|
||||
SPI_MCR_DIS_RXF(!enableRxFifo);
|
||||
base->MCR = (base->MCR & (~(SPI_MCR_DIS_RXF_MASK | SPI_MCR_DIS_TXF_MASK))) |
|
||||
SPI_MCR_DIS_TXF((false == enableTxFifo ? 1U : 0U)) | SPI_MCR_DIS_RXF((false == enableRxFifo ? 1U : 0U));
|
||||
}
|
||||
|
||||
/*!
|
||||
|
|
@ -762,8 +765,8 @@ static inline void DSPI_SetFifoEnable(SPI_Type *base, bool enableTxFifo, bool en
|
|||
*/
|
||||
static inline void DSPI_FlushFifo(SPI_Type *base, bool flushTxFifo, bool flushRxFifo)
|
||||
{
|
||||
base->MCR = (base->MCR & (~(SPI_MCR_CLR_TXF_MASK | SPI_MCR_CLR_RXF_MASK))) | SPI_MCR_CLR_TXF(flushTxFifo) |
|
||||
SPI_MCR_CLR_RXF(flushRxFifo);
|
||||
base->MCR = (base->MCR & (~(SPI_MCR_CLR_TXF_MASK | SPI_MCR_CLR_RXF_MASK))) |
|
||||
SPI_MCR_CLR_TXF((true == flushTxFifo ? 1U : 0U)) | SPI_MCR_CLR_RXF((true == flushRxFifo ? 1U : 0U));
|
||||
}
|
||||
|
||||
/*!
|
||||
|
|
@ -954,11 +957,11 @@ static inline uint32_t DSPI_MasterGetFormattedCommand(dspi_command_data_config_t
|
|||
* buffer master mode and waits till complete to return.
|
||||
*
|
||||
* In this function, the user must append the 16-bit data to the 16-bit command information and then provide the total
|
||||
* 32-bit word
|
||||
* 32-bit word
|
||||
* as the data to send.
|
||||
* The command portion provides characteristics of the data, such as the optional continuous chip select operation
|
||||
* between transfers, the desired Clock and Transfer Attributes register to use for the associated SPI frame, the
|
||||
* desired PCS
|
||||
* desired PCS
|
||||
* signal to use for the data transfer, whether the current transfer is the last in the queue, and whether to clear the
|
||||
* transfer count (normally needed when sending the first frame of a data packet). The user is responsible for
|
||||
* appending this command with the data to send. This is an example:
|
||||
|
|
@ -973,20 +976,20 @@ static inline uint32_t DSPI_MasterGetFormattedCommand(dspi_command_data_config_t
|
|||
*
|
||||
* For a blocking polling transfer, see methods below.
|
||||
* Option 1:
|
||||
* uint32_t command_to_send = DSPI_MasterGetFormattedCommand(&command);
|
||||
* uint32_t data0 = command_to_send | data_need_to_send_0;
|
||||
* uint32_t data1 = command_to_send | data_need_to_send_1;
|
||||
* uint32_t data2 = command_to_send | data_need_to_send_2;
|
||||
*
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data0);
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data1);
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data2);
|
||||
*
|
||||
* Option 2:
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_0);
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_1);
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_2);
|
||||
*
|
||||
* uint32_t command_to_send = DSPI_MasterGetFormattedCommand(&command);
|
||||
* uint32_t data0 = command_to_send | data_need_to_send_0;
|
||||
* uint32_t data1 = command_to_send | data_need_to_send_1;
|
||||
* uint32_t data2 = command_to_send | data_need_to_send_2;
|
||||
*
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data0);
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data1);
|
||||
* DSPI_MasterWriteCommandDataBlocking(base,data2);
|
||||
*
|
||||
* Option 2:
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_0);
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_1);
|
||||
* DSPI_MasterWriteDataBlocking(base,&command,data_need_to_send_2);
|
||||
*
|
||||
* @param base DSPI peripheral address.
|
||||
* @param data The data word (command and data combined) to be sent.
|
||||
*/
|
||||
|
|
@ -1037,7 +1040,7 @@ void DSPI_SetDummyData(SPI_Type *base, uint8_t dummyData);
|
|||
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @name Transactional
|
||||
|
|
@ -1086,6 +1089,35 @@ status_t DSPI_MasterTransferBlocking(SPI_Type *base, dspi_transfer_t *transfer);
|
|||
*/
|
||||
status_t DSPI_MasterTransferNonBlocking(SPI_Type *base, dspi_master_handle_t *handle, dspi_transfer_t *transfer);
|
||||
|
||||
/*!
|
||||
* @brief Transfers a block of data using a polling method.
|
||||
*
|
||||
* This function will do a half-duplex transfer for DSPI master, This is a blocking function,
|
||||
* which does not retuen until all transfer have been completed. And data transfer will be half-duplex,
|
||||
* users can set transmit first or receive first.
|
||||
*
|
||||
* @param base DSPI base pointer
|
||||
* @param xfer pointer to dspi_half_duplex_transfer_t structure
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterHalfDuplexTransferBlocking(SPI_Type *base, dspi_half_duplex_transfer_t *xfer);
|
||||
|
||||
/*!
|
||||
* @brief Performs a non-blocking DSPI interrupt transfer.
|
||||
*
|
||||
* This function transfers data using interrupts, the transfer mechanism is half-duplex. This is a non-blocking
|
||||
* function,
|
||||
* which returns right away. When all data is transferred, the callback function is called.
|
||||
*
|
||||
* @param base DSPI peripheral base address.
|
||||
* @param handle pointer to dspi_master_handle_t structure which stores the transfer state
|
||||
* @param xfer pointer to dspi_half_duplex_transfer_t structure
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterHalfDuplexTransferNonBlocking(SPI_Type *base,
|
||||
dspi_master_handle_t *handle,
|
||||
dspi_half_duplex_transfer_t *xfer);
|
||||
|
||||
/*!
|
||||
* @brief Gets the master transfer count.
|
||||
*
|
||||
|
|
@ -1179,15 +1211,25 @@ void DSPI_SlaveTransferAbort(SPI_Type *base, dspi_slave_handle_t *handle);
|
|||
*/
|
||||
void DSPI_SlaveTransferHandleIRQ(SPI_Type *base, dspi_slave_handle_t *handle);
|
||||
|
||||
/*!
|
||||
* brief Dummy data for each instance.
|
||||
*
|
||||
* The purpose of this API is to avoid MISRA rule8.5 : Multiple declarations of
|
||||
* externally-linked object or function g_dspiDummyData.
|
||||
*
|
||||
* param base DSPI peripheral base address.
|
||||
*/
|
||||
uint8_t DSPI_GetDummyDataInstance(SPI_Type *base);
|
||||
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif /*_cplusplus*/
|
||||
/*!
|
||||
*@}
|
||||
*/
|
||||
*/
|
||||
|
||||
#endif /*_FSL_DSPI_H_*/
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,31 +1,9 @@
|
|||
/*
|
||||
* Copyright (c) 2015, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2017 NXP
|
||||
* Copyright 2016-2018 NXP
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
#ifndef _FSL_DSPI_EDMA_H_
|
||||
#define _FSL_DSPI_EDMA_H_
|
||||
|
|
@ -41,14 +19,20 @@
|
|||
* Definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*! @name Driver version */
|
||||
/*@{*/
|
||||
/*! @brief DSPI EDMA driver version 2.2.2. */
|
||||
#define FSL_DSPI_EDMA_DRIVER_VERSION (MAKE_VERSION(2, 2, 2))
|
||||
/*@}*/
|
||||
|
||||
/*!
|
||||
* @brief Forward declaration of the DSPI eDMA master handle typedefs.
|
||||
*/
|
||||
* @brief Forward declaration of the DSPI eDMA master handle typedefs.
|
||||
*/
|
||||
typedef struct _dspi_master_edma_handle dspi_master_edma_handle_t;
|
||||
|
||||
/*!
|
||||
* @brief Forward declaration of the DSPI eDMA slave handle typedefs.
|
||||
*/
|
||||
* @brief Forward declaration of the DSPI eDMA slave handle typedefs.
|
||||
*/
|
||||
typedef struct _dspi_slave_edma_handle dspi_slave_edma_handle_t;
|
||||
|
||||
/*!
|
||||
|
|
@ -186,6 +170,21 @@ void DSPI_MasterTransferCreateHandleEDMA(SPI_Type *base,
|
|||
*/
|
||||
status_t DSPI_MasterTransferEDMA(SPI_Type *base, dspi_master_edma_handle_t *handle, dspi_transfer_t *transfer);
|
||||
|
||||
/*!
|
||||
* @brief Transfers a block of data using a eDMA method.
|
||||
*
|
||||
* This function transfers data using eDNA, the transfer mechanism is half-duplex. This is a non-blocking function,
|
||||
* which returns right away. When all data is transferred, the callback function is called.
|
||||
*
|
||||
* @param base DSPI base pointer
|
||||
* @param handle A pointer to the dspi_master_edma_handle_t structure which stores the transfer state.
|
||||
* @param transfer A pointer to the dspi_half_duplex_transfer_t structure.
|
||||
* @return status of status_t.
|
||||
*/
|
||||
status_t DSPI_MasterHalfDuplexTransferEDMA(SPI_Type *base,
|
||||
dspi_master_edma_handle_t *handle,
|
||||
dspi_half_duplex_transfer_t *xfer);
|
||||
|
||||
/*!
|
||||
* @brief DSPI master aborts a transfer which is using eDMA.
|
||||
*
|
||||
|
|
|
|||
Loading…
Reference in New Issue