mirror of https://github.com/ARMmbed/mbed-os.git
M263: Remove redundant SPI I2S pins from pinmap
The pins suffixed with 'I2SMCLK' are for SPI I2S and cannot be used in normal SPI. This is also to fix FPGA CI test mbed_hal_fpga_ci_test_shield-spi.pull/11379/head
Chun-Chieh Li
parent
c67a0d8bd0
commit
254866eac1
|
|
@ -43,7 +43,7 @@ const PinMap PinMap_GPIO[] = {
|
|||
{PA_13, GPIO_A, SYS_GPA_MFPH_PA13MFP_GPIO},
|
||||
{PA_14, GPIO_A, SYS_GPA_MFPH_PA14MFP_GPIO},
|
||||
{PA_15, GPIO_A, SYS_GPA_MFPH_PA15MFP_GPIO},
|
||||
|
||||
|
||||
// GPIO B MFP
|
||||
{PB_0, GPIO_B, SYS_GPB_MFPL_PB0MFP_GPIO},
|
||||
{PB_1, GPIO_B, SYS_GPB_MFPL_PB1MFP_GPIO},
|
||||
|
|
@ -61,7 +61,7 @@ const PinMap PinMap_GPIO[] = {
|
|||
{PB_13, GPIO_B, SYS_GPB_MFPH_PB13MFP_GPIO},
|
||||
{PB_14, GPIO_B, SYS_GPB_MFPH_PB14MFP_GPIO},
|
||||
{PB_15, GPIO_B, SYS_GPB_MFPH_PB15MFP_GPIO},
|
||||
|
||||
|
||||
// GPIO C MFP
|
||||
{PC_0, GPIO_C, SYS_GPC_MFPL_PC0MFP_GPIO},
|
||||
{PC_1, GPIO_C, SYS_GPC_MFPL_PC1MFP_GPIO},
|
||||
|
|
@ -77,7 +77,7 @@ const PinMap PinMap_GPIO[] = {
|
|||
{PC_11, GPIO_C, SYS_GPC_MFPH_PC11MFP_GPIO},
|
||||
{PC_12, GPIO_C, SYS_GPC_MFPH_PC12MFP_GPIO},
|
||||
{PC_13, GPIO_C, SYS_GPC_MFPH_PC13MFP_GPIO},
|
||||
|
||||
|
||||
// GPIO D MFP
|
||||
{PD_0, GPIO_D, SYS_GPD_MFPL_PD0MFP_GPIO},
|
||||
{PD_1, GPIO_D, SYS_GPD_MFPL_PD1MFP_GPIO},
|
||||
|
|
@ -94,7 +94,7 @@ const PinMap PinMap_GPIO[] = {
|
|||
{PD_12, GPIO_D, SYS_GPD_MFPH_PD12MFP_GPIO},
|
||||
{PD_13, GPIO_D, SYS_GPD_MFPH_PD13MFP_GPIO},
|
||||
{PD_14, GPIO_D, SYS_GPD_MFPH_PD14MFP_GPIO},
|
||||
|
||||
|
||||
// GPIO E MFP
|
||||
{PE_0, GPIO_E, SYS_GPE_MFPL_PE0MFP_GPIO},
|
||||
{PE_1, GPIO_E, SYS_GPE_MFPL_PE1MFP_GPIO},
|
||||
|
|
@ -146,6 +146,7 @@ const PinMap PinMap_GPIO[] = {
|
|||
{PH_9, GPIO_H, SYS_GPH_MFPH_PH9MFP_GPIO},
|
||||
{PH_10, GPIO_H, SYS_GPH_MFPH_PH10MFP_GPIO},
|
||||
{PH_11, GPIO_H, SYS_GPH_MFPH_PH11MFP_GPIO},
|
||||
|
||||
{NC, NC, 0}
|
||||
};
|
||||
#endif
|
||||
|
|
@ -169,7 +170,7 @@ const PinMap PinMap_ADC[] = {
|
|||
{PB_13, ADC_0_13, SYS_GPB_MFPH_PB13MFP_EADC0_CH13},
|
||||
{PB_14, ADC_0_14, SYS_GPB_MFPH_PB14MFP_EADC0_CH14},
|
||||
{PB_15, ADC_0_15, SYS_GPB_MFPH_PB15MFP_EADC0_CH15},
|
||||
|
||||
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
|
|
@ -209,7 +210,7 @@ const PinMap PinMap_I2C_SDA[] = {
|
|||
{PF_2, I2C_0, SYS_GPF_MFPL_PF2MFP_I2C0_SDA},
|
||||
{PG_3, I2C_1, SYS_GPG_MFPL_PG3MFP_I2C1_SDA},
|
||||
{PH_9, I2C_2, SYS_GPH_MFPH_PH9MFP_I2C2_SDA},
|
||||
|
||||
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
|
|
@ -238,7 +239,7 @@ const PinMap PinMap_I2C_SCL[] = {
|
|||
{PF_3, I2C_0, SYS_GPF_MFPL_PF3MFP_I2C0_SCL},
|
||||
{PG_2, I2C_1, SYS_GPG_MFPL_PG2MFP_I2C1_SCL},
|
||||
{PH_8, I2C_2, SYS_GPH_MFPH_PH8MFP_I2C2_SCL},
|
||||
|
||||
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
|
|
@ -355,7 +356,7 @@ const PinMap PinMap_UART_TX[] = {
|
|||
{NU_PINNAME_BIND(PH_10, UART_0), UART_0, SYS_GPH_MFPH_PH10MFP_UART0_TXD},
|
||||
{PH_10, UART_4, SYS_GPH_MFPH_PH10MFP_UART4_TXD},
|
||||
{NU_PINNAME_BIND(PH_10, UART_4), UART_4, SYS_GPH_MFPH_PH10MFP_UART4_TXD},
|
||||
|
||||
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
|
|
@ -407,7 +408,7 @@ const PinMap PinMap_UART_RX[] = {
|
|||
{NU_PINNAME_BIND(PH_11, UART_0), UART_0, SYS_GPH_MFPH_PH11MFP_UART0_RXD},
|
||||
{PH_11, UART_4, SYS_GPH_MFPH_PH11MFP_UART4_RXD},
|
||||
{NU_PINNAME_BIND(PH_11, UART_4), UART_4, SYS_GPH_MFPH_PH11MFP_UART4_RXD},
|
||||
|
||||
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
|
|
@ -428,7 +429,7 @@ const PinMap PinMap_UART_RTS[] = {
|
|||
{PE_13, UART_4, SYS_GPE_MFPH_PE13MFP_UART4_nRTS},
|
||||
{PF_4, UART_2, SYS_GPF_MFPL_PF4MFP_UART2_nRTS},
|
||||
{PH_8, UART_3, SYS_GPH_MFPH_PH8MFP_UART3_nRTS},
|
||||
|
||||
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
|
|
@ -449,7 +450,7 @@ const PinMap PinMap_UART_CTS[] = {
|
|||
{PE_11, UART_1, SYS_GPE_MFPH_PE11MFP_UART1_nCTS},
|
||||
{PF_5, UART_2, SYS_GPF_MFPL_PF5MFP_UART2_nCTS},
|
||||
{PH_9, UART_3, SYS_GPH_MFPH_PH9MFP_UART3_nCTS},
|
||||
|
||||
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
|
|
@ -474,7 +475,7 @@ const PinMap PinMap_SPI_MOSI[] = {
|
|||
{PF_6, SPI_0, SYS_GPF_MFPL_PF6MFP_SPI0_MOSI},
|
||||
{PF_11, SPI_2, SYS_GPF_MFPH_PF11MFP_SPI2_MOSI},
|
||||
{PH_5, SPI_1, SYS_GPH_MFPL_PH5MFP_SPI1_MOSI},
|
||||
|
||||
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
|
|
@ -497,54 +498,31 @@ const PinMap PinMap_SPI_MISO[] = {
|
|||
{PF_7, SPI_0, SYS_GPF_MFPL_PF7MFP_SPI0_MISO},
|
||||
{PG_4, SPI_2, SYS_GPG_MFPL_PG4MFP_SPI2_MISO},
|
||||
{PH_4, SPI_1, SYS_GPH_MFPL_PH4MFP_SPI1_MISO},
|
||||
|
||||
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
const PinMap PinMap_SPI_SCLK[] = {
|
||||
{PA_2, SPI_0, SYS_GPA_MFPL_PA2MFP_SPI0_CLK},
|
||||
{PA_4, SPI_0, SYS_GPA_MFPL_PA4MFP_SPI0_I2SMCLK},
|
||||
{PA_5, SPI_1, SYS_GPA_MFPL_PA5MFP_SPI1_I2SMCLK},
|
||||
{PA_7, SPI_1, SYS_GPA_MFPL_PA7MFP_SPI1_CLK},
|
||||
{PA_10, SPI_2, SYS_GPA_MFPH_PA10MFP_SPI2_CLK},
|
||||
{PA_13, SPI_2, SYS_GPA_MFPH_PA13MFP_SPI2_CLK},
|
||||
{PB_0, SPI_0, SYS_GPB_MFPL_PB0MFP_SPI0_I2SMCLK},
|
||||
{PB_1, SPI_1, SYS_GPB_MFPL_PB1MFP_SPI1_I2SMCLK},
|
||||
{NU_PINNAME_BIND(PB_1, SPI_1), SPI_1, SYS_GPB_MFPL_PB1MFP_SPI1_I2SMCLK},
|
||||
{PB_1, SPI_3, SYS_GPB_MFPL_PB1MFP_SPI3_I2SMCLK},
|
||||
{NU_PINNAME_BIND(PB_1, SPI_3), SPI_3, SYS_GPB_MFPL_PB1MFP_SPI3_I2SMCLK},
|
||||
{PB_3, SPI_1, SYS_GPB_MFPL_PB3MFP_SPI1_CLK},
|
||||
{PB_11, SPI_0, SYS_GPB_MFPH_PB11MFP_SPI0_I2SMCLK},
|
||||
{NU_PINNAME_BIND(PB_11, SPI_0), SPI_0, SYS_GPB_MFPH_PB11MFP_SPI0_I2SMCLK},
|
||||
{PB_11, SPI_3, SYS_GPB_MFPH_PB11MFP_SPI3_CLK},
|
||||
{NU_PINNAME_BIND(PB_11, SPI_3), SPI_3, SYS_GPB_MFPH_PB11MFP_SPI3_CLK},
|
||||
{PB_14, SPI_0, SYS_GPB_MFPH_PB14MFP_SPI0_CLK},
|
||||
{PC_1, SPI_1, SYS_GPC_MFPL_PC1MFP_SPI1_CLK},
|
||||
{PC_4, SPI_1, SYS_GPC_MFPL_PC4MFP_SPI1_I2SMCLK},
|
||||
{PC_10, SPI_3, SYS_GPC_MFPH_PC10MFP_SPI3_CLK},
|
||||
{PC_13, SPI_2, SYS_GPC_MFPH_PC13MFP_SPI2_I2SMCLK},
|
||||
{PD_2, SPI_0, SYS_GPD_MFPL_PD2MFP_SPI0_CLK},
|
||||
{PD_5, SPI_1, SYS_GPD_MFPL_PD5MFP_SPI1_CLK},
|
||||
{PD_13, SPI_0, SYS_GPD_MFPH_PD13MFP_SPI0_I2SMCLK},
|
||||
{NU_PINNAME_BIND(PD_13, SPI_0), SPI_0, SYS_GPD_MFPH_PD13MFP_SPI0_I2SMCLK},
|
||||
{PD_13, SPI_1, SYS_GPD_MFPH_PD13MFP_SPI1_I2SMCLK},
|
||||
{NU_PINNAME_BIND(PD_13, SPI_1), SPI_1, SYS_GPD_MFPH_PD13MFP_SPI1_I2SMCLK},
|
||||
{PD_14, SPI_0, SYS_GPD_MFPH_PD14MFP_SPI0_I2SMCLK},
|
||||
{NU_PINNAME_BIND(PD_14, SPI_0), SPI_0, SYS_GPD_MFPH_PD14MFP_SPI0_I2SMCLK},
|
||||
{PD_14, SPI_3, SYS_GPD_MFPH_PD14MFP_SPI3_I2SMCLK},
|
||||
{NU_PINNAME_BIND(PD_14, SPI_3), SPI_3, SYS_GPD_MFPH_PD14MFP_SPI3_I2SMCLK},
|
||||
{PE_4, SPI_3, SYS_GPE_MFPL_PE4MFP_SPI3_CLK},
|
||||
{NU_PINNAME_BIND(PE_4, SPI_3), SPI_3, SYS_GPE_MFPL_PE4MFP_SPI3_CLK},
|
||||
{PE_6, SPI_3, SYS_GPE_MFPL_PE6MFP_SPI3_I2SMCLK},
|
||||
{PE_8, SPI_2, SYS_GPE_MFPH_PE8MFP_SPI2_CLK},
|
||||
{PE_12, SPI_2, SYS_GPE_MFPH_PE12MFP_SPI2_I2SMCLK},
|
||||
{PF_8, SPI_0, SYS_GPF_MFPH_PF8MFP_SPI0_CLK},
|
||||
{PF_10, SPI_0, SYS_GPF_MFPH_PF10MFP_SPI0_I2SMCLK},
|
||||
{PG_3, SPI_2, SYS_GPG_MFPL_PG3MFP_SPI2_CLK},
|
||||
{PH_6, SPI_1, SYS_GPH_MFPL_PH6MFP_SPI1_CLK},
|
||||
{PH_8, SPI_1, SYS_GPH_MFPH_PH8MFP_SPI1_CLK},
|
||||
{PH_10, SPI_1, SYS_GPH_MFPH_PH10MFP_SPI1_I2SMCLK},
|
||||
|
||||
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
|
|
@ -567,7 +545,7 @@ const PinMap PinMap_SPI_SSEL[] = {
|
|||
{PG_2, SPI_2, SYS_GPG_MFPL_PG2MFP_SPI2_SS},
|
||||
{PH_7, SPI_1, SYS_GPH_MFPL_PH7MFP_SPI1_SS},
|
||||
{PH_9, SPI_1, SYS_GPH_MFPH_PH9MFP_SPI1_SS},
|
||||
|
||||
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
|
|
@ -629,10 +607,10 @@ const PinMap PinMap_CAN_TD[] = {
|
|||
{PC_5, CAN_0, SYS_GPC_MFPL_PC5MFP_CAN0_TXD},
|
||||
{PD_11, CAN_0, SYS_GPD_MFPH_PD11MFP_CAN0_TXD},
|
||||
{PE_14, CAN_0, SYS_GPE_MFPH_PE14MFP_CAN0_TXD},
|
||||
|
||||
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
|
||||
const PinMap PinMap_CAN_RD[] = {
|
||||
{PA_4, CAN_0, SYS_GPA_MFPL_PA4MFP_CAN0_RXD},
|
||||
{PA_13, CAN_0, SYS_GPA_MFPH_PA13MFP_CAN0_RXD},
|
||||
|
|
|
|||
Loading…
Reference in New Issue