Keep track of the current size allocated, maximum size allocated,
number of allocations, failed allocations and total size allocated for
both GCC and ARM. Report the maximum size allocated at the end of
testing.
Also, add a test to verify heap metrics are working as expected.
Check to see if ptr is NULL after acquiring the singleton lock to
prevent initialization race conditions. Also explicitly call the
constructor for type T.
1.Fix SPI flag name error
2.Fix SPI write blocking function
3.Use function pointer to implement SPI IRQ handler to reduce code size
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
This commit refactor the `lwip-eth/arch/TARGET_STM` folder and add the IPV4 feature for the
following targets:
- NUCLEO_F207ZG
- NUCLEO_F429ZI
- NUCLEO_F767ZI
- DISCO_F746NG
From the discussion on issue #2068:
Functions marked deprecated in the mbed library should notate when
the deprecation was started to allow efficient removal once a set
amount of time has expired.
Added the following macro:
MBED_DEPRECATED_SINCE("version", "message string")
Example usage:
MBED_DEPRECATED_SINCE("v5.1", "don't foo any more, bar instead")
void foo(int arg);
Adopted in existing deprecations:
- FunctionPointer
- RtosTimer
- Thread
This is common for any K64F not only for frdm-k64f that is named K64F. This
is causing conflicts with inheritance. This might be fixed better (long term
solution).
mbedci-test CI server is complian only with mbed-os release version 5.x.
This patch updates the Beetle section of the target.json file in order
to comply with the requirement.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
IAR compiler support is a mandatory requirement for mbed-os 5.1.
This patch adds support to IAR on Beetle mbed-os platform.
It contains:
* Linker script
* Startup code
* Target enablement
* Cordio libraries for BLE
Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
The RTC1 counter can increase while the new value for the CC register
used by the os tick is computed. As a result, when interrupts are enabled
again RTC1 counter and CC register value are equal. If these two values are
equal then the interrupt for the CC channel used by the OS tick will be
generated the next time the RTC counter reach that value.
In other words, the next OS tick will occur 131 seconds latter.
This issue possibly concern all NRF51 targets with 32K of RAM but is
only visible on NRF51_DK target when their is heavy BLE load.
Set well defined limits for the heap and configure GCC and ARMCC to
correctly check these. IAR already correctly checked its heap.
This also statically declares the main thread stack so the
linker is responsible for its placement.
Currently this uses the same mechanism used by the rtos to conditionally
include the network-socket API. Perhaps this should be builtin to the
config system?
Note: this does require that the bug-compatible inclusion of mbed.h
be removed to avoid include-order issues.
per @sg-
The KL46Z passes all tests except the following when built with IAR:
tests-mbedmicro-rtos-mbed-threads. This is because the heap is becomes
fully allocated.This commit increases the heap from 8K to 16K.
This PR enforces that the default_build in a target's definition in
hal/targets.json is set to standard to be included in the version 5
release.
This is being enforced because small builds do not support
multi-threading. This makes the capabilities more consistent across all
boards in the version 5 release.
NOTE: This removes the MOTE_L152RC and the LPC11U68
from the version 5 release list because the 'default_build' for these
targets is currently set to 'small'.
Remove the critical section in mbed_rtc_time.c and instead use a
mutex to protect this. This function does not need to be interrupt
safe, just thread safe.
This fixes crashes on the GCC_ARM toolchain on the RTC test due to
trying to lock the GCC environment mutex while in a critical section.
Prior to this patch, this failure was likely to occur on STM and LPC
processor families.
The i2c expected wrongly a 32MHz core clock.
This commit add the following things:
- I2C now handle both 80MHz and 48MHz core clock speeds
- Align system_stm32l4xx.x files
1. Remove M453. It is not to support in this commit.
2. Remove uvisor. It is incomplete and not to support in this commit.
3. Replace __disable_irq() with critical_section APIs.
The key 'release' in hal/targets.json is ambiguous. This changes the key
to 'release_versions' to emphasize that the entries should be version
numbers/strings and that it should be an array, not a singular value.
Previously, the condition for including a target in a release was decided
by a 'release' key being set to 'true' in hal/targets.json. This doesn't
have enough granularity when we release multiple versions of mbed. This PR
changes the 'release' key to an array of strings, where each member is a
version that the target supports. Currently the valid versions are '2' and
'5'.
This PR also adds more robust checking for invalid target configurations
in a release. This is enforced whenever the release list is built from the
data, preventing invalid targets from coming into the release.
Finally, it updates the build_release.py script to use the new api for
fetching release targets.
This commit adds two implementations for the mbed wait functions (wait,
wait_ms, wait_us):
- with the RTOS present, the wait functions will use `Thread::wait` for
millisecond delays and a busy wait loop for sub-millisecond delays.
- with the RTOS not present, the wait functions will always use a busy
wait loop.
The NRF5x driver transmits a byte by writing it to the uart data
register and then waiting for the TXRDY event indicating that this
byte was sent. If another UART interrupt comes in at the right time
the the UART ISR handler will process and clear the TXRDY event,
even though this interrupt is not enabled. This causes serial_putc
to get stuck waiting on an already cleared TXRDY.
This patch fixing the lockup by preventing the UART ISR from handling
the TXRDY event if this interrupt is not enabled.
Beetle board is built to optimize power consumption therefore does not
provide on-board LEDs.
This patch adds a comment in PinNames in order to clarify that the
Emulated LEDs are provided for compatibility reasons with the MBED test
suite.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
With this change, we check for all-1s before executing erase. This means that
the cost of erasing a range is now proportional to the amount of sectors which
have been programmed. This should result in latency improvements in our use of
containers based on flash storage.
The RWW fix is controversial because it requires holding off interrupts for
periods of around 5ms at a time. But there were still some minor improvements
around that change which could be retained. This commit contains these
changes.
The LF clock initialization is already handled by the SystemInit function.
This code was causing troubles when run on targets with an alternate LF
clock.
MBED OS requires an us_ticker_read function that returns a 32bit
value in microseconds. This can not be represented directly on
the Beetle Timer Load register.
max_us_on_reg = (0xFFFFFFFF ticks)/DIVIDER_US
This patch introduces an intermediate layer that counts the timer wraps
around and returns the correct value of us to the MBED library.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
MBED OS requires an lp_ticker_read function that returns a 32bit
value in microseconds. This can not be represented directly on
the Beetle Dual Timer Load register.
max_us_on_reg = (0xFFFFFFFF ticks)/DIVIDER_US
This patch introduces an intermediate layer that counts the timer wraps
around and returns the correct value of us to the MBED library.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Before, the following results in a compilation error:
const struct Object *obj;
void obj_doit(const Object *obj);
Callback<void()> cb(obj, obj_doit);
This is especially noticable when migrating from the old Thread
constructor, which previously _required_ const.
Short term fix for all cv qualifiers through a C cast:
void *_obj = (void*)obj;
the unified target for NRF51 has been renamed MCU_NRF51_UNIFIED and
hal implementation has been moved from TARGET_MCU_NRF51822 to
TARGET_MCU_NRF51822_UNIFIED.
In the process, the only real taget kept for NRF51 based targets is
NRF51_DK.
It is too risky at this stage to switch NRF51822 (16K target) to the new
softdevice. The overhead of the RTOS is already too huge.
those symbols are not used.
bootloader and log are not needed in our case, just remove files causing
troubles.
define app_timer symbols with the RTX implementation.
FunctionPointer/FunctionPointerArg0/FunctionPointerArg1 has been
replaced by the more flexible Callback template class.
For the motivation behind adopting the Callback class:
https://github.com/mbedmicro/mbed/pull/1783
Create the wrapper class SingletonPtr. This provides a safe way to
declare and use singletons. This class allows both the lazy
initialization of a singleton, and allows the singleton to be
garbage collected by the linker if it is never referenced.
This patch also updates the HAL to use SingletonPtr when declaring
singleton mutexes.
Set the channel mux before taking a reading rather than on
initialization. This allows ADC pins on both mux A and B to be used in
the same application.
This commit adds hardware flow control capabilities for the K64F family
of MCUs. This is a backport of these commits:
9bfcfd057277042cc945
with a few changes:
- since the current version of KSDK doesn't seem to have APIs for
manipulating the flow control settings, we change the peripheral
registers directly.
- updated pin maps for RTS/CTS in accordance to the K64F datasheet.
- uint32_t -> void *
- void ** -> uint32_t *
For whatever reason `uintptr_t` and `uint32_t` expand to incompatible
types `unsigned int` and `unsigned long int`. This is implicitely casted
when passed by value, but causes a warning in gcc and error in iar when
passed by pointer.
This issue is not present on x86_32 gcc
Reported in Issue #2119
There was some inconsistency in serial interrupt handling accross STM32
serial_api.c implementation. In case application wants to be notified of
Tx interrupt, it is mainly interested in transmission complete information,
which is the _TC interrupt.
The _TXE (Transmit Data REgister Empty) is used only within driver
in case SERIAL_ASYNCH is being supported to make the transmission
more efficient.
As first reported on STM32F3 family in #1682, we need to cope
with periods in the seconds range as well. This is fixed here in
the same way as was done for STM32F3 by using the pre-scaler.
As first reported on STM32F3 family in #1682, we need to cope
with periods in the seconds range as well. This is fixed here in
the same way as was done for STM32F3 by using the pre-scaler.
As first reported on STM32F3 family in #1682, we need to cope
with periods in the seconds range as well. This is fixed here in
the same way as was done for STM32F3 by using the pre-scaler.
As first reported on STM32F3 family in #1682, we need to cope
with periods in the seconds range as well. This is fixed here in
the same way as was done for STM32F3 by using the pre-scaler.
As first reported on STM32F3 family in #1682, we need to cope
with periods in the seconds range as well. This is fixed here in
the same way as was done for STM32F3 by using the pre-scaler.
As first reported on STM32F3 family in #1682, we need to cope
with periods in the seconds range as well. This is fixed here in
the same way as was done for STM32F3 by using the pre-scaler.
As first reported on STM32F3 family in #1682, we need to cope
with periods in the seconds range as well. This is fixed here in
the same way as was done for STM32F3 by using the pre-scaler.
Some of the objects in object.h are the same for all targets.
Create a place where to define those common definitions, and
start using it for pwm object.
Some of the objects in object.h are the same for all targets.
Create a place where to define those common definitions, and
start using it for pwm object.
Some of the objects in object.h are the same for all targets.
Create a place where to define those common definitions, and
start using it for pwm object.
Some of the objects in object.h are the same for all targets.
Create a place where to define those common definitions, and
start using it for pwm object.
Some of the objects in object.h are the same for all targets.
Create a place where to define those common definitions, and
start using it for pwm object.
Some of the objects in object.h are the same for all targets.
Create a place where to define those common definitions, and
start using it for pwm object.
Some of the objects in object.h are the same for all targets.
Create a place where to define those common definitions, and
start using it for pwm object.
Some of the objects in object.h are the same for all targets.
Create a place where to define those common definitions, and
start using it for pwm object.
The new period needs to be saved before the duty cycle is updated as
the period is used in pwmout_write function.
Also presclaer shall better be initiliazed properly.
- removing redundancy as discussed in PR #2087:
- in target.json the core option can have only this values : "Cortex-M0", "Cortex-M0+", "Cortex-M1", "Cortex-M3", "Cortex-M4", "Cortex-M7", "Cortex-A9" - Cortex-M4F and Cortex-M7F removed
- in target.json an additional fpu option with values: "single" and "double" can be used
- build and export scripts are changed to handle this
- tested (compiling, running on hardware) with nucleo_f767 (cortex-m7 with double precision fpu), nucleo_f746 (cortex-m7 with single precision fpu), nucleo_f446 and nucleo_l467 (cortex-m4 with single precision fpu), teensy31 (cortex-m4 without fpu - only build test), nucleo_l073 (cortex-m0)
- singletest results are added to PR #2087 comments
- creating new core name Cortex_M7F_DP for a target with a double precision fpu
- adding new core name to arm.py to set compiler/linker flags to a double precision fpu when configured in target.json
- up to now: gcc wrote flag for a double precision fpu -> target with STM32F746 didn't run when using double variables - mcu has only single precision fpu
- changing gcc.py to use single precision for Cortex-M7 und double precision for Cortex_M7F_DP
tested with NUCLEO_F746, NUCLEO_F767 and build.py+make.py and exporting with project.py + compiling/flashing
- iar.py need a similar extention - I didn't change that yet because
- did not run at the moment - python exception
- currently worked on in PR #1948
The host-test resets the target by sending a UART break. After this, it takes some
time for the target to come back up. Without this timeout, the __sync packet
sent by greentea would not be retransmitted by the interface chip (i.e. it would never
reach the target). Testing on different devices indicates that 2 seconds delay
is sufficient for the device to reset and the __sync packet to reach the target.
Prevent mismatch between _owner and peripheral configuration. In the previous
implementation, the following code would leave the peripheral in an inconsistent
state:
```
SPI spi1(...); // _owner is NULL, peripheral config is 1
spi1.transfer(...); // _owner is 1, config is 1
SPI spi2(...); // _owner is 1, config is 2
spi1.transfer(...) // 1 thinks it still owns peripheral, doesn't reconfigure
```
This patch adds BLE Cordio support into MBED HAL. It contains:
* Cordio and TRIM object files
* The Cordio stack header file
* The Cordio library for Beetle Systems precompiled for GCC and ARMCC
The BLE implementation will be provided in a future patch in the mbed-os
repository.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
In Beetle systems eFlash and Cache Flash are always enabled by default.
This patch updates the Mbed SDK Init procedure to reflect the changes in
the eFlash and Cache Flash Drivers provided in a previous patch.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
This patch adds BLE Cordio support into CMSIS. It provides:
* A modification for the linker scripts for both ARMCC and GCC
compilers that adds the cordio specific sections.
* A method to access the Flash stored MAC Address.
The CORDIO_RO_2.1.o and TRIM_2.1.o objects that rappresent the Cordio
firmware will be added by a future patch.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
svastm
Martin Kojtal
Russ Butler
Mahadevan Mahesh
Bartek Szatkowski
Russ Butler
Toyomasa Watarai
adustm
Martin Kojtal
mtkrtk
Yoshihiro TSUBOI
Christopher Haster
Jeremy Brodt
Vincenzo Frascino
bcostm
Vincent Coubard
Bogdan Marinescu
Bogdan Marinescu
Sam Grove
Evangelos Arkalis
Głąbek, Andrzej
Brian Daniels
EvArk
Peeyush pashine
Helmut Tschemernjak
cyliangtw
ccli8
neilt6
Andrzej Puzdrowski
Jarek Zgoda
Mihail Stoyanov
Rohit Grover
Erwan GOURIOU
jeromecoutant
Hasnain Virk
ohagendorf
lrks
Michel JAOUEN
Laurent MEUNIER
Michel Jaouen
Erwan Gouriou
Laurent Meunier
Aksel Skauge Mellbye
Steven Cooreman