mirror of https://github.com/ARMmbed/mbed-os.git
add scater files forARM CC and IAR for nRF52
add the startup file for IAR modyfi object.h for strict compilerpull/2234/head
Andrzej Puzdrowski
parent
a8c27bde69
commit
bd8c335c07
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@ -0,0 +1,24 @@
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;WITHOUT SOFTDEVICE:
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;LR_IROM1 0x00000000 0x00040000 {
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; ER_IROM1 0x00000000 0x00040000 {
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; *.o (RESET, +First)
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; *(InRoot$$Sections)
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; .ANY (+RO)
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; }
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; RW_IRAM1 0x20000000 0x00004000 {
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; .ANY (+RW +ZI)
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; }
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;}
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;
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;WITH SOFTDEVICE:
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LR_IROM1 0x1C000 0x0064000 {
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ER_IROM1 0x1C000 0x0064000 {
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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RW_IRAM1 0x20002080 0x0000DF80 {
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.ANY (+RW +ZI)
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}
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}
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@ -0,0 +1,46 @@
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/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
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/*-Specials-*/
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define symbol __ICFEDIT_intvec_start__ = 0x1c000;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_ROM_start__ = 0x1c000;
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define symbol __ICFEDIT_region_ROM_end__ = 0x7ffff;
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define symbol __ICFEDIT_region_RAM_start__ = 0x20002080;
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define symbol __ICFEDIT_region_RAM_end__ = 0x2000ffff;
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export symbol __ICFEDIT_region_RAM_start__;
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export symbol __ICFEDIT_region_RAM_end__;
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/*-Sizes-*/
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/*Heap 1/4 of ram and stack 1/8*/
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define symbol __ICFEDIT_size_cstack__ = 0xc00;
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define symbol __ICFEDIT_size_heap__ = 0x1800;
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/**** End of ICF editor section. ###ICF###*/
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define symbol __code_start_soft_device__ = 0x0;
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define memory mem with size = 4G;
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define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
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define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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initialize by copy { readwrite };
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do not initialize { section .noinit };
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keep { section .intvec };
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place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
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place in ROM_region { readonly };
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place in RAM_region { readwrite,
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block CSTACK,
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block HEAP };
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/*This is used for mbed applications build inside the Embedded workbench
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Applications build with the python scritps use a hex merge so need to merge it
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inside the linker. The linker can only use binary files so the hex merge is not possible
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through the linker. That is why a binary is used instead of a hex image for the embedded project.
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*/
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if(isdefinedsymbol(SOFT_DEVICE_BIN))
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{
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place at address mem:__code_start_soft_device__ { section .noinit_softdevice };
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}
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@ -0,0 +1,578 @@
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;/* Copyright (c) 2012 ARM LIMITED
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;
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; All rights reserved.
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions are met:
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; - Redistributions of source code must retain the above copyright
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; notice, this list of conditions and the following disclaimer.
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; - Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in the
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; documentation and/or other materials provided with the distribution.
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; - Neither the name of ARM nor the names of its contributors may be used
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; to endorse or promote products derived from this software without
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; specific prior written permission.
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; *
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
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; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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; POSSIBILITY OF SUCH DAMAGE.
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; ---------------------------------------------------------------------------*/
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; The modules in this file are included in the libraries, and may be replaced
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; by any user-defined modules that define the PUBLIC symbol _program_start or
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; a user defined start symbol.
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; To override the cstartup defined in the library, simply add your modified
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; version to the workbench project.
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;
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; The vector table is normally located at address 0.
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; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
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; The name "__vector_table" has special meaning for C-SPY:
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; it is where the SP start value is found, and the NVIC vector
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; table register (VTOR) is initialized to this address if != 0.
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MODULE ?cstartup
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;; Stack size default : Defined in *.icf (linker file). Can be modified inside EW.
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;; Heap size default : Defined in *.icf (linker file). Can be modified inside EW.
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;; Forward declaration of sections.
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SECTION CSTACK:DATA:NOROOT(3)
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SECTION .intvec:CODE:NOROOT(2)
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EXTERN __iar_program_start
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EXTERN SystemInit
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PUBLIC __vector_table
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PUBLIC __Vectors
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PUBLIC __Vectors_End
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PUBLIC __Vectors_Size
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DATA
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__vector_table
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DCD sfe(CSTACK)
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DCD Reset_Handler
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DCD NMI_Handler
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DCD HardFault_Handler
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DCD MemoryManagement_Handler
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DCD BusFault_Handler
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DCD UsageFault_Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler
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DCD DebugMonitor_Handler
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DCD 0 ; Reserved
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DCD PendSV_Handler
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DCD SysTick_Handler
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; External Interrupts
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DCD POWER_CLOCK_IRQHandler
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DCD RADIO_IRQHandler
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DCD UARTE0_UART0_IRQHandler
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DCD SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
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DCD SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
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DCD NFCT_IRQHandler
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DCD GPIOTE_IRQHandler
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DCD SAADC_IRQHandler
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DCD TIMER0_IRQHandler
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DCD TIMER1_IRQHandler
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DCD TIMER2_IRQHandler
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DCD RTC0_IRQHandler
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DCD TEMP_IRQHandler
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DCD RNG_IRQHandler
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DCD ECB_IRQHandler
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DCD CCM_AAR_IRQHandler
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DCD WDT_IRQHandler
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DCD RTC1_IRQHandler
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DCD QDEC_IRQHandler
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DCD COMP_LPCOMP_IRQHandler
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DCD SWI0_EGU0_IRQHandler
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DCD SWI1_EGU1_IRQHandler
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DCD SWI2_EGU2_IRQHandler
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DCD SWI3_EGU3_IRQHandler
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DCD SWI4_EGU4_IRQHandler
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DCD SWI5_EGU5_IRQHandler
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DCD TIMER3_IRQHandler
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DCD TIMER4_IRQHandler
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DCD PWM0_IRQHandler
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DCD PDM_IRQHandler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD MWU_IRQHandler
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DCD PWM1_IRQHandler
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DCD PWM2_IRQHandler
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DCD SPIM2_SPIS2_SPI2_IRQHandler
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DCD RTC2_IRQHandler
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DCD I2S_IRQHandler
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DCD FPU_IRQHandler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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__Vectors_End
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__Vectors EQU __vector_table
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__Vectors_Size EQU __Vectors_End - __Vectors
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; Default handlers.
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THUMB
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PUBWEAK Reset_Handler
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SECTION .text:CODE:NOROOT(2)
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Reset_Handler
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LDR R0, =SystemInit
|
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BLX R0
|
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LDR R0, =__iar_program_start
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BX R0
|
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|
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; Dummy exception handlers
|
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|
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PUBWEAK NMI_Handler
|
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SECTION .text:CODE:NOROOT(1)
|
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NMI_Handler
|
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B .
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PUBWEAK HardFault_Handler
|
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SECTION .text:CODE:NOROOT(1)
|
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HardFault_Handler
|
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B .
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|
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PUBWEAK MemoryManagement_Handler
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SECTION .text:CODE:NOROOT(1)
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MemoryManagement_Handler
|
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B .
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PUBWEAK BusFault_Handler
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SECTION .text:CODE:NOROOT(1)
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BusFault_Handler
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B .
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PUBWEAK UsageFault_Handler
|
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SECTION .text:CODE:NOROOT(1)
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UsageFault_Handler
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B .
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PUBWEAK SVC_Handler
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SECTION .text:CODE:NOROOT(1)
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SVC_Handler
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B .
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PUBWEAK DebugMonitor_Handler
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SECTION .text:CODE:NOROOT(1)
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DebugMonitor_Handler
|
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B .
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PUBWEAK PendSV_Handler
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SECTION .text:CODE:NOROOT(1)
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PendSV_Handler
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B .
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PUBWEAK SysTick_Handler
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SECTION .text:CODE:NOROOT(1)
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SysTick_Handler
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B .
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; Dummy interrupt handlers
|
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|
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PUBWEAK POWER_CLOCK_IRQHandler
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SECTION .text:CODE:NOROOT(1)
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POWER_CLOCK_IRQHandler
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B .
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PUBWEAK RADIO_IRQHandler
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SECTION .text:CODE:NOROOT(1)
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RADIO_IRQHandler
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B .
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PUBWEAK UARTE0_UART0_IRQHandler
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SECTION .text:CODE:NOROOT(1)
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UARTE0_UART0_IRQHandler
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B .
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PUBWEAK SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
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SECTION .text:CODE:NOROOT(1)
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SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
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B .
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PUBWEAK SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
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SECTION .text:CODE:NOROOT(1)
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SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
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B .
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PUBWEAK NFCT_IRQHandler
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SECTION .text:CODE:NOROOT(1)
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NFCT_IRQHandler
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B .
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PUBWEAK GPIOTE_IRQHandler
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SECTION .text:CODE:NOROOT(1)
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GPIOTE_IRQHandler
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B .
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PUBWEAK SAADC_IRQHandler
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SECTION .text:CODE:NOROOT(1)
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SAADC_IRQHandler
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B .
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PUBWEAK TIMER0_IRQHandler
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SECTION .text:CODE:NOROOT(1)
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TIMER0_IRQHandler
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B .
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PUBWEAK TIMER1_IRQHandler
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SECTION .text:CODE:NOROOT(1)
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TIMER1_IRQHandler
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B .
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PUBWEAK TIMER2_IRQHandler
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SECTION .text:CODE:NOROOT(1)
|
||||
TIMER2_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK RTC0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
RTC0_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK TEMP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
TEMP_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK RNG_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
RNG_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK ECB_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
ECB_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK CCM_AAR_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
CCM_AAR_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK WDT_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
WDT_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK RTC1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
RTC1_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK QDEC_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
QDEC_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK COMP_LPCOMP_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
COMP_LPCOMP_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK SWI0_EGU0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
SWI0_EGU0_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK SWI1_EGU1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
SWI1_EGU1_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK SWI2_EGU2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
SWI2_EGU2_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK SWI3_EGU3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
SWI3_EGU3_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK SWI4_EGU4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
SWI4_EGU4_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK SWI5_EGU5_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
SWI5_EGU5_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK TIMER3_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
TIMER3_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK TIMER4_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
TIMER4_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK PWM0_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
PWM0_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK PDM_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
PDM_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK MWU_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
MWU_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK PWM1_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
PWM1_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK PWM2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
PWM2_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK SPIM2_SPIS2_SPI2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
SPIM2_SPIS2_SPI2_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK RTC2_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
RTC2_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK I2S_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
I2S_IRQHandler
|
||||
B .
|
||||
|
||||
PUBWEAK FPU_IRQHandler
|
||||
SECTION .text:CODE:NOROOT(1)
|
||||
FPU_IRQHandler
|
||||
B .
|
||||
|
||||
|
||||
END
|
||||
|
||||
|
||||
|
|
@ -49,7 +49,8 @@ extern "C" {
|
|||
#endif
|
||||
|
||||
struct serial_s {
|
||||
};
|
||||
uint32_t placeholder; // struct is unused by nRF5x API implementation
|
||||
}; // but it must be not empty (required by strict compiler - IAR)
|
||||
|
||||
struct spi_s {
|
||||
uint8_t spi_idx;
|
||||
|
|
@ -83,8 +84,6 @@ struct gpio_irq_s {
|
|||
uint32_t ch;
|
||||
};
|
||||
|
||||
struct sleep_s {
|
||||
};
|
||||
|
||||
#include "gpio_object.h"
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue